Display device

Abstract

A display device includes: a substrate including a plurality of light-emitting devices, a first color filter, a second color filter, and a third color filter overlapping one of the light-emitting devices, and a first color conversion layer overlapping the first color filter, a second color conversion layer overlapping the second color filter, and a transmission layer overlapping the third color filter. The plurality of first color filters, the plurality of second color filters, and the plurality of third color filters are arranged in a first direction. The gaps between adjacent second color filters in a second direction overlap with the first color filter in the first direction.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2019-0001815 filed on January 7, 2019, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Exemplary embodiments of the present invention relate to a display device, and more particularly, to a display device for reducing color mixing between adjacent pixels. Background Art

[0004] A display device is a device for displaying an image. A light emitting diode display such as an organic light emitting diode (OLED) display is a generally used self-emissive display device.

[0005] The light emitting diode display has a self-luminous property. Therefore, unlike the liquid crystal display device, the light emitting diode display does not require an additional light source, thereby reducing its thickness and weight. In addition, the light emitting diode display has high quality characteristics such as low power consumption, high brightness and high refresh rate.

[0006] Generally, a light emitting diode display includes: a substrate; a plurality of thin film transistors disposed on the substrate; a plurality of insulating layers disposed between wirings configuring the thin film transistors; and a light emitting device connected to the thin film transistors. The light emitting device may be, for example, an organic light emitting element.

[0007] The plurality of light emitting devices are spaced apart from each other by a predetermined distance, and color mixing may occur between adjacent light emitting devices, thereby reducing display quality. Summary of the invention

[0008] Exemplary embodiments of the present invention provide a display device for improving color mixing.

[0009] According to an exemplary embodiment, a display device includes: a substrate including a plurality of light-emitting devices; a first color filter, a second color filter, and a third color filter overlapping one of the plurality of light-emitting devices; and a first color conversion layer overlapping the first color filter, a second color conversion layer overlapping the second color filter, and a transmission layer overlapping the third color filter. The plurality of the first color filters, the plurality of the second color filters, and the plurality of the third color filters are arranged in a first direction. The gaps between the adjacent second color filters in the second direction overlap with the first color filter in the first direction.

[0010] In an exemplary embodiment, in the first direction, gaps between adjacent first color filters in the second direction overlap with gaps between adjacent third color filters in the second direction.

[0011] In an exemplary embodiment, the first color filter is a red color filter, the second color filter is a green color filter, and the third color filter is a blue color filter.

[0012] In an exemplary embodiment, one light emitting device among the plurality of light emitting devices corresponds to one pixel, and the one pixel includes three transistors and one capacitor.

[0013] In an exemplary embodiment, the plurality of light emitting devices emit blue light.

[0014] In an exemplary embodiment, an area of ​​the first color filter overlapping a gap between adjacent second color filters in the second direction is about 10% to about 50% of a length of the first color filter in the second direction.

[0015] In an exemplary embodiment, the second color filter overlaps the light emitting element layer and the second color conversion layer in a direction perpendicular to the substrate.

[0016] In an exemplary embodiment, an area of ​​the first color filter is greater than an area of ​​the second color filter, and an area of ​​the second color filter is greater than an area of ​​the third color filter.

[0017] In an exemplary embodiment, an area of ​​the second color filter is greater than an area of ​​the first color filter, and an area of ​​the first color filter is greater than an area of ​​the third color filter.

[0018] According to an exemplary embodiment, a display device includes: a substrate including a plurality of light-emitting devices; a first color filter, a second color filter, and a third color filter overlapping one of the light-emitting devices; and a first color conversion layer overlapping the first color filter, a second color conversion layer overlapping the second color filter, and a transmission layer overlapping the third color filter. A plurality of the first color filters, a plurality of the second color filters, and a plurality of the third color filters are arranged along a first direction. A gap between adjacent second color filters in a second direction overlaps the first color filter and the third color filter in the first direction. A gap between adjacent third color filters in the second direction overlaps the first color filter and the second color filter in the first direction. A gap between adjacent first color filters in the second direction overlaps the second color filter and the third color filter in the first direction.

[0019] In an exemplary embodiment, the first color filter is a red color filter, the second color filter is a green color filter, and the third color filter is a blue color filter.

[0020] In an exemplary embodiment, one light emitting device among the plurality of light emitting devices corresponds to one pixel, and the one pixel includes three transistors and one capacitor.

[0021] In an exemplary embodiment, the plurality of light emitting devices emit blue light.

[0022] In an exemplary embodiment, an area of ​​the first color filter overlapping a gap between adjacent second color filters in the second direction is about 10% to about 50% of a length of the first color filter in the second direction.

[0023] In an exemplary embodiment, an area of ​​the first color filter overlapping a gap between adjacent third color filters in the second direction is about 10% to about 50% of a length of the first color filter in the second direction.

[0024] In an exemplary embodiment, the first color filter overlaps the light emitting element layer and the first color conversion layer in a direction perpendicular to the substrate, the second color filter overlaps the light emitting element layer and the second color conversion layer in a direction perpendicular to the substrate, and the third color filter overlaps the light emitting element layer and the transmission layer in a direction perpendicular to the substrate.

[0025] In an exemplary embodiment, an area of ​​the first color filter is greater than an area of ​​the second color filter, and an area of ​​the second color filter is greater than an area of ​​the third color filter.

[0026] In an exemplary embodiment, an area of ​​the second color filter is greater than an area of ​​the first color filter, and an area of ​​the first color filter is greater than an area of ​​the third color filter.

[0027] According to an exemplary embodiment, a display device includes: a substrate including a plurality of light-emitting devices; a first color filter, a second color filter, and a third color filter overlapping one of the plurality of light-emitting devices; and a first color conversion layer overlapping the first color filter, a second color conversion layer overlapping the second color filter, and a transmission layer overlapping the third color filter. The plurality of the first color filters, the plurality of the second color filters, and the plurality of the third color filters are arranged in a first direction. In the first direction, the upper edge of the first color filter is aligned with the upper edge of the third color filter, and is not aligned with the upper edge of the second color filter. In the first direction, the lower edge of the first color filter is aligned with the lower edge of the third color filter, and is not aligned with the lower edge of the second color filter.

[0028] In an exemplary embodiment, the first color filter is a red color filter, the second color filter is a green color filter, and the third color filter is a blue color filter. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and other features of the present invention will become more apparent by describing in detail exemplary embodiments of the present invention with reference to the accompanying drawings, in which:

[0030] Figure 1 A display device according to an exemplary embodiment of the present invention is shown;

[0031] Figure 2 Shown along Figure 1 A cross-sectional view taken along line II-II';

[0032] Figure 3 Shown along Figure 1 A cross-sectional view taken along line III-III';

[0033] Figure 4 A display device according to an exemplary embodiment of the present invention is shown;

[0034] Figure 5 Shown along Figure 4 A cross-sectional view taken along line V-V';

[0035] Figure 6 Shown along Figure 4 A cross-sectional view taken along line VI-VI';

[0036] Figure 7 A circuit diagram of one pixel of a display device according to an exemplary embodiment is shown;

[0037] Figure 8 A plan layout diagram of a plurality of pixels of a display substrate according to an exemplary embodiment is shown;

[0038] Fig. 9 Shown is a view taken along line IX-IX' Figure 8 A cross-sectional view of the display device shown in ; and

[0039] Fig.10 Shows a view taken along line X-X' Figure 8 A cross-sectional view of a display device shown in FIG. DETAILED DESCRIPTION

[0040] Exemplary embodiments of the present invention will be described more fully hereinafter with reference to the accompanying drawings.Throughout the drawings, like reference numerals may refer to like elements.

[0041] It will be understood that when a component such as a film, region, layer, or element is referred to as being "on," "connected to," "coupled to," or "adjacent to" another component, it can be directly on, directly connected to, coupled to, or adjacent to the other component, or there can be intermediate components. It will also be understood that when a component is referred to as being "between" two components, it can be the only component between the two components, or there can also be one or more intermediate components. It will also be understood that when a component is referred to as "covering" another component, it can be the only component that covers the other component, or one or more intermediate components can also cover the other component. Other words used to describe the relationship between elements should be interpreted in a similar manner.

[0042] For ease of description, spatially relative terms, such as "under", "below", "below", "below", "above", "above", etc., may be used herein to describe the relationship of one element or feature to another (multiple) element or feature as shown in the figure. It will be understood that in addition to the orientation depicted in the drawings, the spatially relative terms are intended to cover different orientations of the device in use or operation. For example, if the device in the drawings is flipped, the elements described as being "under" or "below" or "below" other elements or features will be oriented as "above" the other elements or features. Therefore, the exemplary terms "under" and "below" can include both orientations of above and below.

[0043] It will be understood that the terms "first", "second", "third", etc. are used herein to distinguish one element from another element, and the elements are not limited by these terms. Therefore, the "first" element in an exemplary embodiment may be described as the "second" element in another exemplary embodiment.

[0044] It should be understood that descriptions of features or aspects within each exemplary embodiment should typically be considered as available for other similar features or aspects in other exemplary embodiments, unless the context clearly dictates otherwise.

[0045] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0046] As used herein, the term "about" or "approximately" includes the value and an average value determined by one of ordinary skill in the art as being within an acceptable range of deviation for a particular value, taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations as understood by one of ordinary skill in the art. Further, it should be understood that although a parameter may be described herein as having "about" a certain value according to an exemplary embodiment, the parameter may be exactly the particular value or approximate the particular value within the measurement error, as will be understood by one of ordinary skill in the art.

[0047] Here, a plan view indicates a view for observing a side parallel to two directions (e.g., a first direction DR1 and a second direction DR2) intersecting each other, and a cross-sectional view indicates a view for observing a side cut in a direction (e.g., a third direction DR3) perpendicular to the side parallel to the first direction DR1 and the second direction DR2. When two constituent elements overlap each other, unless the context clearly indicates otherwise, this means that the two constituent elements overlap each other in the third direction DR3, for example, in a direction perpendicular to the upper side of the substrate.

[0048] A display device according to an exemplary embodiment of the present invention will now be described with reference to the accompanying drawings.

[0049] Figure 1 A display device according to an exemplary embodiment of the present invention is shown.

[0050] refer to Figure 1 In an exemplary embodiment, the display device includes a plurality of pixels and a plurality of color filters 230R, 230G, and 230B disposed on a first substrate 110. The color filters 230R, 230G, and 230B include a first color filter 230R, a second color filter 230G, and a third color filter 230B. The light blocking element 220 is disposed between the color filters 230R, 230G, and 230B.

[0051] The first color filter 230R is one of a plurality of first color filters 230R. The first color filters 230R are separated from each other in the second direction DR2. For example, the first color filters 230R are disposed adjacent to each other in the second direction DR2.

[0052] The second color filter 230G is one of the plurality of second color filters 230G. The second color filters 230G are separated from each other in the second direction DR2. For example, the second color filters 230G are disposed adjacent to each other in the second direction DR2.

[0053] The third color filter 230B is one of a plurality of third color filters 230B. The third color filters 230B are separated from each other in the second direction DR2. For example, the third color filters 230B are disposed adjacent to each other in the second direction DR2.

[0054] The first color filter 230R, the second color filter 230G, and the third color filter 230B are arranged in the first direction DR1. For example, the first color filter 230R, the second color filter 230G, and the third color filter 230B are alternately arranged in the first direction DR1. Figure 1 As shown in , the first gap P1 between the adjacent first color filters 230R in the second direction DR2 and the second gap P2 between the adjacent second color filters 230G in the second direction DR2 are not adjacent in the first direction DR1. For example, the first gap P1 is not aligned with the second gap P2 in the first direction DR1. For example, the upper boundary of the first gap P1 is not aligned with the upper boundary of the second gap P2 in the first direction DR1, and the lower boundary of the first gap P1 is not aligned with the lower boundary of the second gap P2 in the first direction DR1.

[0055] Similarly, the second gap P2 between the adjacent second color filters 230G in the second direction DR2 and the third gap P3 between the adjacent third color filters 230B in the second direction DR2 are not adjacent in the first direction DR1. For example, the second gap P2 is not aligned with the third gap P3 in the first direction DR1. For example, the upper boundary of the second gap P2 is not aligned with the upper boundary of the third gap P3 in the first direction DR1, and the lower boundary of the second gap P2 is not aligned with the lower boundary of the third gap P3 in the first direction DR1.

[0056] The first gap P1 between adjacent first color filters 230R may be aligned with the third gap P3 in the first direction DR1. For example, an upper boundary of the first gap P1 may be aligned with an upper boundary of the third gap P3 in the first direction DR1, and a lower boundary of the first gap P1 may be aligned with a lower boundary of the third gap P3 in the first direction DR1.

[0057] Therefore, reference Figure 1, the first color filter 230R and the third color filter 230B are aligned with each other in the first direction DR1, and the second color filter 230G is alternately arranged with the adjacent color filters 230R and 230B (e.g., the second color filter 230G is not aligned with the adjacent color filters 230R and 230B). For example, the first color filter 230R and the third color filter 230B may be aligned with each other in the first direction DR1, and the second color filter 230G arranged therebetween may be relatively staggered in the first direction DR1 (e.g., not aligned with the first color filter 230R and the third color filter 230B). For example, the upper edge of the first color filter 230R extending in the first direction DR1 is aligned with the upper edge of the third color filter 230B in the first direction DR1, but not aligned with the upper edge of the second color filter 230G in the first direction DR1; the lower edge of the first color filter 230R extending in the first direction DR1 is aligned with the lower edge of the third color filter 230B in the first direction DR1, but not aligned with the lower edge of the second color filter 230G in the first direction DR1. The pattern can be repeated for multiple first color filters 230R, second color filters 230G, and third color filters 230B. As a result of this arrangement, color mixing between adjacent pixels can be reduced, thereby improving display quality, as described further below.

[0058] exist Figure 1 In the embodiment, a portion of the first length L1 of the first color filter 230R in the second direction DR2 overlaps with the second gap P2 of the second color filter 230G in the first direction DR1. For example, the second gap P2 between adjacent second color filters 230G may overlap (e.g., be aligned with) a portion of the adjacent first color filter 230R in the first direction DR1. Thus, color mixing of the overlapping area and the adjacent pixels can be prevented or reduced.

[0059] When the color filters 230R, 230G, and 230B are arranged in parallel and aligned with each other, the first length L1 is parallel to the adjacent pixels. Figure 1 When the color filters 230R, 230G, and 230B are alternately arranged as shown in (e.g., when at least one of the color filters 230R, 230G, and 230B is staggered relative to the other color filters), the area except the second gap P2 from the first length L1 is aligned with the adjacent pixel. Thus, the area where color mixing occurs can be reduced. When the length of one pixel is defined as the sum of the first length L1 and the first gap P1, the reduction rate of color mixing of the display device according to an exemplary embodiment can be defined as 1-((L1-P1) / L1).

[0060] For example, regarding a display device having a ratio of the first length L1 of the first color filter 230R to the first gap P1 of 3:1, when the second color filter 230G is Figure 1 When arranged alternately as shown in , the area where color mixing occurs is reduced by about 33% compared to the case where all color filters are aligned with each other.

[0061] For example, the area overlapped with the first gap P2 of the second color filter 230G from among the first length L1 of the first color filter 230R may be about 10% to about 50%.

[0062] As will be described in further detail below, the transistors of the pixels corresponding to the first color filter 230R, the second color filter 230G, and the third color filter 230B are not arranged alternately like the color filters, but are arranged uniformly. Figure 1 In the embodiment, the second color filter 230G and the adjacent color filters 230R and 230B are alternately arranged, and the arrangement of transistors including gate lines and data lines at the bottom of the second color filter 230G can be the same as that of adjacent pixels (e.g., pixels corresponding to the first color filter 230R).

[0063] However, the color filters 230R, 230G, and 230B may overlap with the light emitting devices.

[0064] In an exemplary embodiment, the light emitting device includes a first electrode, a light emitting element layer, and a second electrode, and the second color filter 230G and the light emitting device may be stacked on each other so that the corresponding electrode disposed in the same column as the second color filter 230G may also be alternately disposed with pixels in an adjacent column. The detailed arrangement of the light emitting device will be described below.

[0065] refer to Figure 1 , the plane area of ​​the first color filter 230R may be greater than the plane area of ​​the second color filter 230G, and the plane area of ​​the second color filter 230G may be greater than the plane area of ​​the third color filter 230B. Here, the first color filter 230R may be a red color filter, the second color filter 230G may be a green color filter, and the third color filter 230B may be a blue color filter. However, the present invention is not limited thereto.

[0066] In an exemplary embodiment, the second color filter 230G may be the largest among the first color filter 230R, the second color filter 230G, and the third color filter 230B, and the third color filter 230B may be the smallest among the first color filter 230R, the second color filter 230G, and the third color filter 230B.

[0067] Figure 1 The first substrate 110 , the first color filter 230R, the second color filter 230G, and the third color filter 230B are shown. Figure 1The display device shown in includes a color conversion layer overlapped with each color filter 230R, 230G, and 230B. The color filters 230R, 230G, and 230B may correspond to one pixel, respectively, and each pixel may include three transistors and one capacitor. A detailed configuration will be described below.

[0068] Figure 2 Shown along Figure 1 A cross-sectional view taken along line II-II'.

[0069] refer to Figure 2 , a display device according to an exemplary embodiment includes a display substrate 100 and a color conversion substrate 300 .

[0070] The display substrate 100 includes a first substrate 110, a plurality of transistors TFT disposed on the first substrate 110, and an insulating layer 180. A first electrode 191 and a partition wall 350 are disposed on the insulating layer 180, and the first electrode 191 is disposed in an opening of the partition wall 350 and connected to the transistor TFT. A second electrode 270 is disposed on the partition wall 350, and a light emitting element layer 370 is disposed between the first electrode 191 and the second electrode 270. The first electrode 191, the second electrode 270, and the light emitting element layer 370 may be collectively referred to as a light emitting device ED.

[0071] The light blocking member 220 is disposed on the second substrate 210. The light blocking member 220 may overlap with the partition wall 350 of the first substrate 110. For example, the light blocking member 220 and the partition wall 350 may be aligned with each other in the third direction DR3.

[0072] The color filters 230R, 230G, and 230B are disposed between the light blocking elements 220. For example, Figure 2 As shown in , a light blocking element 220 may be disposed between adjacent color filters 230R and 230G, and another light blocking element 220 may be disposed between adjacent color filters 230G and 230B.

[0073] The color filter insulating layer 250 is disposed on the color filters 230R, 230G, and 230B and the light blocking element 220. The color conversion layers 330R and 330G and the transmission layer 330B are disposed on the color filter insulating layer 250. That is, the color filter insulating layer 250 is disposed between the color conversion layers 330R and 330G, the transmission layer 330B, and the color filters 230R, 230G, and 230B. The color conversion layers 330R and 330G and the transmission layer 330B may overlap with the corresponding color filters 230R, 230G, and 230B. For example, the color conversion layer 330R may be aligned with the first color filter 230R in the third direction DR3, the color conversion layer 330G may be aligned with the second color filter 230G in the third direction DR3, and the color conversion layer 330B may be aligned with the third color filter 230B in the third direction DR3.

[0074] The color conversion layers 330R and 330G include quantum dots and convert incident light into another color. The color conversion layers 330R and 330G include a red conversion layer 330R and a green conversion layer 330G and convert blue light emitted by the light emitting element layer 370 into red light and green light, respectively. The transmission layer 330B can transmit blue light.

[0075] A planarization film, which may correspond to the partition wall 350 , may be disposed on the color conversion layers 330R and 330G and the transmission layer 330B.

[0076] That is, the display device includes the display substrate 100 and the color conversion substrate 300, and light emitted from the display substrate 100 passes through the color conversion layers 330R and 330G or the transmission layer 330B of the color conversion substrate 300, passes through the color filters 230R, 230G, and 230B, and then is emitted to the outside.

[0077] In this case, the light emitted by the light emitting element layer 370 is emitted in many directions. Thus, the light may be input to the color conversion layers 330R and 330G or the transmission layer 330B of the adjacent pixels (i.e., the unintended pixels) instead of being input to the color conversion layers 330R and 330G or the transmission layer 330B overlapping the light emitting element layer 370 (i.e., the intended pixels). This results in color mixing, which may reduce display quality. The mixing of colors in Figure 2 Indicated by arrows.

[0078] like Figure 2 As shown in , as the length B1 of the light blocking element 220 or the length W1 of the partition wall 350 decreases, the mixing of colors is greater. However, in order to manufacture a display device with high quality and high resolution, the area of ​​the light blocking element between adjacent color filters may not be increased. This is because when the length B1 of the light blocking element 220 is increased, the aperture ratio is reduced.

[0079] However, according to exemplary embodiments, by alternately arranging the second color filter 230G and the adjacent color filters 230R and 230B without increasing the length B1 of the light blocking member 220 , mixing of colors occurring in the display device may be reduced.

[0080] Figure 3 Shown along Figure 1 A cross section taken along line III-III'.

[0081] refer to Figure 1 and Figure 3 , with respect to the cross section passing through the gap P2 of the second color filter 230G, the length B1 of the light blocking member 220 and the length W1 of the partition wall 350 are greater than Figure 2 Therefore, light emitted by one light emitting device ED is not input to the color conversion layer or the transmission layer of an adjacent pixel, thereby preventing the mixing of colors.

[0082] like Figure 2 and Figure 3 As shown in FIG. 1 , regarding the display device, the light emitting element layer 370, the color conversion layers 330R and 330G, the transmission layer 330B or the color filters 230R, 230G and 230B overlap with the first substrate 110 in the third direction DR3 (eg, the vertical direction). Therefore, Figure 1 A configuration is shown in which second color filters 230G are alternately disposed relative to color filters 230R and 230B, and color conversion layers 330G and light emitting element layers 370 overlapping second color filters 230G are alternately disposed with adjacent color conversion layers 330R or light emitting element layers 370 .

[0083] The first color filter 230R may display red, the second color filter 230G may display green, and the third color filter 230B may display blue.

[0084] Figures 1 to 3 A configuration is shown in which the second color filter 230G is alternately arranged relative to the first color filter 230R and the third color filter 230B. However, the present invention is not limited thereto. For example, in an exemplary embodiment, the first color filter 230R may be alternately arranged relative to the second color filter 230G and the third color filter 230B, or the third color filter 230B may be alternately arranged relative to the first color filter 230R and the second color filter 230G.

[0085] Now refer to Figures 4 to 6 A display device according to an exemplary embodiment of the present invention is described.

[0086] Figure 4 A display device according to an exemplary embodiment of the present invention is shown.

[0087] refer to Figure 4 , except that the first color filter 230R and the third color filter 230B are not aligned with each other in the first direction DR1, referring to Figures 4 to 6 The display device according to an exemplary embodiment will be described basically the same as that of reference Figures 1 to 3 The display device according to an exemplary embodiment described in the embodiment of the present invention is the same as that described in the embodiment of the present invention. Figures 1 to 3 Different, according to Figures 4 to 6 In an exemplary embodiment, the first color filter 230R and the third color filter 230B are not aligned with each other in the first direction DR1. For convenience of explanation, further description of previously described elements and technical aspects may be omitted.

[0088] In accordance with Figures 1 to 3 In an exemplary embodiment of the present invention, the second color filter 230G is not aligned with the adjacent color filters 230R and 230B in the first direction DR1. Figures 4 to 6 In an exemplary embodiment, the first color filter 230R, the second color filter 230G, and the third color filter 230B are alternately arranged and are staggered relative to each other. That is, the first color filter 230R, the second color filter 230G, and the third color filter 230B are not aligned with each other in the first direction DR1.

[0089] Therefore, the first gap P1 of the first color filter 230R, the second gap P2 of the second color filter 230G, and the third gap P3 of the third color filter 230B do not overlap with each other. In an exemplary embodiment, there is no overlap between the first gap P1, the second gap P2, and the third gap P3. In an exemplary embodiment, the first gap P1, the second gap P2, and the third gap P3 may partially overlap with each other, but do not completely overlap with each other.

[0090] About Based on Reference Figure 4 In the display device of the exemplary embodiment described, the area in which the first color filter 230R, the second color filter 230G, and the third color filter 230B overlap in the first direction DR1 is small. For example, the area overlapping with the second color filter 230G corresponds to a portion generated by subtracting the second gap P2 from the entire length L1 of the first color filter 230R in the second direction DR2. In addition, the area overlapping with the third color filter 230B in the entire length L1 of the first color filter 230R corresponds to a portion generated by subtracting the third gap P3 from the entire length L1.

[0091] Therefore, the area overlapping with the adjacent color filter can be reduced, and thus, the mixing of colors can be reduced.

[0092] For example, the area overlapped with the first gap P2 of the second color filter 230G from the first length L1 of the first color filter 230R may be about 10% to about 50%. Other color filters may be similar thereto.

[0093] Figure 5 Shown along Figure 4 A cross-sectional view taken along the line V-V' of FIG. Figure 4 and Figure 5 In the cross section passing through the second gap P2, the separation distance between the first color filter 230R and the third color filter 230B corresponding to the length B1 of the light blocking member 220 increases. Thus, mixing of colors can be prevented or reduced.

[0094] Figure 6 Shown along Figure 4 A cross-sectional view taken along line VI-VI'. Figure 5 and Figure 6 In the region overlapping the third gap P3, the separation distance between the second color filter 230G and the first color filter 230R corresponding to the length B1 of the light blocking member 220 increases. Thus, mixing of colors can be prevented or reduced.

[0095] As described above, the display device according to the exemplary embodiment of the present invention arranges part or all of the color filters 230R, 230G, and 230B so that they are not aligned with adjacent color filters. Thus, color mixing between adjacent pixels can be prevented or reduced.

[0096] As described above, the color filters 230R, 230G, and 230B overlap the color conversion layers 330R and 330G or the transmission layer 330B and the light emitting element layer 370 in the third direction DR3. Therefore, when one color filter is arranged so as not to be aligned with an adjacent color filter, the color conversion layer or the transmission layer 330B and the light emitting element layer 370 overlapping with the color filter may also be arranged so as not to be aligned with an adjacent pixel.

[0097] However, the pixels corresponding to the respective color filters 230R, 230G, and 230B may have the same arrangement. That is, when the second color filter 230G is arranged so that it is not aligned with the adjacent color filters 230R and 230B, the transistor corresponding to the second color filter 230G may be arranged so that it is aligned with the transistor of another adjacent pixel.

[0098] In addition, one pixel may include three transistors and one capacitor. However, this is an example and is not limited thereto.

[0099] A detailed pixel configuration of the display substrate 100 of the display device according to an exemplary embodiment of the present invention will now be described.

[0100] Figure 7 A circuit diagram of one pixel of a display device according to an exemplary embodiment is shown.

[0101] refer to Figure 7, the display device includes a plurality of pixels, and one pixel may include a plurality of transistors T1, T2, and T3, a capacitor Cst, and at least one light emitting device ED. This exemplary embodiment will illustrate a case where one pixel includes one light emitting device ED. The light emitting device ED may be, for example, a light emitting diode. Therefore, for example, the display device may be a light emitting diode display device such as an organic light emitting diode (OLED) display device.

[0102] The plurality of transistors T1, T2, and T3 include a first transistor T1, a second transistor T2, and a third transistor T3. A source electrode and a drain electrode to be described refer to two electrodes provided on respective sides of channels of the transistors T1, T2, and T3, and they are interchangeable.

[0103] The first transistor T1 includes a gate electrode G1 connected to a first end of the capacitor Cst, a source electrode S1 connected to a driving voltage line for transmitting a driving voltage ELVDD, and a drain electrode D1 connected to an anode of the light emitting device ED and a second end of the capacitor Cst. The first transistor T1 may receive the data voltage DAT according to a switching operation of the second transistor T2, and may provide a driving current to the light emitting device ED according to a voltage stored in the capacitor Cst.

[0104] The second transistor T2 includes a gate electrode G2 connected to a first scan line for transmitting a first scan signal SC, a source electrode S2 connected to a data line for transmitting a data voltage DAT or a reference voltage, and a drain electrode D2 connected to a first end of the capacitor Cst and the gate electrode G1 of the first transistor T1. The second transistor T2 may be turned on according to the first scan signal SC, and may transmit the reference voltage or the data voltage DAT to the gate electrode G1 of the first transistor T1 and the capacitor Cst.

[0105] The third transistor T3 includes a gate electrode G3 connected to a second scan line for transmitting a second scan signal SS, a source electrode S3 connected to a second end of the capacitor Cst, a drain electrode D1 of the first transistor T1, and an anode of the light emitting device ED, and a drain electrode D3 connected to an initialization voltage line for transmitting an initialization voltage INIT. The third transistor T3 may be turned on according to the second scan signal SS, and may transmit the initialization voltage INIT to the anode of the light emitting device ED and the second end of the capacitor Cst to initialize the voltage at the anode of the light emitting device ED.

[0106] The capacitor Cst includes a first end connected to the gate electrode G1 of the first transistor T1 and a second end connected to the source electrode S3 of the third transistor T3 and the anode of the light emitting device ED. The cathode of the light emitting device ED is connected to a common voltage line for transmitting a common voltage ELVSS.

[0107] The light emitting device ED may emit light according to the driving current formed by the first transistor T1.

[0108] Reference will now be described Figure 7 An example of circuit operation is described, particularly an example of operation for one frame. Here, the case where the transistors T1, T2, and T3 are n-channel transistors will be taken as an example, but the transistors T1, T2, and T3 are not limited thereto.

[0109] When a frame starts, a high-level first scan signal SC and a high-level second scan signal SS are provided to turn on the second transistor T2 and the third transistor T3 for the initialization part. The reference voltage provided by the data line is supplied to the gate electrode G1 of the first transistor T1 and the first end of the capacitor Cst through the turned-on second transistor T2, and the initialization voltage INIT is supplied to the drain electrode D1 of the first transistor T1 and the anode of the light-emitting device ED through the turned-on third transistor T3. Therefore, the drain electrode D1 of the first transistor T1 and the anode of the light-emitting device ED are initialized by the initialization voltage INIT for the initialization part. In this case, the voltage difference between the reference voltage and the initialization voltage INIT is stored in the capacitor Cst.

[0110] In the sensing part, when the second scanning signal SS becomes a low level while maintaining the high level first scanning signal SC, the second transistor T2 maintains the on state, and the third transistor T3 is turned off. The gate electrode G1 of the first transistor T1 and the first end of the capacitor Cst are maintained at the reference voltage through the turned-on second transistor T2, and the drain electrode D1 of the first transistor T1 and the anode of the light-emitting device ED are disconnected from the initialization voltage INIT through the turned-off third transistor T3. Therefore, when the current flows from the source electrode S1 to the drain electrode D1, the first transistor T1 is turned off, and the voltage of the drain electrode D1 becomes the "reference voltage-Vth". Vth represents the threshold voltage of the first transistor T1. In this case, the voltage difference between the gate electrode G1 and the drain electrode D1 of the first transistor T1 is stored in the capacitor Cst, and the sensing of the threshold voltage Vth of the first transistor T1 is completed. The characteristic deviation of the first transistor T1 that is variable for each pixel can be externally compensated by generating a data signal, and the data signal is compensated by applying the characteristic information sensed for the sensing part.

[0111] When the first scan signal SC of a high level is supplied to the data input part and the second scan signal SS of a low level is supplied, the second transistor T2 is turned on and the third transistor T3 is turned off. The data voltage DAT provided from the data line is supplied to the gate electrode G1 of the first transistor T1 and the first end of the capacitor Cst through the turned-on second transistor T2. In this case, the drain electrode D1 of the first transistor T1 and the anode of the light emitting device ED can maintain the potential of the sensing part through the turned-off first transistor T1.

[0112] For the light emitting part, the first transistor T1 turned on by the data voltage DAT transmitted to the gate electrode G1 generates a driving current caused by the data voltage DAT, and the light emitting device ED may emit light by the driving current.

[0113] Figure 8 A plan layout diagram of a plurality of pixels PX1 , PX2 , and PX3 of a display substrate according to an exemplary embodiment is shown. Fig. 9 Shown is a view taken along line IX-IX' Figure 8 A cross-sectional view of a display device shown in FIG. Fig.10 Shows a view taken along line X-X' Figure 8 A cross-sectional view of a display device shown in FIG.

[0114] refer to Figures 8 to 10 , the display substrate 100 may include a first substrate 110. The first substrate 110 may include an insulating material such as, for example, glass or plastic. The first substrate 110 may be a flexible substrate.

[0115] A barrier layer as an insulating layer may be disposed on the first substrate 110, and a lower layer including a plurality of lower patterns 111a, 111b, and 111c as a first conductive layer may be disposed thereon. The lower layer has conductivity and may include various conductive metals or semiconductor materials having conductive properties corresponding thereto.

[0116] The buffer layer 120 as an insulating layer is disposed on the lower layer. That is, the lower layer may be disposed between the first substrate 110 and the buffer layer 120.

[0117] An active layer including a plurality of active patterns 130a, 130b, and 130c is disposed on the buffer layer 120. That is, the lower layer may be disposed between the first substrate 110 and the active layer. The active patterns 130a, 130b, and 130c disposed on each pixel PX1, PX2, and PX3 may include channel regions 134a, 134b, and 134c for forming channels of transistors T1, T2, and T3 and conductive regions connected thereto. The conductive regions of the active patterns 130a, 130b, and 130c include source regions 133a, 133b, and 133c and drain regions 135a, 135b, and 135c of transistors T1, T2, and T3. The active pattern 130a may be connected to the active pattern 130c on the pixel PX1, PX2, and PX3.

[0118] The active layer may include a semiconductor material such as, for example, amorphous silicon, polycrystalline silicon, or an oxide semiconductor.

[0119] An insulating pattern 144 as a first insulating layer is disposed on the active layer. For example, the insulating pattern 144 may overlap the channel regions 134a, 134b, and 134c of the active patterns 130a, 130b, and 130c, and may be disposed on the channel regions 134a, 134b, and 134c. In an exemplary embodiment, the insulating pattern 144 does not substantially overlap the conductive regions of the active patterns 130a, 130b, and 130c.

[0120] The second conductive layer may be disposed on the insulating pattern 144. The second conductive layer may include a first scan line 151 for transmitting a first scan signal SC, a second scan line 152 for transmitting a second scan signal SS, a horizontal initialization voltage line 153 for transmitting an initialization voltage INIT, a horizontal driving voltage line 172b for transmitting a driving voltage ELVDD, a driving gate electrode 155, a second gate electrode 154b, and a third gate electrode 154c. The gate electrode G1, the gate electrode G2, and the gate electrode G3 in the above circuit diagram correspond to the first gate electrode 154a, the second gate electrode 154b, and the third gate electrode 154c.

[0121] The first scan line 151 and the second scan line 152, the horizontal initialization voltage line 153, and the horizontal driving voltage line 172b may extend in the first direction DR1. The driving gate electrode 155 may be disposed between the first scan line 151 and the second scan line 152. The second gate electrode 154b may be connected to the first scan line 151 and may protrude below the first scan line 151. The third gate electrode 154c may be connected to the second scan line 152 and may protrude above the second scan line 152.

[0122] The driving gate electrode 155 disposed on the pixels PX1, PX2, and PX3 may include an extension 155a protruding upward and extending substantially in the second direction DR2, and a first gate electrode 154a protruding downward and extending substantially in the second direction DR2. The first gate electrode 154a disposed on the pixel PX3 may be bent at least twice at a portion connected to the driving gate electrode 155.

[0123] The first gate electrode 154a crosses the active pattern 130a and overlaps the channel region 134a of the active pattern 130a. The second gate electrode 154b crosses the active pattern 130b and overlaps the channel region 134b of the active pattern 130b. The third gate electrode 154c crosses the active pattern 130c and overlaps the channel region 134c of the active pattern 130c.

[0124] The second insulating layer 160 may be disposed on the second conductive layer. The buffer layer 120 and / or the second insulating layer 160 may include a plurality of contact holes 24 , 26 , 60 , 61 , 62 , 63 , 64 , 65 , 66 , 67 , 68 , and 69 .

[0125] The third conductive layer may be disposed on the second insulating layer 160. The third conductive layer may include a plurality of data lines 171a, 171b, and 171c, a driving voltage line 172a, a common voltage line 170, an initialization voltage line 173, a capacitor electrode 175, a plurality of connection elements 174, 176, 177, and 178, and a plurality of driving voltage patterns 172c and 172d.

[0126] The data lines 171 a , 171 b , and 171 c , the driving voltage line 172 a , the common voltage line 170 , the initialization voltage line 173 , and the driving voltage patterns 172 c and 172 d may substantially extend in the second direction DR2 to cross the first scan line 151 and / or the second scan line 152 .

[0127] refer to Figure 8 The described group of multiple pixels PX1, PX2 and PX3 may be repeatedly arranged in the first direction DR1 and may be disposed adjacent to each other. The common voltage line 170 may be disposed on each side of the group of multiple pixels PX1, PX2 and PX3 shown. That is, one common voltage line 170 may be provided for each repeated group of multiple pixels PX1, PX2 and PX3. When the repeated group of multiple pixels PX1, PX2 and PX3 includes three pixels PX1, PX2 and PX3, three data lines 171a, 171b and 171c and at least one driving voltage line 172a, at least one initialization voltage line 173 may be disposed between two adjacent common voltage lines 170.

[0128] Each of the data lines 171a, 171b, and 171c passes through at least one contact hole 64 (in the second insulating layer 160) Figure 8 2 and 3. Two contact holes 64 are shown for each of the pixels PX1, PX2, and PX3, electrically connected to the source region 133b of the active pattern 130b.

[0129] Figure 8 It is shown that one data line 171a includes an end portion 179, and each of the data lines 171b and 171c may include an end portion 179. The end portion 179 may be disposed in a pad region disposed on an edge of the display device.

[0130] The driving voltage line 172a may be disposed on one pixel, such as the pixel PX1, and the driving voltage patterns 172c and 172d may be disposed on other pixels PX2 and PX3. The driving voltage line 172a may extend in the second direction DR2 and may extend near a plurality of pixels. In a manner similar to the data line 171a, the driving voltage line 172a may include an end 172e disposed in the pad region.

[0131] The driving voltage line 172a and the driving voltage patterns 172c and 172d are formed through at least one contact hole 61 (at the bottom of the second insulating layer 160) of the second insulating layer 160. Figure 8 , two contact holes 61 are shown in pixels PX1 and PX2 and one contact hole 61 is shown in pixel PX3) are electrically connected to the source region 133a of the active pattern 130a. The driving voltage line 172a and the driving voltage patterns 172c and 172d are formed through at least one contact hole 60 (in the second insulating layer 160) of the second insulating layer 160. Figure 8 , two contact holes 60 are shown in one of the pixels PX1, PX2, and PX3) are electrically connected to the horizontal driving voltage line 172b. Therefore, the horizontal driving voltage line 172b and the driving voltage patterns 172c and 172d can transmit the driving voltage ELVDD together with the driving voltage line 172a, and can transmit the driving voltage ELVDD in a mesh form in the directions including the first direction DR1 and the second direction DR2 in the display device.

[0132] The initialization voltage line 173 is electrically connected to the horizontal initialization voltage line 153 through the contact hole 69 of the second insulating layer 160. Therefore, the horizontal initialization voltage line 153 may transmit the initialization voltage INIT together with the initialization voltage line 173. When one initialization voltage line 173 is formed for each group of pixels PX1, PX2, and PX3, the initialization voltage INIT may be transmitted to the pixels PX1, PX2, and PX3 through the horizontal initialization voltage line 153.

[0133] The capacitor electrode 175 may be disposed on each of the pixels PX1, PX2, and PX3. The capacitor electrode 175 may overlap a majority of the driving gate electrode 155 corresponding to the second insulating layer 160 therebetween, and thus may form a capacitor Cst.

[0134] The capacitor electrode 175 includes a connector 175a protruding downward. The connector 175a passes through at least one contact hole 62 of the second insulating layer 160 (in Figure 8 In the embodiment, three contact holes 62 are shown in each pixel PX1, PX2, PX3) electrically connected to the drain region 135a of the active pattern 130a and the source region 133c of the active pattern 130c connected thereto. The capacitor electrode 175 is electrically connected to the lower pattern 111a through the contact hole 68 of the second insulating layer 160 and the buffer layer 120.

[0135] The connection element 174 is electrically connected to the second scan line 152 and the lower pattern 111 c through the second insulating layer 160 or the buffer layer 120 and the two contact holes 24 of the second insulating layer 160 , and may electrically connect the second scan line 152 and the lower pattern 111 c .

[0136] The connection element 176 is electrically connected to the first scan line 151 and the lower pattern 111 b through the second insulating layer 160 or the buffer layer 120 and the two contact holes 26 of the second insulating layer 160 , and may electrically connect the first scan line 151 and the lower pattern 111 b .

[0137] The connection element 177 passes through at least one contact hole 63 (at the bottom of the second insulating layer 160) on each of the pixels PX1, PX2 and PX3. Figure 8 , two contact holes 63 are shown in one of the pixels PX1, PX2, and PX3) are electrically connected to the drain region 135c of the active pattern 130c, and are electrically connected to the horizontal initialization voltage line 153 through the contact hole 67 of the second insulating layer 160. Thus, the drain region 135c of the active pattern 130c can be electrically connected to the horizontal initialization voltage line 153.

[0138] The horizontal initialization voltage line 153 extends in the first direction DR1 over three adjacent pixels PX1, PX2, and PX3, and may be disposed between two adjacent common voltage lines 170 and may not cross the two common voltage lines 170. The horizontal initialization voltage line 153 may cross three adjacent data lines 171a, 171b, and 171c, and may extend to the initialization voltage line 173.

[0139] The connection element 178 passes through at least one contact hole 65 (in the second insulating layer 160) on each pixel PX1, PX2 and PX3. Figure 8In the embodiment, one of the pixels PX1, PX2, and PX3 (shown with two contact holes 65) is electrically connected to the drain region 135b of the active pattern 130b, and is electrically connected to the extension 155a of the driving gate electrode 155 through the contact hole 66 of the second insulating layer 160. Thus, the drain region 135b of the active pattern 130b can be electrically connected to the extension 155a of the driving gate electrode 155.

[0140] At least one of the first conductive layer, the second conductive layer, and the third conductive layer may include, for example, at least one of metals including copper (Cu), aluminum (Al), magnesium (Mg), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), nickel (Ni), neodymium (Nd), iridium (Ir), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), tantalum (Ta), and alloys thereof. The first conductive layer, the second conductive layer, and the third conductive layer may each include a single layer or may be a multilayer.

[0141] For example, the third conductive layer may have a multi-layer structure including a lower layer including titanium and an upper layer including copper.

[0142] The first transistor T1 includes a channel region 134a, a source region 133a, a drain region 135a, and a first gate electrode 154a. The source region 133a of the first transistor T1 is electrically connected to the driving voltage line 172a and the driving voltage patterns 172c and 172d so that it can receive the driving voltage ELVDD.

[0143] The lower pattern 111a corresponding to the first transistor T1 overlaps the channel region 134a of the first transistor T1 between the channel region 134a and the first substrate 110 to prevent external light from reaching the channel region 134a, thereby reducing leakage current and characteristic degradation. The lower pattern 111a is electrically connected to the drain region 135a of the first transistor T1 through the capacitor electrode 175.

[0144] The second transistor T2 includes a channel region 134b, a source region 133b, a drain region 135b, and a second gate electrode 154b. The source region 133b of the second transistor T2 can be electrically connected to the data lines 171a, 171b, and 171c to receive the data voltage DAT or the reference voltage. The drain region 135b of the second transistor T2 can be electrically connected to the first gate electrode 154a through the driving gate electrode 155.

[0145] The lower pattern 111b corresponding to the second transistor T2 overlaps the channel region 134b between the channel region 134b of the second transistor T2 and the first substrate 110 to prevent external light from reaching the channel region 134b, thereby reducing leakage current and characteristic degradation. The lower pattern 111b is electrically connected to the first scan line 151 to form a double gate electrode of the second transistor T2 with the second gate electrode 154b.

[0146] The third transistor T3 includes a channel region 134 c , a source region 133 c , a drain region 135 c , and a third gate electrode 154 c . The drain region 135 c of the third transistor T3 may receive an initialization voltage INIT from the horizontal initialization voltage line 153 .

[0147] The lower pattern 111c corresponding to the third transistor T3 overlaps the channel region 134c between the channel region 134c of the third transistor T3 and the first substrate 110 to prevent external light from reaching the channel region 134c, thereby reducing leakage current and characteristic degradation. The lower pattern 111c is electrically connected to the second scan line 152 and can form a double gate electrode of the third transistor T3 with the third gate electrode 154c.

[0148] The third insulating layer 181 may be disposed on the second insulating layer 160 and the third conductive layer. The third insulating layer 181 may include a contact hole 83a disposed in the capacitor electrode 175, a contact hole 89a disposed in the end portion 179 of the data lines 171a, 171b, and 171c, and a contact hole 81 disposed on the common voltage line 170.

[0149] A fourth conductive layer including a plurality of contact elements 190 a , 190 b , 190 c , 190 d , and 190 e may be disposed on the third insulating layer 181 .

[0150] Respective contact elements 190a, 190b, and 190c may be disposed on pixels PX1, PX2, and PX3, may contact capacitor electrode 175 through contact hole 83a, and may be electrically connected. Contact element 190d may contact common voltage line 170 through contact hole 81 and may be electrically connected to common voltage line 170. Contact element 190e may contact end portions 179 of data lines 171a, 171b, and 171c through contact hole 89a, and may be electrically connected thereto.

[0151] The contact elements 190a, 190b, 190c, 190d and 190e can improve the adhesion of the capacitor electrode 175 of the third conductive layer, the common voltage line 170 and the end 179 of the data lines 171a, 171b and 171c to contact it with another conductive layer, and can prevent the third conductive layer from being oxidized. For example, when the upper layer of the third conductive layer includes copper, copper oxidation can be prevented. To this end, when the upper layer of the third conductive layer includes a conductive material for preventing corrosion, for example, when it includes copper, the fourth conductive layer may include a conductive material for covering the upper layer of the third conductive layer and preventing corrosion of copper. For example, the fourth conductive layer may include a conductive material such as a metal oxide (e.g., ITO or IZO).

[0152] The fourth insulating layer 182 may be disposed on the third insulating layer 181 and the fourth conductive layer. The fourth insulating layer 182 may include a contact hole 83b disposed in the contact elements 190a, 190b, and 190c and overlapping the contact hole 83a, and a contact hole 89b disposed in the contact element 190e and overlapping the contact hole 89a. A fifth insulating layer disposed on the fourth insulating layer 182 and corresponding to the partition wall 350 may include an opening 356 corresponding to the contact hole 89b.

[0153] The contact element 190e may be exposed to the outside through the contact hole 89b and may be electrically connected to an additional driving circuit chip, a circuit film, or a circuit board.

[0154] At least one of the buffer layer 120, the first insulating layer (insulating pattern 144), the second insulating layer 160, the third insulating layer 181, and the fourth insulating layer 182 may include an inorganic insulating material and / or an organic insulating material, such as, for example, silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiON). For example, the fourth insulating layer 182 may include an inorganic insulating material and / or an organic insulating material, such as polyimide, an acrylic polymer, or a siloxane polymer, and may have a substantially flat top side.

[0155] A pixel electrode layer including a plurality of pixel electrodes 191a, 191b, and 191c may be disposed as a fifth conductive layer on the fourth insulating layer 182. Each pixel electrode 191a, 191b, and 191c may include a first pixel electrode 191a, a second pixel electrode 191b, and a third pixel electrode 191c. Each pixel electrode 191a, 191b, and 191c may be disposed corresponding to each pixel PX1, PX2, and PX3, as shown in FIG. Figure 8 As shown in , each pixel includes a first pixel PX1, a second pixel PX2, and a third pixel PX3.

[0156] Sizes and shapes of the first pixel electrode 191 a , the second pixel electrode 191 b , and the third pixel electrode 191 c may be different from each other in a plan view.

[0157] For example, regarding three pixels PX1, PX2, and PX3, the size in the plan view may decrease in the order of the second pixel electrode 191b, the first pixel electrode 191a, and the third pixel electrode 191c. In this case, the second pixel PX2 may display green, the first pixel PX1 may display red, and the third pixel PX3 may display blue.

[0158] In an exemplary embodiment, the size of the first pixel electrode 191 a may be the largest in a plan view, and subsequent sizes may decrease in the order of the second pixel electrode 191 b and the third pixel electrode 191 c .

[0159] In addition, if Figure 8 As shown in FIG. 1 , the second pixel electrode 191b corresponding to the second pixel PX2 may be misaligned with the adjacent pixel electrodes 191a and 191c. For example, the respective edges of the second pixel electrode 191b in the second direction DR2 may be misaligned with the respective edges of the adjacent pixel electrodes 191a and 191c in the second direction DR2. The alternating arrangement of the second pixel electrodes 191b corresponds to the reference Figure 1 That is, the second color filter 230G is arranged so that it is Figure 1 The adjacent color filters 230R and 230B in FIG. 1 are not aligned, and the second pixel electrode 191 b is arranged in a similar manner.

[0160] Figure 8 1 shows a configuration in which the second pixel electrode 191b is arranged alternately with the adjacent pixel electrodes 191a and 191c, as shown in FIG. Figure 1 For example, in a display device according to an exemplary embodiment, as shown in Figure 4 As shown in FIG. 1 , the second pixel electrode 191 b and the third pixel electrode 191 c may be alternately disposed with the adjacent pixel electrode 191 a .

[0161] The respective pixel electrodes 191a, 191b, and 191c may contact the respective contact elements 190a, 190b, and 190c through the contact holes 83b, and may be electrically connected to the capacitor electrode 175 through the contact elements 190a, 190b, and 190c. Therefore, the respective pixel electrodes 191a, 191b, and 191c may be electrically connected to the drain region 135a of the first transistor T1 to receive a voltage from the first transistor T1.

[0162] The pixel electrode layer may include, for example, a semi-transparent conductive material or a reflective conductive material.

[0163] The fifth insulating layer (partition wall 350) may be disposed on the fourth insulating layer 182. The fifth insulating layer (partition wall 350) includes an opening 355 disposed in the pixel electrodes 191a, 191b, and 191c. The fifth insulating layer (partition wall 350) may include an organic insulating material such as, for example, a polypropylene-based resin or a polyimide-based resin.

[0164] An emission layer corresponding to the light emitting element layer 370 may be disposed on the fifth insulating layer (partition wall 350) and the pixel electrode layer. The emission layer (light emitting element layer 370) may include a portion disposed in the opening 355 of the fifth insulating layer (partition wall 350). The emission layer (light emitting element layer 370) may include, for example, an organic light emitting material or an inorganic light emitting material. In an exemplary embodiment, at least a portion of the top of the fifth insulating layer (partition wall 350) is not covered by the emission layer (light emitting element layer 370).

[0165] The emission layer (light emitting element layer 370) may overlap with each pixel electrode layer 191a, 191b, and 191c. Therefore, the emission layers 370 of the pixels PX1, PX2, and PX3 may be arranged alternately with each other. For example, the emission layer (light emitting element layer 370) of the second pixel PX2 may not be aligned with the emission layers of the adjacent pixels PX1 and PX3. That is, the emission layers (light emitting element layers 370) of the respective pixels PX1, PX2, and PX3 may have the same Figure 1 230R, 230G and 230B shown in FIG. 1 , or may have a configuration similar to that of the color filters 230R, 230G and 230B shown in FIG. Figure 4 The color filters 230R, 230G, and 230B shown in FIG. 1 are arranged similarly.

[0166] The fifth insulating layer (partition wall 350 ) and the emission layer (light emitting element layer 370 ) may include a contact hole 82 provided in the contact element 190 d .

[0167] A common electrode corresponding to the above-mentioned second electrode 270 may be disposed on the emission layer (light emitting element layer 370). The common electrode (second electrode 270) may be continuously formed throughout a plurality of pixels PX1, PX2, and PX3. The common electrode (second electrode 270) may contact the contact element 190d through the contact hole 82, may be electrically connected to the common voltage line 170, and may receive the common voltage ELVSS.

[0168] The common electrode (second electrode 270 ) may include a transparent conductive material.

[0169] The pixel electrodes 191a, 191b and 191c of the pixels PX1, PX2 and PX3, the emission layer (light emitting element layer 370) and the common electrode (second electrode 270) constitute the light emitting device ED, and one of the pixel electrodes 191a, 191b and 191c and the common electrode (second electrode 270) becomes a cathode, and the other becomes an anode. The case where the pixel electrodes 191a, 191b and 191c become anodes has been described.

[0170] refer to Figure 8, in a plan view, the lower pattern 111a may further include an extension 111aa overlapping the driving voltage line 172a and the driving voltage patterns 172c and 172d. Therefore, the size of the lower pattern 111a in a plan view may be larger than the size of the lower pattern 111b or the lower pattern 111c in a plan view. According to an exemplary embodiment, the lower pattern 111a is electrically connected to the pixel electrodes 191a, 191b, and 191c as anodes through the capacitor electrode 175, and the extension 111aa of the lower pattern 111a overlaps the driving voltage line 172a and the driving voltage patterns 172c and 172d for transmitting a predetermined voltage, with the buffer layer 120 and the second insulating layer 160 therebetween. Thus, a capacitor Ced for enhancing the function of maintaining the anode voltage may be formed.

[0171] The extension portion 111 aa may overlap the source region 133 a of the active pattern 130 a connected to the driving voltage line 172 a .

[0172] The lower pattern 111a is electrically connected to the pixel electrodes 191a, 191b and 191c through the capacitor electrode 175, and overlaps with the channel region 134a of the first transistor T1. As a result, the current change rate in the saturation region in the voltage-current characteristic diagram of the first transistor T1 is reduced, and the output current of the first transistor T1 can be increased to a predetermined range. Therefore, when the voltage Vds between the source and the drain of the first transistor T1 changes, the output current of the first transistor T1 is constant. Thus, the output saturation characteristic can be improved. According to an exemplary embodiment, the brightness deviation between pixels caused by the output current of the first transistor T1 can be reduced, and the image quality can be improved.

[0173] Figure 2 , Figure 3 , Figure 5 and Figure 6 The color conversion substrate 300 shown in FIG. 1 may overlap the display substrate 100. The color filters 230R, 230G, and 230B and the color conversion layers 330R and 330G or the transmission layer 330B on the color conversion substrate 300 may overlap the pixel electrode layers 191a, 191b, and 191c.

[0174] While the invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the invention as defined by the following claims.

Claims

1. A display device, comprising: a substrate comprising a plurality of light emitting devices; a first color filter, a second color filter, and a third color filter overlapping one of the plurality of light emitting devices; as well as a first color conversion layer overlapping the first color filter, a second color conversion layer overlapping the second color filter, and a transmission layer overlapping the third color filter, wherein a plurality of the first color filters, a plurality of the second color filters and a plurality of the third color filters are arranged in a first direction, A gap between adjacent second color filters in the second direction overlaps only a portion of the first color filter and only a portion of the third color filter in the first direction, The first color filter, the second color filter, and the third color filter are not aligned with each other in the first direction, and Gaps between adjacent first color filters in the second direction, the gaps between adjacent second color filters in the second direction, and gaps between adjacent third color filters in the second direction do not overlap in the first direction.

2. The display device according to claim 1, wherein: The first color filter is a red color filter, The second color filter is a green color filter, and The third color filter is a blue color filter.

3. The display device according to claim 1, wherein: The one light emitting device among the plurality of light emitting devices corresponds to one pixel, and The one pixel includes three transistors and one capacitor.

4. The display device according to claim 1, wherein: The plurality of light emitting devices emit blue light.

5. The display device according to claim 1, wherein: An area where the first color filter overlaps a gap between adjacent second color filters in the second direction is 10% to 50% of a length of the first color filter in the second direction.

6. The display device according to claim 1, wherein: The second color filter overlaps the light emitting element layer and the second color conversion layer in a direction perpendicular to the substrate.

7. The display device according to claim 1, wherein: The area of ​​the first color filter is larger than the area of ​​the second color filter, and The area of ​​the second color filter is greater than the area of ​​the third color filter.

8. The display device according to claim 1, wherein: The area of ​​the second color filter is larger than the area of ​​the first color filter, and An area of ​​the first color filter is greater than an area of ​​the third color filter.

Images