Display device

Abstract

The present disclosure relates to a display device, which includes display areas of various shapes, has a reduced dead zone, and displays an image. In addition, the display device includes: a display unit, the display unit including a rounded corner portion; a first drive voltage supply line, the first drive voltage supply line extending in a first direction in a non-display area on one side of the display unit; a plurality of first drive voltage lines, the plurality of first drive voltage lines supplying a drive voltage to a plurality of pixels and extending in a second direction crossing the first direction and connected to the first drive voltage supply line; and a plurality of second drive voltage lines, the plurality of second drive voltage lines being disconnected from the first drive voltage supply line.

Description

[0001] This application claims priority to and all benefits derived from Korean Patent Application No. 10-2018-0167899, filed on December 21, 2018, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0002] One or more embodiments relate to a display device, and more particularly, to a display device that implements various shapes of display areas for displaying images while including a reduced dead space. Background Art

[0003] Recently, the use of display devices is becoming more diverse. In addition, since the display devices are substantially thin and lightweight, the scope of use thereof is being expanded.

[0004] As display devices are variously utilized, there is an increasing demand for technology for increasing the ratio of a display area where an image is provided and reducing a non-display area where no image is provided when designing a shape of the display device. Summary of the invention

[0005] One or more embodiments include a display device that implements various shapes of display areas for displaying images while including a reduced dead zone.

[0006] However, it should be understood that the embodiments described herein should be considered in a descriptive sense only and not limiting of the present invention.

[0007] Additional embodiments will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments.

[0008] In one or more embodiments, a display device includes: a display unit, which is arranged above a substrate and includes a first display area and a second display area, each of the first display area and the second display area includes a plurality of pixel arrays, and the second display area also includes a rounded corner portion; a first drive voltage supply line, which extends in a first direction in a non-display area on one side of the display unit; a plurality of first drive voltage lines, which supply a drive voltage to a plurality of pixels, which are arranged in the first display area in the first direction and extend in a second direction intersecting the first direction, extending to an area between the first display area and the first drive voltage supply line, and connected to the first drive voltage supply line; and a plurality of second drive voltage lines, which supply a drive voltage to the plurality of pixels, which are arranged in the second display area in the first direction and disconnected from the first drive voltage supply line in an area between the second display area and the first drive voltage supply line.

[0009] In an embodiment, the plurality of first driving voltage lines and the plurality of second driving voltage lines may be electrically connected to a plurality of connection lines extending in the first direction.

[0010] In an embodiment, the plurality of connection lines may cross the plurality of first driving voltage lines and the plurality of second driving voltage lines to form a mesh shape.

[0011] In an embodiment, the plurality of second driving voltage lines may supply the driving voltage to the plurality of pixels disposed in the second display area through the plurality of connection lines.

[0012] In an embodiment, the display device may further include: a switching unit, the switching unit including a plurality of demultiplexers arranged in the non-display area, demultiplexing the data signal, and supplying the demultiplexed data signal to a plurality of data lines; and a second driving voltage supply line, the second driving voltage supply line being arranged in parallel with the first driving voltage supply line and connected to a terminal unit at an edge of the substrate, the switching unit being between the first driving voltage supply line and the second driving voltage supply line, wherein the display unit may include a plurality of scan lines and the plurality of data lines respectively connected to the plurality of pixels.

[0013] In an embodiment, the switching unit may include: a first switching unit, which demultiplexes a data signal supplied to the first display area; and a second switching unit, which demultiplexes a data signal supplied to the second display area, wherein a plurality of first demultiplexers included in the first switching unit may be arranged at a first pitch, and a plurality of second demultiplexers included in the second switching unit may be arranged at a second pitch smaller than the first pitch.

[0014] In an embodiment, the first driving voltage supply line and the second driving voltage supply line may be electrically connected to each other through a plurality of connection lines arranged between the plurality of first demultiplexers.

[0015] In an embodiment, pixels adjacent to an outer edge of the display unit among the plurality of pixels may be arranged in a step-like manner.

[0016] In an embodiment, the display unit may have one of a polygonal shape, a circular shape, and an elliptical shape.

[0017] In an embodiment, the display device may further include a substrate, the display unit is disposed above the substrate, and the substrate includes a curved edge.

[0018] In an embodiment, a length of the plurality of second driving voltage lines extending in the second direction may be smaller than a length of the plurality of first driving voltage lines.

[0019] In one or more embodiments, a display device includes: a display unit, in which a first display area and a second display area including a corner at an edge of the first display area are defined, the display unit includes a plurality of first pixels and a plurality of second pixels, the plurality of first pixels and the plurality of second pixels are respectively arranged in the first display area and the second display area, and are connected to a plurality of data lines and a plurality of driving voltage lines arranged in a first direction and a plurality of scan lines arranged in a second direction; a scan driver and a data driver, the scan driver and the data driver are arranged in a non-display area, the non-display area is outside the display unit; a switch unit, the switch unit The invention comprises a plurality of demultiplexers arranged in the non-display area, demultiplexing the data signals output from the data driver and supplying the demultiplexed data signals to the plurality of data lines; and a driving voltage supply line, the driving voltage supply line being arranged in the non-display area and connected to the plurality of driving voltage lines extending from the display unit, wherein the plurality of driving voltage lines comprise a first driving voltage line connected to the plurality of first pixels and a second driving voltage line connected to the plurality of second pixels, the first driving voltage line extending to the non-display area and connected to the driving voltage supply line, and the second driving voltage line being disconnected from the driving voltage supply line in the non-display area.

[0020] In an embodiment, the corners may have a rounded shape.

[0021] In an embodiment, pixels adjacent to an outer edge of the display unit among the plurality of first pixels and the plurality of second pixels may be arranged in a step-by-step manner.

[0022] In an embodiment, the switching unit may further include: a first switching unit, which demultiplexes data signals supplied to the multiple first pixels; and a second switching unit, which demultiplexes data signals supplied to the multiple second pixels, and the multiple demultiplexers included in the first switching unit can be arranged at a first pitch, and the multiple demultiplexers included in the second switching unit can be arranged at a second pitch smaller than the first pitch.

[0023] In an embodiment, the driving voltage supplied to the plurality of driving voltage lines may be supplied along a mesh path.

[0024] In an embodiment, the display unit may further include a plurality of connection lines extending in the first direction, the plurality of connection lines being connected to the first driving voltage line and the second driving voltage line by contacting the first driving voltage line and the second driving voltage line.

[0025] In an embodiment, an insulating layer may be disposed between the plurality of connection lines and the first and second driving voltage lines, and the plurality of connection lines may be electrically connected to the first and second driving voltage lines through contact holes in the insulating layer.

[0026] In an embodiment, the driving voltage supply line may include a first driving voltage supply line and a second driving voltage supply line extending in the first direction, the switching unit is between the first driving voltage supply line and the second driving voltage supply line, the plurality of driving voltage lines may be connected to the first driving voltage supply line, and the second driving voltage supply line may be connected to a terminal unit.

[0027] In an embodiment, the driving voltage supply line may further include a plurality of connection lines connecting the first driving voltage supply line and the second driving voltage supply line, the plurality of connection lines being disposed between the plurality of demultiplexers. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] These and / or other embodiments will become apparent and more easily understood through the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0029] Figure 1 is a plan view of an embodiment of a display device;

[0030] Figure 2 is an equivalent circuit diagram of an embodiment of a pixel;

[0031] Figure 3 and Figure 4 is a cross-sectional view of an embodiment of a pixel;

[0032] Figure 5 is an equivalent circuit diagram of another embodiment of a pixel;

[0033] Figure 6 and Figure 7 yes Figure 1 an enlarged view of part A;

[0034] Figure 8 is a plan view of an embodiment of a pixel structure;

[0035] Fig. 9 and Fig.10 They are Figure 6 and Figure 7 An enlarged view of a modified embodiment of the present invention;

[0036] Fig.11 and Fig.12 yes Figure 1 A plan view of a modified embodiment of

[0037] Fig.13is an enlarged plan view of an embodiment of a display device. DETAILED DESCRIPTION

[0038] Since the present invention contemplates various changes and many embodiments, embodiments will be shown in the drawings and described in detail in the written description. When referring to the embodiments described with reference to the drawings, the effects and characteristics of the present invention and the methods for achieving these effects and characteristics will be apparent. However, the present invention can be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein.

[0039] Hereinafter, the present invention will be described more fully with reference to the accompanying drawings in which embodiments of the present invention are shown. When describing with reference to the accompanying drawings, like reference numerals in the drawings represent like or corresponding elements, and repeated description thereof will be omitted.

[0040] It will be understood that although the terms "first", "second", etc. may be used herein to describe various components, these components should not be limited by these terms. These components are only used to distinguish one component from another component.

[0041] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0042] It will also be understood that the terms “include / comprises” and / or “contains / has” used herein specify the presence of stated features or components, but do not preclude the presence or addition of one or more other features or components.

[0043] It will be understood that when a layer, region or component is referred to as being “formed on” another layer, region or component, the layer, region or component may be directly or indirectly formed on the other layer, region or component. That is, for example, intervening layers, regions or components may be present.

[0044] For the convenience of explanation, the sizes of the elements in the drawings may be exaggerated. In other words, since the sizes and thicknesses of the components in the drawings are arbitrarily shown for the convenience of explanation, the following embodiments are not limited thereto.

[0045] In the following examples, the x-axis, y-axis, and z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.

[0046] When a specific embodiment can be implemented differently, a specific process order can be performed differently from the described order. For example, two consecutively described processes can be performed substantially simultaneously or in a reverse order from the described order.

[0047] It will be understood that when a layer, region, or component is referred to as being "connected" to another layer, region, or component, the layer, region, or component may be "directly connected" to the other layer, region, or component, or may be "indirectly connected" to the other layer, region, or component, with other layers, regions, or components interposed therebetween. For example, it will be understood that when a layer, region, or component is referred to as being "connected or electrically connected" to another layer, region, or component, the layer, region, or component may be "directly electrically connected" to the other layer, region, or component, or may be "indirectly connected or electrically connected" to the other layer, region, or component, with other layers, regions, or components interposed therebetween.

[0048] Figure 1 is a plan view of an embodiment of the display device 1 .

[0049] Reference Figure 1 The display device 1 includes a display unit 10 , first and second scan drivers 20 and 30 , a data driver 40 , a terminal unit 50 , a driving voltage supply line 60 , a common voltage supply line 70 , and a switch unit 80 , which are arranged above a substrate 100 .

[0050] The substrate 100 may include a material such as glass, metal, or an organic material. Glass may include SiO 2 As a main component. In an embodiment, the substrate 100 may include a flexible material. In an embodiment, although the substrate 100 may include a flexible plastic material such as polyimide, the present invention is not limited thereto. In another embodiment, for example, the plastic material may include at least one of polyethersulfone ("PES"), polyarylate ("PAR"), polyetherimide ("PEI"), polyethylene naphthalate ("PEN"), polyethylene terephthalate ("PET"), polyphenylene sulfide ("PPS"), polyarylate, polyimide ("PI"), polycarbonate ("PC"), cellulose triacetate ("TAC"), cellulose acetate propionate ("CAP"), cyclic olefin polymers and cyclic olefin copolymers.

[0051] The display unit 10 includes pixels PX, which are connected to a scan line SL extending in a first direction, a data line DL extending in a second direction intersecting the first direction, and a driving voltage line PL. Each of the pixels PX may emit, for example, red light, green light, blue light, or white light, and include, for example, an organic light emitting diode. The display unit 10 provides a predetermined image by light emitted from the pixel PX. The display area DA is defined by the pixels PX. In the specification, the non-display area NDA is an area in which the pixels PX are not arranged, and represents an area where no image is provided.

[0052] Although the display unit 10 has an approximately quadrilateral shape, in various embodiments, the display unit 10 may be provided in various shapes such as a polygonal shape, a circular shape, an elliptical shape, or a shape corresponding to a portion of these shapes. In the illustrated embodiment, the display unit 10 has a quadrilateral shape as a whole, and may include a rounded corner portion 10C in which each edge is curved. The substrate 100 on which the display unit 10 is disposed may have a curved edge in at least a portion of the outer edge.

[0053] The first scan driver 20 and the second scan driver 30 are arranged in the non-display area NDA of the substrate 100, and generate scan signals and transmit the scan signals to each pixel PX through the scan lines SL. In an embodiment, the first scan driver 20 may be arranged on the left side of the display unit 10, and the second scan driver 30 may be arranged on the right side of the display unit 10.

[0054] The data driver 40 is arranged in the non-display area NDA of the substrate 100, and generates a data signal and transmits the data signal to each pixel PX through the data line DL. The data driver 40 may be arranged on one side of the display unit 10, for example, on the lower side of the display unit 10, wherein the terminal unit 50 is arranged below the display unit 10.

[0055] The terminal unit 50 is arranged at one end of the substrate 100 and includes a plurality of terminals 51, 52, 53 and 54. The terminal unit 50 is not covered by an insulating layer and is exposed, and can be electrically connected to a controller (not shown) such as a flexible printed circuit board or an integrated circuit ("IC") chip. The controller changes a plurality of video signals transmitted from the outside into a plurality of video data signals, and transmits the changed video signals to the data driver 40 through the terminal 51. In addition, the controller can receive a vertical synchronization signal, a horizontal synchronization signal and a clock signal, generate a control signal for controlling the driving of the first scan driver 20 and the second scan driver 30 and the data driver 40, and transmit the relevant control signal to the relevant elements. The controller transmits the driving voltage ELVDD and the common voltage ELVSS to the driving voltage supply line 60 and the common voltage supply line 70 through the terminals 52 and 54, respectively.

[0056] The driving voltage supply line 60 is arranged in the non-display area NDA. In an embodiment, for example, the driving voltage supply line 60 may be arranged between the data driver 40 and the display unit 10. The driving voltage supply line 60 provides the driving voltage ELVDD to the pixel PX. The driving voltage supply line 60 may extend in a first direction and may be connected to a plurality of driving voltage lines PL1 arranged in the first direction.

[0057] The common voltage supply line 70 is arranged in the non-display area NDA and supplies the common voltage ELVSS to the opposite electrode 223 (see FIG. 21 ) of the organic light emitting diode of the pixel PX. Figure 3 In an embodiment, for example, the common voltage supply line 70 is provided as a loop in which an opening is defined at one side, and may extend along an edge of the substrate 100 except for the terminal unit 50 .

[0058] The display unit 10 has an approximately quadrilateral shape and includes a rounded corner portion 10C. The rounded corner portion 10C may be defined at each of four edges of the display unit 10 and may be a part of a circle formed with a constant curvature.

[0059] The display unit 10 may be defined as a first display area DA1 and a second display area DA2 including a rounded corner portion 10C. The second display area DA2 may be arranged in a first direction with the first display area DA1 centered between the second display areas DA2. A plurality of first drive voltage lines PL1 are arranged so that the drive voltage ELVDD is supplied to the pixels PX of the first display area DA1, and a plurality of second drive voltage lines PL2 are arranged so that the drive voltage ELVDD is supplied to the pixels PX of the second display area DA2.

[0060] The lengths of the plurality of first driving voltage lines PL1 and the plurality of second driving voltage lines PL2 extending in the second direction taken along the second direction may be different from each other. That is, the length of the plurality of first driving voltage lines PL1 in the second direction may be greater than the length of the plurality of second driving voltage lines PL2 in the second direction. This is because the plurality of first driving voltage lines PL1 extend to the non-display area NDA, but the plurality of second driving voltage lines PL2 do not extend to the non-display area NDA and are only arranged inside the second display area DA2.

[0061] The switching unit 80 is disposed in the non-display area NDA between the data driver 40 and the display unit 10 , and demultiplexes the data signal and supplies the demultiplexed data signal to the plurality of data lines DL. The driving voltage supply line 60 may be disposed between the switching unit 80 and the data driver 40 .

[0062] Figure 2 is an embodiment of an equivalent circuit diagram of a pixel PX, Figure 3 and Figure 4 is a cross-sectional view of an embodiment of a pixel PX, and Figure 5 is an equivalent circuit diagram of another embodiment of a pixel PX.

[0063] Reference Figure 2, each pixel PX includes a pixel circuit PC connected to a scan line SL and a data line DL and a light emitting diode, for example, an organic light emitting diode OLED, connected to the pixel circuit PC.

[0064] The pixel circuit PC includes a driving thin film transistor ("TFT") T1, a switching TFT T2, and a storage capacitor Cst. The switching TFT T2 is connected to the scan line SL and the data line DL, and transmits a data signal Dm input through the data line DL to the driving TFT T1 in response to a scan signal Sn input through the scan line SL.

[0065] The storage capacitor Cst is connected to the switching TFT T2 and the driving voltage line PL, and stores a voltage corresponding to a difference between a voltage transferred from the switching TFT T2 and a driving voltage ELVDD supplied to the driving voltage line PL.

[0066] The driving TFT T1 is connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL through the organic light emitting diode OLED in response to the voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED can emit light with predetermined brightness by the driving current.

[0067] Reference Figure 3 , the pixel PX includes a pixel circuit PC disposed over a substrate 100 and an organic light emitting diode OLED connected to the pixel circuit PC. Hereinafter, for convenience of description, description is made according to a stacking order.

[0068] The buffer layer 101 may be disposed on the substrate 100, may reduce or block the penetration of foreign matter, moisture or external air from below the substrate 100, and provide a flat surface on the substrate 100. The buffer layer 101 may include an inorganic material such as an oxide or a nitride, or an organic material, or an organic / inorganic composite material. The buffer layer 101 may include a single layer or multiple layers of an inorganic material and an organic material.

[0069] The driving TFT (also called "first TFT") T1 includes a semiconductor layer A1, a gate electrode G1, a source electrode S1, and a drain electrode D1. The switching TFT (also called "second TFT") T2 includes a semiconductor layer A2, a gate electrode G2, a source electrode S2, and a drain electrode D2.

[0070] The semiconductor layers A1 and A2 may include amorphous silicon or polycrystalline silicon. In another embodiment, the semiconductor layers A1 and A2 may include an oxide of at least one of In, Ga, Sn, Zr, V, Hf, Cd, Ge, Cr, Ti, and Zn. Each of the semiconductor layers A1 and A2 may include a channel region and a source region and a drain region each doped with impurities.

[0071] The gate electrodes G1 and G2 are arranged on the semiconductor layers A1 and A2, respectively, and the gate insulating layer 103 is between the gate electrodes G1 and G2 and the semiconductor layers A1 and A2. The gate electrodes G1 and G2 may include one of Mo, Al, Cu and Ti, and include a single layer or multiple layers. In an embodiment, for example, each of the gate electrodes G1 and G2 may include a single layer of Mo.

[0072] The gate insulating layer 103 may include SiO 2 、SiN x 、SiON、Al 2 O 3 、TiO 2 、 2 O 5 , HfO 2 or ZnO 2 .

[0073] Source electrodes S1 and S2 and drain electrodes D1 and D2 are arranged on the interlayer insulating layer 107. The source electrodes S1 and S2 and drain electrodes D1 and D2 may include a conductive material including Mo, Al, Cu, and Ti, and include a single layer or a multilayer including the above materials. In an embodiment, the source electrodes S1 and S2 and drain electrodes D1 and D2 may have a multilayer structure of Ti / Al / Ti.

[0074] The interlayer insulating layer 107 may include SiO x 、SiN x 、SiON、Al 2 O 3 、TiO 2 、 2 O 5 , HfO 2 or ZnO 2 .

[0075] The first electrode CE1 of the storage capacitor Cst may overlap with the first TFT T1. In an embodiment, for example, the gate electrode G1 of the first TFT T1 may also serve as the first electrode CE1 of the storage capacitor Cst.

[0076] The second electrode CE2 of the storage capacitor Cst overlaps the first electrode CE1, and the dielectric layer 105 is between the second electrode CE2 and the first electrode CE1. The second electrode CE2 may include a conductive material including Mo, Al, Cu, and Ti, and include a single layer or multiple layers including the above materials. In an embodiment, the second electrode CE2 may include a single layer of Mo or a multilayer of Mo / Al / Mo.

[0077] The dielectric layer 105 may include an inorganic material including an oxide or a nitride. In an embodiment, for example, the dielectric layer 105 may include SiO 2 、SiN x 、SiON、Al 2 O 3 、TiO 2 、 2 O 5 , HfO 2 or ZnO 2 .

[0078] The planarization layer 109 may be disposed on the source electrodes S1 and S2 and the drain electrodes D1 and D2. The organic light emitting diode OLED may be disposed on the planarization layer 109. The planarization layer 109 may include a single layer or multiple layers, and the single layer or multiple layers include a layer of an organic material. The organic material may include a general polymer such as polymethyl methacrylate ("PMMA") or polystyrene ("PS"), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, and a blend thereof. In addition, the planarization layer 109 may include a composite stack including an inorganic insulating layer and an organic insulating layer.

[0079] The organic light emitting diode OLED includes a pixel electrode 221 , an emission layer 222 , and an opposing electrode 223 .

[0080] The pixel electrode 221 may include a reflective electrode. In an embodiment, for example, the pixel electrode 221 may include a reflective layer and a transparent or semi-transparent electrode layer disposed on the reflective layer, wherein the reflective layer includes one of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, and combinations thereof. In an embodiment, for example, the transparent or semi-transparent electrode layer may include indium tin oxide (“ITO”), indium zinc oxide (“IZO”), zinc oxide (ZnO), indium oxide (In 2 O 3 ), at least one of indium gallium oxide ("IGO") and aluminum zinc oxide ("AZO").

[0081] The pixel defining layer 112 is arranged on the pixel electrode 221. The pixel defining layer 112 may include at least one organic insulating material including polyimide, polyamide, acrylic resin, benzocyclobutene ("BCB"), and phenolic resin, and may be provided by spin coating, etc. The pixel defining layer 112 exposes the pixel electrode 221, and the emission layer 222 is disposed on the exposed area.

[0082] The emission layer 222 may include an organic material including a fluorescent or phosphorescent material that emits red, green, blue, or white light. The emission layer 222 may include a low molecular weight or polymer organic material. Functional layers such as a hole transport layer (“HTL”), a hole injection layer (“HIL”), an electron transport layer (“ETL”), and an electron injection layer (“EIL”) may be selectively further disposed below and on the emission layer 222.

[0083] The opposing electrode 223 may be a light-transmitting electrode. In an embodiment, for example, the opposing electrode 223 may include a transparent or semi-transparent electrode and may include a metal thin film having a small work function and including one of Li, Ca, LiF / Ca, LiF / Al, Al, Ag, Mg, and a combination thereof. In addition, a metal such as ITO, IZO, ZnO, or In 2 O 3 A transparent conductive oxide ("TCO") layer may be further disposed on the metal film.

[0084] The thin film encapsulation layer 300 prevents penetration of external moisture and oxygen. The thin film encapsulation layer 300 may include at least one organic layer 320 and at least one inorganic layer 310 and 330. The at least one organic layer 320 and the at least one inorganic layer 310 and 330 may be sequentially stacked. Figure 3 FIG. 4 shows that the thin film encapsulation layer 300 includes two inorganic layers 310 and 330 and one organic layer 320, but the stacking sequence and the number of times the layers are stacked are not limited to the following. Figure 3 The embodiment shown in FIG.

[0085] The touch film 400 may be disposed on the thin film encapsulation layer 300 to implement a touch screen function of the display device 1. The touch film 400 may include touch electrodes of various patterns, and include a resistive layer type touch film or a capacitive type touch film.

[0086] Reference Figure 4 , the storage capacitor Cst of the pixel circuit PC may be arranged not to overlap with the driving TFT T1. Figure 3 The pixel PX is the same as the description of the pixel PX, and the differences are mainly described below.

[0087] The first electrode CE1 of the storage capacitor Cst may be arranged in the same layer as the layer in which the gate electrodes G1 and G2 are arranged, and may include the same material as the gate electrodes G1 and G2. The second electrode CE2 may be arranged in the same layer as the layer in which the source electrodes S1 and S2 and the drain electrodes D1 and D2 are arranged, and may include the same material as the source electrodes S1 and S2 and the drain electrodes D1 and D2. The interlayer insulating layer 107 may serve as a dielectric.

[0088] Despite Figure 3 and Figure 4 1 and 2 are top-gate TFTs, in which the gate electrodes G1 and G2 are disposed above the semiconductor layers A1 and A2, and the gate insulating layer 103 is between the gate electrodes G1 and G2 and the semiconductor layers A1 and A2, but the present invention is not limited thereto. In another embodiment, the first TFT T1 and the second TFT T2 may be bottom-gate TFTs.

[0089] although Figure 3 and Figure 4 A structure in which the first TFT T1 and the pixel electrode 221 are connected to each other through the through hole of the planarization layer 109 is described, but the present invention is not limited thereto.

[0090] although Figure 2 A case where the pixel PX includes two TFTs and one storage capacitor is described, but the present invention is not limited thereto.

[0091] Reference Figure 5 , the pixel circuit PC may include not only the driving TFT T1 and the switching TFT T2, but also the compensation TFT T3, the first initialization TFT T4, the first emission control TFT T5, the second emission control TFT T6, and the second initialization TFT T7.

[0092] The drain electrode of the driving TFT T1 may be electrically connected to the organic light emitting diode OLED through the second emission control TFT T6. The driving TFT T1 may receive the data signal Dm and supply a driving current to the organic light emitting diode OLED in response to a switching operation of the switching TFT T2.

[0093] The gate electrode of the switching TFT T2 is connected to the first scan line SLn, the source electrode of the switching TFT T2 is connected to the data line DL, and the drain electrode of the switching TFT T2 may be connected to the source electrode of the driving TFT T1 and simultaneously connected to the driving voltage line PL through the first emission control TFT T5.

[0094] The switching TFT T2 performs a switching operation of being turned on in response to a first scan signal Sn transmitted through the first scan line SLn and transmitting a data signal Dm transmitted through the data line DL to the source electrode of the driving TFT T1 .

[0095] The gate electrode of the compensation TFT T3 may be connected to the first scan line SLn. The source electrode of the compensation TFT T3 may be connected to the drain electrode of the driving TFT T1 and simultaneously connected to the pixel electrode of the organic light emitting diode OLED through the second emission control TFT T6. The drain electrode of the compensation TFT T3 may be simultaneously connected to one of the electrodes of the storage capacitor Cst, the source electrode of the first initialization TFT T4, and the gate electrode of the driving TFT T1. The compensation TFT T3 is turned on in response to the first scan signal Sn transmitted through the first scan line SLn, and connects the driving TFT T1 in a diode manner by connecting the gate electrode and the drain electrode of the driving TFT T1 to each other.

[0096] A gate electrode of the first initialization TFT T4 may be connected to the second scan line SLn-1. A drain electrode of the first initialization TFT T4 may be connected to the initialization voltage line VL. A source electrode of the first initialization TFT T4 may be simultaneously connected to one of the electrodes of the storage capacitor Cst, the drain electrode of the compensation TFT T3, and the gate electrode of the driving TFT T1. The first initialization TFT T4 may perform an initialization operation of being turned on in response to the second scan signal Sn-1 transmitted through the second scan line SLn-1 and initializing the voltage of the gate electrode of the driving TFT T1 by transmitting the initialization voltage VINT to the gate electrode of the driving TFT T1.

[0097] A gate electrode of the first emission control TFT T5 may be connected to the emission control line EL. A source electrode of the first emission control TFT T5 may be connected to the driving voltage line PL. A drain electrode of the first emission control TFT T5 may be simultaneously connected to the source electrode of the driving TFT T1 and the drain electrode of the switching TFT T2.

[0098] A gate electrode of the second emission control TFT T6 may be connected to the emission control line EL. A source electrode of the second emission control TFT T6 may be connected to the drain electrode of the driving TFT T1 and the source electrode of the compensation TFT T3. A drain electrode of the second emission control TFT T6 may be electrically connected to a pixel electrode of the organic light emitting diode OLED. When the first emission control TFT T5 and the second emission control TFT T6 are simultaneously turned on in response to the emission control signal En transmitted through the emission control line EL, the driving voltage ELVDD is transmitted to the organic light emitting diode OLED, and a driving current flows through the organic light emitting diode OLED.

[0099] A gate electrode of the second initialization TFT T7 may be connected to the third scan line SLn+1. A source electrode of the second initialization TFT T7 may be connected to a pixel electrode of the organic light emitting diode OLED. A drain electrode of the second initialization TFT T7 may be connected to an initialization voltage line VL. The second initialization TFT T7 may be turned on in response to a third scan signal Sn+1 transmitted through the third scan line SLn+1, and may initialize the pixel electrode of the organic light emitting diode OLED.

[0100] The other electrode of the storage capacitor Cst may be connected to the driving voltage line PL. One electrode of the storage capacitor Cst may be simultaneously connected to the gate electrode of the driving TFT T1, the drain electrode of the compensation TFT T3, and the source electrode of the first initialization TFT T4.

[0101] An opposite electrode of the organic light emitting diode OLED is connected to a common voltage (also referred to as a "common power voltage") ELVSS. The organic light emitting diode OLED emits light by receiving a driving current from the driving TFT T1.

[0102] Figure 6 yes Figure 1 A plan view of part A, and Figure 7 yes Figure 6 A magnified view of a portion of . Figure 6 and Figure 7 Enlarged and shows Figure 1 The rounded corner portion 10C and its surroundings of the display unit 10.

[0103] Reference Figure 1 , Figure 6 and Figure 7 The display device 1 in the embodiment includes a display unit 10 whose edges are rounded. The display unit 10 includes a first display area DA1 and a second display area DA2, each of which includes an array of a plurality of pixels PX and extends in a second direction. The second display area DA2 includes a rounded corner portion 10C, and the first display area DA1 is arranged between the second display areas DA2.

[0104] Since the pixels PX arranged in the rounded corner portion 10C are arranged substantially in a stepwise manner, the boundary between the first display area DA1 and the second display area DA2 may be a portion from which the first stepwise arrangement of the pixels PX starts. Therefore, the first display area DA1 includes a straight pixel arrangement over the entire area, and the second display area DA2 includes a stepwise pixel arrangement at the rounded corner portion 10C.

[0105] The driving voltage supply line 60 and the switch unit 80 may be disposed in the non-display area NDA on one side of the display unit 10. Although the switch unit 80 is shown to be disposed between the driving voltage supply line 60 and the display unit 10 in the embodiment, in another embodiment, Fig. 9 As shown in FIG. 1 , the first driving voltage supply line 61 and the second driving voltage supply line 62 may be arranged so that the switch unit 80 is between the first driving voltage supply line 61 and the second driving voltage supply line 62. Figure 8 and Fig. 9 This is described in detail.

[0106] The switching unit 80 includes a plurality of demultiplexers DMX that demultiplex the data signals and supply the demultiplexed data signals to the plurality of data lines DL. Although not shown, each of the plurality of demultiplexers DMX may include a control TFT and a switching TFT. Figure 7 , the demultiplexer DMX is shown to be connected to two data lines DL, but the demultiplexer DMX may be connected to three or more data lines DL.

[0107] The demultiplexer DMX is connected to the data driver 40 through the multiplexed data line MDL. The data driver 40 generates a multiplexed data signal under the control of a controller (not shown), and supplies the generated multiplexed data signal to the multiplexed data line MDL. That is, through the demultiplexer DMX, the data driver 40 can supply a signal to two or more data lines DL through one multiplexed data line MDL. Through this, the number of output lines connected to the data driver 40 can be effectively reduced at high resolution.

[0108] The switching unit 80 includes a first switching unit 81 and a second switching unit 82 separated near a boundary between the first display area DA1 and the second display area DA2. The first switching unit 81 may correspond to the first display area DA1, and the second switching unit 82 may correspond to the second display area DA2.

[0109] The first switch unit 81 and the second switch unit 82 may include a plurality of first demultiplexers DMX1 and a plurality of second demultiplexers DMX2, respectively. In the illustrated embodiment, the plurality of first demultiplexers DMX1 are arranged at a first pitch P1, and the plurality of second demultiplexers DMX2 are arranged at a second pitch P2. In this case, the second pitch P2 may be smaller than the first pitch P1.

[0110] A plurality of first driving voltage lines PL1 are provided in the first display area DA1, the plurality of first driving voltage lines PL1 are arranged in the first direction and extend in the second direction, and supply driving voltage to a plurality of first pixels PX1. A plurality of second driving voltage lines PL2 are provided in the second display area DA2, the plurality of second driving voltage lines PL2 are arranged in the first direction and extend in the second direction, and supply driving voltage to a plurality of second pixels PX2. The plurality of first driving voltage lines PL1 are connected to the driving voltage supply line 60 through the first switching unit 81. In contrast, the plurality of second driving voltage lines PL2 are not connected to the driving voltage supply line 60. That is, the plurality of first driving voltage lines PL1 extend to the area between the first display area DA1 and the driving voltage supply line 60, and are connected to the driving voltage supply line 60. In contrast, the plurality of second driving voltage lines PL2 do not extend to the area between the second display area DA2 and the driving voltage supply line 60, and are therefore disconnected from the driving voltage supply line 60.

[0111] All the multiple pixels PX arranged in the display unit 10 are connected to the data lines DL and the driving voltage lines PL arranged in the first direction and extending in the second direction. The data lines DL and the driving voltage lines PL extend from the display area DA to the non-display area NDA, and are electrically connected to a controller (not shown). In this case, compared with the first display area DA1 in which the outer edge of the display unit 10 is arranged in a straight line, the second display area DA2 in which the outer edge of the display unit 10 is arranged in a rounded shape includes a limited space of the non-display area NDA in which the data lines DL and the driving voltage lines PL are connected to all the pixels PX in the second display area DA2. When high resolution is achieved and the curvature of the rounded portion 10C becomes smaller, the space is further limited.

[0112] Therefore, in the display device 1 in the embodiment, the plurality of second driving voltage lines PL2 arranged in the second display area DA2 do not extend to the area between the second display area DA2 and the driving voltage supply line 60, and are disconnected from the driving voltage supply line 60. With this configuration, the space in the area where the data lines DL are arranged between the second display area DA2 and the driving voltage supply line 60 can be effectively secured.

[0113] Figure 8 is a plan view of an embodiment of a pixel structure.

[0114] Reference Figure 8 and Figure 6, all data lines DL and a plurality of first driving voltage lines PL1 connected to the first pixel PX1 in the first display area DA1 extend to the non-display area NDA. In contrast, the data lines DL connected to the second pixel PX2 in the second display area DA2 extend to the non-display area NDA, but a plurality of second driving voltage lines PL2 do not extend to the non-display area NDA and are disconnected from the outer edge of the second display area DA2.

[0115] As described above, since the plurality of second driving voltage lines PL2 do not extend to the non-display area NDA, the plurality of second driving voltage lines PL2 are not directly connected to the driving voltage supply line 60 arranged in the non-display area NDA. Therefore, the plurality of second driving voltage lines PL2 may be electrically connected to each other through the plurality of connection lines CL extending in the first direction to receive the driving voltage. The plurality of connection lines CL may cross the plurality of first driving voltage lines PL1 and the plurality of second driving voltage lines PL2 to form a grid shape. The plurality of second driving voltage lines PL2 may supply the driving voltage ELVDD to the pixels PX2 disposed in the second display area DA2 through the plurality of connection lines CL. The first pixel PX1 and the second pixel PX2 disposed on the same row may be connected through the same connection line CL.

[0116] The plurality of connection lines CL may be electrically connected through contact holes CNT defined in an insulating layer (not shown) disposed between the plurality of second driving voltage lines PL2 and the plurality of connection lines CL. Figure 3 The second electrode CE2 of the storage capacitor Cst is disposed in the same layer, and a plurality of second driving voltage lines PL2 may be disposed in which a Figure 3 Therefore, through this structure, the driving voltage ELVDD supplied to the driving voltage line PL disposed in the display area DA may include a mesh path.

[0117] Fig. 9 and Fig.10 is a plan view of another embodiment of the display device 1 . Fig. 9 and Fig.10 Shows Figure 6 and Figure 7 A modified embodiment of .

[0118] Reference Fig. 9 and Fig.10The display device 1 according to the embodiment includes a first driving voltage supply line 61, a second driving voltage supply line 62, and a plurality of connection lines 63 connecting the first driving voltage supply line 61 and the second driving voltage supply line 62. The first driving voltage supply line 61 and the second driving voltage supply line 62 may be arranged in a second direction, and the plurality of connection lines 63 may be arranged in a first direction intersecting the second direction.

[0119] The first driving voltage supply line 61 may be directly connected to the first driving voltage line PL1 extending from the first display area DA1, and the second driving voltage supply line 62 may be directly connected to the terminal 52 (refer to Figure 1 ). Through this double wiring structure, the resistance of the wiring itself can be reduced, and therefore, the driving voltage ELVDD can be effectively supplied to the display area DA at a high resolution.

[0120] The switch unit 80 is arranged between the first driving voltage supply line 61 and the second driving voltage supply line 62. As in the previous embodiment, the switch unit 80 includes a first switch unit 81 and a second switch unit 82 separated near the boundary between the first display area DA1 and the second display area DA2. The first switch unit 81 corresponds to the first display area DA1, and the second switch unit 82 corresponds to the second display area DA2.

[0121] The first switch unit 81 and the second switch unit 82 may include a plurality of first demultiplexers DMX1 and a plurality of second demultiplexers DMX2, respectively. In the illustrated embodiment, the plurality of first demultiplexers DMX1 are arranged at a first pitch P1, and the plurality of second demultiplexers DMX2 are arranged at a second pitch P2. In this case, the second pitch P2 may be smaller than the first pitch P1. Fig.10 , the connection line 63 can be set between multiple first demultiplexers DMX1.

[0122] Fig.11 is a plan view of a display device 2 according to another embodiment. Fig.11 The display device 2 and Figure 1 The display device 1 of FIG. 1 is different in the shape of the display unit 10. Therefore, repeated description is omitted, and the difference is mainly described below.

[0123] Reference Fig.11, the display device 2 according to the illustrated embodiment may include a display unit 10 having various shapes. The display unit 10 may include a recessed portion 10R that is indented inwardly at one side of the display unit 10. The through portion TH may be provided in a non-display area NDA in which the recessed portion 10R is provided. In an embodiment, for example, the through portion TH is a hole that passes through the display device 2. Various electronic components such as a camera, a sensor, a speaker, a microphone, etc. may be provided (e.g., mounted) on the through portion TH. In an optional embodiment, the through portion TH may include a separate component for the function of the display device 2 or a space for a separate component to which a new function may be added.

[0124] Fig.12 is a plan view of another embodiment of the display device 3. Fig.12 The display device 3 and Figure 1 The display device 1 of FIG. 1 is different in the configuration of the driving voltage supply line. Therefore, repeated description is omitted, and the difference is mainly described below.

[0125] Reference Fig.12 , the display device 3 in the illustrated embodiment may include a first driving voltage supply line 61 on one side of the display unit 10 and a second driving voltage supply line 62 on the other side of the display unit 10. One side of the first driving voltage line PL1 disposed in the first display area DA1 may be connected to the first driving voltage supply line 61 in the second direction, and the other side of the first driving voltage line PL1 may be connected to the second driving voltage supply line 62 in the second direction.

[0126] The second driving voltage line PL2 provided in the second display area DA2 does not extend toward the first driving voltage supply line 61 and the second driving voltage supply line 62, and is not connected to the first driving voltage supply line 61 and the second driving voltage supply line 62 in the second direction. The second driving voltage line PL2 is not directly connected to the first driving voltage supply line 61 and the second driving voltage supply line 62 in the second direction. The second driving voltage line PL2 is removed in the non-display area NDA between the second display area DA2 and the first driving voltage supply line 61 and in the non-display area NDA between the second display area DA2 and the second driving voltage supply line 62, and thus, in the non-display area NDA, the second driving voltage line PL2 is disconnected from the first driving voltage supply line 61 and the second driving voltage supply line 62. As described above, the second driving voltage line PL2 can be electrically connected to a plurality of connection lines CL (refer to Figure 8 ) and has a grid shape to receive a driving voltage.

[0127] Fig.13 It is an enlarged plan view of a part of the display device 1 in the embodiment. Fig.13 Can correspond to Figure 1 The lower right end of the display device 1. Fig.13 can be understood as Figure 1 A symmetrical area of ​​the part.

[0128] Reference Fig.13 , one side of the reference line RX may be defined as the first display area DA1, and the other side of the reference line RX may be defined as the second display area DA2. The second display area DA2 includes an area including the rounded corner portion 10C, and the reference line RX may be understood as a point from which the rounded corner portion 10C starts. The edge of the substrate 100 adjacent to the second display area DA2 may be provided in a rounded shape corresponding to the shape of the rounded corner portion 10C.

[0129] The first driving circuit area DCA1 may be disposed in the non-display area NDA adjacent to the second display area DA2 along the first direction. Figure 1 The driving circuit of the second scan driver 30 may be arranged in the first driving circuit area DCA1.

[0130] The first and second switching areas SWA1 and SWA2 may be arranged in the non-display area NDA adjacent to the first and second display areas DA1 and DA2 in the second direction. Figure 6 The first switching unit 81 and the second switching unit 82 may be arranged in the first switching area SWA1 and the second switching area SWA2, and may include Figure 7 The first demultiplexer DMX1 and the second demultiplexer DMX2 are shown in FIG.

[0131] The second driving circuit area DCA2 may be disposed in an edge of the substrate 100 . Figure 1 The data driver 40 may be disposed in the second driving circuit area DCA2. Although not shown, thin film on glass ("FOG"), chip on thin film ("COG"), etc. may be arranged in the relevant area.

[0132] The first fan-out area FOA1 may be disposed between the first switch area SWA1, the second switch area SWA2 and the second drive circuit area DCA2. In addition, the second fan-out area FOA2 may be disposed between the second display area DA2 and the second switch area SWA2. Figure 7 ) may be arranged in the first fan-out area FOA1. The data line DL (refer to Figure 7 ) can be arranged in the second fan-out area FOA2.

[0133] Reference Fig.13 and Figure 7 (or Fig. 9), compared with the first display area DA1 in which the outer edge of the display unit 10 is arranged in a straight line, the second display area DA2 in which the outer edge of the display unit 10 is arranged in a rounded shape includes a limited space of the non-display area NDA in which the data lines DL and the driving voltage lines PL are connected to all the pixels PX in the second display area DA2, that is, the second fan-out area FOA2. When high resolution is achieved and the curvature of the rounded corner portion 10C becomes smaller, the space is further limited.

[0134] The plurality of second driving voltage lines PL2 arranged in the second display area DA2 are disconnected from the driving voltage supply line 60 and are connected by Figure 8 By this structure, the space in the second fan-out area FOA2 where the data lines DL are arranged between the second display area DA2 and the second switching area SWA2 can be effectively ensured.

[0135] The embodiment can realize a display device that realizes display areas of various shapes for displaying images while including a reduced dead zone. However, the scope of the present invention is not limited to this effect.

[0136] Although the present invention has been described with reference to the embodiments shown in the accompanying drawings, this is provided only as an example, and those skilled in the art will understand that various changes in form and details and their equivalents may be made therein without departing from the spirit and scope of the present invention as defined by the present disclosure.

Claims

1. A display device, wherein: The display device comprises: A display unit, the display unit being disposed above the substrate and comprising a first display area and a second display area, each of the first display area and the second display area comprising a plurality of pixel arrays, and the second display area further comprising a rounded corner portion; a first driving voltage supply line extending in a first direction in a non-display area on one side of the display unit; a plurality of first driving voltage lines that supply a driving voltage to a plurality of pixels, the plurality of first driving voltage lines being arranged in the first display area in the first direction and extending in a second direction crossing the first direction, extending to an area between the first display area and the first driving voltage supply lines, and being connected to the first driving voltage supply lines; and a plurality of second driving voltage lines, the plurality of second driving voltage lines supplying driving voltages to the plurality of pixels, the plurality of second driving voltage lines being arranged in the second display area in the first direction and being disconnected from the first driving voltage supply lines in an area between the second display area and the first driving voltage supply lines, The plurality of second driving voltage lines are connected to each other through a plurality of connecting lines to receive the driving voltage.

2. The display device according to claim 1, wherein: The plurality of first driving voltage lines and the plurality of second driving voltage lines are electrically connected to a plurality of connection lines extending in the first direction.

3. The display device according to claim 2, wherein: The plurality of connection lines cross the plurality of first driving voltage lines and the plurality of second driving voltage lines to form a mesh shape.

4. The display device according to claim 2, wherein: The plurality of second driving voltage lines supply the driving voltage to the plurality of pixels disposed in the second display area through the plurality of connection lines.

5. The display device according to claim 1, wherein: The display device further includes: a switching unit including a plurality of demultiplexers arranged in the non-display area, demultiplexing the data signal, and supplying the demultiplexed data signal to a plurality of data lines; and a second driving voltage supply line, the second driving voltage supply line being arranged in parallel with the first driving voltage supply line and connected to a terminal unit at an edge of the substrate, the switch unit being between the first driving voltage supply line and the second driving voltage supply line, The display unit includes a plurality of scan lines and a plurality of data lines respectively connected to the plurality of pixels.

6. The display device according to claim 5, wherein: The switch unit comprises: a first switching unit that demultiplexes a data signal supplied to the first display area; and a second switching unit, the second switching unit demultiplexing the data signal supplied to the second display area, The plurality of first demultiplexers included in the first switch unit are arranged at a first pitch, and the plurality of second demultiplexers included in the second switch unit are arranged at a second pitch smaller than the first pitch.

7. The display device according to claim 6, wherein: The first driving voltage supply line and the second driving voltage supply line are electrically connected to each other through a plurality of connection lines disposed between the plurality of first demultiplexers.

8. The display device according to claim 1, wherein: Pixels adjacent to an outer edge of the display unit among the plurality of pixels are arranged in a step-like manner.

9. The display device according to claim 1, wherein: The display unit has one of a polygonal shape, a circular shape, and an elliptical shape.

10. The display device according to claim 1, wherein: The display device further includes a substrate, the display unit is disposed above the substrate, and the substrate includes a curved edge.

11. The display device according to claim 1, wherein: The length of the plurality of second driving voltage lines extending in the second direction is shorter than the length of the plurality of first driving voltage lines.

12. A display device, wherein: The display device comprises: a display unit in which a first display area and a second display area including a corner at an edge of the first display area are defined, the display unit comprising a plurality of first pixels and a plurality of second pixels, the plurality of first pixels and the plurality of second pixels being arranged in the first display area and the second display area, respectively, and connected to a plurality of data lines and a plurality of driving voltage lines extending in a second direction and a plurality of scan lines extending in a first direction intersecting the second direction; a scan driver and a data driver, the scan driver and the data driver being arranged in a non-display area, the non-display area being outside the display unit; a switching unit including a plurality of demultiplexers arranged in the non-display area, demultiplexing the data signals output from the data driver, and supplying the demultiplexed data signals to the plurality of data lines; and a driving voltage supply line arranged in the non-display area and connected to the plurality of driving voltage lines extending from the display unit, wherein the plurality of driving voltage lines include a first driving voltage line connected to the plurality of first pixels and a second driving voltage line connected to the plurality of second pixels, the first driving voltage line extends to the non-display area and is connected to the driving voltage supply line, and the second driving voltage line is disconnected from the driving voltage supply line in the non-display area, The plurality of second driving voltage lines are connected to each other through a plurality of connecting lines to receive the driving voltage.

13. The display device according to claim 12, wherein: The corners have a rounded shape.

14. The display device according to claim 12, wherein: Pixels adjacent to an outer edge of the display unit among the plurality of first pixels and the plurality of second pixels are arranged in a stepwise manner.

15. The display device according to claim 12, wherein: The switch unit further comprises: a first switching unit that demultiplexes data signals supplied to the plurality of first pixels; and a second switching unit that demultiplexes data signals supplied to the plurality of second pixels, The plurality of demultiplexers included in the first switch unit are arranged at a first pitch, and the plurality of demultiplexers included in the second switch unit are arranged at a second pitch smaller than the first pitch.

16. The display device according to claim 12, wherein: The driving voltage supplied to the plurality of driving voltage lines is supplied along a mesh path.

17. The display device according to claim 12, wherein: The display device further includes a plurality of connection lines extending in the first direction, the plurality of connection lines being connected to the first driving voltage line and the second driving voltage line by contacting the first driving voltage line and the second driving voltage line.

18. The display device according to claim 17, wherein: An insulating layer is disposed between the plurality of connection lines and the first and second driving voltage lines, and the plurality of connection lines are electrically connected to the first and second driving voltage lines through contact holes in the insulating layer.

19. The display device according to claim 12, wherein: The driving voltage supply line includes a first driving voltage supply line and a second driving voltage supply line extending in the first direction, the switching unit is between the first driving voltage supply line and the second driving voltage supply line, the plurality of driving voltage lines are connected to the first driving voltage supply line, and the second driving voltage supply line is connected to a terminal unit.

20. The display device according to claim 19, wherein: The driving voltage supply line further includes a plurality of connection lines connecting the first driving voltage supply line and the second driving voltage supply line, and the plurality of connection lines are disposed between the plurality of demultiplexers.

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