Display device and method for manufacturing the same

Abstract

A display device and a method of manufacturing the same are provided. The display device includes: a substrate including a display region and a sensor region, the sensor region including a transmissive portion through which light is transmitted; a plurality of first display devices disposed in the display region; a display device group including a plurality of second display devices, the display device group being disposed in the sensor region; and a passivation layer covering the display device group and having a first hole corresponding to the transmissive portion.

Description

[0001] This application claims the benefit of Korean Patent Application No. 10-2019-0028378, filed on Mar. 12, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] Aspects of the present invention relate to a display device and a method of manufacturing the same. Background Art

[0003] Applications of conventional display devices have been diversified. In addition, the range of use of display devices has increased in part due to the relatively small thickness and relatively light weight of display devices.

[0004] The area occupied by the display region of a display device has increased, and various functions connected or linked to the display device have been added to the display device. To increase the display region and to add various functions, display devices capable of arranging various components in the display region have been developed. Summary of the Invention

[0005] Aspects of some embodiments relate to a display device and a method of manufacturing the same, the display device including a sensor region in which sensors or the like may be arranged inside a display region. Additional aspects will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the presented embodiments.

[0006] According to some embodiments, there is provided a display device including: a substrate including a display region and a sensor region, the sensor region including a transmissive portion through which light is transmitted; a plurality of first display devices arranged in the display region; a display device group including a plurality of second display devices, the display device group arranged in the sensor region; and a passivation layer covering the display device group and having a first hole corresponding to the transmissive portion.

[0007] In some embodiments, each of the plurality of second display devices includes a pixel electrode, an emission layer on the pixel electrode, and a counter electrode on the emission layer.

[0008] In some embodiments, the passivation layer is on the counter electrode, and wherein the counter electrode has a second hole corresponding to the transmissive portion, and an area of the second hole is larger than an area of the first hole.

[0009] In some embodiments, a passivation layer covers the display device group and has first patterns spaced apart from each other with a first hole located between the first patterns, wherein a counter electrode corresponds to the display device group and has second patterns spaced apart from each other with a second hole located between the second patterns, and wherein an end portion of one of the first patterns on one side of the first hole covers an end portion of one of the second patterns on one side of the second hole.

[0010] In some embodiments, the display device further includes: an organic insulating layer between the substrate and the pixel electrode; and a pixel defining layer between the organic insulating layer and the counter electrode and having an opening exposing at least a portion of the pixel electrode.

[0011] In some embodiments, the pixel defining layer has a third hole corresponding to a transmissive portion, and wherein the organic insulating layer has a fourth hole corresponding to the transmissive portion.

[0012] In some embodiments, the display device further includes a plurality of insulating layers between the substrate and the organic insulating layer, wherein the plurality of insulating layers are below the fourth hole and have a fifth hole corresponding to the transmissive portion.

[0013] In some embodiments, the display device further includes a packaging layer on the passivation layer, the packaging layer covering the plurality of first display devices and the plurality of second display devices and including an inorganic packaging layer and an organic packaging layer.

[0014] In some embodiments, the passivation layer includes the same material as the inorganic packaging layer.

[0015] In some embodiments, the display device further includes a packaging substrate on the passivation layer, the packaging substrate covering the plurality of first display devices and the plurality of second display devices and opposite to the substrate.

[0016] In some embodiments, the display device further includes a filling material filled between the passivation layer and the packaging substrate, wherein the filling material has a refractive index between the refractive index of the passivation layer and the refractive index of the packaging substrate.

[0017] In some embodiments, the substrate further includes an opening region surrounded by a display region, and wherein the opening region includes a hole having a size larger than that of the transmissive portion.

[0018] According to some embodiments, a method of manufacturing a display device is provided. The display device includes a plurality of first display devices, a display device group including a plurality of second display devices, and a transmissive portion that transmits light. The method includes the following steps: forming a plurality of pixel electrodes on a substrate including a display area and a sensor area, where the plurality of first display devices are arranged in the display area, and the display device group and the transmissive portion are arranged in the sensor area; forming a pixel defining layer on the plurality of pixel electrodes, the pixel defining layer having openings that expose at least a portion of each of the plurality of pixel electrodes and holes corresponding to the transmissive portion; forming a sacrificial layer on the pixel defining layer; patterning the sacrificial layer such that at least some of the pixel electrodes of the display device group are exposed and the holes are covered; forming a passivation layer on the patterned sacrificial layer; and forming a first hole corresponding to the transmissive portion in the passivation layer by removing the patterned sacrificial layer, wherein the passivation layer covers the display device group and has first patterns spaced apart from each other and having the first hole located between the first patterns.

[0019] In some embodiments, the step of patterning the sacrificial layer includes: forming a photoresist layer on the sacrificial layer; and patterning the photoresist layer to correspond to the transmissive portion, wherein the patterned sacrificial layer is formed by using the patterned photoresist layer such that a portion of the sacrificial layer corresponding to the transmissive portion remains.

[0020] In some embodiments, the step of forming the patterned sacrificial layer includes forming an undercut profile of the patterned sacrificial layer and the patterned photoresist layer.

[0021] In some embodiments, the step of forming the passivation layer on the patterned sacrificial layer includes: forming an emission layer on the plurality of pixel electrodes and the patterned sacrificial layer; forming a counter electrode on the emission layer; and forming a passivation layer on the counter electrode.

[0022] In some embodiments, the method further includes forming a lower hole by removing a portion of at least one insulating layer formed on the substrate before forming the plurality of pixel electrodes, the portion corresponding to the transmissive portion.

[0023] In some embodiments, the method further includes forming a packaging layer including an inorganic packaging layer and an organic packaging layer on the passivation layer, wherein the packaging layer covers the display area and the sensor area.

[0024] In some embodiments, the method further includes disposing a packaging substrate opposite to the substrate on the passivation layer, wherein the packaging substrate covers the display area and the sensor area.

[0025] In some embodiments, the method further includes forming a filling material filled between the passivation layer and the encapsulation substrate, wherein the filling material has a refractive index between the refractive index of the passivation layer and the refractive index of the encapsulation substrate. Description of the Drawings

[0026] These and / or other aspects will become apparent and more readily understood from the following description of embodiments in conjunction with the accompanying drawings, in which:

[0027] Figure 1 is a schematic perspective view of a display device according to an exemplary embodiment of the present invention;

[0028] Figure 2 is a cross-sectional view taken along line A-A' of Figure 1 ;

[0029] Figure 3 is a schematic plan view of a display device according to an embodiment;

[0030] Figure 4 is a cross-sectional view taken along line B-B' of Figure 3 ;

[0031] Figure 5 is Figure 3 a schematic plan view of a part of the sensor area of

[0032] Figure 6 is a cross-sectional view taken along line C-C' of Figure 5 ;

[0033] Figure 7 is a schematic cross-sectional view of a display device according to another exemplary embodiment of the present invention;

[0034] Figure 8 is a schematic cross-sectional view of a display device according to another exemplary embodiment of the present invention;

[0035] Figure 9 is a schematic cross-sectional view of a display device according to another exemplary embodiment of the present invention;

[0036] Figures 10A to 10I is a cross-sectional view for describing a method of manufacturing a display device according to an exemplary embodiment of the present invention;

[0037] Figure 11A is a schematic plan view of a display device according to another exemplary embodiment of the present invention;

[0038] Figure 11B is a schematic plan view of a display device according to another exemplary embodiment of the present invention; and

[0039] Figure 12 is a cross-sectional view taken along lineFigure 11A A cross-sectional view taken along line D-D' and line E-E'. DETAILED DESCRIPTION OF THE INVENTION

[0040] Since the invention contemplates various suitable changes and numerous embodiments, specific embodiments will be shown in the drawings and described in detail in the written description. However, this is not intended to limit the invention to specific practice modes, and it will be understood that all changes, all equivalents, and all alternatives that do not depart from the spirit and technical scope of the invention are included in the invention. In the following description of the invention, if the detailed description of the disclosed technology is considered to obscure the features of the invention, the detailed description of the disclosed technology will not be provided.

[0041] One or more embodiments will be described in more detail below with reference to the accompanying drawings. Regardless of the figure numbers, those components that are substantially the same or corresponding are labeled with the same reference numerals, and redundant descriptions may be omitted. In the figures, the thicknesses of several layers and regions are enlarged to clearly show the layers and regions. In the figures, for ease of explanation, the thicknesses of some layers and regions are exaggerated.

[0042] Figure 1 is a schematic perspective view of a display device 1 according to an embodiment.

[0043] Referring to Figure 1 , the display device 1 includes a display area DA for displaying an image and a non-display area NDA for not displaying an image. The display device 1 can provide a main image by using light emitted from a plurality of main pixels Pm arranged in the display area DA.

[0044] The display device 1 includes a sensor area SA. As will be described later with reference to Figure 2 , the sensor area SA may be an area having a lower portion in which components such as sensors using infrared light, visible light, or sound are arranged. The sensor area SA may include a transmissive portion TA capable of transmitting light and / or sound that is output from the components to the outside or travels from the outside toward the components. According to an embodiment, when infrared light passes through the sensor area SA, the infrared light transmittance in the sensor area SA may be approximately 10% or greater, for example, 20% or greater, 25% or greater, 50% or greater, 85% or greater, or 90% or greater.

[0045] According to this embodiment, a plurality of auxiliary pixels Pa may be arranged in the sensor area SA, and the light emitted by the plurality of auxiliary pixels Pa may be used to provide a specific image. The image provided by the sensor area SA is an auxiliary image, and thus may have a lower resolution than the image provided by the display area DA. In other words, since the sensor area SA includes a transmissive portion TA capable of transmitting light or / and sound, the number of auxiliary pixels Pa arranged on a unit area may be less than the number of main pixels Pm arranged on a unit area in the display area DA.

[0046] The sensor area SA may be at least partially surrounded by the display area DA. According to an embodiment, Figure 1 The sensor area SA surrounded entirely by the display area DA is shown.

[0047] Although an organic light emitting display will now be shown and described as the display device 1, the display device 1 is not limited thereto. According to another embodiment, various types of display devices such as an inorganic light emitting display and a quantum dot light emitting display may be used.

[0048] Although in Figure 1 the sensor area SA is arranged on one side (e.g., the upper right side) of the display area DA having a rectangular shape, the embodiment is not limited thereto. The shape of the display area DA may be circular, elliptical, or a polygon such as a triangle or a pentagon, and the position of the sensor area SA and the number of sensor areas SA may vary.

[0049] Figure 2 is a cross-sectional view taken along the Figure 1 line A-A'.

[0050] Referring to Figure 2 , the display device 1 may include a display panel 10 including display elements and a component 20 corresponding to the sensor area SA.

[0051] The display panel 10 may include a substrate 100, a display element layer 200 provided on the substrate 100, and a packaging layer 300 as a packaging member for sealing the display element layer 200. The display panel 10 may further include a lower protective film 175 disposed under the substrate 100.

[0052] The substrate 100 may include glass or a polymer resin. When the substrate 100 includes a polymer resin, the substrate 100 may have flexible, rollable, or bendable characteristics. The substrate 100 may have a multilayer structure including a layer containing a polymer resin and an inorganic layer.

[0053] The display element layer 200 may include a circuit layer including a main thin film transistor (TFT) and an auxiliary thin film transistor (TFT'), a main organic light emitting diode (OLED) and an auxiliary organic light emitting diode (OLED') as display elements, and insulating layers IL and IL'.

[0054] In the display area DA, a main pixel Pm including a main thin film transistor TFT and a main organic light emitting diode OLED connected to the main thin film transistor TFT may be arranged. In the sensor area SA, an auxiliary pixel Pa including an auxiliary thin film transistor TFT' and an auxiliary organic light emitting diode OLED' connected to the auxiliary thin film transistor TFT' and wirings may be arranged.

[0055] In the sensor area SA, a transmissive portion TA in which the auxiliary thin film transistor TFT' is not provided and display elements are not arranged may be arranged. The transmissive portion TA may be understood as a transmissive area that transmits light / signals emitted by the component 20 or light / signals incident on the component 20.

[0056] The component 20 may be located in the sensor area SA. The component 20 may be an electronic component using light or sound. For example, the component 20 may be a sensor that receives and uses light like an infrared sensor, a sensor that outputs and senses light or sound to measure distance or identify a fingerprint, etc., a small lamp that outputs light, or a speaker that outputs sound. The electronic component using light may use light of various wavelength bands, such as visible light, infrared light, and ultraviolet light. A plurality of components 20 may be arranged in the sensor area SA. For example, a light emitting device and a light receiving device as the component 20 may both be included in a single sensor area SA. In some examples, both a light emitting portion and a light receiving portion may be included in a single component 20.

[0057] The lower electrode layer BSM may be arranged in the sensor area SA to correspond to the auxiliary pixel Pa. In other words, the lower electrode layer BSM may be arranged in the area below the auxiliary thin film transistor TFT'. The lower electrode layer BSM may prevent or substantially prevent external light from reaching the auxiliary pixel Pa including the auxiliary thin film transistor TFT' and the like. For example, the lower electrode layer BSM may prevent or substantially prevent light emitted by the component 20 from reaching the auxiliary pixel Pa. A static voltage or signal is applied to the lower electrode layer BSM, so the lower electrode layer BSM may prevent or substantially prevent the pixel circuit from being damaged by electrostatic discharge.

[0058] The encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this regard, Figure 2 The first inorganic encapsulation layer 310, the second inorganic encapsulation layer 330, and the organic encapsulation layer 320 between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 are shown.

[0059] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include at least one inorganic insulating material, such as alumina, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride, etc. The organic encapsulation layer 320 may include a polymer-based material. Examples of the polymer-based material may include acrylic resin, epoxy resin, polyimide, and polyethylene.

[0060] The lower protective film 175 may be attached to the lower surface of the substrate 100 and may support and protect the substrate 100. The lower protective film 175 may include an opening 175OP corresponding to the sensor area SA. The lower protective film 175 may improve the light transmittance of the sensor area SA by including the opening 175OP. The lower protective film 175 may include polyethylene terephthalate (PET) or polyimide (PI).

[0061] The sensor area SA may have an area larger than the area where the components 20 are arranged. Accordingly, the area of the opening 175OP included in the lower protective film 175 may not be the same as the area of the sensor area SA. For example, the area of the opening 175OP may be smaller than the area of the sensor area SA.

[0062] One or more components such as an input sensing member for sensing a touch input, an anti-reflection member including a polarizer and a retarder or a color filter and a black matrix, and a transparent window may be arranged on the display panel 10.

[0063] According to the present embodiment, the encapsulation layer 300 serves as an encapsulation member for sealing the display element layer 200, but the embodiment is not limited thereto. For example, an encapsulation substrate bonded to the substrate 100 through a sealant or glass frit may serve as a member for sealing the display element layer 200.

[0064] Figure 3 is a schematic plan view of a display panel 10 according to an embodiment.

[0065] Refer to Figure 3 , the display panel 10 is arranged in the display area DA and includes a plurality of main pixels Pm. Each of the main pixels Pm may include a display element such as an organic light emitting diode. Each of the main pixels Pm may emit, for example, red light, green light, blue light, or white light via the organic light emitting diode. The main pixel Pm used herein may be understood as a pixel that emits one of red light, green light, blue light, and white light as described above. The display area DA may be protected from environmental air or moisture by being covered with the encapsulation member described above with reference to Figure 2 and described.

[0066] The sensor area SA can be arranged inside the display area DA, and a plurality of auxiliary pixels Pa are arranged in the sensor area SA. Each of the auxiliary pixels Pa can include a display element such as an organic light-emitting diode. Each of the auxiliary pixels Pa can emit, for example, red light, green light, blue light, or white light via the organic light-emitting diode. The auxiliary pixel Pa used herein can be understood as a pixel that emits one of red light, green light, blue light, and white light as described above. In the sensor area SA, a transmissive portion TA arranged between the auxiliary pixels Pa can be included.

[0067] According to an embodiment, one main pixel Pm and one auxiliary pixel Pa can include the same pixel circuit. However, the embodiment is not limited thereto. The main pixel Pm and the auxiliary pixel Pa can include different pixel circuits.

[0068] Since the sensor area SA includes the transmissive portion TA, the sensor area SA can have a lower resolution than the display area DA. For example, the resolution of the sensor area SA can be approximately 1 / 2 of the resolution of the display area DA. According to some embodiments, the display area DA can have a resolution of 400 ppi or greater, and the sensor area SA can have a resolution of approximately 200 ppi.

[0069] Each of the main pixel Pm and the auxiliary pixel Pa can be electrically connected to an external circuit arranged in the non-display area NDA. In the non-display area NDA, a first scan driving circuit 110, a second scan driving circuit 120, a terminal 140, a data driving circuit 150, a first power supply line 160, and a second power supply line 170 can be arranged.

[0070] For example, the first scan driving circuit 110 can provide a scan signal to each of the main pixel Pm and the auxiliary pixel Pa via a scan line SLi. The first scan driving circuit 110 can provide a light emission control signal to each pixel via a light emission control line EL. The second scan driving circuit 120 can be arranged side by side with the first scan driving circuit 110 and position the display area DA between the second scan driving circuit 120 and the first scan driving circuit 110. Some of the main pixel Pm and the auxiliary pixel Pa arranged in the display area DA can be electrically connected to the first scan driving circuit 110, and the other pixels can be electrically connected to the second scan driving circuit 120. According to another embodiment, the second scan driving circuit 120 can be omitted.

[0071] The terminal 140 may be disposed on one side of the substrate 100. The terminal 140 may be exposed rather than covered by an insulating layer and may be electrically connected to a printed circuit board PCB. The terminal PCB-P of the printed circuit board PCB may be electrically connected to the terminal 140 of the display panel 10. The printed circuit board PCB transmits signals or power of the controller to the display panel 10. The control signal generated by the controller may be transmitted to each of the first scan driving circuit 110 and the second scan driving circuit 120 via the printed circuit board PCB. The controller may supply a first power voltage (ELVDD) and a second power voltage (ELVSS) to the first power line 160 and the second power line 170 respectively via a first connection line 161 and a second connection line 171. The first power voltage (ELVDD) may be supplied to the pixel electrodes of each of the main pixels Pm and the auxiliary pixels Pa via a driving voltage line PL connected to the first power line 160, and the second power voltage (ELVSS) may be supplied to the counter electrodes of each of the main pixels Pm and the auxiliary pixels Pa connected to the second power line 170.

[0072] The data driving circuit 150 is electrically connected to the data line DL. The data signal of the data driving circuit 150 may be supplied to each of the main pixels Pm and the auxiliary pixels Pa via a connection line 151 connected to the terminal 140 and a data line DL connected to the connection line 151. In Figure 3 , the data driving circuit 150 is disposed on the printed circuit board PCB. However, according to another embodiment, the data driving circuit 150 may be disposed on the substrate 100. For example, the data driving circuit 150 may be between the terminal 140 and the first power line 160.

[0073] The first power line 160 may include a first sub-wiring 162 and a second sub-wiring 163 that both extend in the x direction in parallel with each other and have the display area DA therebetween. The second power line 170 may partially surround the display area DA by having an annular shape with one side open.

[0074] Figure 4 is a cross-sectional view taken along line B-B' of Figure 3 .

[0075] Referring to Figure 4 , the main thin film transistor TFT, the main storage capacitor Cst, and the pixel electrode 221 electrically connected to the main thin film transistor TFT and the main storage capacitor Cst are disposed in the display area DA of the substrate 100.

[0076] The substrate 100 may include a polymer resin or glass. For example, the substrate 100 may include polymer resins such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyallylate, polyimide, polycarbonate, cellulose triacetate, and / or cellulose acetate propionate. Thus, the substrate 100 may be flexible. The above polymer resins may be transparent.

[0077] The substrate 100 may include multiple layers. For example, in addition to the layer including the above polymer resin, the substrate 100 may further include a barrier layer that prevents or substantially prevents the penetration of foreign substances. The barrier layer may be a single layer or multiple layers including inorganic materials such as silicon nitride (SiN x ) and / or silicon oxide (SiO x ).

[0078] According to another embodiment, the substrate 100 may include a glass material containing SiO2 as a main component, or may include a resin such as a reinforced plastic. The substrate 100 may be rigid. The substrate 100 may have a structure in which the barrier layer is stacked on the layer including the above polymer resin. In this case, the substrate 100 may have improved flexibility. The barrier layer may include, for example, silicon nitride (SiN x ), silicon oxynitride (SiON), and / or silicon oxide (SiO x ).

[0079] A buffer layer 111 for preventing or substantially preventing impurities from penetrating into the semiconductor layer A1 of the main thin film transistor TFT may be disposed on the substrate 100. The buffer layer 111 may include inorganic insulating materials such as silicon nitride, silicon oxynitride, and silicon oxide, and may be a single layer or multiple layers including inorganic insulating materials. The buffer layer 111 may include a first buffer layer 111a and a second buffer layer 111b, and one of the first buffer layer 111a and the second buffer layer 111b is stacked on the other.

[0080] A pixel circuit including the main thin film transistor TFT and the main storage capacitor Cst is positioned on the buffer layer 111. The main thin film transistor TFT may include a semiconductor layer A1, a gate electrode G1, a source electrode S1, and a drain electrode D1. Figure 4 The main thin film transistor TFT may correspond to a driving thin film transistor or a light emission control thin film transistor. According to this embodiment, the main thin film transistor TFT is a top-gate type in which the gate electrode G1 is disposed on the semiconductor layer A1 and the first gate insulating layer 112 is between the gate electrode G1 and the semiconductor layer A1. However, according to another embodiment, the main thin film transistor TFT may be a bottom-gate type.

[0081] The semiconductor layer A1 may include polysilicon. In some examples, the semiconductor layer A1 may include, for example, amorphous silicon, an oxide semiconductor, or an organic semiconductor. The gate electrode G1 may include a low-resistance metal material. The gate electrode G1 may include a conductive material containing, for example, molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti), and may be formed as a multi-layer or a single layer including the above materials.

[0082] The first gate insulating layer 112 between the semiconductor layer A1 and the gate electrode G1 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and / or hafnium oxide. The first gate insulating layer 112 may be a single layer or a multi-layer including the above materials.

[0083] The source electrode S1 and the drain electrode D1 may include a highly conductive material. Each of the source electrode S1 and the drain electrode D1 may include a conductive material containing, for example, Mo, Al, Cu, and / or Ti, and may be a multi-layer or a single layer including the above materials. According to an embodiment, each of the source electrode S1 and the drain electrode D1 may be formed as a multi-layer of Ti / Al / Ti.

[0084] The main storage capacitor Cst includes a lower electrode CE1 and an upper electrode CE2 with the second gate insulating layer 113 therebetween. The lower electrode CE1 and the upper electrode CE2 are stacked on top of each other. The main storage capacitor Cst may be stacked on the main thin film transistor TFT. In this regard, Figure 4 A case is shown where the gate electrode G1 of the main thin film transistor TFT is the lower electrode CE1 of the main storage capacitor Cst. According to another embodiment, the main storage capacitor Cst may not be stacked on the main thin film transistor TFT. The main storage capacitor Cst may be covered by the interlayer insulating layer 115.

[0085] The second gate insulating layer 113 and the interlayer insulating layer 115 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and / or hafnium oxide. The second gate insulating layer 113 and the interlayer insulating layer 115 may be a single layer or a multi-layer including the above materials.

[0086] A pixel circuit including a main thin film transistor (TFT) and a main storage capacitor Cst may be covered by a planarization layer 117. The upper surface of the planarization layer 117 may include an approximately flat surface. The planarization layer 117 may include an organic insulating material such as polymethyl methacrylate, polystyrene, a polymer derivative having a phenolic group, an acrylate polymer, an imide polymer, an acrylate ether polymer, an amide polymer, a fluorine polymer, a parylene polymer, a polyvinyl alcohol polymer, or a blend thereof. According to an embodiment, the planarization layer 117 may include polyimide. In some examples, the planarization layer 117 may include an inorganic insulating material or may include an inorganic insulating material and an organic insulating material.

[0087] A pixel electrode 221 may be on the planarization layer 117. The pixel electrode 221 may include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and / or aluminum zinc oxide (AZO). According to another embodiment, the pixel electrode 221 may include a reflective layer including, for example, silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), and / or chromium (Cr), or a mixture of these materials. According to another embodiment, the pixel electrode 221 may further include a film formed of ITO, IZO, ZnO, and / or In2O3, etc., above / below the above reflective layer.

[0088] A pixel defining layer 119 may be disposed on the pixel electrode 221. The pixel defining layer 119 may include an opening OP1 through which the upper surface of the pixel electrode 221 is exposed, and may cover the edge of the pixel electrode 221. The pixel defining layer 119 may include an organic insulating material. In some examples, the pixel defining layer 119 may include an inorganic insulating material such as silicon nitride (SiN x ), silicon oxynitride (SiON), or silicon oxide (SiO x ). In some examples, the pixel defining layer 119 may include an organic insulating material and an inorganic insulating material.

[0089] An intermediate layer 222 includes an emission layer. The intermediate layer 222 may include a first functional layer below the emission layer and / or a second functional layer above the emission layer. The emission layer may include a low-molecular organic material or a high-molecular organic material that emits light of a specific color.

[0090] The first functional layer can be single-layer or multi-layer. For example, when the first functional layer is formed of a high molecular weight material, the first functional layer is a hole transport layer (HTL) having a single-layer structure and can include poly-(3,4)-ethylenedioxythiophene (PEDOT) or polyaniline (PANI). On the other hand, when the first functional layer is formed of a low molecular weight material, the first functional layer can include a hole injection layer (HIL) and an HTL.

[0091] The second functional layer can be optional. For example, when the first functional layer and the emission layer are formed of high molecular weight materials, the second functional layer can be formed. The second functional layer can be single-layer or multi-layer. The second functional layer can include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0092] The first functional layer and the second functional layer of the intermediate layer 222 can be formed together in all pixels. The emission layer of the intermediate layer 222 can be arranged separately for each pixel in the display area DA. The emission layer can be arranged within the opening OP1 of the pixel defining layer 119.

[0093] The counter electrode 223 can be formed of a conductive material having a low work function. For example, the counter electrode 223 can include a (semi) transparent layer containing, for example, silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li) and / or calcium (Ca) etc. or an alloy of these materials. In some examples, the counter electrode 223 can also include a layer (such as ITO, IZO, ZnO or In2O3 etc.) on the (semi) transparent layer including any of the above materials. The counter electrode 223 can be formed together for all pixels and can be arranged in Figure 1 the display area DA and the sensor area SA. The intermediate layer 222 and the counter electrode 223 can be formed via thermal deposition.

[0094] Figure 5 is Figure 3 a schematic plan view of a part of the sensor area SA, Figure 6 is a cross-sectional view taken along the line C-C' of Figure 5 .

[0095] Referring to Figure 5 , the auxiliary pixel Pa and the transmissive portion TA are arranged in the sensor area SA of the display device 1 according to the embodiment. In this case, in each of the auxiliary pixels Pa, Figure 6 electrically connected to Figure 6 the auxiliary thin film transistor TFT' and Figure 6 the auxiliary storage capacitor Cst' of the auxiliary organic light emitting diode OLED' can be arranged as a second display device.

[0096] Some auxiliary pixels Pa may be arranged continuously to form a single pixel group Pg. In other words, one or more auxiliary pixels Pa may be included in the pixel group Pg, and the pixel group Pg may be understood as a display device group that is a combination of second display devices included in the auxiliary pixels Pa.

[0097] Figure 5 Four auxiliary pixels Pa arranged in two rows within one pixel group Pg are shown. However, the embodiment is not limited thereto. The number of auxiliary pixels Pa included in each pixel group Pg and the arrangement of the auxiliary pixels Pa may vary. For example, three auxiliary pixels Pa arranged in one row may be included in each pixel group Pg.

[0098] Since no display element is arranged in each transmissive portion TA, each transmissive portion TA is a region having a high light transmittance, and a plurality of transmissive portions TA may be included in the sensor region SA. The transmissive portions TA may alternate with the pixel groups Pg in the first direction (x direction) and / or the second direction (y direction). In some examples, the transmissive portions TA may be arranged to surround the pixel groups Pg. In some examples, the auxiliary pixels Pa may be arranged to surround the transmissive portions TA.

[0099] According to the present embodiment, a passivation layer 310 covering the auxiliary pixels Pa is arranged in the sensor region SA. The passivation layer 310 may have first patterns 310p that are spaced apart from each other and have first holes H1 therebetween, and each of the first patterns 310p may be arranged for each pixel group Pg to cover the corresponding pixel group Pg.

[0100] The passivation layer 310 protects the auxiliary pixels Pa from environmental air or moisture and / or prevents or substantially prevents damage from occurring in the auxiliary pixels Pa in subsequent processes.

[0101] Referring to Figure 6 , a plurality of auxiliary pixels Pa and a plurality of transmissive portions TA may be arranged in the sensor region SA of the display device 1 according to the embodiment.

[0102] Each auxiliary pixel Pa may include an auxiliary thin film transistor TFT' and an auxiliary storage capacitor Cst', and may also include an auxiliary organic light emitting diode OLED' as a second display device. Each transmissive portion TA may include a transmissive hole TAH corresponding to the transmissive portion TA.

[0103] The structures of the auxiliary thin film transistor TFT', the auxiliary storage capacitor Cst', and the auxiliary organic light emitting diode OLED' that are components of each auxiliary pixel Pa are the same as those referred to above Figure 4The structures of the main thin film transistor TFT, the main storage capacitor Cst, and the main organic light emitting diode OLED, which are described as components of each main pixel Pm, are the same or similar. For example, now the differences between the components of the auxiliary pixel Pa and the components of the main pixel Pm will be focused on and described.

[0104] In the sensor area SA, the lower electrode layer BSM may be located between the first buffer layer 111a and the second buffer layer 111b. According to another embodiment, the lower electrode layer BSM may be located between the substrate 100 and the first buffer layer 111a. The lower electrode layer BSM may be located under the auxiliary thin film transistor TFT', and may prevent the characteristics of the auxiliary thin film transistor TFT' from deteriorating due to, for example, light emitted from the component 20.

[0105] The lower electrode layer BSM may be connected to a wiring (such as a driving voltage line PL) arranged on a different layer through a contact hole. The lower electrode layer BSM may receive a static voltage or a signal from the driving voltage line PL. For example, the lower electrode layer BSM may receive a first power supply voltage (ELVDD) or a scan signal. Since the lower electrode layer BSM receives a static voltage or a signal, the possibility of electrostatic discharge will be significantly reduced. The lower electrode layer BSM may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), etc. The lower electrode layer BSM may be a single layer or a multi-layer including the above materials.

[0106] The lower electrode layer BSM may be stacked with the semiconductor layer A1' and the second buffer layer 111b may be between the lower electrode layer BSM and the semiconductor layer A1'. According to an embodiment, the width of the semiconductor layer A1' may be smaller than the width of the lower electrode layer BSM. Therefore, when projected in a direction perpendicular to the substrate 100, the semiconductor layer A1' may be completely stacked with the lower electrode layer BSM.

[0107] The planarization layer 117 may have a fourth hole H4 corresponding to each transmission part TA. The fourth hole H4 may be formed to expose the upper surface of the interlayer insulating layer 115. According to an embodiment, the planarization layer 117 may be an organic insulating layer including an organic material.

[0108] In addition to having an opening OP2 that exposes at least a part of each pixel electrode 221', the pixel defining layer 119 may also have a third hole H3 corresponding to each transmission part TA to define the light emitting area of each pixel. Therefore, the fourth hole H4 of the planarization layer 117 is located under the third hole H3 of the pixel defining layer 119. According to an embodiment, the pixel defining layer 119 may include an organic insulating material.

[0109] An intermediate layer 222' including an organic emission layer may be disposed on the pixel electrode 221', and a counter electrode 223 may be disposed on the intermediate layer 222'.

[0110] The counter electrode 223 is disposed to cover at least a part of the inner sidewall of the fourth hole H4 of the planarization layer 117 and at least a part of the inner sidewall of the third hole H3 of the pixel defining layer 119, and thus the counter electrode 223 may have a second hole H2 corresponding to the transmissive portion TA.

[0111] The second hole H2 of the counter electrode 223 may be located inside the fourth hole H4 and the third hole H3 due to the thickness of the counter electrode 223 covering the fourth hole H4 and the third hole H3. Similar to the fourth hole H4, the second hole H2 may expose the upper surface of the interlayer insulating layer 115.

[0112] The counter electrode 223 may be disposed to cover a pixel group Pg including a plurality of auxiliary pixels Pa. For example, the counter electrode 223 may have a second pattern 223p spaced apart from each other with the second hole H2 therebetween, and each of the second patterns 223p may be disposed for each pixel group Pg to cover the corresponding pixel group Pg.

[0113] The second pattern 223p of the counter electrode 223 covering the pixel group Pg may be formed to have a thickness decreasing in the direction toward the end of the second pattern 223p (i.e., in the direction toward the upper surface of the interlayer insulating layer 115).

[0114] A passivation layer 310 may be disposed on the second pattern 223p of the counter electrode 223. The passivation layer 310 is disposed to cover the inner sidewall of the second hole H2 of the counter electrode 223, and thus has a first hole H1 corresponding to the transmissive portion TA.

[0115] The first hole H1 of the passivation layer 310 may be located inside the second hole H2 due to the thickness of the passivation layer 310 covering the inner sidewall of the second hole H2. Similar to the second hole H2 of the counter electrode 223 and the fourth hole H4 of the planarization layer 117, the first hole H1 may expose the upper surface of the interlayer insulating layer 115. According to this embodiment, the first hole H1 of the passivation layer 310 may be a transmissive hole TAH of the transmissive portion TA.

[0116] Similar to the counter electrode 223, the passivation layer 310 may be disposed to cover a pixel group Pg including a plurality of auxiliary pixels Pa. For example, the passivation layer 310 may have a first pattern 310p spaced apart from each other with the first hole H1 therebetween, and each of the first patterns 310p may be disposed for each pixel group Pg to cover the corresponding pixel group Pg.

[0117] The first pattern 310p of the passivation layer 310 covering the pixel group Pg may be formed to have a thickness that decreases in a direction toward the end of the first pattern 310p (i.e., in a direction toward the upper surface of the interlayer insulating layer 115).

[0118] As described above with reference to Figure 5 described, the passivation layer 310 may protect the auxiliary pixel Pa from the external environment or the environment of subsequent processes. To this end, the passivation layer 310 may be arranged to cover a region corresponding to the entire surface of the inner sidewalls of the third hole H3 of the pixel defining layer 119 and the fourth hole H4 of the planarization layer 117, both of which include an organic material. The end of the first pattern 310p of the passivation layer 310 on one side of the first hole H1 may be formed to cover the end of the second pattern 223p of the counter electrode 223 on one side of the second hole H2, and thus moisture or impurities, for example, may be prevented or substantially reduced from penetrating into the intermediate layer 222' through the end on one side of the second hole H2.

[0119] As described above, since the third hole H3 is formed in the pixel defining layer 119 and the fourth hole H4 is formed in the planarization layer 117, the insulating layer including the organic material can be removed from the region of the transmission portion TA, and thus the light transmittance in the transmission portion TA can be improved.

[0120] The encapsulation layer 300 including an inorganic encapsulation layer and an organic encapsulation layer may be arranged on the passivation layer 310. In this regard, Figure 6 shows the encapsulation layer 300 having a structure in which a first inorganic encapsulation layer 310, an organic encapsulation layer 320, and a second inorganic encapsulation layer 330 are stacked, and the passivation layer 310 serving as the first inorganic encapsulation layer 310 at the lowermost layer of the encapsulation layer 300. According to another embodiment, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and the order in which the organic encapsulation layer and the inorganic encapsulation layer are stacked may vary, and the passivation layer 310 may also include multiple layers.

[0121] According to this embodiment, the passivation layer 310 serving as the first inorganic encapsulation layer 310 may include at least one inorganic insulating material (such as at least one of alumina, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride), and may be formed via chemical vapor deposition (CVD) or the like.

[0122] The passivation layer 310, the organic encapsulation layer 320, and the second inorganic encapsulation layer 330 corresponding to the first inorganic encapsulation layer 310 may be integrally formed to cover Figure 3 the sensor area SA and the display area DA. Since the organic encapsulation layer 320 is arranged between the passivation layer 310 and the second inorganic encapsulation layer 330, the organic encapsulation layer 320 may be arranged within the transmission hole TAH.

[0123] According to another embodiment, the organic encapsulation layer 320 may be integrally formed to cover the display area DA and the sensor area SA, but may not exist in the transmissive portion TA. In other words, the organic encapsulation layer 320 may include holes corresponding to the transmissive portion TA. In this case, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may contact each other within the transmissive hole TAH.

[0124] Figure 7 is a schematic cross-sectional view of a display device according to another embodiment.

[0125] Except that the depth of the transmissive hole TAH corresponding to the transmissive portion TA is increased, Figure 7 the embodiment of Figure 6 has the same structure or a similar structure as the embodiment of Figure 6 Therefore, the embodiment of Figure 7 will now be described in detail by focusing on the differences from the embodiment of

[0126] Referring to Figure 7 , a fourth hole H4 may be formed in the planarization layer 117, and a third hole H3 may be formed in the pixel defining layer 119. The positions and shapes of the third hole H3 and the fourth hole H4 are as described above with reference to Figure 6 .

[0127] However, according to the present embodiment, like the pixel defining layer 119 and the planarization layer 117 that can both include organic materials, inorganic insulating layers IL such as the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 115 may also include holes corresponding to each transmissive portion TA. The buffer layer 111 located below the inorganic insulating layer IL may also include holes corresponding to each transmissive portion TA.

[0128] According to an embodiment, the inorganic insulating layer IL and the buffer layer 111 may have a fifth hole H5 corresponding to each transmissive portion TA. The inorganic insulating layer IL and the buffer layer 111 may be simultaneously perforated, and thus the fifth hole H5 may be formed via a single process. Dry etching or the like may be used as the single process.

[0129] Therefore, the fifth hole H5 may be located below the fourth hole H4 of the planarization layer 117, and may expose the upper surface of the substrate 100 or the upper surface of the barrier layer between the substrate 100 and the buffer layer 111.

[0130] However, the fifth hole H5 is not limited to the hole that penetrates from the buffer layer 111 through the first gate insulating layer 112 and the second gate insulating layer 113 to the interlayer insulating layer 115, and the fifth hole H5 can be a hole that extends from the fourth hole H4 to at least one of the interlayer insulating layer 115, the second gate insulating layer 113, the first gate insulating layer 112, the second buffer layer 111b, and the first buffer layer 111a.

[0131] According to the present embodiment, the counter electrode 223 is disposed to cover at least a part of the inner sidewalls of the fourth hole H4 of the planarization layer 117, the third hole H3 of the pixel defining layer 119, and the fifth hole H5 of the inorganic insulating layer IL and the buffer layer 111, and thus the counter electrode 223 can have a second hole H2 corresponding to the transmissive portion TA.

[0132] The counter electrode 223 can have second patterns 223p that are spaced apart from each other and have the second hole H2 therebetween, and each of the second patterns 223p can be arranged for each pixel group Pg to cover the corresponding pixel group Pg.

[0133] The second pattern 223p of the counter electrode 223 that covers the pixel group Pg can be formed to have a thickness that decreases in the direction toward the end of the second pattern 223p (i.e., in the direction toward the upper surface of the interlayer insulating layer 115).

[0134] The passivation layer 310 can be disposed on the second pattern 223p of the counter electrode 223. The passivation layer 310 is disposed to cover the inner sidewall of the second hole H2 of the counter electrode 223 and thus has a first hole H1 corresponding to the transmissive portion TA. Additionally, according to the present embodiment, the first hole H1 of the passivation layer 310 can be the transmissive hole TAH of the transmissive portion TA.

[0135] Similar to the counter electrode 223, the passivation layer 310 can have first patterns 310p that are spaced apart from each other and have the first hole H1 therebetween, and each of the first patterns 310p can be arranged for each pixel group Pg to cover the corresponding pixel group Pg.

[0136] The first pattern 310p of the passivation layer 310 that covers the pixel group Pg can be formed to have a thickness that decreases in the direction toward the end of the first pattern 310p (i.e., in the direction toward the upper surface of the substrate 100).

[0137] The passivation layer 310 can be disposed to cover the entire regions of the third hole H3 of the pixel defining layer 119 including the organic material and the fourth hole H4 of the planarization layer 117 including the organic material, and the entire region of the fifth hole H5 formed in the inorganic insulating layer IL and the buffer layer 111.

[0138] According to this embodiment, since holes are formed in the pixel defining layer 119, the planarization layer 117, the inorganic insulating layer IL, and the buffer layer 111, most of the layers on the substrate 100 except the substrate 100 can be removed from the region of the transmissive portion TA, and thus the light transmittance in the transmissive portion TA can be improved.

[0139] Figure 8 and Figure 9 are schematic cross-sectional views of display devices according to other embodiments.

[0140] Except that the display region DA and the sensor region SA encapsulated by the encapsulation substrate 300a instead of the encapsulation layer 300 Figure 3 The embodiments have the same structure or a similar structure as the embodiments of Figure 8 Therefore, the embodiments of Figure 6 will now be described in detail by focusing on the differences from the embodiments of Figure 6 The embodiments of Figure 8 will now be described in detail by focusing on the differences from the embodiments of

[0141] Referring to Figure 8 , Figure 3 In the display region DA of Figure 4 The main organic light-emitting diode OLED and Figure 3 In the sensor region SA of Figure 6 The auxiliary organic light-emitting diode OLED' can be covered by the encapsulation substrate 300a. The encapsulation substrate 300a includes a transparent material. For example, the encapsulation substrate 300a can include a glass material. In some examples, the encapsulation substrate 300a can include, for example, a polymer resin. The encapsulation substrate 300a can prevent or substantially reduce the penetration of external moisture or foreign substances into the main organic light-emitting diode OLED and the auxiliary organic light-emitting diode OLED'.

[0142] A sealing material such as a sealant can be disposed between the substrate 100 on which the main organic light-emitting diode OLED and the auxiliary organic light-emitting diode OLED' are formed and the encapsulation substrate 300a. The sealing material can block external moisture or foreign substances that may penetrate between the substrate 100 and the encapsulation substrate 300a.

[0143] According to this embodiment, an empty space can be formed between the passivation layer 310 and the encapsulation substrate 300a, and thus spacers and the like can be further included over the entire region of the display device, so that the distance between the substrate 100 and the encapsulation substrate 300a can be constantly maintained.

[0144] Except that the passivation layer 310 and the encapsulation substrate 300a are filled with the filling material 300b, Figure 9 The embodiments of Figure 8 have the same structure or a similar structure as the embodiments ofFigure 8 Describe in detail according to the differences in the embodiments of Figure 9 Embodiments of

[0145] Refer to Figure 9 , the filling material 300b can fill the space between the passivation layer 310 and the encapsulation substrate 300a.

[0146] The filling material 300b can have various functions. According to an embodiment, the filling material 300b can reduce the reflection of light emitted from the auxiliary organic light-emitting diode OLED' by the lower surface (the surface opposite to the substrate 100) of the encapsulation substrate 300a. To this end, the filling material 300b can have a refractive index between the refractive index of the passivation layer 310 and the refractive index of the encapsulation substrate 300a.

[0147] According to an embodiment, the filling material 300b can be a silicone-based resin and can have a refractive index of about 1.5 to about 1.6.

[0148] In addition, the filling material 300b can be used as a buffer material to prevent or substantially prevent the auxiliary organic light-emitting diode OLED' and the like from being damaged by external impacts. In this case, components such as spacers included in Figure 8 Embodiments of

[0149] The filling material 300b can be integrally formed to cover Figure 3 The sensor area SA and the display area DA of

[0150] According to another embodiment, the filling material 300b can be formed to cover Figure 3 The sensor area SA of except the display area DA.

[0151] According to another embodiment, the filling material 300b can be formed to cover the sensor area SA, but may not exist in the transmission part TA. In other words, the filling material 300b can include holes corresponding to the transmission part TA.

[0152] Now, refer to Figures 10A to 10I Describe in detail Figure 6 A method for manufacturing the display device 1 according to the embodiments of

[0153] Figures 10A to 10I Is a cross-sectional view for describing a method for manufacturing a display device according to an embodiment.

[0154] First, as shown in Figure 10A , prepare corresponding to Figure 1Backplane of the sensor area SA of the display device 1. The backplane can be understood to include at least a substrate 100, a pixel electrode 221' formed on the substrate 100, and a pixel defining layer 119 exposing at least a part of each of the pixel electrodes 221', wherein the at least a part includes a central part. The pixel defining layer 119 can protrude further from the substrate 100 than the pixel electrode 221'.

[0155] For example, the pixel electrode 221' is formed on the planarization layer 117, and the pixel defining layer 119 is formed on the pixel electrode 221' and the planarization layer 117 such that the height from the planarization layer 117 to the upper surface of the pixel defining layer 119 is greater than the height from the planarization layer 117 to the upper surface of the pixel electrode 221'.

[0156] An opening OP2 exposing at least a part of each of the pixel electrodes 221' is formed in the pixel defining layer 119 and a third hole H3 corresponding to Figure 6 the transmissive part TA. A fourth hole H4 corresponding to Figure 6 the transmissive part TA can be formed in the planarization layer 117 below the pixel defining layer 119. The third hole H3 can be formed in the pixel defining layer 119 and the fourth hole H4 can be formed in the planarization layer 117 by using any one of several methods, and one of the several methods is a photoresist process to be described later with reference to Figures 10C to 10E the description.

[0157] In addition to the pixel defining layer 119 having the third hole H3 corresponding to the transmissive part TA of Figure 6 and the planarization layer 117 having the fourth hole H4 corresponding to the transmissive part TA of Figure 6 at least one layer among the layers below the planarization layer 117 (e.g., the interlayer insulating layer 115, the second gate insulating layer 113, the first gate insulating layer 112, the second buffer layer 111b, and the first buffer layer 111a) may also have a hole corresponding to Figure 6 the transmissive part TA.

[0158] In the backplane, an auxiliary thin film transistor TFT' or an auxiliary storage capacitor Cst' can be formed on the substrate 100. The backplane may also include, for example, a buffer layer 111 for preventing impurities from penetrating into the semiconductor layer A1' of the auxiliary thin film transistor TFT', a first gate insulating layer 112 and a second gate insulating layer 113 for insulating the semiconductor layer A1' of the auxiliary thin film transistor TFT' from the gate electrode G1', an interlayer insulating layer 115 for insulating the source electrode S1' and the drain electrode D1' of the auxiliary thin film transistor TFT' from its gate electrode G1', and a planarization layer 117 for covering the auxiliary thin film transistor TFT' and having an approximately flat upper surface.

[0159] Although inFigure 10A The backplane corresponds to the sensor area SA of the substrate 100, but the backplane can be an extension of the Figure 1 display area DA of. In other words, the backplane of the auxiliary pixel Pa arranged in the sensor area SA and the Figure 1 display area DA of Figure 1 main pixel Pm can be formed via the same process.

[0160] Next, as Figure 10B shown, a sacrificial layer SL is formed corresponding to the pixel electrode 221' and the pixel defining layer 119. As Figure 10C shown, a photoresist layer PR is formed on the sacrificial layer SL.

[0161] The sacrificial layer SL can include a highly fluorinated resin or fluorinated polymer (or fluoropolymer) containing 20 wt% to 60 wt% fluorine. This material can have a significant amount of fluorocarbon that does not physically / chemically react with the material of the emission layer included in the Figure 6 intermediate layer 222' of. Therefore, when Figure 6 the intermediate layer 222' including the emission layer is formed during subsequent processes (see Figure 10F ), this material will not damage the Figure 6 intermediate layer 222', or, even if damage occurs, the degree of damage can be reduced or minimized. The sacrificial layer SL can be formed on the substrate 100 by, for example, coating, printing, or deposition.

[0162] Next, as Figure 10D shown, the photoresist layer PR formed on the sacrificial layer SL is locally exposed and developed using a photomask or the like, thereby forming a patterned photoresist layer (also referred to as a patterned photoresist layer) PRa. Figure 10C In this operation,

[0163] the portion of the photoresist layer PR corresponding to the Figure 10C transmission part TA of Figure 6 is retained, Figure 10C and the portion of the photoresist layer PR corresponding to the auxiliary pixel Pa is removed. The patterned photoresist layer PRa can be formed to have a width larger than that of the Figure 6 transmission part TA in the x direction.

[0164] Next, as Figure 10E shown, the sacrificial layer SL is patterned using the patterned photoresist layer PRa as a mask, thereby forming a patterned sacrificial layer (also referred to as a patterned sacrificial layer) SLa. Figure 10D

[0165] Similar to the previous operation (see Figure 10D), in this operation, Figure 10D The portion of the sacrificial layer SL corresponding to Figure 6 the transmissive portion TA is retained, Figure 10D and the portion of the sacrificial layer SL corresponding to the auxiliary pixel Pa is removed. At this time, a plurality of auxiliary pixels Pa form a pixel group Pg. The width of the patterned sacrificial layer SLa in the x direction may be substantially the same as Figure 6 the width of the transmissive hole TAH in the x direction.

[0166] When removing Figure 10D the sacrificial layer SL, a solvent capable of etching the fluoropolymer included in the Figure 10D sacrificial layer SL can be used. Examples of the solvent may include hydrofluoroether (HFE).

[0167] The patterned sacrificial layer SLa formed in this operation and the patterned photoresist layer PRa located on the patterned sacrificial layer SLa form an undercut profile UC. For example, the patterned photoresist layer PRa may be formed to have a width larger than that of the patterned sacrificial layer SLa in the x direction, and thus the undercut profile UC may be formed at the boundary between the patterned photoresist layer PRa and the patterned sacrificial layer SLa. As another example, the upper portion of the patterned sacrificial layer SLa may be formed to have a width larger than that of the lower portion of the patterned sacrificial layer SLa in the x direction, and thus the patterned sacrificial layer SLa itself may form the undercut profile UC.

[0168] The patterned sacrificial layer SLa may be formed to expose at least a part of the pixel group Pg composed of the auxiliary pixels Pa and cover the third hole H3 included in the pixel defining layer 119 or the fourth hole H4 included in the planarization layer 117.

[0169] Next, as shown in Figure 10F , an intermediate layer 222' including an emission layer is formed on the Figure 10E patterned sacrificial layer SLa and the patterned photoresist layer PRa.

[0170] In this operation, the intermediate layer 222' is formed not only in the region corresponding to Figure 6 the transmissive portion TA but also corresponding to each of the auxiliary pixels Pa arranged in the sensor region SA and each of the Figure 1 main pixels Pm arranged in the Figure 1 display region DA.

[0171] The emission layer of the intermediate layer 222' can be formed in various ways (e.g., vacuum deposition).

[0172] Next, as shown in Figure 10G , in Figure 6The opposing electrodes 223p and 223p' are formed in a region corresponding to the transmission portion TA and a region corresponding to the pixel group Pg, and the passivation layers 310p and 310p' are formed on the opposing electrodes 223p and 223p'.

[0173] In this operation, the counter electrodes 223p and 223p' and the passivation layers 310p and 310p' formed on the entire surface of the substrate 100 are formed in the previous operation (see Figure 10E ) in the patterned photoresist layer PRa and the patterned sacrificial layer SLa Figure 10E The undercut profile around UC is discontinuous.

[0174] Therefore, the counter electrodes 223p and 223p' are spaced apart from each other with the second hole H2 therebetween to form a second pattern 223p covering the pixel group Pg, and the passivation layers 310p and 310p' are spaced apart from each other with the first hole H1 therebetween to form a first pattern 310p covering the pixel group Pg.

[0175] An end portion of the first pattern 310p of the passivation layer 310 on one side of the first hole H1 may be formed to cover an end portion of the second pattern 223p of the opposing electrode 223 on one side of the second hole H2, and the first pattern 310p and the second pattern 223p may be formed to have respective thicknesses that decrease in a direction toward their respective ends.

[0176] The counter electrodes 223p and 223p' and the passivation layers 310p and 310p' may be formed to extend to the substrate 100. Figure 1 In other words, the counter electrodes 223p and 223p′ arranged in the sensor area SA and the counter electrodes 223p and 223p′ arranged in the sensor area SA Figure 4 In the display area DA Figure 4 The counter electrode 223 of the main pixel Pm may be formed by the same process, and the passivation layers 310p and 310p′ arranged in the sensor area SA and the passivation layers 310p and 310p′ arranged in the sensor area SA may be formed by the same process. Figure 4 In the display area DA Figure 4 The first inorganic encapsulation layer 310 of the main pixel Pm may be formed through the same process.

[0177] Next, if Figure 10H As shown in , the patterned sacrificial layer SLa is removed to form a transmission hole TAH in the transmission portion TA.

[0178] In this operation, as mentioned above Figure 10E As described, the patterned sacrificial layer SLa is completely removed using a solvent such as HFE capable of etching the fluorine-containing polymer.

[0179] and Figure 10EThe same solvent used in Figure 10E can be used as the solvent for removing the sacrificial layer, but the embodiments are not limited thereto. A solvent different from the solvent used in

[0180] can be used. In this operation, a solvent having low reactivity with the emission layer included in the intermediate layer 222' can be used.

[0181] By removing the patterned sacrificial layer SLa as described above, the patterned photoresist layer PRa, the intermediate layer 222', the counter electrode 223p', and the passivation layer 310p' directly located on the patterned sacrificial layer SLa can be easily removed. Figure 10I Next, as shown in

[0182] When taking the embodiment of Figure 10I as an example, each first pattern 310p can be used as the first inorganic encapsulation layer 310 covering the pixel group Pg, an organic encapsulation layer 320 can be formed on the first pattern 310p, and a second inorganic encapsulation layer 330 can be formed on the organic encapsulation layer 320.

[0183] However, compared with the embodiment of Figure 10I , an encapsulation substrate 300a of Figure 8 instead of the encapsulation layer 300 or a combination of the encapsulation substrate 300a of Figure 9 and the filling material 300b of Figure 9 can be formed on the passivation layer 310.

[0184] By the process of Figures 10A to 10I , the influence on the emission layer etc. can be reduced or minimized, and the light transmittance of the transmission part TA can also be improved because the organic insulating layer and / or the inorganic insulating layer located in the transmission part TA are easy to remove.

[0185] Figure 11A is a schematic plan view of a display device 2 according to another embodiment. Figure 11B is a schematic plan view of a display device 3 according to another embodiment.

[0186] Referring to Figure 11A , the display device 2 may further include an opening area OA.

[0187] The opening area OA may be an area where the component 30 is disposed below the opening area OA. The opening area OA can be understood as a transmissive area capable of transmitting light and / or sound output from the component 30 to the outside or traveling from the outside toward the component 30. According to an embodiment, when light is transmitted through the opening area OA, the light transmittance in the opening area OA may be approximately 50% or greater, and more specifically, 70% or greater, 75% or greater, 80% or greater, 85% or greater, or 90% or greater. The opening area OA is an area where no display element is disposed, and thus no image may be provided. According to the present embodiment, the opening area OA may be disposed inside the display area DA and may be surrounded by main pixels.

[0188] The component 20 may also be disposed in the lower part of the sensor area SA. The sensor area SA may include auxiliary pixels disposed therein and may thus provide a specific image.

[0189] According to some embodiments, the light transmittance of the opening area OA may be greater than the light transmittance of the sensor area SA. Therefore, a component 30 (e.g., a camera) that benefits from high light transmittance may be disposed in the opening area OA, and a sensor that senses infrared light may be disposed in the sensor area SA.

[0190] Referring to Figure 11B , the sensor area SA of the display device 3 may include an area where the component 20 is disposed and may thus be disposed on one side of the display area DA. The sensor area SA may be disposed to correspond to one side of the display area DA, and a plurality of components 20 may be disposed in the sensor area SA.

[0191] Since the sensor area SA includes the auxiliary pixels Pa and the transmissive portion TA, the sensor area SA may provide an image having a resolution lower than that of the display area DA.

[0192] The opening area OA may be included inside the sensor area SA. Since the opening area OA has a higher light transmittance than the sensor area SA, a light-sensitive component 30 may be disposed in the opening area OA. The opening area OA may be surrounded by the auxiliary pixels Pa and the transmissive portion TA. The opening area OA may have an area larger than that of the transmissive portion TA.

[0193] Figure 12 is a cross-sectional view taken along Figure 11A the lines D-D' and E-E'.

[0194] Referring to Figure 12, the opening region OA may include an opening hole OAH corresponding to the opening region OA. The width Wo of the opening hole OAH in the x direction may be greater than the width Wt of the transmissive hole TAH in the x direction. The opening hole OAH may overlap with the entire area of each component 30, while the transmissive hole TAH may overlap with a part of each component 20.

[0195] The opening region OA may include a substrate hole 100H that penetrates the substrate 100. Since the opening region OA includes the substrate hole 100H, the light transmittance of the opening region OA may be greater than the light transmittance of the sensor region SA. Accordingly, the component 30 that benefits from the high light transmittance may be disposed in the lower portion of the opening region OA.

[0196] In the lower portion of the sensor region SA, the component 20 may be disposed. The component 20 may be an IR sensor that transmits / receives infrared (IR) light. Since the transmissive portion TA is disposed in the sensor region SA, the transmissive portion TA may transmit the IR signal sent to / from the component 20. For example, the light emitted from the component 20 may travel in the z direction via the transmissive portion TA, and the light generated outside the display device and incident on the component 20 may travel in the -z direction via the transmissive portion TA.

[0197] As described above, according to an embodiment of the present disclosure, the pixel portion and the transmissive portion having improved light transmittance are disposed in the sensor region corresponding to a component such as a sensor, and thus an environment in which the component can operate can be established, and an image can also be realized in the region overlapping with the component.

[0198] Accordingly, a display device having various functions and improved quality can be provided.

[0199] However, the scope of the present disclosure is not limited by this effect.

[0200] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or portion from another element, component, region, layer, or portion. Thus, the first element, first component, first region, first layer, or first portion discussed above may be referred to as a second element, second component, second region, second layer, or second portion without departing from the spirit and scope of the inventive concept.

[0201] For ease of description, spatial relative terms such as "under", "below", "lower", "beneath", "above", "upper", etc. may be used herein to describe the relationship of one element or feature shown in the figures to another (other) element or feature. It will be understood that the spatial relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, an element described as "under", "below", or "beneath" another element or feature will then be oriented "above" the other element or feature. Thus, the example terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatial relative descriptors used herein should be interpreted accordingly. Further, it will be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there can be one or more intervening layers.

[0202] The terms used herein are for the purpose of describing particular embodiments and are not intended to be limiting of the inventive concept. As used herein, unless the context clearly dictates otherwise, the singular forms "a", "an", and "the" are also intended to include the plural forms. It will also be understood that when the terms "comprises", "comprising", "includes", and / or "including" are used in this specification, they specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0203] For purposes of the present disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be construed to mean only X, only Y, only Z, or any combination of two or more of X, Y, and Z (such as, by way of example, XYZ, XYY, YZ, and ZZ).

[0204] Furthermore, the use of "may" in describing embodiments of the inventive concept refers to "one or more embodiments of the inventive concept". Additionally, the term "exemplary" is intended to denote an example or illustration.

[0205] It will be understood that when an element or layer is referred to as being "on", "connected to", "coupled to", or "adjacent to" another element or layer, it can be directly on, directly connected to, directly coupled to, or directly adjacent to the other element or layer, or there can be one or more intervening elements or layers. When an element or layer is referred to as being "directly on", "directly connected to", "directly coupled to", or "directly adjacent to" another element or layer, there are no intervening elements or layers.

[0206] As used herein, the terms "substantially", "about" and similar terms are used as approximate terms and not as terms of degree, and are intended to account for the inherent variations in measured or calculated values that would be recognized by a person of ordinary skill in the art. In addition, the specific quantities or specific ranges recited in this written description or claims may also include the inherent variations in measured or calculated values that would be recognized by a person of ordinary skill in the art.

[0207] As used herein, the term "use" and its variations can be considered to be synonymous with the term "utilize" and its variations, respectively.

[0208] In addition, any numerical range recited herein is intended to include all sub-ranges having the same numerical precision that are contained within the recited range. For example, a range of "1.0 to 10.0" is intended to include all sub-ranges between the recited minimum value of 1.0 and the recited maximum value of 10.0 (and including the recited minimum value of 1.0 and the recited maximum value of 10.0), i.e., having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as, by way of example, 2.4 to 7.6. Any maximum numerical limitation recited herein is intended to include all numerical lower limits that are contained therein, and any minimum numerical limitation recited in this specification is intended to include all numerical upper limits that are contained therein. Accordingly, the applicant reserves the right to amend this specification (including the claims) to expressly recite any sub-ranges that are contained within the ranges expressly recited herein. All such ranges are intended to be inherently described in this specification.

[0209] The display device and / or any other related devices or components according to embodiments of the present invention described herein can be implemented using any suitable hardware, firmware (e.g., application specific integrated circuit), software, or a suitable combination of software, firmware, and hardware. For example, the various components of the display device can be formed on one integrated circuit (IC) chip or on separate IC chips. Additionally, the various components of the display device can be implemented on a flexible printed circuit film, tape carrier package (TCP), printed circuit board (PCB), or formed on the same substrate. Further, the various components of the display device can be processes or threads running on one or more processors in one or more computing devices that execute computer program instructions for performing the various functions described herein and interact with other system components. The computer program instructions are stored in a memory implemented in a computing device using a standard memory device such as, for example, random access memory (RAM). The computer program instructions can also be stored in other non-transitory computer-readable media such as, for example, CD-ROM or flash drive. Additionally, those skilled in the art should recognize that, without departing from the scope of the exemplary embodiments of the present invention, the functions of various computing devices can be combined or integrated into a single computing device, or the functions of a particular computing device can be distributed among one or more other computing devices.

[0210] In the above examples, the x-axis, y-axis, and z-axis are not limited to the three axes of a rectangular coordinate system, but can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.

[0211] Although the inventive concept has been specifically shown and described with reference to exemplary embodiments of the inventive concept, those of ordinary skill in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope defined by the claims and their equivalents.

Claims

1. A display device, the display device comprising: a substrate including a display area and a sensor area, the sensor area including a transmissive portion for transmitting light; a plurality of first display devices arranged in the display area; a display device group including a plurality of second display devices, the display device group being arranged in the sensor area; and a passivation layer covering the display device group and having a first hole corresponding to the transmissive portion, wherein each of the plurality of second display devices includes a pixel electrode, an emission layer located on the pixel electrode, and a counter electrode located on the emission layer, wherein the counter electrode has a second hole corresponding to the transmissive portion, wherein an area of the first hole is smaller than an area of the second hole, and wherein the passivation layer completely covers the counter electrode in the transmissive portion such that the counter electrode is not exposed.

2. The display device according to claim 1, Among them, wherein the passivation layer is located on the counter electrode.

3. The display device according to claim 2, Among them, wherein the passivation layer covers the display device group and has a first pattern, the first patterns being spaced apart from each other and the first hole being located between the first patterns, wherein the counter electrode corresponds to the display device group and has a second pattern, the second patterns being spaced apart from each other and the second hole being located between the second patterns, and wherein an end portion of one of the first patterns on one side of the first hole covers an end portion of one of the second patterns on one side of the second hole.

4. The display device according to claim 1, the display device further comprising: an organic insulating layer located between the substrate and the pixel electrode; and a pixel defining layer located between the organic insulating layer and the counter electrode and having an opening for exposing at least a part of the pixel electrode.

5. The display device according to claim 4, Among them, wherein the pixel defining layer has a third hole corresponding to the transmissive portion, and wherein the organic insulating layer has a fourth hole corresponding to the transmissive portion.

6. The display device according to claim 5, the display device further comprising a plurality of insulating layers between the substrate and the organic insulating layer, Among them, the plurality of insulating layers being located below the fourth hole and having a fifth hole corresponding to the transmissive portion.

7. The display device according to claim 1, the display device further comprising a packaging layer located on the passivation layer, the packaging layer covering the plurality of first display devices and the plurality of second display devices and including an inorganic packaging layer and an organic packaging layer.

8. The display device according to claim 7, wherein, The passivation layer includes the same material as the inorganic packaging layer.

9. The display device according to claim 1, the display device further comprising a packaging substrate located on the passivation layer, the packaging substrate covering the plurality of first display devices and the plurality of second display devices and opposite to the substrate.

10. The display device according to claim 9, the display device further comprising a filling material filled between the passivation layer and the packaging substrate, Among them, The filling material has a refractive index between the refractive index of the passivation layer and the refractive index of the encapsulation substrate.

11. The display device according to claim 1, Among them, The substrate further includes an opening area surrounded by the display area, and wherein the opening area includes a hole having a size larger than that of the transmission portion.

12. A method of manufacturing a display device, the display device including a plurality of first display devices, a display device group including a plurality of second display devices, and a transmission portion that transmits light, the method including the following steps: Forming a plurality of pixel electrodes on a substrate, the substrate including a display area in which the plurality of first display devices are arranged and a sensor area in which the display device group and the transmission portion are arranged; Forming a pixel defining layer on the plurality of pixel electrodes, the pixel defining layer having openings that expose at least a part of each of the plurality of pixel electrodes and holes corresponding to the transmission portion; Forming a sacrificial layer on the pixel defining layer; Patterning the sacrificial layer such that at least some of the plurality of pixel electrodes of the display device group are exposed and the holes are covered; Forming a passivation layer on the patterned sacrificial layer; And Forming a first hole corresponding to the transmission portion in the passivation layer by removing the patterned sacrificial layer, wherein the passivation layer covers the display device group and has a first pattern that is spaced apart from each other and positions the first hole between the first patterns.

13. The method according to claim 12, wherein, The step of patterning the sacrificial layer includes: Forming a photoresist layer on the sacrificial layer; and Patterning the photoresist layer to correspond to the transmission portion, wherein the patterned sacrificial layer is formed by using the patterned photoresist layer such that a portion of the sacrificial layer corresponding to the transmission portion remains.

14. The method according to claim 13, wherein, The step of forming the patterned sacrificial layer includes forming a bottom-cut profile of the patterned sacrificial layer and the patterned photoresist layer.

15. The method according to claim 12, wherein, The step of forming the passivation layer on the patterned sacrificial layer includes: Forming an emission layer on the plurality of pixel electrodes and the patterned sacrificial layer; Forming a counter electrode on the emission layer; and Forming the passivation layer on the counter electrode.

16. The method according to claim 12, the method further comprising: Before the step of forming the plurality of pixel electrodes, a lower hole is formed by removing a portion of at least one insulating layer formed on the substrate, the portion corresponding to the transmission portion.

17. The method according to claim 12, the method further including forming a packaging layer including an inorganic packaging layer and an organic packaging layer on the passivation layer, Among them, The packaging layer covers the display area and the sensor area.

18. The method according to claim 12, the method further including arranging an encapsulation substrate opposite to the substrate on the passivation layer, Among them, The encapsulation substrate covers the display area and the sensor area.

19. The method according to claim 18, the method further including forming a filling material filled between the passivation layer and the encapsulation substrate, Among them, The filler material has a refractive index that is between the refractive index of the passivation layer and the refractive index of the encapsulation substrate.

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