A five-segment SVPWM implementation method

Abstract

This invention discloses a five-segment SVPWM implementation method, characterized by utilizing sector splitting and reorganization to first divide the modulation period into six sectors, which are then further subdivided into 12 sectors. The 12 sectors are then reorganized into six new sectors. The modulated signal is synthesized using the same six-sector division for the new six sectors, the modulated signal is recalculated, and a general expression is extracted from the modulated signal. This technical solution features simple logic and minimal computation. Based on the general expression, the value of the DSP's comparison register can be obtained by querying a relational table, thus achieving a simplified digitization process.

Description

Technical Field

[0001] The invention belongs to the technical field of inverter pulse width modulation, and in particular relates to an inverter space vector pulse width modulation method. Background Art

[0002] Over the past few decades, numerous research achievements have been made in inverter modulation technology, primarily aimed at optimizing one or more performance indicators in practical inverter applications. DPWM1 modulation (Discontinuous-Pulse-Width-Modulation, a modulation method that uses two zero vectors (000, 111) and distributes them with other non-zero vectors to achieve a 60° interval of no switching between the peaks of the positive and negative half-cycles of the output voltage) is a variant of the five-segment SVPWM (Space Vector Pulse Width Modulation) modulation method. DPWM1 can be implemented in various ways.

[0003] In the traditional DPWM1 modulation implementation process, the modulation cycle is divided into 12 sectors (such as Figure 1 As shown), each sector uses a combination of adjacent valid vectors and zero vectors (as shown Figure 2 The synthesized modulation signal.

[0004] The traditional DPWM1 modulation method has many calculation steps, complex programming, and large amount of calculation, which is not conducive to implementation through a programmable digital processor (DSP). Summary of the Invention

[0005] The technical problem to be solved by the present invention is that, in view of the existing defects and applicability problems of the DPWM1 modulation method, a DPWM1 modulation implementation method with simple logic and low computational complexity is proposed. The value of the DSP comparison register can be obtained by querying the relationship table, thereby realizing a simple digitization process.

[0006] The technical solution adopted by the present invention to solve its technical problem is:

[0007] A five-segment SVPWM implementation method is characterized by utilizing sector splitting and reorganization to first divide the modulation period into 6 sectors, which are then subdivided into 12 sectors. The 12 sectors are then reorganized into new 6 sectors. The modulated signal is synthesized for the new 6 sectors using the same 6-sector division method, the modulated signal is recalculated, and a general expression in the modulated signal is extracted.

[0008] Furthermore, the above five-segment SVPWM modulation method is based on DPWM1 modulation.

[0009] Furthermore, in the process of dividing the modulation period into 6 sectors and subdividing the 6 sectors into 12 sectors, different zero vectors are selected within a 60° range centered on the six effective vectors, among which the 60° sectors centered on V1, V3, and V5 only insert the zero vector V7, while the 60° sectors centered on V2, V4, and V6 only insert the zero vector V0.

[0010] Furthermore, when the 12 sectors are reorganized into new 6 sectors, the vector action time expression structure of the 1st and 2nd sectors in the 12 sectors is slightly adjusted and unified into one sector. Similarly, the same method is used to respectively process and unify the 3rd and 4th sectors, the 5th and 6th sectors, the 7th and 8th sectors, and the 9th and 10th sectors, thereby reorganizing the original 12 sectors into new 6 sectors.

[0011] Furthermore, after the 12 sectors are reorganized into 6 new sectors, the original expressions of the vector action time are decomposed and the vector action time is recombined to calculate the U, V, and W phase upper arm IGBT conduction time T U 、T V 、T W Use the common factor T Δ1 and T Δ2 Instead, where T Δ1 and T Δ2 The expression is as follows:

[0012]

[0013] Among them, the voltage vector angle θ that varies in the range [0,2π] is converted into a vector angle Vector Corner The range is [0,π / 3], T S is the period of the symmetrical triangular carrier, in seconds;

[0014] Based on this expression, the new 6-sector division method forms a one-to-one correspondence table for the three groups of parameters: the U, V, and W phase IGBT conduction time, the U, V, and W phase comparison register values, and the voltage vector angle range in each sector. In the process of implementing DPWM1 modulation, only the common factor T needs to be calculated by looking up the table. Δ1 and T Δ2 , and then use the calculated T Δ1 and T Δ2 and T S By querying the relationship table, the value of the DSP's comparison register can be obtained, realizing a simple digitization process.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] The sector division of the present invention is to decompose the traditional 6 sectors into 12 sectors and then synthesize new 6 sectors; it is the same as the prior art of directly dividing the sector into 12 sectors and using the combination of adjacent valid vectors and zero vectors to synthesize the modulation signal in each sector, but the original expression of the action time of each vector is decomposed and then recombined to form a new expression that is simpler and easier to obtain by table lookup, so the digital implementation process becomes simple and easy to implement.

[0017] Finally, the new method has simple logic and less computational complexity during implementation, and the synthesized modulation signal is consistent with that of the traditional method. The new method is more conducive to implementation on a programmable digital processor (DSP). BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of dividing the modulation period into 12 sectors during the DPWM1 modulation implementation process.

[0019] Figure 2 This is a schematic diagram of the combination of adjacent valid vectors and zero vectors in each sector of traditional DPWM1.

[0020] Figure 3 This is a schematic diagram of dividing the modulation period into 6 sectors according to the traditional method of the present invention.

[0021] Figure 4 The five-segment SVPWM implementation method of the present invention reorganizes 12 sectors into a new 6-sector schematic diagram.

[0022] Figure 5 Schematic diagram of the carrier wave, modulation wave and PWM drive signal of the simulation result of the present invention.

[0023] Figure 6 This is the DPWM1 phase voltage waveform of the simulation result of the present invention.

[0024] Figure 7 This is the DPWM1 line voltage waveform of the simulation result of the present invention. DETAILED DESCRIPTION

[0025] The five-segment SVPWM implementation method (new DPWM1 modulation method) implemented according to the present invention is as follows Figure 1 、 3 -7, which is characterized by: first, the modulation period is divided into 6 sectors (such as Figure 3 ), then modulate the 6 sectors of the cycle (such as Figure 3 ) is divided into 12 sectors (0, 1, ..., 11, such as Figure 1 ), and then reorganize the 12 sectors into a new 6 sectors (such as Figure 4 As shown), it still uses 6 sectors (as shown Figure 4)Analyze the action time of each vector, recalculate the action time of each vector, and extract the common expression in the vector action time.

[0026] The traditional SVPWM has a total of 6 effective vectors (V4 (100), V6 (110), V2 (010), V3 (011), V1 (001), V5 (101)) and 2 zero vectors (V0 (000), V7 (111)); in the five-segment SVPWM of the present invention, the simplest way to reduce switching loss is to reduce the number of switching operations, which requires inserting a zero vector V0 or V7 when the effective vectors alternate.

[0027] In order to improve the CPU's computing efficiency and simplify the software algorithm implementation, the present invention is based on the DPWM1 wave generation principle and obtains a more practical DPWM1 modulation implementation method (five-segment SVPWM implementation method) by splitting and recombining sectors. This method utilizes the splitting and recombining of sectors. In the present invention, the DPWM1 wave generation principle is to select different zero vectors within a 60° range centered on six effective vectors, wherein the 60° sectors centered on V1, V3, and V5 only insert the zero vector V7, while the 60° sectors centered on V2, V4, and V6 only insert the zero vector V0. The most important innovative implementation process of the DPWM1 modulation method of the present invention is to divide the period 6 sectors (such as Figure 3 ) is further divided into 12 sectors (0, 1, ..., 11, such as Figure 1 ), each sector is 30°, and the zero vectors V0 and V7 are inserted into each sector according to the above method, such as Figure 2 shown. Figure 2 The upper, middle and lower levels of each sector respectively represent the on-off status of the U, V and W phase upper bridge arms (IGBTs) of the inverter in each sector. A high level indicates that the IGBT is on, and a low level indicates that the IGBT is off. The lower bridge arm of the inverter complements it.

[0028] The specific implementation method is as follows:

[0029] First, the traditional period 6 sector division is performed (such as Figure 3 ), the boundary vectors of sector 0 are V4 and V6, and the action times of the relevant vectors of sector 0 (V4, V6, V0, V7) are T4, T6, T0, T7 respectively;

[0030]

[0031] Where m is the modulation ratio (the ratio of the modulation wave amplitude to the carrier amplitude), T S is the period of the symmetrical triangular carrier, in seconds (s), θ is the voltage vector angle, the same below;

[0032] The 0th sector in the above traditional 6-sector cycle is divided into 2 sectors, corresponding to the 0th sector and the 1st sector in the 12-sector division, respectively. Figure 2 Calculate the on-time of the upper arm IGBT of U, V, and W phases using the 0th and 1st sector modulation modes:

[0033] Then we can get the corresponding 0th sector [0, π / 6) of the 12-sector division, the U, V, and W phase upper arm IGBT conduction time T U 、T V 、T W They are:

[0034]

[0035] Among them, T4, T6, and T7 are the action times of vectors V4, V6, and V7, respectively, in seconds (s).

[0036] Corresponding to the first sector of the 12-sector division [π / 6, π / 3), the U, V, and W phase upper arm IGBT conduction time T U 、T V 、T W They are:

[0037]

[0038] Wherein, T4 and T6 are the action times of vectors V4 and V6 respectively, in seconds (s).

[0039] Traditional periodic 6 sector division (such as Figure 3 ), the boundary vectors of the first sector are V6 and V2, and the action time of the first sector related vectors (V2, V6, V0, V7) is T2, T6, T0, T7:

[0040]

[0041] The first sector in the above conventional 6-sector cycle is divided into two sectors (i.e. the second and third sectors in the 12-sector division), according to Figure 2 Calculate the conduction time of the upper arm IGBT of phases U, V, and W using the second and third sector modulation methods:

[0042] Corresponding to the second sector [π / 3, π / 2) of the 12-sector division, the upper arm IGBT conduction time T of the U, V, and W phases is U 、T V 、T W :

[0043]

[0044] Wherein, T2 and T6 are the action time of vectors V2 and V6 respectively, in seconds (s).

[0045] Corresponding to the third sector [π / 2, 2π / 3) of the 12-sector division, the U, V, and W phase upper arm IGBT conduction time T U 、T V 、T W :

[0046]

[0047] Among them, T2, T6, and T7 are the action times of vectors V2, V6, and V7, respectively, in seconds (s).

[0048] Combining the identical expressions (3) and (5) above into the following expression:

[0049]

[0050] Use the same method to reorganize and merge the above 12 sectors into 6 sectors (such as Figure 4 ), the conduction time of the upper bridge arm of U, V, and W phases in each sector is T U 、T V 、T W As shown in Table 1 below:

[0051] Table 1

[0052]

[0053] In order to simplify the entire calculation process, the voltage vector angle θ in the range of [0,2π] is converted into a vector angle Vector Corner The range is [0,π / 3]. After conversion, the upper arm IGBT conduction time T of U, V, and W phases is U 、T V 、T W There are identical factors in the expression and To simplify the expression, let the common factors be T Δ1 and T Δ2 ; Its expression is:

[0054]

[0055] The common factor T Δ1 and T Δ2 Substitute T U 、T V 、T W The rules in Table 2 can be summarized in the expression. It can be seen that after processing in this way, DPWM1 modulation can still be implemented using the 6-sector division method. During the implementation process, it is only necessary to look up the table to calculate the common factor T Δ1 and TΔ2 , the value of the DSP compare register uses the calculated T Δ1 and T Δ2 and T S According to the addition and subtraction combination rules in Table 2, the digital implementation process becomes simple and easy to implement.

[0056] Table 2

[0057]

[0058] In order to verify the DPWM1 implementation method or the five-segment SVPWM implementation method of the present invention, MATLAB was used for simulation, and the simulation results were consistent with the results of the classical method (such as Figure 5-7 ); Figure 5-7 The horizontal axis is the time axis, and the unit is seconds (s); Figure 5 The figure above shows the carrier wave and W-phase modulation wave. Figure 5 The figure below is a schematic diagram of the W-phase PWM drive signal generated in the figure above. 1 indicates driving the W-phase upper bridge arm IGBT to turn on, and 0 indicates driving the W-phase upper bridge arm IGBT to turn off. The lower bridge arm and upper bridge arm drive signals complement each other. Figure 6 The vertical axis is the voltage of the DPWM1 phase (saddle waveform), and the three phases Uu, Uv, and Uw from top to bottom are in volts (V). Figure 7 The vertical axis represents the voltage, with the three line voltages Uuv, Uvw, and Uwu (unit: volts) shown from top to bottom. The simulation results demonstrate that the proposed DPWM1 modulation implementation method is correct. During CPU digital processing, the new method is simpler, requires less computation, and is more efficient.

Claims

1. A five-segment SVPWM implementation method, characterized by: By using sector splitting and reorganization, the modulation period is first divided into 6 sectors, and the 6 sectors are further subdivided into 12 sectors. The 12 sectors are then reorganized into a new 6-sector structure. The modulation signal is synthesized for the new 6 sectors using the same 6-sector structure, the modulation signal is recalculated, and the general expression in the modulation signal is extracted. When the 12 sectors are reorganized into new 6 sectors, the vector action time expressions of the first and second sectors of the 12 sectors are decomposed and then the vector action times are recombined and unified into one sector. Similarly, the same method is used to respectively unify the third and fourth sectors, the fifth and sixth sectors, the seventh and eighth sectors, and the ninth and tenth sectors, thereby reorganizing the original 12 sectors into new 6 sectors. After the 12 sectors are reorganized into 6 new sectors, the original expressions of the vector action time are decomposed and the vector action time is recombined to calculate the U, V, and W phase upper arm IGBT conduction time T U 、T V 、T W Use the common factor T Δ1 and T Δ2 Instead, where T Δ1 and T Δ2 The expression is as follows: Among them, the voltage vector angle θ that varies in the range [0,2π] is converted into a vector angle Vector Corner The range is [0,π / 3], T S is the period of the symmetrical triangular carrier, in seconds; m is the modulation ratio; Based on this expression, the new 6-sector division method forms a one-to-one correspondence table for the three groups of parameters: the U, V, and W phase IGBT conduction time, the U, V, and W phase comparison register values, and the voltage vector angle range in each sector. In the process of implementing DPWM1 modulation, only the common factor T needs to be calculated by looking up the table. Δ1 and T Δ2 , and then use the calculated T Δ1 and T Δ2 and T S By querying the relationship table, the value of the DSP's comparison register can be obtained, realizing a simple digitization process.

2. The five-segment SVPWM implementation method according to claim 1, characterized in that: The above five-segment SVPWM modulation method is based on DPWM1 modulation.

3. The five-segment SVPWM implementation method according to claim 1, wherein: In the process of dividing the modulation period into 6 sectors and subdividing the 6 sectors into 12 sectors, different zero vectors are selected within the 60° range centered on the six effective vectors. Among them, the 60° sectors centered on V1, V3, and V5 only insert the zero vector V7, while the 60° sectors centered on V2, V4, and V6 only insert the zero vector V0.

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