A compiling and linking method and device

Abstract

A compiling and linking method and device, in which, when compiling a first module, a symbol definition table and a symbol reference table corresponding to the first module are first generated, and then, after the compilation is completed, the first module is loaded. After the first module is loaded, the symbols in the symbol definition table and the symbol reference table are parsed, and the running address of each symbol in the symbol definition table and the symbol reference table is obtained. Since the symbol definition table and the symbol reference table are created during compilation, and since the symbols in these two tables are parsed after loading is completed, the system does not need to parse the symbols in the symbol definition table and the symbol reference table during the startup process, which can reduce the number of symbols that need to be parsed during the startup process of the system, thereby reducing the loading time when the system starts, and improving the boot speed of the system.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a compiling and linking method and device. Background Art

[0002] An application is a computer program developed to accomplish a specific task. Since the specific task may require many functions, such as query function, calculation function, and output function, the application is usually divided into multiple modules (each module can implement a function) and developed and compiled independently. Then, a relocatable file corresponding to each module is formed. The linker links the multiple relocatable files into an executable file. When the executable file is run on the relevant hardware in the computer, it can complete the specific task.

[0003] Dynamic linking is a commonly used application linking method. The idea of ​​dynamic linking is: first, a dynamic link shared library is established, which includes symbols that may be used by modules of various applications. When the dynamic link shared library is loaded into the computer system, the symbols included in the dynamic link shared library need to be parsed to obtain the symbol table and relocation table of the dynamic link shared library. During the compilation process of the application, the modules included in the application are compiled using the symbol names in the symbol table. When the application is running, the memory address corresponding to the symbol name is obtained through the relocation table, and the module is dynamically loaded.

[0004] However, since the dynamic link shared library needs to parse a large number of symbols to generate a symbol table and a relocation table during the loading process, it will cause a large delay in the startup process of the computer system. Summary of the invention

[0005] The embodiments of the present application provide a compile and link method and device for reducing the time delay of a computer system during the startup process.

[0006] In a first aspect, a compiling and linking method is provided, in which, when compiling a first module, a symbol definition table and a symbol reference table corresponding to the first module are first generated, wherein the symbol definition table includes at least one first symbol defined in the first module and a first address corresponding to each first symbol, the first address being the address of the first symbol in the first module, the symbol reference table includes at least one second symbol of the second module referenced by the first module and a second address corresponding to each second symbol, the second address being the address of the second symbol in the second module, the first symbol or the second symbol including a function and / or a variable, and then, after the compilation is completed, the first module is loaded. After the first module is loaded, the symbols in the symbol definition table and the symbol reference table are parsed to obtain the running address of each symbol in the symbol definition table and the symbol reference table.

[0007] In the above technical solution, a symbol definition table and a symbol reference table are created during compilation. Since the symbols in these two tables are resolved after loading is completed, the system does not need to resolve the symbols in the symbol definition table and the symbol reference table during the startup process, which can reduce the number of symbols that need to be resolved during the startup process of the system, thereby reducing the loading time when the system starts, and improving the boot speed of the system.

[0008] In one possible design, after generating a symbol definition table and a symbol reference table corresponding to the first module, the symbol definition table and the symbol reference table are used to compile the code segment and the data segment included in the first module, and the data segment includes a virtual function table and / or an interface function table corresponding to the first module.

[0009] In the above technical scheme, after using the symbol definition table and the symbol reference table to replace the contents in the code segment and the data segment of the first module, the effect of hiding the symbols in the symbol definition table and the symbol reference table can be achieved. Therefore, the symbols in the symbol definition table and the symbol reference table do not need to be exported, which can further save the volume of the symbol table of the first module and save storage resources.

[0010] In addition, after the contents in the code segment and the data segment of the first module are replaced by using the symbol definition table and the symbol reference table, the symbols in the module can be accessed through the table entries in the symbol definition table and the symbol reference table (for example, the representation of each symbol), thereby eliminating the need to omit the process in the prior art of first accessing the procedure linkage table (PLT) code when calling a subroutine and then finding the address of the subroutine according to the PLT code, thereby reducing the overhead in the subroutine calling process.

[0011] Furthermore, when a dynamic class needs to be loaded, the address of the corresponding table entry in the symbol definition table or the symbol reference table can be updated, thereby realizing the dynamic class loading mechanism.

[0012] In one possible design, the effect of using the symbol definition table and the symbol reference table to compile the code segment and the data segment included in the first module can be achieved by replacing the parts of the code segment and the data segment corresponding to the first symbol with the index of the first symbol in the symbol definition table; and by replacing the parts of the code segment and the data segment corresponding to the second symbol with the index of the second symbol in the symbol reference table.

[0013] In the above technical solution, since the corresponding parts of the code segment and the data segment are indexed in the symbol definition table or the symbol reference table, the storage space occupied by the code segment and the data segment can be reduced.

[0014] In one possible design, first, a table entry with the same symbol name as the second symbol is searched from the symbol definition table of the second module, and then the address in the table entry with the same symbol name as the second symbol is used to update the second address corresponding to the second symbol in the symbol reference table. After traversing each second symbol in the symbol reference table of the first module, the parsing process of the symbols in the symbol reference table is completed.

[0015] In the above technical solution, the symbol resolution process in the symbol reference table only needs to be searched from the symbol definition table of other modules, which can simplify the symbol resolution process and reduce the amount of calculation during symbol resolution. After the resolution is completed, the correct address in the table can be directly accessed, which can simplify the way of symbol access.

[0016] In a possible design, the first symbol and the second symbol are identified by a digest unique identification code DUID, where the DUID includes an identifier of a user using the first module, and the DUID is obtained by calculating using a hash algorithm.

[0017] In the above technical solution, since the value of DUID is an integer and the symbol name is a string, the storage space required to store an integer is smaller than the storage space required to store a string. Therefore, using DUID to identify each symbol can reduce the storage space occupied by the symbol definition table and the symbol reference table.

[0018] Furthermore, if each symbol is identified by using DUID, then when the code segment and data segment of the module are replaced and the symbol is subsequently resolved through the symbol definition table and the symbol reference table, the DUID can be used for search. Since DUID is an integer and the symbol name is a string, the matching process of integers is simpler and faster than that of strings. Therefore, the processing complexity of the linker can be reduced, the search speed can be accelerated, and the delay required for symbol resolution can be reduced.

[0019] In one possible design, if the table entries included in the symbol definition table of the second module are arranged in sequence according to the size of the DUID, the table entry corresponding to the DUID of the second symbol can be determined from the symbol definition table of the second module through binary search.

[0020] In the above technical solution, since the value of DUID is an integer, the entries in the symbol definition table can be sorted according to the value of DUID, so that the entries in the symbol definition table can be searched by binary search, which can further speed up the search.

[0021] In one possible design, after completing the parsing process of the symbols in the symbol definition table and the symbol reference table, the correspondence between the table entries in the symbol reference table of the first module corresponding to the second symbol and the table entries in the symbol definition table of the second module with the same symbol name as the second symbol can be cached.

[0022] In this way, by caching the correspondence between the entries in each symbol reference table and the entries in the symbol definition table of a module, when the system needs to be restarted, the entry in the symbol definition table corresponding to the entry in each symbol reference table can be quickly found based on the cached correspondence, which can speed up the parsing.

[0023] In one possible design, if it is determined whether there is a third symbol with the same symbol name as the first symbol in the symbol definition table of the loaded third module, the address corresponding to the third symbol in the symbol definition table of the third module is used to update the first address corresponding to the first symbol.

[0024] In the above technical solution, symbol resolution can also be performed on each table entry in the symbol definition table, thereby preventing the situation where symbols have the same name but different corresponding addresses, and ensuring the effectiveness of the compilation and linking method in the embodiment of the present application.

[0025] In one possible design, the first symbol and the second symbol are identified by a summary unique identification code DUID. After generating a DUID corresponding to each symbol of the at least one first symbol and the at least one second symbol, it is determined whether the DUIDs corresponding to any two symbols are the same. If there are at least two symbols with the same DUID among the at least one first symbol and the at least one second symbol, a reminder message is generated to indicate a DUID conflict.

[0026] In order to ensure the security of the compile and link method in the embodiment of the present application, a longer storage width can be used to store the DUID, so the probability of a conflict of the DUID is theoretically very small. However, in order to ensure the high security of the system and prevent the same DUID from being generated according to different symbols, the DUID can be detected (which can be called static detection) after the symbol definition table and the symbol reference table are generated. Alternatively, after all modules are loaded, the DUID of each symbol is detected (which can be called dynamic detection) to further reduce the possibility of DUID conflict.

[0027] A compile and link device is provided, the compile and link device includes a processor, and is used to implement the method described in the first aspect above. The compile and link device may also include a memory, which is used to store program instructions and data. The memory is coupled to the processor, and the processor can call and execute the program instructions stored in the memory, which is used to implement any one of the methods described in the first aspect above. The compile and link device may also include a communication interface, and the communication interface is used for the memory management device to communicate with other devices. Exemplarily, the other device is another terminal or a server.

[0028] In one possible design, the compiler links a device processor and a communication interface, wherein:

[0029] During the compilation process of the first module, the processor generates a symbol definition table and a symbol reference table corresponding to the first module, the symbol definition table includes at least one first symbol and a first address corresponding to each first symbol, the first symbol is a symbol defined in the first module, the first address is the address of the first symbol in the first module, the symbol reference table includes at least one second symbol and a second address corresponding to each second symbol obtained through the communication interface, the second symbol is a symbol of the second module referenced by the first module, the second address is the address of the second symbol in the second module, and the first symbol or the second symbol includes a function and / or a variable; and, loads the first module, and after the first module is loaded, parses the symbols in the symbol definition table and the symbol reference table to obtain the running address of each symbol in the symbol definition table and the symbol reference table.

[0030] In one possible design, the processor uses the symbol definition table and the symbol reference table to compile the code segment and the data segment included in the first module, and the data segment includes a virtual function table and / or an interface function table corresponding to the first module.

[0031] In one possible design, the processor replaces the parts of the code segment and the data segment corresponding to the first symbol with the index of the first symbol in the symbol definition table; and replaces the parts of the code segment and the data segment corresponding to the second symbol with the index of the second symbol in the symbol reference table.

[0032] In one possible design, the processor searches for a table entry with the same symbol name as the second symbol from the symbol definition table of the second module through the communication interface; then, uses the address in the table entry with the same symbol name as the second symbol to update the second address corresponding to the second symbol in the symbol reference table; after traversing each second symbol in the symbol reference table of the first module, completes the parsing process of the symbols in the symbol reference table.

[0033] In a possible design, the first symbol and the second symbol are identified by a digest unique identification code DUID, where the DUID includes an identifier of a user using the first module, and the DUID is obtained by calculating using a hash algorithm.

[0034] In one possible design, the table entries included in the symbol definition table of the second module are arranged in sequence according to the size of the DUID, and the processor determines the table entry corresponding to the DUID of the second symbol from the symbol definition table of the second module through a binary search.

[0035] In one possible design, the processor caches the correspondence between the table entry corresponding to the second symbol in the symbol reference table of the first module and the table entry with the same symbol name as the second symbol in the symbol definition table of the second module.

[0036] In one possible design, the processor determines whether there is a third symbol with the same symbol name as the first symbol in the symbol definition table of the loaded third module; if so, the address corresponding to the third symbol in the symbol definition table of the third module is used to update the first address corresponding to the first symbol.

[0037] In one possible design, the first symbol and the second symbol are identified by a summary unique identification code DUID, and after the processor generates a DUID corresponding to each symbol of the at least one first symbol and the at least one second symbol, it determines whether the DUIDs corresponding to any two symbols are the same; when there are at least two symbols with the same DUID among the at least one first symbol and the at least one second symbol, a reminder message is generated, and the reminder message is used to prompt a DUID conflict.

[0038] In a third aspect, a compile and link device is provided. The compile and link device may be a computing device or a device in a computing device. The compile and link device may include a processing module and a communication module. These modules may perform the corresponding functions performed in any one of the design examples of the first aspect above. Specifically:

[0039] A processing module is used to generate a symbol definition table and a symbol reference table corresponding to the first module during the compilation process of the first module, the symbol definition table includes at least one first symbol and a first address corresponding to each first symbol, the first symbol is a symbol defined in the first module, the first address is the address of the first symbol in the first module, the symbol reference table includes at least one second symbol and a second address corresponding to each second symbol obtained through the communication module, the second symbol is a symbol of the second module referenced by the first module, the second address is the address of the second symbol in the second module, and the first symbol or the second symbol includes a function and / or a variable; and, is used to load the first module, and is used to parse the symbols in the symbol definition table and the symbol reference table after the first module is loaded, and obtain the running address of each symbol in the symbol definition table and the symbol reference table.

[0040] In one possible design, the processing module is also used to: use the symbol definition table and the symbol reference table to compile the code segment and data segment included in the first module, and the data segment includes a virtual function table and / or interface function table corresponding to the first module.

[0041] In a possible design, the processing module is specifically used for:

[0042] Replacing the code segment and the portion of the data segment corresponding to the first symbol with the index of the first symbol in the symbol definition table; and

[0043] The portion of the code segment and the data segment corresponding to the second symbol is replaced by the index of the second symbol in the symbol reference table.

[0044] In one possible design, the processing module is used to:

[0045] Searching, by the communication module, from the symbol definition table of the second module, an entry having the same symbol name as the second symbol;

[0046] updating a second address corresponding to the second symbol in the symbol reference table using an address in a table entry having the same symbol name as the second symbol;

[0047] Each second symbol in the symbol reference table of the first module is traversed to complete the parsing process of the symbols in the symbol reference table.

[0048] In a possible design, the first symbol and the second symbol are identified by a digest unique identification code DUID, where the DUID includes an identifier of a user using the first module, and the DUID is obtained by calculating using a hash algorithm.

[0049] In a possible design, the table items included in the symbol definition table of the second module are arranged in order of size of the DUID, and the processing module is used to:

[0050] By binary search, determine the table entry corresponding to the DUID of the second symbol from the symbol definition table of the second module.

[0051] In one possible design, the processing module is also used to cache the correspondence between the table entry corresponding to the second symbol in the symbol reference table of the first module and the table entry with the same symbol name as the second symbol in the symbol definition table of the second module.

[0052] In one possible design, the processing module is used to:

[0053] Determine whether there is a third symbol with the same symbol name as the first symbol in the symbol definition table of the loaded third module;

[0054] If yes, the first address corresponding to the first symbol is updated using the address corresponding to the third symbol in the symbol definition table of the third module.

[0055] In a possible design, the first symbol and the second symbol are identified by a digest unique identification code DUID, and the processing module is further configured to:

[0056] After generating a DUID corresponding to each of the at least one first symbol and the at least one second symbol, determining whether the DUIDs corresponding to any two symbols are the same;

[0057] When at least two symbols with the same DUID exist in the at least one first symbol and the at least one second symbol, a reminder message is generated, where the reminder message is used to prompt a DUID conflict.

[0058] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, comprising instructions, which, when executed on a computer, enables the computer to execute the method of the first aspect.

[0059] In a fifth aspect, an embodiment of the present application also provides a computer program product, comprising instructions, which, when executed on a computer, enables the computer to execute the method of the first aspect.

[0060] In a sixth aspect, an embodiment of the present application provides a chip system, which includes a processor and may also include a memory, for implementing the method in the first aspect. The chip system may be composed of a chip, or may include a chip and other discrete devices.

[0061] The beneficial effects of the second to sixth aspects and their implementation methods mentioned above can refer to the description of the beneficial effects of the method of the first aspect and its implementation method. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 A structural diagram of an example of a computing device provided in an embodiment of the present application;

[0063] Figure 2 A flowchart of a compile and link method provided in an embodiment of the present application;

[0064] Figure 3 A schematic diagram of an example of using a symbol definition table or a symbol reference table to compile a code segment of a first module in an embodiment of the present application;

[0065] Figure 4 A schematic diagram of a virtual function table provided in an embodiment of the present application;

[0066] Figure 5A A schematic diagram of an example of using a symbol definition table or a symbol reference table to compile a virtual function table of a first module in an embodiment of the present application;

[0067] Figure 5B A schematic diagram of another example of using a symbol definition table or a symbol reference table to compile a virtual function table of a first module in an embodiment of the present application;

[0068] Figure 6 A schematic diagram of an example of parsing a DUID in a symbol definition table in an embodiment of the present application;

[0069] Figure 7A schematic block diagram of a compile and link device provided in an embodiment of the present application;

[0070] Figure 8 Another schematic block diagram of the compile and link device provided in the embodiment of the present application;

[0071] Fig. 9 Another schematic block diagram of the compile and link device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0072] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0073] Below, some terms in the embodiments of the present application are explained to facilitate understanding by those skilled in the art.

[0074] 1) Computing devices, also known as electronic devices, terminal equipment, terminals, user equipment (UE), etc., can install various applications. For example, smartphones, tablets, various wearable devices, car equipment, computers, etc.

[0075] For example, it may include a mobile phone (or "cellular" phone), a computer with a mobile terminal, a portable, pocket-sized, handheld, computer-built-in or vehicle-mounted mobile device, a smart wearable device, etc.

[0076] Alternatively, the computing device may also include a limited device, such as a device with low power consumption, or a device with limited storage capacity, or a device with limited computing capacity, etc. For example, it includes information sensing devices such as barcodes, radio frequency identification (RFID), sensors, global positioning systems (GPS), laser scanners, etc.

[0077] As an example but not a limitation, in the embodiments of the present application, smart wearable devices are a general term for wearable devices that are intelligently designed and developed using wearable technology for daily wear, such as glasses, gloves, watches, clothing, and shoes. Smart wearable devices are portable devices that are worn directly on the body or integrated into the user's clothes or accessories.

[0078] Smart wearable devices are not just hardware devices, but also realize powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, smart wearable devices include those with full functions, large size, and can realize complete or partial functions without relying on smartphones, such as smart watches or smart glasses, as well as those that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various smart bracelets for vital sign monitoring, smart helmets, smart jewelry, etc.

[0079] Alternatively, the computing device may also be a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal device in industrial control, a wireless terminal device in driverless driving, a wireless terminal device in remote medical surgery, a wireless terminal device in a smart grid, a wireless terminal device in transportation safety, a wireless terminal device in a smart city, a wireless terminal device in a smart home, etc.

[0080] 2) Symbols refer to methods, functions or global variables used in each application or application module.

[0081] 3) Parent delegation model: When a specific class loader receives a request to load a class, it first delegates the loading task to the parent class loader. If the parent class loader can complete the class loading task, it returns successfully. Only when the parent class loader cannot complete this loading task, the class loader that receives the request to load the class will load it.

[0082] 4) In the embodiments of the present application, "multiple" refers to two or more than two. In view of this, in the embodiments of the present application, "multiple" can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two or more. For example, including at least one means including one, two or more, and there is no restriction on which ones are included. For example, including at least one of A, B and C, then A, B, C, A and B, A and C, B and C, or A and B and C may be included. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / ", unless otherwise specified, generally indicates that the previously associated objects are in an "or" relationship. In the embodiments of the present application, "node" and "node point" can be used interchangeably.

[0083] Unless otherwise specified, the ordinal numbers such as "first" and "second" mentioned in the embodiments of the present application are used to distinguish multiple objects and are not used to limit the order, timing, priority or importance of the multiple objects.

[0084] In order to better understand the technical solutions provided by the embodiments of the present application, the technical features involved in the embodiments of the present application are first introduced below.

[0085] The computing device 100 may generally include: a memory 110 and a processor 120 and other components, see Figure 1 , shows a possible structural diagram of a computing device. Figure 1 The components of the computing device 100 are briefly introduced as follows:

[0086] The memory 110 can store the codes of the operating system, various applications and their modules, and data created according to the use of the computing device 100, such as function parameters in the program, global variables, directory variables indicating the directory where the executable program is located, etc. It should be noted that the various applications and their modules can be written in programming languages ​​such as C, C++, Java, Python, PHP, Lua, etc. The memory 110 can include an internal memory (also referred to as a memory) 111 and an external memory 112, wherein the memory 111 is used to temporarily store the code and data of the application program in the running state of the processor 120, and the external memory 112 is used to store the code and data of the application program in the non-running state.

[0087] The processor 120 is the control center of the computing device 100. It connects various components using various interfaces and lines, and executes various functions of the computing device 100 and processes data by running or executing the operating system, software programs and modules, and various application programs stored in the memory 111, and calling data stored in the external memory 112, thereby realizing various services based on the computing device 100. Each storage unit of the memory 111 and the external memory 112 has a unique address, and the processor 120 accesses the storage units of the memory 111 and the external memory 112 through the address.

[0088] It should be noted that the operating system in the above description can be a Windows system, a MAC OS system, a Linux system or an Android system, etc., and of course it can also be a future-oriented computer system. The system described in the embodiment of the present application is to more clearly illustrate the technical solution of the embodiment of the present application, and does not constitute a limitation on the technical solution provided in the embodiment of the present application.

[0089] Those skilled in the art will understand that Figure 1The structure of the computing device shown in the figure does not constitute a limitation of the computing device. The computing device provided by the embodiment of the present invention may include more components than those shown in the figure, or combine certain components, or arrange the components differently. For example, the computing device 100 may also include at least one sensor, audio circuit, camera, communication interface, input / output unit, etc., which will not be repeated here.

[0090] Each application in the computing device 100 needs to go through the three processes of compilation, linking and loading into the memory 111 before the application can be run by the processor 120 to implement the corresponding functions in the application. A complete application is usually divided into several modules, which are then compiled and linked independently to form an executable file that can be run by the processor 120.

[0091] Application linking can be divided into two methods: static linking and dynamic linking. The static linking method is to package the contents (code and data) of all symbols called by an application in the executable file corresponding to the application, so that the same symbol content may be stored in the executable files corresponding to different applications. For example, if application A and application B call symbol 1 respectively, then the static linking method is used to form executable file A corresponding to application A and executable file B corresponding to application B. Then, executable file A and executable file B both include the content of symbol 1. It can be seen that the content of the same symbol will be repeatedly saved in executable files corresponding to different applications, thereby reducing the utilization rate of storage resources.

[0092] In order to improve the utilization of storage resources, most computing devices currently use a dynamic linking method. In the dynamic linking method, a dynamic link shared library is created for multiple applications. The multiple applications can share the symbols in the dynamic link shared library. When the corresponding application is run, the required symbol content can be dynamically loaded without packaging the required symbol content in the executable file corresponding to the application. For example, the dynamic link shared library includes the content of symbol 1, symbol 2, and symbol 3. Application A calls symbol 1 respectively. In the executable file A corresponding to application A, only the symbol name of symbol 1 can be saved. When the application is executed, the content of symbol 1 is dynamically loaded through the symbol name of symbol 1. Using the same processing process, if application B also calls symbol 1, only the symbol name of symbol 1 needs to be saved in the executable file B corresponding to application B. Therefore, even if multiple applications repeatedly call the same symbol, the content of the same symbol will not be repeatedly stored in the memory, thereby improving the utilization of storage resources.

[0093] Since the symbol names of the symbols in the dynamic shared link library are needed when linking each application program using the dynamic shared link library, the symbols in the dynamic shared link library must be parsed when the computing device is started, so that each symbol is exported to the memory for subsequent application program calls. However, these symbol parsing takes a lot of time, accounting for up to 50% of the total startup time of the computing device. Therefore, how to reduce the delay caused by parsing a large number of symbols when the computing device is started is a technical problem to be solved at present.

[0094] In view of this, an embodiment of the present application provides a compiling and linking method, in which, during the compilation process of the first module, a symbol definition table and a symbol reference table corresponding to the first module are first generated, wherein the symbol definition table includes at least one first symbol defined in the first module and a first address corresponding to each first symbol, the first address being the address of the first symbol in the first module, the symbol reference table includes at least one second symbol of the second module referenced by the first module and a second address corresponding to each second symbol, the second address being the address of the second symbol in the second module, the first symbol or the second symbol including a function and / or a variable, and then, after the compilation is completed, the first module is loaded. After the first module is loaded, the symbols in the symbol definition table and the symbol reference table are parsed to obtain the running address of each symbol in the symbol definition table and the symbol reference table.

[0095] In the above technical solution, a symbol definition table and a symbol reference table are created during compilation. Since the symbols in these two tables are resolved after loading is completed, the system does not need to resolve the symbols in the symbol definition table and the symbol reference table during the startup process, which can reduce the number of symbols that need to be resolved during the startup process of the system, thereby reducing the loading time when the system starts, and improving the boot speed of the system.

[0096] The technical solution provided by the embodiments of the present application is described below in conjunction with the accompanying drawings.

[0097] This application embodiment provides a compilation and linking method, see Figure 2 , which is a flow chart of the method.

[0098] In the following introduction, the technical solution provided by this application is applied in Figure 1 As an example, the method may be performed by: Figure 1The processor 120 in the computing device 100 shown is executed, or it can be understood that the method is executed by the processor 120 in the computing device 100 calling the program instructions stored in the memory 110 for compiling, loading and linking the code of the application program to execute (this case can also be called by the compile and link module), or the processor 120 can also call the program instructions (compilation module or compiler) stored in the memory 110 for compiling the code of the application program to execute the compilation process, call the program instructions stored in the memory 110 for loading the compiled code to execute the loading process, and call the program instructions (link module or linker) stored in the memory 110 for linking the compiled code to execute the linking process, which is not limited here. In the following description, the method is illustrated by the compiler, loader and linker in the computing device 100 as an example.

[0099] S201. During the compilation of a first module, the compiler generates a symbol definition table and a symbol reference table corresponding to the first module.

[0100] In the embodiment of the present application, the first module can be understood as a module in any application pre-stored in the memory 110 of the computing device 100. For example, the first module can be a module in application A used to implement the query function. Alternatively, the first module can also be understood as a module used to implement one of the system functions of the computing device 100. For example, the computing device 100 is configured to link each module in a dynamic linking manner, then the first module can also be understood as a module used to implement a dynamic shared link library. Of course, it can also be other modules, which are not limited here. For the convenience of explanation, in the following, the first module is taken as one of the modules of application A as an example.

[0101] When the computing device 100 needs to run application A, it first needs to call the compiler to perform lexical analysis, syntax analysis, semantic checking and other processing on each module of application A, and compile the programming language into a binary language that the computing device 100 can recognize.

[0102] When the compiler compiles the first module, the compiler needs to distinguish all the symbols involved in the first module, determine whether each symbol is defined in the first module, and divide all the symbols involved in the first module into two symbol tables according to the determination result, namely, a symbol definition table and a symbol reference table. Among them, each symbol in the symbol definition table is a symbol defined in the first module, and each symbol in the symbol reference table is a symbol not defined in the first module.

[0103] For example, if the compiler determines that the first module includes code for defining the first symbol, the first symbol is written into the symbol definition table. If the compiler determines that the first module does not include code for defining the second symbol, it means that the second symbol is a symbol that references other modules. The second symbol can be a symbol that references the second module. The second module can be a module in the same application as the first module. For example, the second module is a module in application A used to implement computing functions. Alternatively, the second module can also be a module of a different application from the first module. For example, the second module can be a module in application B. The second module is not restricted here. When the compiler determines that the first module does not include code for defining the second symbol, the second symbol is written into the symbol reference table.

[0104] It should be noted that the first symbol or the second symbol may be one of the multiple symbols involved in the first module, which is a general concept and should not be understood as a specific symbol.

[0105] In an embodiment of the present application, in the symbol definition table and the symbol reference table, addresses corresponding to each symbol are also included. Wherein, in the symbol definition table, the first address corresponding to each symbol is used to represent the address of the symbol in the first module. The first address can be understood as the offset of the symbol in the running stack relative to the starting address of the first module. For example, if the starting address of the first module is X, the address of the first defined symbol in the first module can be expressed as X, and the first symbol occupies 2 storage units in the running stack. Therefore, the address of the second defined symbol can be expressed as X+2, and so on. Alternatively, in the same way, in the symbol reference table, the second address corresponding to each symbol is used to represent the address of the symbol in the referenced module (e.g., the second module), and the description of the second address can refer to the first address, which will not be repeated here.

[0106] As an example, part of the source code of the first module is as follows:

[0107] int a,b;

[0108] func1(a,b);

[0109] printf(a,b,func1);

[0110] Therefore, the compiler determines that the first module includes 4 symbols according to the above source code, namely a, b, func1, and printf, where a and b are symbols defined in the first module, and func1 and printf are symbols that reference other modules. Assuming that the starting address of the first module is 0x0010, the offset of a in the first module relative to the starting address of the first module is 4, and the offset of b in the first module relative to the starting address of the first module is 6, then the address of a in the first module is 0x0014, and the address of b in the first module is 0x0016, thereby obtaining the symbol definition table shown in Table 1.

[0111] Table 1 Symbol definition table

[0112] Symbolic Name address a 0x0014 b 0x0016

[0113] Func1 and printf are symbols that reference other modules, and these symbols constitute the symbol reference table of the first module. Since the compiler may not know which module these symbols specifically reference when compiling the first module, the compiler can set the address of each symbol in the symbol reference table to null to ensure that the compilation process is error-free, thereby obtaining the symbol reference table shown in Table 2. Of course, the address of each symbol in Table 2 can also be set to other values, for example, it can be set to a non-empty default value or to the starting address of the first module, etc., and there is no restriction on the address of each symbol in the symbol reference table during the compilation process.

[0114] Table 2 Symbol reference table

[0115] Symbolic Name address func1 null printf null

[0116] In the symbol definition table shown in Table 1 and the symbol reference table shown in Table 2, different symbols are represented by symbol names, and storing the symbol name of each symbol may take up a large storage space. Therefore, in an embodiment of the present application, another symbol definition table and another symbol reference table are provided.

[0117] In another symbol definition table and another symbol reference table, the first symbol and the second symbol are identified by a digest unique identifier (DUID). Since the value of DUID is an integer, and the symbol name in Table 1 or Table 2 is a string, the storage space required to store an integer is less than the storage space required to store a string. Therefore, using DUID to identify each symbol can reduce the storage space occupied by the symbol definition table and the symbol reference table.

[0118] As an example, the DUID of each symbol can be obtained by calculating the information of the symbol, the system identification of the computing device 100 and / or the user identification of the first module through a hash algorithm (for example, MD5 message digest algorithm (MD5 message digest algorithm), secure hash algorithm (secure hash algorithm, SHA), etc.).

[0119] The DUID value of each symbol is generated by the compiler during the compilation process of the first module. In order to prevent conflicts between DUIDs of different symbols (which can be understood as, DUID values ​​of different symbols are the same), after determining the DUID value of each symbol in the first module, the compiler can check the DUID value of each symbol to determine whether different symbols have the same DUID value. If so, a prompt message is generated for the user to resolve the conflict.

[0120] Assuming that the above-mentioned method of calculating DUID is adopted, the DUID value of the symbol "a" in the first module is calculated as DUID1, and the DUID value of the symbol "b" is calculated as DUID2, then the symbol definition table shown in Table 3 can be obtained. Different from Table 1, in Table 3, the symbol name of each symbol is identified by the value of the DUID corresponding to the symbol.

[0121] Table 3 Symbol definition table

[0122] Symbolic Name address DUID1 0x0014 DUID2 0x0016

[0123] For the symbol reference table, its processing method can refer to the processing method of the symbol definition table shown in Table 3, which will not be repeated here. Assuming that the DUID value of the symbol "func1" is DUID3, and the DUID value of the symbol "printf" is DUID4, the symbol reference table shown in Table 4 can be obtained.

[0124] Table 4 Symbol reference table

[0125] Symbolic Name address DUID3 null DUID4 null

[0126] Of course, the symbol definition table and the symbol reference table may also include other contents, for example, may include description information of each symbol (such as the type of symbol, detailed description information of the symbol, etc.), which is not limited here.

[0127] In addition, it should be noted that since the number of symbols in the first module may be large, in order to prevent symbols with the same name from appearing in the first module, during the compilation process, the compiler may first package the symbol names in the first module. For example, the parameters in the symbol may be added after the name of each symbol as the packaged symbol name of the symbol. Taking the symbol "a" as an example, the symbol "a" may include the parameter t, so a_t may be used as the packaged symbol name of the symbol "a". Following the same processing method, all symbols in the first module are packaged, and then the packaged symbol name is used to calculate the DUID corresponding to each symbol, which can reduce DUID conflicts.

[0128] In order to further prevent the occurrence of symbols with the same name, after generating a DUID corresponding to each of at least one first symbol and at least one second symbol included in each individual module, the compiler can detect the generated multiple DUIDs to determine whether the DUIDs corresponding to any two symbols are the same, and if there are at least two symbols with the same DUID, generate a reminder message for prompting a DUID conflict. Alternatively, after generating the DUIDs of the symbols included in all modules in the computing device 100, the compiler can detect all DUIDs to determine whether there are symbols with the same DUID. Alternatively, one or more bits can be used in the DUID to distinguish whether the symbol is a symbol in a system module or a symbol in an application module, which can reduce DUID conflicts. Alternatively, a separate detection module can be used to detect DUID conflicts. Of course, there are many ways to reduce DUID conflicts, which are not limited here.

[0129] In addition, the symbols in the symbol definition table and the symbol reference table can be arranged randomly. Alternatively, they can be arranged in the order of the size of the DUID value, for example, according to the DUID value, arranged from small to large or from large to small, etc. As an example, in the symbol definition table described in Table 3, if DUID1>DUID2, the symbol definition table shown in Table 3 can be updated to the symbol definition table shown in Table 5. In Table 5, DUID2 is stored in the first table entry, and DUID1 is stored in the second table entry.

[0130] Table 5 Symbol definition table

[0131] Symbolic Name address DUID2 0x0016 DUID1 0x0014

[0132] It should be noted that there is no restriction on the arrangement of symbols in the symbol definition table and the symbol reference table.

[0133] S202: The compiler uses the symbol definition table and the symbol reference table to compile the code segments included in the first module.

[0134] After the compiler generates a symbol definition table and a symbol reference table corresponding to the first module, the code for accessing the first symbol in the symbol definition table in the code segment of the first module can be replaced with the index of the first symbol in the symbol definition table, and / or the code for accessing the second symbol in the symbol reference table in the code segment of the first module can be replaced with the index in the second symbol reference table.

[0135] In an embodiment of the present application, the index can be understood as the number of entries of the symbol in the symbol definition table or the symbol reference table. For example, it can be indicated by the form of "table name + number of entries". Taking the symbol "a" as an example, the symbol "a" is stored in the first item of the symbol definition table, then the symbol "a" can be expressed as "symbol definition table + 1", or, the symbol definition table can be represented by "deftable", and the symbol reference table can be represented by "undeftable", then the symbol "a" can also be expressed as "deftable + 1". The representation methods of other symbols can refer to the symbol "a", which are not explained one by one here. The first symbol can be understood as one of the symbols in the symbol definition table, and the second symbol can be understood as one of the symbols in the symbol reference table.

[0136] As an example, Figure 3 As shown in the figure, a part of the code segment of the first module before compilation is "Callfunc1". In this code segment, the symbol "func1" is accessed, and the compiler needs to replace it. Since the symbol "func1" is not a symbol defined in the first module, and the symbol is stored in the first item of the symbol reference table, the compiler replaces the symbol "func1" with "undeftable+1", and the result is as follows Figure 3 The code segment after compilation is "Call[undeftable+1]".

[0137] For other code segments in the first module, the processing method is the same as Figure 3 The processing of the code snippet shown is the same and will not be repeated here.

[0138] S203: The compiler uses the symbol definition table and the symbol reference table to compile the data segment included in the first module.

[0139] The compiler handles the data segment in the same way as it handles the code segment, that is, the first symbol in the symbol definition table accessed in the data segment of the first module is replaced by the index of the first symbol in the symbol definition table, and / or the code for accessing the second symbol in the symbol reference table in the data segment of the first module is replaced by the index in the second symbol reference table, which will not be repeated here.

[0140] It should be noted that the symbols in the data segment may have corresponding virtual function tables and / or interface function tables. Taking the virtual function table as an example, if a class includes virtual functions, the compiler will create a virtual function table for the class during the compilation process, such as Figure 4 shown.

[0141] exist Figure 4 In the example, class A includes two virtual functions, for example, virtual function a and virtual function func1. The virtual function table corresponding to class A includes two pointers. The first pointer is located at the first item of the virtual function table, and its value is "0x401ED0", indicating virtual function a; the second pointer is located at the second item of the virtual function table, and its value is "0x401F10", indicating virtual function func1.

[0142] After the compiler generates the symbol definition table and symbol reference table corresponding to the first module, it is necessary to replace the virtual function table corresponding to class A.

[0143] Please refer to Figure 5A , which is an example of replacing the virtual function table. Figure 5A Replace the previous virtual function table with Figure 4 The virtual function table in is the same, that is, the first item in the virtual function table points to the virtual function a, and the second item in the virtual function table points to the virtual function func1. Virtual function a corresponds to the first item in the symbol definition table, so the value of the first item in the virtual function table is replaced with [deftable+1], and the virtual function func1 corresponds to the first item in the symbol reference table, so the value of the second item in the virtual function table is replaced with [undeftable+1], thus obtaining Figure 5A The virtual function table after replacement.

[0144] Please refer to Figure 5B , is another example of replacing the virtual function table. Figure 5A The difference between the replacement method in Figure 5B Each item in the replaced virtual function table can be divided into two parts. The first part is the flag bit, which is used to indicate whether the table item indicates a symbol definition table or a symbol reference table. For example, when the value of the flag bit is 0, it indicates that the table item indicates a symbol definition table. When the value of the flag bit is 1, it indicates that the table item indicates a symbol reference table. The second part is the index of the symbol in the table indicated by the flag bit. Figure 5B In the example, virtual function a corresponds to the first item in the symbol definition table, so the value of the first part of the first item in the virtual function table is set to 0, and the value of the second part of the first item is set to 1; virtual function func1 corresponds to the first item in the symbol reference table, so the value of the first part of the second item in the virtual function table is set to 1, and the value of the second part of the second item is set to 1, thus obtaining Figure 5B The virtual function table after replacement.

[0145] Of course, there are other ways to replace the virtual function table using the symbol definition table and the symbol reference table, which are not limited here.

[0146] The compiler can also use the above-mentioned method of replacing the virtual function table to replace the table entries in the symbol definition table and the symbol reference table in other tables such as the interface function table, which will not be repeated here.

[0147] It can be seen from step S202 and step S203 that after the compiler generates the symbol definition table and the symbol reference table corresponding to the first module, it will use the symbol definition table and the symbol reference table to replace the contents in the code segment and the data segment of the first module, thereby achieving the effect of hiding the symbols in the symbol definition table and the symbol reference table. As a result, the symbols in the symbol definition table and the symbol reference table do not need to be exported, which can further save the volume of the symbol table of the first module and save storage resources.

[0148] In addition, since in the embodiment of the present application, the symbols in the module are accessed through the table entries in the symbol definition table and the symbol reference table (for example, DUID), there is no need to omit the process in the prior art of first accessing the procedure linkage table (PLT) code when calling a subroutine, and then finding the address of the subroutine according to the PLT code, which can reduce the overhead in the subroutine calling process.

[0149] Furthermore, when a dynamic class needs to be loaded, the address of the corresponding table entry in the symbol definition table or the symbol reference table can be updated, thereby realizing the mechanism of dynamic class loading. Of course, when loading a dynamic class, all symbols appearing in the link library to be loaded need to be re-parsed and the relevant addresses updated. Alternatively, based on the same principle, an interface can be added, and the effect of dynamically replacing a symbol can be realized by dynamically calling this interface, so that dynamic stub code can be realized.

[0150] It should be noted that in the embodiment of the present application, step S202 may be executed first and then step S203, or step S203 may be executed first and then step S202, or step S202 and step S203 may be executed simultaneously. The execution order of step S202 and step S203 is not limited herein.

[0151] S204: The loader loads the first module.

[0152] When the compiler completes the compilation process of the first module, it can generate indication information for indicating the completion of the compilation, so that when the loader detects the indication information, it loads the first module into the memory of the computing device 100.

[0153] S205: The linker parses the symbols in the symbol definition table and the symbol reference table to obtain the running address of each symbol in the symbol definition table and the symbol reference table.

[0154] When the loader has loaded the required modules, the linker parses the symbols in the symbol definition table and symbol reference table of all loaded modules to obtain the running address of each symbol.

[0155] As can be seen from step S201, during the compilation process, the compiler may use the symbol name of each symbol to represent different symbols, thereby generating a symbol definition table or a symbol reference table as shown in Table 1 or Table 2, or may use the DUID corresponding to each symbol to represent different symbols, thereby generating a symbol definition table or a symbol reference table as shown in Table 3 or Table 4. Due to the different identifiers (symbol name or DUID) used to represent symbols in the symbol definition table and the symbol reference table, the linker may parse the symbol including but not limited to the following two parsing methods.

[0156] The first method is to parse by symbol name. The specific method is as follows:

[0157] As can be seen from step S201, in the symbol reference table, the address of each symbol is set to be empty or other preset values, so that after the first module is loaded, the linker can use the matching string method to search for the table entry with the same symbol name as the second symbol (one of the symbols in the symbol reference table of the first module) in the symbol reference table of the first module from the symbol definition table of other modules (such as the second module), and use the address in the table entry with the same symbol name as the second symbol to update the second address corresponding to the second symbol in the symbol reference table of the first module. After traversing each symbol in the symbol reference table of the first module, the parsing process of the symbols in the symbol reference table of the first module is completed.

[0158] As an example, three modules including the first module are loaded in the computing device 100. For easy distinction, the first module is marked as shared object (SO) A, and the other two modules are marked as SO B and SO C. The linker first parses the first symbol (i.e., symbol a) in the symbol reference table of SO A, and searches for the same symbol name in the symbol definition tables of SO B and SO C according to the symbol name "a" of symbol a. Assuming that a symbol with the symbol name "a" is found in the second item of the symbol definition table of SO B, the linker obtains the address stored in the second item of the symbol definition table of SO B, and uses the address to update the address corresponding to symbol a in the symbol reference table of SO A, thereby completing the parsing process of symbol a.

[0159] Similarly, each symbol in the symbol reference table of SO A is traversed to complete the symbol resolution of SO A. Then, the symbols of SO B and SO C are resolved in the same way.

[0160] The second method is to parse through the DUID of each symbol. The specific method is as follows:

[0161] Different from the first method, in the second method, when the linker searches for symbols included in the symbol reference table of the first module from the symbol definition table in other modules, it can match them by DUID instead of matching strings, which can reduce the processing complexity of the linker, speed up the search, and reduce the delay required for symbol resolution.

[0162] As an example, see Figure 6 . Figure 6 Multiple SOs are loaded in, for example, SO A, SO B, etc. Figure 6The four tables in are the symbol definition table and symbol reference table of SO A and SO B respectively. SO A defines the symbols corresponding to DUID1 and DUID2, and references the symbols corresponding to DUID4 and DUID5. SO B defines the symbols corresponding to DUID4 and DUID5, and references the symbols corresponding to DUID1 and DUID10. When the linker scans DUID4 in the undeftable table in SO A, it searches other SOs and finds that DUID4 is defined in SO B, that is, the address corresponding to DUID4 in the deftable of SO B is filled into the address corresponding to DUID4 in the undeftable of SO A. Following the same processing method, the address corresponding to DUID5 is also found in SO B, so the address corresponding to DUID5 in SO B is filled into the corresponding position in the undeftable table of SO A. When the undeftable table entries of all loaded SOs are parsed, the parsing process is completed.

[0163] Next, the symbol resolution process is described by taking the first module as a dynamically linked shared library.

[0164] First, the linker can open a dynamic link shared library by calling the dlopen function, and the dynamic link shared library can be called the current dynamic link shared library. Then, the linker obtains the symbol reference table in the current dynamic link shared library, and uses each symbol name or DUID in the symbol reference table to call the LookUp interface to search for the table entry with the same symbol name or DUID in the symbol definition table of other dynamic link shared libraries. If the table entry with the same symbol name or DUID is found in other dynamic link shared libraries, the address in the corresponding table entry in the other dynamic link shared library is used to replace the address corresponding to the symbol name or DUID in the current dynamic link shared library. Repeat the above process until all symbols in the current dynamic link shared library are traversed, and the parsing process of the current dynamic link shared library is completed.

[0165] After the linker completes the resolution of a dynamic link shared library, the dynamic link shared library can also be registered to indicate that the dynamic link shared library has completed the resolution. When the linker resolves other dynamic link shared libraries, the registered dynamic link shared library can be used to perform symbol resolution.

[0166] As an example, the specific execution code is as follows:

[0167]

[0168] Among them, sym is the value of the symbol's DUID. The RegisterLib(currentLib) function is used to indicate the registration of the currently opened dynamic link shared library. The LookUp(lib,sym) function is used to indicate that sym is searched for in the registered dynamic link shared library using the corresponding algorithm. If sym is found, the address corresponding to sym is returned, otherwise, null is returned. The UpdateAddr(lib,sym,addr) function is used to indicate that the address of sym in the symbol reference table (undeftable) in the dynamic link shared library is updated to the found address (i.e., addr).

[0169] As can be seen from the above process, when performing symbol resolution, it is necessary to search in the symbol definition table in other modules. However, if the computing device 100 loads a large number of modules and / or the modules include a large number of symbols, the linker search process will take a long time. In order to reduce the time required for the search process, in the embodiment of the present application, the following optimization scheme is proposed.

[0170] As shown in Table 4, the order of arrangement of the symbols in Table 4 in the symbol definition table is determined by the value of the DUID of each symbol, that is, when the compiler generates the symbol definition table and the symbol reference table corresponding to each module, it can store the symbols in order of the size of the DUID. In this way, when the linker searches in other modules, it can search based on the size relationship between the value of the DUID of the symbol to be searched and the value of the DUID of each symbol in the symbol definition table of other modules. For example, the search is performed by binary search.

[0171] As an example, when the compiler generates the symbol definition table and the symbol reference table corresponding to each module, they are arranged from small to large according to the value of DUID. When the linker searches the symbol definition table of the second module according to the DUID of the symbol to be searched, the linker can obtain the value of the DUID of the first symbol and the value of the DUID of the last symbol in the symbol definition table of the second module, and calculate the average value of the DUID of the two symbols. Then, the linker divides the symbol definition table of the second module into two parts according to the calculated average value, the value of the DUID of the symbol in the first part is less than the calculated average value, and the value of the DUID of the symbol in the second part is greater than the calculated average value. Then, the linker compares the calculated average value with the value of the DUID of the symbol to be searched. If the value of the DUID of the symbol to be searched is greater than the calculated average value, the linker can search from the second part of the second module, otherwise it can search from the first part of the second module. Assuming that the linker determines to search from the second part of the second module, the linker again obtains the DUID of the first table entry and the DUID of the last table entry in the table entries of the second part, calculates the average value, and divides the table entries of the second part into two sub-parts again. Then, the calculated average value is compared with the value of the DUID of the symbol to be searched, and it is determined to search from one of the two sub-parts of the second part, and so on, until the table entry with the same DUID as the symbol to be searched is found.

[0172] By using the above method, the time complexity of linker symbol search can be reduced from the original O(N) to O(logN), where N is the number of symbols included in the symbol definition table and O() is a function used to represent the time complexity.

[0173] The above content introduces the parsing process of symbols in the symbol reference table. The following content explains the parsing process of symbols in the symbol definition table.

[0174] In the present application example, since the addresses of the symbols in the symbol definition table have been generated by the compiler during the compilation process, the linker does not need to parse the symbols in the symbol definition table.

[0175] Alternatively, considering that symbols in different modules may have the same name, after loading the first module, the linker may also parse the symbol definition table of each module. The way in which the linker parses the symbol definition table may be the same as the above, that is, the method of parsing the symbols in the symbol reference table is adopted to parse the symbols in the symbol definition table, and the specific parsing method is not repeated here. Alternatively, the linker may also adopt the class loader parent delegation model to search and reparse the symbols in the symbol definition table.

[0176] Next, the process of parsing symbols in a symbol definition table using the parent delegation model is described.

[0177] Taking the first module as an example, after the first module is loaded, the linker obtains the symbol definition table corresponding to the first module. Then, according to the parent delegation model of the class loader, the symbol definition table of the loaded module (such as the third module) is searched to see whether a symbol with the same name as the symbol to be found has appeared before the first module, that is, whether there is a symbol with the same name. If there is a symbol with the same name, the address corresponding to the symbol with the same name in other modules is used as the address corresponding to the symbol to be found in the first module, and the address in the symbol definition table of the first module is updated. When each symbol in the symbol definition table of the first module is traversed, the parsing process of the symbols in the symbol definition table of the first module is completed.

[0178] It should be noted that when the symbol name of each symbol is used in the symbol definition table to represent each symbol, the symbols with the same name can be understood as symbols with the same string corresponding to the symbol name. When the DUID is used in the symbol definition table to represent each symbol, the symbols with the same name can be understood as symbols with the same DUID value.

[0179] Through the above technical solution, the search process for these symbols can meet the semantic requirements of the class loader.

[0180] In addition, in the embodiment of the present application, the symbol resolution process is performed after the loading is completed, or the symbol resolution can be performed when the symbol is accessed, thereby realizing a delayed resolution mechanism. Moreover, since the computing device 100 does not need to resolve the symbols in each module when loading each module, the time consumption of the computing device 100 booting up can be reduced, and the booting speed of the computing device 100 can be improved.

[0181] S206. The linker caches the correspondence between the entry in the symbol reference table of the first module corresponding to the second symbol and the entry in the symbol definition table of the second module having the same symbol name as the second symbol.

[0182] After the linker completes the symbol resolution process for the first module, the linker can record the correspondence between the table entries in each symbol reference table and the table entries in the symbol definition table of a certain module, and save the correspondence to a cache file. Figure 6In the example, DUID4 in SO A refers to the symbol in SO B. DUID4 in SO A is located in the 4th item in the symbol reference table of SO A, and DUID4 is located in the 2nd item in the symbol definition table of SO B. The corresponding relationship stored in the cache file is "SO A 4th item → SO B 2nd item". Alternatively, a unique identification value can be set for the symbol definition table and symbol reference table of each module. The unique identification value can only be used to identify one module and cannot be reused. For example, the unique identification value of SO A can be set to 001, and the unique identification value of SO B can be set to 010, so that the stored corresponding relationship can be simplified to "001:4→010:2".

[0183] Thus, when the computing device 100 is restarted, when the symbol needs to be resolved, the linker first verifies the uniqueness of each module through the unique identification value corresponding to each module. If the uniqueness verification of a module succeeds, it indicates that the module has not changed, and the linker can use the corresponding relationship recorded in the cache file to quickly locate the corresponding table entry without re-searching, which can further reduce the time complexity of resolving each table entry from O(logN) to O(1).

[0184] It should be noted that step S206 is an optional step, that is, it is not necessary to execute. Figure 2 In the figure, it is indicated by a dotted line.

[0185] In the above technical solution, a symbol definition table and a symbol reference table are created during compilation. Since the symbols in these two tables are resolved after loading is completed, the system does not need to resolve the symbols in the symbol definition table and the symbol reference table during the startup process, which can reduce the number of symbols that need to be resolved during the startup process of the system, thereby reducing the loading time when the system starts, and improving the boot speed of the system.

[0186] In the embodiments provided by the present application, the method provided by the embodiments of the present application is introduced from the perspective of a computing device. In order to implement the functions in the methods provided by the embodiments of the present application, the computing device may include a hardware structure and / or a software module, and implement the functions in the form of a hardware structure, a software module, or a hardware structure plus a software module. Whether a function of the functions described above is executed in the form of a hardware structure, a software module, or a hardware structure plus a software module depends on the specific application and design constraints of the technical solution.

[0187] Figure 7A schematic diagram of the structure of a compile and link device 700 is shown. The compile and link device 700 may be a computing device that can implement the functions of the computing device in the method provided in the embodiment of the present application; the compile and link device 700 may also be a device that can support the computing device to implement the functions of the computing device in the method provided in the embodiment of the present application. The compile and link device 700 may be a hardware structure, a software module, or a hardware structure plus a software module. The compile and link device 700 may be implemented by a chip system. In the embodiment of the present application, the chip system may be composed of a chip, or may include a chip and other discrete devices.

[0188] The compile-link device 700 may include a processing module 701 and a communication module 702 .

[0189] The processing module 701 can be used to execute Figure 2 Steps S201 to S206 in the illustrated embodiment, and / or other processes for supporting the technology described herein.

[0190] The communication module 702 can be used to perform Figure 7 In the illustrated embodiment, the address of the symbol in the symbol reference table of the first module is obtained from the symbol definition table of the second module, and / or other processes for supporting the technology described herein. The communication module 702 is used for the compile-link device 700 to communicate with other modules, which can be a circuit, a device, an interface, a bus, a software module, a transceiver or any other device that can realize communication.

[0191] Among them, all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and will not be repeated here.

[0192] The division of modules in the above embodiments is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional module in each embodiment of the present application may be integrated into one processor, or may exist physically separately, or two or more modules may be integrated into one module. The above integrated modules may be implemented in the form of hardware or in the form of software functional modules.

[0193] like Figure 8 The compile link device 800 provided in the embodiment of the present application is shown, wherein the compile link device 800 may be a terminal, capable of implementing the function of the terminal in the method provided in the embodiment of the present application; the compile link device 800 may also be a device capable of supporting the compile link device 800 to implement the function of the compile link device 800 in the method provided in the embodiment of the present application. The compile link device 800 may be a chip system. In the embodiment of the present application, the chip system may be composed of a chip, or may include a chip and other discrete devices.

[0194] The compiling and linking apparatus 800 includes at least one processor 820, which is used to implement or support the compiling and linking apparatus 800 to implement the functions of the compiling and linking apparatus 800 in the method provided in the embodiment of the present application. Exemplarily, the processor 820 can determine, according to the first information, when performing positioning measurement, that the symbol boundary of the reference signal sent by the cell in the cell group arriving at the terminal is synchronized, and specific details are referred to in the method example, which will not be described in detail here.

[0195] The compiling and linking device 800 may also include at least one memory 830 for storing program instructions and / or data. The memory 830 is coupled to the processor 820. The coupling in the embodiment of the present application is an indirect coupling or communication connection between devices, units or modules, which may be electrical, mechanical or other forms, and is used for information exchange between devices, units or modules. The processor 820 may operate in coordination with the memory 830. The processor 820 may execute program instructions stored in the memory 830. At least one of the at least one memory may be included in the processor.

[0196] The compile-link device 800 may also include a communication interface 810 for communicating with other devices via a transmission medium, so that the device in the device 800 can communicate with other devices. Exemplarily, the other device may be a terminal. The processor 820 may use the communication interface 810 to send and receive data.

[0197] The specific connection medium between the communication interface 810, the processor 820 and the memory 830 is not limited in the embodiment of the present application. Figure 8 In the embodiment, the memory 830, the processor 820 and the communication interface 810 are connected via a bus 840. Figure 8 The connections between the other components are shown in bold lines, which are only for illustration and are not intended to be limiting. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 8 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0198] In the embodiment of the present application, the processor 820 may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps, and logic block diagrams disclosed in the embodiment of the present application. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application may be directly embodied as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor.

[0199] In an embodiment of the present application, the memory 830 may be a non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), etc., or a volatile memory (volatile memory), such as a random access memory (RAM). The memory is any other medium that can be used to carry or store a desired program code in the form of an instruction or data structure and can be accessed by a computer, but is not limited thereto. The memory in the embodiment of the present application may also be a circuit or any other device that can implement a storage function, for storing program instructions and / or data.

[0200] The embodiment of the present application also provides a compile and link device, which can be a terminal or a circuit. The compile and link device can be used to execute the actions executed by the computing device in the above method embodiment.

[0201] Taking the terminal as a mobile phone as an example, Fig. 9 FIG. 9 is a block diagram showing a partial structure of a mobile phone 900 related to an embodiment of the present application. Fig. 9 The mobile phone 900 includes components such as a radio frequency (RF) circuit 910, a memory 920, other input devices 930, a display screen 940, a sensor 950, an audio circuit 960, an I / O subsystem 970, a processor 980, and a power supply 990. Those skilled in the art will appreciate that Fig. 9 The mobile phone structure shown in the figure does not constitute a limitation on the mobile phone, and may include more or fewer components than shown in the figure, or combine some components, or separate some components, or arrange the components differently. Those skilled in the art will understand that the display screen 940 belongs to the user interface (UI), and the mobile phone 900 may include more or fewer user interfaces than shown in the figure.

[0202] Combine the following Fig. 9 The following is a detailed introduction to the various components of the mobile phone 900:

[0203] The RF circuit 910 can be used for receiving and sending signals during information transmission or calls. In particular, after receiving the downlink information of the base station, it is sent to the processor 980 for processing; in addition, the designed uplink data is sent to the base station. Generally, the RF circuit includes but is not limited to an antenna, at least one amplifier, a transceiver, a coupler, a low noise amplifier (LNA), a duplexer, etc. In addition, the RF circuit 910 can also communicate with the network and other devices through wireless communication. The wireless communication can use any communication standard or protocol, including but not limited to the global system of mobile communication (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), long term evolution (LTE), email, short messaging service (SMS), etc.

[0204] The memory 920 may be used to store computer programs such as Fig. 9 The processor can call the computer program stored in the memory to implement the functions defined by the computer program. For example, the processor executes the operating system to implement various functions of the operating system on the mobile phone 900. The operating system can be Or other operating systems, the embodiments of the present application do not impose any restrictions on this. The memory 920 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc.; the data storage area may store data created according to the use of the mobile phone 900 (such as audio data, a phone book, etc.), etc. In addition, the memory 920 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.

[0205] The other input devices 930 may be used to receive input digital or character information, and to generate key signal inputs related to user settings and function control of the mobile phone 900. Specifically, the other input devices 930 may include, but are not limited to, one or more of a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, a joystick, an optical mouse (an optical mouse is a touch-sensitive surface that does not display visual output, or an extension of a touch-sensitive surface formed by a touch screen), etc. The other input devices 930 are connected to the other input device controller 971 of the I / O subsystem 970, and perform signal interaction with the processor 980 under the control of the other device input controller 971.

[0206] The display screen 940 can be used to display information input by the user or information provided to the user and various menus of the mobile phone 900, and can also accept user input. The specific display screen 940 may include a display panel 941 and a touch panel 942. The display panel 941 may be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), etc. The touch panel 942, also known as a touch screen, a touch-sensitive screen, etc., can collect user contact or non-contact operations on or near it (such as operations performed by users using fingers, styluses, or any other suitable objects or accessories on or near the touch panel 942, and may also include somatosensory operations; the operations include single-point control operations, multi-point control operations, and other operation types.), and drive the corresponding connection device according to a pre-set program. Optionally, the touch panel 942 may include two parts: a touch detection device and a touch controller. Among them, the touch detection device detects the user's touch direction and posture, detects the signal brought by the touch operation, and transmits the signal to the touch controller; the touch controller receives the touch information from the touch detection device, converts it into information that the processor can process, and then sends it to the processor 980, and can receive and execute the command sent by the processor 980. In addition, the touch panel 942 can be implemented by various types such as resistive, capacitive, infrared and surface acoustic wave, and any technology developed in the future can also be used to implement the touch panel 942. Further, the touch panel 942 can cover the display panel 941, and the user can operate on or near the touch panel 942 covered on the display panel 941 according to the content displayed on the display panel 941 (the display content includes but is not limited to soft keyboard, virtual mouse, virtual button, icon, etc.). After the touch panel 942 detects the operation on or near it, it is transmitted to the processor 980 through the I / O subsystem 970 to determine the user input, and then the processor 980 provides corresponding visual output on the display panel 941 through the I / O subsystem 970 according to the user input. Although in Fig. 9In the embodiment, the touch panel 942 and the display panel 941 are used as two independent components to realize the input and output functions of the mobile phone 900, but in some embodiments, the touch panel 942 and the display panel 941 can be integrated to realize the input and output functions of the mobile phone 900.

[0207] The mobile phone 900 may also include at least one sensor 950, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor may include an ambient light sensor and a proximity sensor, wherein the ambient light sensor may adjust the brightness of the display panel 941 according to the brightness of the ambient light, and the proximity sensor may turn off the display panel 941 and / or the backlight when the mobile phone 900 is moved to the ear. As a type of motion sensor, the accelerometer sensor can detect the magnitude of acceleration in each direction (generally three axes), and can detect the magnitude and direction of gravity when stationary. It can be used for applications that identify the posture of the mobile phone (such as horizontal and vertical screen switching, related games, magnetometer posture calibration), vibration recognition related functions (such as pedometer, tapping), etc.; as for other sensors that can also be configured in the mobile phone 900, such as gyroscopes, barometers, hygrometers, thermometers, infrared sensors, etc., they will not be repeated here.

[0208] The audio circuit 960, the speaker 961, and the microphone 962 can provide an audio interface between the user and the mobile phone 900. The audio circuit 960 can transmit the signal converted from the received audio data to the speaker 961, which is converted into a sound signal for output; on the other hand, the microphone 962 converts the collected sound signal into a signal, which is received by the audio circuit 960 and converted into audio data, and then outputs the audio data to the RF circuit 910 to be sent to, for example, another mobile phone, or outputs the audio data to the memory 920 for further processing.

[0209] The I / O subsystem 970 is used to control external devices for input and output, and may include other device input controllers 971, sensor controllers 972, and display controllers 973. Optionally, one or more other input control device controllers 971 receive signals from other input devices 930 and / or send signals to other input devices 930. Other input devices 930 may include physical buttons (press buttons, rocker buttons, etc.), dials, slide switches, joysticks, click wheels, and optical mice (optical mice are touch-sensitive surfaces that do not display visual output, or are extensions of touch-sensitive surfaces formed by touch screens). It is worth noting that other input control device controllers 971 may be connected to any one or more of the above devices. The display controller 973 in the I / O subsystem 970 receives signals from the display screen 940 and / or sends signals to the display screen 940. After the display screen 940 detects user input, the display controller 973 converts the detected user input into interaction with the user interface object displayed on the display screen 940, that is, realizes human-computer interaction. The sensor controller 972 may receive signals from and / or send signals to one or more sensors 950 .

[0210] The processor 980 is the control center of the mobile phone 900. It uses various interfaces and lines to connect various parts of the entire mobile phone. By running or executing software programs and / or modules stored in the memory 920, and calling data stored in the memory 920, it executes various functions of the mobile phone 900 and processes data, thereby monitoring the mobile phone as a whole. Optionally, the processor 980 may include one or more processing units; preferably, the processor 980 may integrate an application processor and a modem processor, wherein the application processor mainly processes the operating system, user interface, and application programs, and the modem processor mainly processes wireless communications. It is understandable that the above-mentioned modem processor may not be integrated into the processor 980.

[0211] The mobile phone 900 also includes a power source 990 (such as a battery) for supplying power to various components. Preferably, the power source can be logically connected to the processor 980 through a power management system, so that the power management system can manage functions such as charging, discharging, and power consumption.

[0212] Although not shown, the mobile phone 900 may also include a camera, a Bluetooth module, etc., which will not be described in detail here.

[0213] The present application also provides a computer-readable storage medium including instructions, which, when executed on a computer, causes the computer to execute Figure 2 The method is performed by a computing device in the illustrated embodiment.

[0214] The present application also provides a computer program product, including instructions, which, when executed on a computer, causes the computer to execute Figure 2 The method is performed by a computing device in the illustrated embodiment.

[0215] The embodiment of the present application provides a chip system, which includes a processor and may also include a memory, for implementing the functions of the computing device in the aforementioned method. The chip system may be composed of a chip, or may include a chip and other discrete devices.

[0216] In the method provided in the embodiment of the present application, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer, server or data center to another website, computer, server or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media integrated therein. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a digital video disc (DVD)), or a semiconductor medium (e.g., an SSD), etc.

[0217] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A compile and link method, characterized in that: include: During the compilation of the first module, a symbol definition table and a symbol reference table corresponding to the first module are generated, wherein the symbol definition table includes at least one first symbol and a first address corresponding to each first symbol, the first symbol is a symbol defined in the first module, the first address is an address of the first symbol in the first module, the symbol reference table includes at least one second symbol and a second address corresponding to each second symbol, the second symbol is a symbol of the second module referenced by the first module, the second address is an address of the second symbol in the second module, and the first symbol or the second symbol includes a function and / or a variable; Loading the first module; After the first module is loaded, the symbols in the symbol definition table and the symbol reference table are parsed to obtain the running address of each symbol in the symbol definition table and the symbol reference table.

2. The method according to claim 1, characterized in that The method further comprises: The code segment and the data segment included in the first module are compiled using the symbol definition table and the symbol reference table, wherein the data segment includes a virtual function table and / or an interface function table corresponding to the first module.

3. The method according to claim 2, characterized in that Compiling the code segments and data segments included in the first module using the symbol definition table and the symbol reference table includes: Replacing the code segment and the portion of the data segment corresponding to the first symbol with the index of the first symbol in the symbol definition table; and The portion of the code segment and the data segment corresponding to the second symbol is replaced by the index of the second symbol in the symbol reference table.

4. The method according to any one of claims 1 to 3, characterized in that The symbols in the symbol reference table are parsed, including: From the symbol definition table of the second module, searching for an entry having the same symbol name as the second symbol; updating a second address corresponding to the second symbol in the symbol reference table using an address in a table entry having the same symbol name as the second symbol; Each second symbol in the symbol reference table of the first module is traversed to complete the parsing process of the symbols in the symbol reference table.

5. The method according to any one of claims 1 to 3, characterized in that: The first symbol and the second symbol are identified by a digest unique identification code DUID, the DUID includes an identification of a user using the first module, and the DUID is obtained by calculation using a hash algorithm.

6. The method according to claim 5, characterized in that The table entries included in the symbol definition table of the second module are arranged in order of the size of the DUID; From the symbol definition table of the second module, searching for an entry having the same symbol name as the second symbol, including: By binary search, determine the entry corresponding to the DUID of the second symbol from the symbol definition table of the second module.

7. The method according to any one of claims 1 to 3 or 6, characterized in that: The method further comprises: The correspondence between the table entry corresponding to the second symbol in the symbol reference table of the first module and the table entry having the same symbol name as the second symbol in the symbol definition table of the second module is cached.

8. The method according to any one of claims 1 to 3 or 6, characterized in that: Parsing the symbols in the symbol definition table includes: Determine whether there is a third symbol with the same symbol name as the first symbol in the symbol definition table of the loaded third module; If yes, the first address corresponding to the first symbol is updated using the address corresponding to the third symbol in the symbol definition table of the third module.

9. The method according to claim 5, characterized in that The first symbol and the second symbol are identified by a digest unique identification code DUID, and the method further includes: After generating a DUID corresponding to each of the at least one first symbol and the at least one second symbol, determining whether the DUIDs corresponding to any two symbols are the same; When at least two symbols with the same DUID exist in the at least one first symbol and the at least one second symbol, a reminder message is generated, where the reminder message is used to prompt a DUID conflict.

10. A compile and link device, characterized in that: It includes a processing module and a communication module, wherein: The processing module is used to generate a symbol definition table and a symbol reference table corresponding to the first module during the compilation process of the first module, the symbol definition table includes at least one first symbol and a first address corresponding to each first symbol, the first symbol is a symbol defined in the first module, the first address is the address of the first symbol in the first module, the symbol reference table includes at least one second symbol and a second address corresponding to each second symbol obtained through the communication module, the second symbol is a symbol of the second module referenced by the first module, the second address is the address of the second symbol in the second module, the first symbol or the second symbol includes a function and / or a variable; and, for loading the first module; and Used to parse the symbols in the symbol definition table and the symbol reference table after the first module is loaded, and obtain the running address of each symbol in the symbol definition table and the symbol reference table.

11. The device according to claim 10, characterized in that The processing module is also used to compile the code segment and data segment included in the first module using the symbol definition table and the symbol reference table, and the data segment includes a virtual function table and / or an interface function table corresponding to the first module.

12. The device according to claim 11, characterized in that The processing module is specifically used for: Replacing the code segment and the portion of the data segment corresponding to the first symbol with the index of the first symbol in the symbol definition table; and The portion of the code segment and the data segment corresponding to the second symbol is replaced by the index of the second symbol in the symbol reference table.

13. The device according to any one of claims 10 to 12, characterized in that The processing module is used for: Searching, by the communication module, from the symbol definition table of the second module, an entry having the same symbol name as the second symbol; updating a second address corresponding to the second symbol in the symbol reference table using an address in a table entry having the same symbol name as the second symbol; Each second symbol in the symbol reference table of the first module is traversed to complete the parsing process of the symbols in the symbol reference table.

14. The device according to any one of claims 10 to 12, characterized in that The first symbol and the second symbol are identified by a digest unique identification code DUID, the DUID includes an identification of a user using the first module, and the DUID is obtained by calculation using a hash algorithm.

15. The device according to claim 14, characterized in that The table items included in the symbol definition table of the second module are arranged in order according to the size of the DUID, and the processing module is used to: By binary search, determine the entry corresponding to the DUID of the second symbol from the symbol definition table of the second module.

16. The device according to any one of claims 10 to 12 or 15, characterized in that The processing module is also used for: The correspondence between the table entry corresponding to the second symbol in the symbol reference table of the first module and the table entry having the same symbol name as the second symbol in the symbol definition table of the second module is cached.

17. The device according to any one of claims 10 to 12 or 15, characterized in that The processing module is used for: Determine whether there is a third symbol with the same symbol name as the first symbol in the symbol definition table of the loaded third module; If yes, the first address corresponding to the first symbol is updated using the address corresponding to the third symbol in the symbol definition table of the third module.

18. The device according to claim 14, characterized in that The first symbol and the second symbol are identified by a digest unique identification code DUID, and the processing module is further used for: After generating a DUID corresponding to each of the at least one first symbol and the at least one second symbol, determining whether the DUIDs corresponding to any two symbols are the same; When at least two symbols with the same DUID exist in the at least one first symbol and the at least one second symbol, a reminder message is generated, where the reminder message is used to prompt a DUID conflict.

19. A computer storage medium, characterized in that: The computer storage medium stores computer executable instructions, which, when called by the computer, are used to enable the computer to execute the method according to any one of claims 1 to 9.

20. A computer program product comprising instructions, characterized in that When the method is executed on a computer, the computer is enabled to execute the method according to any one of claims 1 to 9.

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