A multi-axis motor assembly line control system based on FPGA and its control method

Abstract

The present invention relates to a multi-axis motor pipeline control system based on FPGA and a control method thereof, comprising a motor operation circuit, a pipeline control circuit, a multi-channel data acquisition circuit, a multi-channel interface circuit and a multi-channel modulation output circuit; the pipeline control circuit provides a first timing sequence, and the sampling data of all motor shafts and the motor motion control instructions are polled and input into the motor operation circuit according to the first timing sequence; the motor operation circuit calculates the error adjustment data of each motor shaft according to the first timing sequence; the pipeline control circuit also provides a second timing sequence, and all modulation output circuits poll and receive the error adjustment data according to the second timing sequence; the modulation output circuit receives the error adjustment data of the corresponding motor shaft according to the second timing sequence, and calculates the corresponding three-phase duty ratio modulation signal and outputs it to the corresponding motor. The present invention only needs one motor operation circuit no matter how many motor shafts there are, realizes the parallel control of multi-axis motors in a pipeline manner, and reduces the occupied resources of FPGA exponentially.

Description

Technical Field

[0001] The present invention relates to the technical field of motor control, and in particular to a multi-axis motor assembly line control system based on FPGA and a control method thereof. Background Art

[0002] AC servo permanent magnet synchronous motor is an electromagnetic machine with a position feedback device. Under the control of the servo drive device, the displacement output of the motor is strictly synchronized with the digital command position input. It has high control accuracy, simple control, fast start and stop, stable performance, and is widely used in CNC systems, robots and other fields. With the in-depth development of industrial automation, more and more equipment requires multiple axes to cooperate with each other to complete the motion control of spatial trajectories, such as multi-axis machining centers, multi-joint manipulators and other equipment. How to coordinate the control of the motors on each axis and how to achieve it are issues that need to be studied and solved by multi-axis motor controllers.

[0003] In the prior art, there are pure software methods based on microprocessors such as MCU or DSP to control multi-axis motors. However, software-based methods are prone to lag, which reduces the real-time performance of motor control and the control performance of multi-axis motor control systems. Therefore, pure hardware logic methods based on FPGA have emerged, such as Figure 1 As shown, the figure is an FPGA motor multi-axis parallel control system in the prior art, which uses a single FPGA chip to control multiple motors to run independently, including a multi-channel data acquisition circuit 1, a multi-channel interface circuit 2, a multi-channel motor operation circuit 3 and a multi-channel modulation output circuit 4. The multi-channel data acquisition circuit 1 is specifically a sampling circuit for the first axis motor, the second axis motor to the n-th axis motor, wherein the collected data includes phase current data, position data and speed data; the multi-channel interface circuit 2 is specifically a control instruction input interface circuit for the first axis motor, the second axis motor to the n-th axis motor, wherein the control instruction includes a position request instruction, a system synchronization instruction and a control parameter sending instruction, etc.; the multi-channel motor operation circuit 3 is specifically a calculation circuit for the first axis motor, the second axis motor to the n-th axis motor, wherein the calculated data includes the error and adjustment amount of the position, the error and adjustment amount of the speed, and the error and adjustment amount of the current; the multi-channel modulation output circuit 4 is specifically a U, V, W three-phase duty cycle output circuit for the first axis motor, the second axis motor to the n-th axis motor.

[0004] In the existing FPGA motor multi-axis parallel control system, each axis motor can use the independent calculation logic of its own channel data acquisition circuit, command input circuit and motor operation circuit to achieve parallel control, and each axis does not affect each other. However, the control system requires a motor operation circuit, so it needs to repeatedly occupy the FPGA calculation logic, resulting in a waste of resources, an increase in chip costs, and a high requirement for FPGA chips. Summary of the invention

[0005] The technical problem to be solved by the present invention is to address the deficiencies of the above-mentioned prior art and provide a multi-axis motor assembly line control system and a control method based on FPGA. No matter how many motor axes there are, only one motor operation circuit is used to realize parallel control of multi-axis motors in a pipeline manner, thereby reducing the resources occupied by FPGA exponentially and saving chip costs.

[0006] The technical solution of the present invention to solve the above technical problems is as follows:

[0007] A multi-axis motor assembly line control system based on FPGA, comprising a motor operation circuit, an assembly line control circuit, a multi-channel data acquisition circuit, a multi-channel interface circuit and a multi-channel modulation output circuit arranged on an FPGA programmable logic device;

[0008] The data acquisition circuit is used to obtain sampled data of the motor shaft;

[0009] The interface circuit is used to obtain the motor motion control instruction of the motor shaft;

[0010] The pipeline control circuit is used to provide a first timing sequence, and the first timing sequence is used to control the sampling data and motor motion control instructions of all motor axes to be polled and input into the motor operation circuit in a pipeline manner;

[0011] The motor operation circuit is used to calculate the error adjustment data of each motor shaft according to the sampling data and the motor motion control instruction input according to the first timing;

[0012] The pipeline control circuit is further used to provide a second timing sequence, wherein the second timing sequence is used to control all the modulation output circuits to poll and receive the error adjustment data of the corresponding motor shaft in a pipeline manner;

[0013] The modulation output circuit is used to receive the error adjustment data of the corresponding motor shaft output by the motor operation circuit according to the second timing, and calculate the three-phase duty ratio modulation signal of the corresponding motor shaft according to the error adjustment data and output it to the corresponding motor;

[0014] The number of the data acquisition circuits, the number of the interface circuits and the number of the modulation output circuits are all the same;

[0015] The motor operation circuit, the pipeline control circuit, all the data acquisition circuits, all the interface circuits and all the modulation output circuits are electrically connected to the FPGA programmable logic device respectively, all the data acquisition circuits, all the interface circuits and all the modulation output circuits are electrically connected to the motor operation circuit respectively, and all the data acquisition circuits, all the interface circuits and all the modulation output circuits are electrically connected to the pipeline control circuit respectively.

[0016] According to another aspect of the present invention, there is also provided a multi-axis motor assembly line control method based on FPGA, which is applied to a multi-axis motor assembly line control system based on FPGA in the present invention, and comprises the following steps:

[0017] Get the sampling data and motor motion control instructions of each motor axis;

[0018] Using a pipeline control circuit to provide a first timing sequence, and according to the first timing sequence, the sampled data and the motor motion control instructions provided for all motor axes are polled and input into the motor operation circuit in a pipeline manner;

[0019] The motor operation circuit calculates error adjustment data for each motor shaft according to the sampling data and the motor motion control instruction input according to the first timing sequence;

[0020] The pipeline control circuit provides a second timing sequence, and all modulation output circuits poll and receive the error adjustment data of the corresponding motor shaft output by the motor operation circuit in a pipeline manner according to the second timing sequence;

[0021] Each of the modulation output circuits receives the error adjustment data of the corresponding motor shaft according to the second timing, calculates the three-phase duty cycle modulation signal of the corresponding motor shaft according to the error adjustment data, and outputs the signal to the corresponding motor.

[0022] The FPGA-based multi-axis motor pipeline control system and control method of the present invention have the following beneficial effects: based on the FPGA chip, the sampling data of the channel where each motor is located is obtained through the data acquisition circuit, the motor motion control instruction is obtained through the interface circuit, and the first timing of the signal input each time in the motor operation circuit is provided through the pipeline control circuit, that is, the sampling data of all motor shafts and the motor motion control instruction are polled and input into the motor operation circuit in a pipeline manner according to the first timing; the motor operation circuit can calculate the error adjustment data of the channel corresponding to each input signal according to the sampling data and motor motion control instruction input each time; the second timing of the signal output each time in the motor operation circuit is provided through the pipeline control circuit, that is, all modulation output circuits poll and receive the error adjustment data of the corresponding motor shaft in a pipeline manner according to the second timing; finally, the modulation output circuit of the channel where each motor is located calculates the corresponding three-phase duty cycle modulation signal (i.e., PWM modulation signal) according to the corresponding error adjustment data and outputs it to the motor of the corresponding channel, thereby realizing parallel control of the multi-axis motor;

[0023] The multi-axis motor control system and control method of the present invention are based on the pipeline logic (including the first timing and the second timing) provided by the FPGA programmable logic device and the pipeline control circuit. The sampling data and the motor motion control instructions are input in a pipeline manner, and the PWM modulated signal is output in a pipeline manner. No matter how many motor axes there are, only one motor operation circuit is needed. Compared with the traditional multi-axis motor parallel control method, the FPGA occupied resources are reduced exponentially, the chip cost is greatly saved, and the requirements for the FPGA chip are relatively low. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a structural diagram of an FPGA motor multi-axis parallel control system in the prior art;

[0025] Figure 2 This is a schematic diagram of the structure of a multi-axis motor assembly line control system based on FPGA in Embodiment 1 of the present invention;

[0026] Figure 3 This is a schematic diagram of the structure of another FPGA-based multi-axis motor assembly line control system in Embodiment 1 of the present invention;

[0027] Figure 4 Schematic diagram of the structure of the motor operation circuit in the first embodiment of the present invention;

[0028] Figure 5 A circuit diagram of a pipeline control circuit in Embodiment 1 of the present invention controlling the pipeline input of a data acquisition circuit and an interface circuit, and controlling the pipeline output of a modulation output circuit;

[0029] Figure 6A schematic diagram of a model of a first timing sequence and a second timing sequence provided by a pipeline control circuit in Embodiment 1 of the present invention;

[0030] Figure 7 It is a schematic diagram of a modified structure of a multi-axis motor assembly line control system based on FPGA in the first embodiment of the present invention;

[0031] Figure 8 This is a flow chart of a multi-axis motor assembly line control method based on FPGA in Embodiment 2 of the present invention;

[0032] Fig. 9 It is a schematic diagram of the flow of calculating the current error adjustment data by the motor operation circuit in the second embodiment of the present invention.

[0033] In the accompanying drawings, the components represented by the reference numerals are listed as follows:

[0034] 1. Data acquisition circuit, 2. Interface circuit, 3. Motor operation circuit, 4. Modulation output circuit, 5. Pipeline control circuit, 11. Encoder, 12. Current sensor, 31. Position feedback calculation subcircuit, 32. Position error calculation subcircuit, 33. Position adjustment subcircuit, 34. Speed ​​feedback calculation subcircuit, 35. Speed ​​error calculation subcircuit, 36. Speed ​​adjustment subcircuit, 37. Current feedback calculation subcircuit, 38. Current error calculation subcircuit, 39. Current adjustment subcircuit. DETAILED DESCRIPTION

[0035] The principles and features of the present invention are described below in conjunction with the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0036] The present invention will be described below in conjunction with the accompanying drawings.

[0037] Embodiment 1: Figure 2 As shown, a multi-axis motor assembly line control system based on FPGA includes a motor operation circuit 3, an assembly line control circuit 5, a multi-channel data acquisition circuit 1, a multi-channel interface circuit 2 and a multi-channel modulation output circuit 4 arranged on an FPGA programmable logic device;

[0038] The data acquisition circuit 1 is used to obtain the sampled data of the motor shaft;

[0039] The interface circuit 2 is used to obtain the motor motion control instruction of the motor shaft;

[0040] The pipeline control circuit 5 is used to provide a first timing sequence, and the first timing sequence is used to control the sampling data of all motor axes and the motor motion control instructions to be polled and input into the motor operation circuit 3 in a pipeline manner;

[0041] The motor operation circuit 3 is used to calculate the error adjustment data of each motor shaft according to the sampling data and the motor motion control instruction input according to the first timing;

[0042] The pipeline control circuit 5 is further used to provide a second timing sequence, and the second timing sequence is used to control all the modulation output circuits 4 to poll and receive the error adjustment data of the corresponding motor shaft in a pipeline manner;

[0043] The modulation output circuit 4 is used to receive the error adjustment data of the corresponding motor shaft output by the motor operation circuit 3 according to the second timing, and calculate the three-phase duty ratio modulation signal of the corresponding motor shaft according to the error adjustment data and output it to the corresponding motor;

[0044] The number of the data acquisition circuits 1, the number of the interface circuits 2 and the number of the modulation output circuits 4 are all the same;

[0045] The motor operation circuit 3, the pipeline control circuit 5, all the data acquisition circuits 1, all the interface circuits 2 and all the modulation output circuits 4 are respectively electrically connected to the FPGA programmable logic device, all the data acquisition circuits 1, all the interface circuits 2 and all the modulation output circuits 4 are respectively electrically connected to the motor operation circuit 3, and all the data acquisition circuits 1, all the interface circuits 2 and all the modulation output circuits 4 are respectively electrically connected to the pipeline control circuit 5.

[0046] The present embodiment provides a pure hardware multi-axis motor control system based on FPGA chip, which obtains the sampling data of the channel where each motor is located through the data acquisition circuit, obtains the motor motion control instruction through the interface circuit, and provides the first timing of the signal input each time in the motor operation circuit through the pipeline control circuit, that is, the sampling data and motor motion control instructions of all motor shafts are polled and input into the motor operation circuit in a pipeline manner according to the first timing; the motor operation circuit can calculate the error adjustment data of the channel corresponding to the input signal each time according to the sampling data and motor motion control instruction input each time; the second timing of the signal output each time in the motor operation circuit is provided through the pipeline control circuit, that is, all modulation output circuits receive the error adjustment data of the corresponding motor shaft in a pipeline manner according to the second timing; finally, the modulation output circuit of the channel where each motor is located calculates the corresponding three-phase duty cycle modulation signal (i.e., PWM modulation signal) according to the corresponding error adjustment data and outputs it to the motor of the corresponding channel, thereby realizing parallel control of multi-axis motors;

[0047] The multi-axis motor control system of this embodiment is based on the pipeline logic (including the first timing and the second timing) provided by the FPGA programmable logic device and the pipeline control circuit. The sampling data and the motor motion control instructions are input in a pipeline manner, and the PWM modulated signal is output in a pipeline manner. No matter how many motor axes there are, only one motor operation circuit is needed. Compared with the traditional multi-axis motor parallel control method, the FPGA resource occupation is reduced exponentially, the chip cost is greatly saved, and the requirements for the FPGA chip are relatively low.

[0048] Specifically, Figure 2 As shown, the data acquisition circuit has a total of N circuits, which are numbered N1, N2...NN respectively. Similarly, the interface circuit numbers and the modulation output circuit numbers are N1, N2...NN respectively. The above numbering sequence is the same as the sequence of the motor shaft numbers.

[0049] Preferably, the sampled data includes position data, speed data and phase current data; Figure 3 As shown, each data acquisition circuit 1 includes an encoder 11 and a current sensor 12;

[0050] In any one of the data acquisition circuits 1, the encoder 11 is used to collect position data and speed data, and the current sensor 12 is used to collect phase current data; the encoder 11 and the current sensor 12 are respectively electrically connected to the motor operation circuit 3, the encoder 11 and the current sensor 12 are respectively electrically connected to the pipeline control circuit 5, and the encoder 11 and the current sensor 12 are respectively electrically connected to the FPGA programmable logic device.

[0051] The encoder facilitates the collection of position data and speed data of the channel where each motor shaft is located, and facilitates the motor operation circuit to calculate position feedback data and position error based on the position data, and facilitates the motor operation circuit to calculate speed feedback data and speed error and other related data based on the speed data. The current sensor facilitates the collection of input phase current data of the channel where each motor shaft is located, and then facilitates the calculation of current error and current error adjustment data and other related data; wherein, the encoder and the current sensor are respectively electrically connected to the pipeline control circuit, so that they are input into the motor operation circuit in a pipeline manner for calculation according to the first timing provided, and the FPGA resource occupation is effectively reduced on the basis of accurately calculating the current error adjustment data.

[0052] Specifically, in any modulation output circuit of this embodiment, the output three-phase duty cycle modulation output signal includes a U-phase PWM modulation signal (ie Figure 3 PWM_U_N1, PWM_U_N2...PWM_U_NN), V-phase PWM modulation signal (i.e. Figure 3PWM_V_N1, PWM_V_N2...PWM_V_NN) and W-phase PWM modulation signal (i.e. Figure 3 PWM_W_N1, PWM_W_N2 ... PWM_W_NN); in any data acquisition circuit of this embodiment, the phase current data collected by the current sensor includes the U-phase input phase current and the V-phase input phase current.

[0053] Preferably, the error adjustment data is specifically current error data; Figure 4 As shown, the motor operation circuit 3 includes a position feedback calculation subcircuit 31, a position error calculation subcircuit 32, a position adjustment subcircuit 33, a speed feedback calculation subcircuit 34, a speed error calculation subcircuit 35, a speed adjustment subcircuit 36, a current feedback calculation subcircuit 37, a current error calculation subcircuit 38 and a current adjustment subcircuit 39;

[0054] The position feedback calculation subcircuit 31 is used to calculate the position feedback data of the corresponding motor shaft according to the position data input according to the first time sequence;

[0055] The position error calculation subcircuit 32 is used to calculate the position error of the corresponding motor shaft according to the motor motion control instruction input in the first timing and according to the position feedback data;

[0056] The position adjustment subcircuit 33 is used to obtain position error adjustment data corresponding to the motor shaft according to the position error;

[0057] The speed feedback calculation subcircuit 34 is used to calculate the speed feedback data of the corresponding motor shaft according to the speed data input according to the first timing sequence;

[0058] The speed error calculation subcircuit 35 is used to calculate the speed error of the corresponding motor shaft according to the speed feedback data and the position error adjustment data;

[0059] The speed adjustment subcircuit 36 ​​is used to obtain speed error adjustment data corresponding to the motor shaft according to the speed error;

[0060] The current feedback calculation subcircuit 37 is used to calculate the current feedback data of the corresponding motor shaft according to the phase current data input according to the first timing sequence;

[0061] The current error calculation subcircuit 38 is used to calculate the current error of the corresponding motor shaft according to the current feedback data and the speed error adjustment data;

[0062] The current regulation subcircuit 39 is used to obtain current error regulation data corresponding to the motor shaft according to the current error;

[0063] The position error calculation subcircuit 32 is electrically connected to the current regulation subcircuit 39 through the position adjustment subcircuit 33, the speed error calculation subcircuit 35, the position adjustment subcircuit 36 ​​and the circuit error calculation subcircuit 38 in sequence. The output ends of all the interface circuits 2 are electrically connected to the position error calculation subcircuit 32, the output ends of all the modulation output circuits 4 are electrically connected to the current regulation subcircuit 39, the output ends of all the encoders 11 are electrically connected to the position error calculation subcircuit 32 through the position feedback calculation subcircuit 31, and the output ends of all the encoders 11 are also electrically connected to the speed error calculation subcircuit 38. The speed feedback calculation subcircuit 34 is electrically connected to the speed error calculation subcircuit 35 respectively, and the output ends of all the current sensors 12 are electrically connected to the current error calculation subcircuit 38 respectively through the current feedback calculation subcircuit 37; the position feedback calculation subcircuit 31, the position error calculation subcircuit 32, the position adjustment subcircuit 33, the speed feedback calculation subcircuit 34, the speed error calculation subcircuit 35, the speed adjustment subcircuit 36, the current feedback calculation subcircuit 37, the current error calculation subcircuit 38 and the current adjustment subcircuit 39 are all electrically connected to the FPGA programmable logic device respectively.

[0064] Under the pipeline logic provided by the pipeline control circuit, when the data acquisition circuit and the interface circuit input the position data, speed data and current data of a motor shaft and the motor motion control instruction corresponding to the shaft according to the first timing, the position feedback subcircuit in the motor operation circuit obtains the position feedback data according to the position data, and then the position error calculation subcircuit calculates the position error of the corresponding motor shaft according to the position feedback data and the motor motion control instruction (such as the position control instruction and the system set position parameters, etc.), and then the position adjustment subcircuit obtains the corresponding position error adjustment data according to the position error. The above three circuit structures constitute a position error adjustment loop; the position error adjustment is transmitted to the subsequent serial node, that is, the speed error calculation subcircuit. The node for position error adjustment, similarly, the speed feedback calculation subcircuit calculates the speed feedback data according to the speed data, the speed error calculation subcircuit obtains the speed error according to the speed feedback data and the position error adjustment data transmitted from the previous node, and the speed adjustment subcircuit obtains the corresponding speed error adjustment data according to the speed error, that is, the speed feedback calculation subcircuit, the speed error calculation subcircuit and the speed adjustment subcircuit constitute a speed error adjustment loop; the speed error adjustment data is transmitted to the serial node behind, that is, the node for current error adjustment, similarly, through the current feedback calculation subcircuit, the current error calculation subcircuit and the current adjustment subcircuit, a current error adjustment loop is constituted to obtain the current error adjustment data corresponding to the input motor shaft;

[0065] Through the motor operation circuit of the above structure, the current error adjustment data can be calculated for the signal input according to the first timing, so that the modulation output circuit can periodically poll the output current error adjustment data in a pipeline manner according to the second timing, and then the modulation output circuit can obtain the three-phase duty cycle modulation signal of the corresponding motor shaft, thereby realizing parallel control of multi-axis motors in a pipeline manner. No matter how many motor shafts there are, only one motor operation circuit of the above structure is needed, which greatly reduces the resources occupied by FPGA.

[0066] Specifically, the motor motion control instructions in this embodiment include position request instructions, system synchronization instructions, current instructions and control parameter issuance instructions, such as the number of motor axes, motor parameters and control parameters; the interface circuit can be used as an input interface for these control instructions, through which the number of motor axes, motor parameters and control parameters can be configured, and it can also be used as a state parameter monitoring output interface, for example, it can output state parameters such as current size, speed size, actual operating position feedback and alarm information.

[0067] It should be noted that the specific calculation formulas for the position feedback calculation subcircuit for calculating position feedback data, the position error calculation subcircuit for calculating position error, the position adjustment subcircuit for calculating position error adjustment data, the speed feedback calculation subcircuit for calculating speed feedback data, the speed error calculation subcircuit for calculating speed error, the speed adjustment subcircuit for calculating speed error adjustment data, the current feedback calculation subcircuit for calculating current feedback data, the current error calculation subcircuit for calculating current error and the current adjustment subcircuit for calculating current error adjustment data in the present invention are all prior arts, and the specific details will not be repeated here.

[0068] Preferably, in the pipeline control circuit 5, the first timing includes the input pulse cycle and input sequence of the sampling data and the motor motion control command of all channels input into the motor operation circuit 3 in a polling manner, and the input pulse interval of the sampling data and the motor motion control command of every two adjacent channels input into the motor operation circuit 3 in a polling manner;

[0069] The second timing sequence includes the output pulse period and output sequence of all the modulation output circuits 4 polling and receiving the error adjustment data of the corresponding channels, and the output pulse interval of the modulation output circuits 4 of every two adjacent channels polling and receiving the error adjustment data of the corresponding channels;

[0070] The input pulse period is equal to the output pulse period, the input pulse interval is equal to the output pulse interval, the input sequence is the same as the output sequence, and the input sequence and the output sequence are respectively the same as the sequence of the motor shaft number.

[0071] The sampling data of all channels and the motor motion control instructions are allocated according to the sorting of the motor shaft numbers to be polled and input into the motor operation circuit in an input order, and the output order of the error adjustment data of the corresponding channels received by all modulation output circuits is allocated according to the sorting of the motor shaft numbers, so that the input and output of the pipeline correspond to the motor shafts and keep synchronization, thereby ensuring that the input signal (i.e., the sampling data and the motor motion control instructions) and the output signal (i.e., the three-phase duty cycle modulation signal or the PWM modulation signal) are from the same motor and are input and output in sequence in a pipeline manner; the input pulse period is equal to the output pulse period, the input pulse interval is equal to the output pulse interval, the input order is the same as the output order, and the input order and the output order are respectively the same as the sorting of the motor shaft numbers, and it can also be realized that input first and output first, input later and output later, all motor shafts complete an input or output in just one cycle, and the input or output of each shaft differs by one clock (i.e., one input pulse interval or one output pulse interval), thereby facilitating the orderly parallel control of multi-axis motors and improving the stability of the entire control system.

[0072] Specifically, in this embodiment, the pipeline control circuit is used to control the pipeline input of the data acquisition circuit and the interface circuit, and the circuit diagram of the pipeline output of the modulation output circuit is shown in FIG. Figure 5 The model diagram of the first timing and the second timing provided by the pipeline control circuit is shown in Figure 6 shown.

[0073] When the motor axis numbers are 1, 2, ... and n respectively, the first timing provided by the pipeline control circuit is specifically: the input pulse period is T, the input pulse interval is T / n, and the input order is the sampling data and motor motion control instructions of motor axis No. 1, the sampling data and motor motion control instructions of motor axis No. 2, ... and the sampling data and motor motion control instructions of motor axis No. n; the second timing provided by the pipeline control circuit is specifically: the output pulse period is T, the output pulse interval is T / n, and the output order is the modulation output circuit corresponding to motor axis No. 1 receives the current error adjustment data, the modulation output circuit corresponding to motor axis No. 2 receives the current error adjustment data, ... and the modulation output circuit corresponding to motor axis No. n receives the current error adjustment data.

[0074] The specific process is as follows: when the first pulse arrives, the data acquisition circuit and interface circuit corresponding to motor shaft No. 1 are started, the sampling data and motor motion control instructions of motor shaft No. 1 are input into the motor operation circuit, the motor operation circuit calculates the corresponding current error adjustment data, and then the modulation output circuit corresponding to motor shaft No. 1 is started, the modulation output circuit corresponding to motor shaft No. 1 receives the data and calculates the corresponding PWM modulation signal, and outputs it to motor No. 1; when the second pulse arrives, the data acquisition circuit and interface circuit corresponding to motor shaft No. 2 are started, the sampling data and motor motion control instructions of motor shaft No. 2 are input into the motor operation circuit, the motor operation circuit calculates the corresponding current error adjustment data, and then the 2 is started. The modulation output circuit corresponding to the motor axis No. 1 receives the data and calculates the corresponding PWM modulation signal, and outputs it to the motor No. 2; ... and so on, until the last pulse of a cycle T arrives, the data acquisition circuit and the interface circuit corresponding to the motor axis No. n are started, the sampling data of the motor axis No. n and the motor motion control instruction are input to the motor operation circuit, the motor operation circuit calculates the corresponding current error adjustment data, and then the modulation output circuit corresponding to the motor axis No. n is started, the modulation output circuit corresponding to the motor axis No. n receives the data and calculates the corresponding PWM modulation signal, and outputs it to the motor No. n; the pipeline parallel control of the entire multi-axis motor within one cycle is completed.

[0075] Specifically, all circuits in this embodiment are described using Verilog HDL language. FPGA programmable logic devices can use Cyclone V series FPGA chips such as 5CEFA7F31.

[0076] In another embodiment, based on the multi-axis motor assembly line control system provided in this embodiment, the motor operation circuit includes a position error adjustment loop and a speed error adjustment, and also includes multiple current error adjustment loops, that is, the position error adjustment loop includes a position feedback calculation subcircuit, a position error calculation subcircuit and a position adjustment subcircuit, the speed error adjustment loop includes a speed feedback calculation subcircuit, a speed error calculation subcircuit and a speed adjustment subcircuit, and each current error adjustment loop includes a current feedback calculation subcircuit, a current error calculation subcircuit and a current adjustment subcircuit, such as Figure 7 As shown. Figure 7 In the motor operation circuit in the embodiment, a position error adjustment loop and a speed error adjustment loop adopt the same pipeline control method as the above embodiment, that is, the position error calculation subcircuit accesses the motor motion control instruction according to the first timing provided by the pipeline control circuit, the position feedback calculation subcircuit accesses the position data according to the first timing provided by the pipeline control circuit, and the speed feedback calculation subcircuit accesses the speed data according to the first timing provided by the pipeline control circuit, and all current error adjustment loops are controlled in accordance with the traditional parallel control method (i.e. Figure 1 Each current feedback calculation subcircuit shown in the figure is respectively connected to the current data of the corresponding motor shaft, and then each current regulation subcircuit outputs the current error adjustment data to the modulation output circuit of the corresponding motor shaft). Compared with the traditional parallel control method, this embodiment also reduces the FPGA occupied resources and reduces the chip cost to a certain extent.

[0077] In another embodiment, the motor operation circuit includes a position error adjustment loop, multiple speed error adjustment loops and multiple current error adjustment loops; similarly, the position feedback calculation subcircuit is connected to the position data according to the first timing provided by the pipeline control circuit, and all speed error adjustment loops and all current error adjustment loops are controlled in a traditional parallel manner (i.e. Figure 1 Each speed feedback calculation subcircuit shown in the figure is respectively connected to the speed data of the corresponding motor shaft, each current feedback calculation subcircuit is respectively connected to the current data of the corresponding motor shaft, and then each current regulation subcircuit outputs the current error adjustment data to the modulation output circuit of the corresponding motor shaft); similarly, compared with the traditional parallel control method, this embodiment also reduces the FPGA occupied resources and reduces the chip cost to a certain extent.

[0078] Embodiment 2: Figure 8 As shown, a multi-axis motor assembly line control method based on FPGA is applied to the multi-axis motor assembly line control system based on FPGA of embodiment 1, comprising the following steps:

[0079] S1: Get the sampling data and motor motion control instructions of each motor axis;

[0080] S2: using a pipeline control circuit to provide a first timing sequence, and polling the sampled data of all motor shafts and the motor motion control instructions into the motor operation circuit in a pipeline manner according to the first timing sequence;

[0081] S3: the motor operation circuit calculates error adjustment data for each motor shaft according to the sampling data and the motor motion control instruction input according to the first timing sequence;

[0082] S4: using the pipeline control circuit to provide a second timing sequence, all modulation output circuits poll and receive the error adjustment data of the corresponding motor shaft in a pipeline manner according to the second timing sequence;

[0083] S5: Each of the modulation output circuits receives the error adjustment data of the corresponding motor shaft according to the second timing, calculates the three-phase duty cycle modulation signal of the corresponding motor shaft according to the error adjustment data, and outputs the signal to the corresponding motor.

[0084] This embodiment is based on an FPGA chip. First, the sampling data and motor motion control instructions of the channels where each motor axis is located are obtained. The pipeline control circuit is used to provide the first timing of the signal input each time in the motor operation circuit, that is, the sampling data and motor motion control instructions of all motor axes are polled and input into the motor operation circuit in a pipeline manner according to the first timing; the motor operation circuit can calculate the error adjustment data of the channel corresponding to the signal input each time according to the sampling data and motor motion control instructions input each time; then the pipeline control circuit is used to provide the second timing of the signal output each time in the motor operation circuit, that is, all modulation output circuits receive the error adjustment data of the corresponding motor axis in a pipeline manner according to the second timing; finally, each modulation output circuit calculates the corresponding three-phase duty cycle modulation signal (i.e., PWM modulation signal) according to the corresponding error adjustment data and outputs it to the motor of the corresponding channel, thereby realizing parallel control of multi-axis motors;

[0085] The multi-axis motor control method of this embodiment is based on the pipeline logic (including the first timing and the second timing) provided by the FPGA programmable logic device and the pipeline control circuit. The sampling data and the motor motion control instructions are input in a pipeline manner, and the PWM modulated signal is output in a pipeline manner. No matter how many motor axes there are, only one motor operation circuit is needed. Compared with the traditional multi-axis motor parallel control method, the FPGA occupied resources are reduced exponentially, the chip cost is greatly saved, and the requirements for the FPGA chip are relatively low.

[0086] Preferably, the sampled data includes position data, speed data and phase current data;

[0087] The steps of S1 specifically include:

[0088] The encoder is used to collect the position data and speed data of each motor shaft, and the current sensor is used to collect the phase current data of each motor shaft.

[0089] The encoder is used to collect the position data and speed data of the channel where each motor shaft is located, so that the subsequent motor operation circuit can calculate the position feedback data and position error according to the position data, and calculate the speed feedback data and speed error and other related data according to the speed data. The current sensor is used to collect the input phase current data of the channel where each motor shaft is located, so as to calculate the current error and current error adjustment data and other related data; it is convenient to input it into the motor operation circuit in a pipeline manner according to the first timing provided for calculation, and effectively reduce the FPGA resource occupation on the basis of accurately calculating the current error adjustment data.

[0090] Preferably, if Fig. 9 As shown, the error adjustment data is specifically current error data;

[0091] The steps of S3 specifically include:

[0092] S31: calculating and obtaining position feedback data of the corresponding motor shaft according to the position data input according to the first time sequence;

[0093] S32: calculating the position error of the corresponding motor shaft according to the motor motion control instruction inputted in the first timing sequence and the position feedback data;

[0094] S33: Obtaining position error adjustment data corresponding to the motor shaft according to the position error;

[0095] S34: calculating and obtaining speed feedback data of the corresponding motor shaft according to the speed data input according to the first time sequence;

[0096] S35: Calculate the speed error of the corresponding motor shaft according to the speed feedback data and the position error adjustment data;

[0097] S36: Obtaining speed error adjustment data corresponding to the motor shaft according to the speed error;

[0098] S37: Calculate and obtain current feedback data of the corresponding motor shaft according to the phase current data input according to the first time sequence;

[0099] S38: Calculate the current error of the corresponding motor shaft according to the current feedback data and the speed error adjustment data;

[0100] S39: Obtaining current error adjustment data corresponding to the motor shaft according to the current error.

[0101] Through the above method, the current error adjustment data can be calculated for the signal input according to the first timing, so that the modulation output circuit can periodically poll the output current error adjustment data in a pipeline manner according to the second timing, and then the modulation output circuit can obtain the three-phase duty cycle modulation signal of the corresponding motor shaft, so as to realize parallel control of multi-axis motors in a pipeline manner. No matter how many motor shafts there are, only one motor operation circuit with the above structure is needed to accurately calculate the current error adjustment data of each motor shaft, and then accurately calculate the PWM modulation signal corresponding to each motor shaft to perform precise motor parallel control, which greatly reduces the resources occupied by FPGA.

[0102] Specifically, the motor motion control instructions in this embodiment include position request instructions, system synchronization instructions, control parameter sending instructions, etc.

[0103] Preferably, the first timing includes the input pulse cycle and input sequence of the sampling data and the motor motion control instruction of all channels being polled and input into the motor operation circuit, and the input pulse interval of the sampling data and the motor motion control instruction of every two adjacent channels being polled and input into the motor operation circuit;

[0104] The second timing sequence includes the output pulse period and output sequence of all the modulation output circuits polling and receiving the error adjustment data of the corresponding channels, and the output pulse interval of the modulation output circuits of every two adjacent channels polling and receiving the error adjustment data of the corresponding channels;

[0105] The input pulse period is equal to the output pulse period, the input pulse interval is equal to the output pulse interval, the input sequence is the same as the output sequence, and the input sequence and the output sequence are respectively the same as the sequence of the motor shaft number.

[0106] The sampling data of all channels and the motor motion control instruction polling input into the motor operation circuit are allocated according to the sorting of the motor axis numbers, and the output order of the error adjustment data of the corresponding channels received by all modulation output circuits is allocated according to the sorting of the motor axis numbers, so that the input and output of the pipeline correspond to the motor axis respectively, thereby ensuring that the input signal (i.e., the sampling data and the motor motion control instruction) and the output signal (i.e., the three-phase duty cycle modulation signal or the PWM modulation signal) are from the same motor, and are input and output in sequence in a pipeline manner; the input pulse period is equal to the output pulse period, the input pulse interval is equal to the output pulse interval, the input sequence is the same as the output sequence, and the input sequence and the output sequence are respectively the same as the sorting of the motor axis numbers, and it can also be realized that input first and output first, input later and output later, all motor axes complete one input or output in just one cycle, and the input or output of each axis differs by one clock (i.e., one input pulse interval or one output pulse interval), thereby facilitating the orderly parallel control of multi-axis motors and improving the stability of the entire control system.

[0107] The reader should understand that in the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples" or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples without contradiction.

[0108] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

[0109] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A multi-axis motor assembly line control system based on FPGA, characterized in that: It comprises a motor operation circuit (3), a pipeline control circuit (5), a multi-channel data acquisition circuit (1), a multi-channel interface circuit (2) and a multi-channel modulation output circuit (4) arranged on an FPGA programmable logic device; The data acquisition circuit (1) is used to obtain sampled data of the motor shaft; The interface circuit (2) is used to obtain the motor motion control instruction of the motor shaft; The pipeline control circuit (5) is used to provide a first timing sequence, wherein the first timing sequence is used to control the sampling data of all motor axes and the motor motion control instructions to be polled and input into the motor operation circuit (3) in a pipeline manner; The motor operation circuit (3) is used to calculate the error adjustment data of each motor shaft according to the sampling data and the motor motion control instruction input according to the first timing sequence; The pipeline control circuit (5) is further used to provide a second timing sequence, wherein the second timing sequence is used to control all the modulation output circuits (4) to poll and receive the error adjustment data of the corresponding motor shaft in a pipeline manner; The modulation output circuit (4) is used to receive the error adjustment data of the corresponding motor shaft output by the motor operation circuit (3) according to the second timing sequence, and calculate the three-phase duty ratio modulation signal of the corresponding motor shaft according to the error adjustment data and output it to the corresponding motor; The number of the data acquisition circuits (1), the number of the interface circuits (2) and the number of the modulation output circuits (4) are all the same; The motor operation circuit (3), the pipeline control circuit (5), all the data acquisition circuits (1), all the interface circuits (2) and all the modulation output circuits (4) are respectively electrically connected to the FPGA programmable logic device; all the data acquisition circuits (1), all the interface circuits (2) and all the modulation output circuits (4) are respectively electrically connected to the motor operation circuit (3); all the data acquisition circuits (1), all the interface circuits (2) and all the modulation output circuits (4) are respectively electrically connected to the pipeline control circuit (5); The sampled data includes position data, speed data and phase current data; each data acquisition circuit (1) includes an encoder (11) and a current sensor (12); In any one of the data acquisition circuits (1), the encoder (11) is used to collect position data and speed data, and the current sensor (12) is used to collect phase current data; the encoder (11) and the current sensor (12) are respectively electrically connected to the motor operation circuit (3), the encoder (11) and the current sensor (12) are respectively electrically connected to the pipeline control circuit (5), and the encoder (11) and the current sensor (12) are respectively electrically connected to the FPGA programmable logic device; The error adjustment data is specifically current error data; the motor operation circuit (3) comprises a position feedback calculation subcircuit (31), a position error calculation subcircuit (32), a position adjustment subcircuit (33), a speed feedback calculation subcircuit (34), a speed error calculation subcircuit (35), a speed adjustment subcircuit (36), a current feedback calculation subcircuit (37), a current error calculation subcircuit (38) and a current adjustment subcircuit (39); The position feedback calculation subcircuit (31) is used to calculate the position feedback data corresponding to the motor shaft according to the position data input according to the first time sequence; The position error calculation subcircuit (32) is used to calculate the position error of the corresponding motor shaft according to the motor motion control instruction inputted in the first time sequence and according to the position feedback data; The position adjustment subcircuit (33) is used to obtain position error adjustment data corresponding to the motor shaft according to the position error; The speed feedback calculation subcircuit (34) is used to calculate the speed feedback data of the corresponding motor shaft according to the speed data input according to the first time sequence; The speed error calculation subcircuit (35) is used to calculate the speed error of the corresponding motor shaft according to the speed feedback data and the position error adjustment data; The speed adjustment subcircuit (36) is used to obtain speed error adjustment data corresponding to the motor shaft according to the speed error; The current feedback calculation subcircuit (37) is used to calculate the current feedback data of the corresponding motor shaft according to the phase current data input according to the first time sequence; The current error calculation subcircuit (38) is used to calculate the current error of the corresponding motor shaft according to the current feedback data and the speed error adjustment data; The current regulating subcircuit (39) is used to obtain current error regulating data corresponding to the motor shaft according to the current error; The position error calculation subcircuit (32) is electrically connected to the current regulation subcircuit (39) in sequence through the position regulation subcircuit (33), the speed error calculation subcircuit (35), the speed regulation subcircuit (36) and the current error calculation subcircuit (38); the output ends of all the interface circuits (2) are electrically connected to the position error calculation subcircuit (32), the input ends of all the modulation output circuits (4) are electrically connected to the current regulation subcircuit (39), the output ends of all the encoders (11) are electrically connected to the position error calculation subcircuit (32) through the position feedback calculation subcircuit (31), and the output ends of all the encoders (11) are also electrically connected to the position error calculation subcircuit (32) through the speed regulation subcircuit (36). The speed feedback calculation subcircuit (34) is electrically connected to the speed error calculation subcircuit (35) respectively; the output ends of all the current sensors (12) are electrically connected to the current error calculation subcircuit (38) respectively through the current feedback calculation subcircuit (37); the position feedback calculation subcircuit (31), the position error calculation subcircuit (32), the position adjustment subcircuit (33), the speed feedback calculation subcircuit (34), the speed error calculation subcircuit (35), the speed adjustment subcircuit (36), the current feedback calculation subcircuit (37), the current error calculation subcircuit (38) and the current adjustment subcircuit (39) are electrically connected to the FPGA programmable logic device respectively.

2. The FPGA-based multi-axis motor assembly line control system according to claim 1, characterized in that: In the pipeline control circuit (5), the first timing includes the input pulse cycle and input sequence of the sampling data and the motor motion control instruction of all channels input into the motor operation circuit (3) in a polling manner, and the input pulse interval of the sampling data and the motor motion control instruction of every two adjacent channels input into the motor operation circuit (3) in a polling manner; The second timing sequence includes the output pulse period and output sequence of all the modulation output circuits (4) polling and receiving the error adjustment data of the corresponding channels, and the output pulse interval of the modulation output circuits (4) of every two adjacent channels polling and receiving the error adjustment data of the corresponding channels; The input pulse period is equal to the output pulse period, the input pulse interval is equal to the output pulse interval, the input sequence is the same as the output sequence, and the input sequence and the output sequence are respectively the same as the sequence of the motor shaft number.

3. A multi-axis motor assembly line control method based on FPGA, characterized in that: Applied to the FPGA-based multi-axis motor assembly line control system as claimed in any one of claims 1 to 2, comprising the following steps: Get the sampling data and motor motion control instructions of each motor axis; Using a pipeline control circuit to provide a first timing sequence, and polling the sampled data of all motor shafts and the motor motion control instructions into the motor operation circuit in a pipeline manner according to the first timing sequence; The motor operation circuit calculates error adjustment data for each motor shaft according to the sampling data and the motor motion control instruction input according to the first timing sequence; The pipeline control circuit provides a second timing sequence, and all modulation output circuits poll and receive the error adjustment data of the corresponding motor shaft output by the motor operation circuit in a pipeline manner according to the second timing sequence; Each of the modulation output circuits receives the error adjustment data of the corresponding motor shaft according to the second timing sequence, calculates the three-phase duty ratio modulation signal of the corresponding motor shaft according to the error adjustment data, and outputs the three-phase duty ratio modulation signal to the corresponding motor; The sampled data includes position data, speed data and phase current data; The steps of obtaining the sampling data and motor motion control instructions of each motor axis include: The encoder is used to collect the position data and speed data of each motor shaft, and the current sensor is used to collect the phase current data of each motor shaft; The error adjustment data is specifically current error data; The step of the motor operation circuit calculating the error adjustment data of each motor shaft according to the sampling data and the motor motion control instruction input according to the first timing sequence specifically includes: Calculating and obtaining position feedback data of the corresponding motor shaft according to the position data input according to the first time sequence; According to the motor motion control instruction inputted in the first timing sequence and based on the position feedback data, the position error of the corresponding motor shaft is calculated; Obtaining position error adjustment data corresponding to the motor shaft according to the position error; Calculating the speed feedback data of the corresponding motor shaft according to the speed data input according to the first time sequence; According to the speed feedback data and the position error adjustment data, the speed error of the corresponding motor shaft is calculated; Obtain speed error adjustment data corresponding to the motor shaft according to the speed error; Calculating and obtaining current feedback data of the corresponding motor shaft according to the phase current data input according to the first time sequence; According to the current feedback data and the speed error adjustment data, the current error of the corresponding motor shaft is calculated; The current error adjustment data of the corresponding motor shaft is obtained according to the current error.

4. The FPGA-based multi-axis motor assembly line control method according to claim 3, characterized in that: The first timing includes the input pulse cycle and input sequence of the sampling data and the motor motion control instruction of all channels input into the motor operation circuit in a polling manner, and the input pulse interval of the sampling data and the motor motion control instruction of every two adjacent channels input into the motor operation circuit in a polling manner; The second timing sequence includes the output pulse period and output sequence of all the modulation output circuits polling and receiving the error adjustment data of the corresponding channels, and the output pulse interval of the modulation output circuits of every two adjacent channels polling and receiving the error adjustment data of the corresponding channels; The input pulse period is equal to the output pulse period, the input pulse interval is equal to the output pulse interval, the input sequence is the same as the output sequence, and the input sequence and the output sequence are respectively the same as the sequence of the motor shaft number.

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