Circuit board

Abstract

The circuit board has a glass core (42) with through holes (43) formed therein. By forming conductor patterns (46) on the inner circumference of the through holes (43) and the surface of the glass core (42), circuit elements including solenoid coil elements and capacitor elements are constituted. Thus, it is possible to cope with high-capacity communication of thin mobile communication devices such as smartphones, and a low-cost and compact circuit board can be provided. The circuit board can be electrically connected to at least one electronic component among a switch, an amplifier, and a filter via one terminal, and can be electrically connected to a mother board via another terminal. Therefore, functional integration can be achieved, and it is suitable for thin mobile communication devices such as smartphones.

Description

Technical Field

[0001] The present invention relates to a circuit board. Background Art

[0002] In recent years, the shipment volume of smartphones has been stable. However, against the backdrop of the expansion of animation distribution services, the volume of communication data has increased, and this trend is expected to continue in the future. To cope with the increasing communication volume, new high-speed cellular communication technologies such as High Band (2.3 - 6.0 GHz), TDD (Time Division Duplex), CA (Carrier Aggregation), and MIMO (Multi Input Multi Output) are being popularized, and the number of RF (Radio Frequency) filters used in one smartphone is increasing.

[0003] The transceiver duplex modes of cellular communication are TDD and FDD (Frequency Division Duplex). TDD duplexes a communication frequency band in a time-division manner, and FDD uses an adjacent set of communication frequency bands (the transmission frequency band is called UL: UpLink, and the reception frequency band is called DL: Down Link) for duplexing.

[0004] Compared with FDD that duplexes radio waves symmetrically during transmission and reception, TDD can perform asymmetric duplexing, so it has a theoretical advantage in radio wave utilization efficiency. In addition, compared with FDD that uses two frequency bands, the circuit structure of TDD implemented by one frequency band has also become simpler.

[0005] Thus, although TDD has theoretical advantages, at the beginning of the digital cellular communication service, the synchronization accuracy between terminals / base stations was low, and a long blank period needed to be set between transmission and reception, so FDD, which also has an advantage in radio wave utilization efficiency, was popularized. In response to this situation, in recent years, the progress of base station / terminal synchronization technology has shortened the blank period of TDD, and is accelerating the popularization of TDD. The progress of synchronization technology has also driven high-speed communication based on broadband. The FDD bandwidth at the beginning of the service was less than or equal to 20 MHz, but the current TDD bandwidth is utilized by a broadband of 200 MHz.

[0006] In current cellular communication, a frequency band of 460 MHz to 6 GHz is allocated as the communication frequency band.

[0007] Since the transmission characteristics of radio waves (attenuation, avoiding obstacles, etc.) are more excellent at lower frequencies, the use of frequency bands has been popularized starting from less than or equal to 1 GHz. However, with the expansion of communication volume, the utilization of frequency bands less than or equal to 1 GHz has been overcrowded early on, and the current overcrowding has progressed to 2 GHz.

[0008] Against this background, it is considered that broadband TDD in the unused frequency band, i.e., the remaining 2.3 - 6.0 GHz band, will become popular in the future.

[0009] The communication frequency bands used by each carrier in each country are specified by 3GPP (Third Generation Partnership Project), and band numbers are assigned to each communication frequency band.

[0010] The communication frequency band of Band 12 is specified as the FDD mode, UL 699 - 716 MHz, DL 729 - 746 MHz, using a narrow frequency band with a width of 17 MHz at an interval of nearly 13 MHz. The communication frequency band is isolated from external radio waves that become noise by a band - pass filter (hereinafter sometimes simply referred to as BPF or frequency filter). An AW (Acoustic Wave) with a sharpened band - pass characteristic is used for the frequency filter that isolates adjacent narrow frequency bands such as Band 12.

[0011] AW filters include SAW (Surface Acoustic Wave) filters and BAW (Bulk Acoustic Wave) filters. A SAW filter is a filter that forms comb - shaped opposing electrodes on a piezoelectric body and utilizes the resonance of surface elastic waves. BAW filters include FBAR type (film bulk acoustic resonator) and SMR type (solid mounted resonator). FBAR is a filter that uses the resonance of elastic waves by setting a cavity under a piezoelectric thin film. SMR is a filter that reflects elastic waves and utilizes resonance by setting an acoustic multilayer film (mirror layer) under a piezoelectric film instead of a cavity. FBAR is superior to SMR in terms of the steepness of filter characteristics and allowable insertion power and has become the mainstream of current BAW. FBAR is more expensive than SAW because the above - mentioned cavity is formed by advanced MEMS technology.

[0012] Compared with SAW filters, BAW filters have excellent high - frequency characteristics in terms of allowable insertion power, etc., and are differentiated in terms of operating frequencies as follows.

[0013] Low Band (~1.0 GHz): SAW filter

[0014] Middle Band (1.0 - 2.3 GHz): SAW filter or BAW filter

[0015] High Band (2.3 GHz~): BAW filter

[0016] In order to handle different regions and carriers with a single model, high-end smartphones used in various countries around the world are equipped with an RF (Radio Frequency) circuit that can switch between multiple communication frequency bands (10 - 20). Therefore, in high-end smartphones, signal interference is likely to occur due to the complexity of the circuit board wiring. To avoid this problem, in high-end smartphones, frequency filters, amplifiers, and high-speed switches are integrated and modularized for each frequency band and communication method to optimize the circuit.

[0017] In addition, in a smartphone, since a circuit board and a display element are stacked and installed in a housing with a thickness of about 6 mm, the thickness of the module needs to be controlled within about 0.6 - 0.9 mm.

[0018] Similar to the AW filter, an LC filter composed of a solenoid coil-based reactor and a capacitor can also be used as a frequency filter. However, since its threshold characteristics are wider than those of the AW filter, it is difficult to be flexibly used in FDD that simultaneously uses adjacent frequency bands. However, in TDD that operates in a continuous single frequency band, the LC filter can be used as a frequency filter.

[0019] In addition, the LC filter has advantages compared to the AW filter in terms of the allowable insertion power, wide communication frequency band (broadband), temperature drift, etc. required for future popular High Band (3.5 - 6.0 GHz) TDD frequency filters. However, since the chip LC filter manufactured by the existing LTCC (Low Temperature Co-fired Ceramics) technology is larger in size than the AW filter, especially in terms of thickness, it is difficult to be incorporated into the thin module of a high-end smartphone.

[0020] Similarly, a future popular high-speed communication technology is CA (Carrier Aggregation). CA is a technology that enables high-speed communication by simultaneously using multiple communication frequency bands.

[0021] Therefore, the frequency filter for CA must isolate each communication wave from the mutual communication waves used simultaneously. That is, the noise intensity that must be suppressed is much larger than that of the existing external radio waves. Therefore, circuit optimization based on integration and modularization for each CA becomes important.

[0022] Among the multiple communication frequency bands simultaneously used in CA, there is also the 2.3 - 6.0 GHz band TDD. However, in order to cope with future high-speed communication technologies, there is a problem of how to install the LC filter in the thin module of a smartphone. In contrast, Patent Document 1 discloses a technology that realizes a more compact circuit structure by incorporating a coil in a circuit board.

[0023] Patent Document 1: Japanese Patent Laid-Open No. 2005-268447

[0024] Patent Document 2: U.S. Patent No. 9401353

[0025] Patent Document 3: U.S. Patent No. 9425761 SUMMARY OF THE INVENTION

[0026] In Patent Document 1, a multi-layer circuit board with an embedded coil is disclosed. In the wiring pattern layer, at least two or more layers of coil patterns that form part of the coil are formed. At a specified position of the electrical insulating substrate sandwiched by the coil patterns, through-holes that connect between the respective ends of the coil patterns are provided, and conductive paste is filled in the through-holes to electrically connect between the respective ends.

[0027] Here, the above-mentioned electrical insulating substrate is a so-called glass epoxy substrate or the like. Since through-holes are formed by mechanical processing such as drilling, the ends of the glass fibers are exposed on the inner periphery of the through-holes, and thus the inner peripheral surface becomes uneven. In addition, the surface of the glass epoxy substrate is also a rough surface that is inherently uneven. Therefore, even if the coil pattern is successfully formed as described above, due to local variations in the width and diameter of its wiring, there are problems such as poor or fluctuating electrical characteristics of the coil.

[0028] In addition, attempts have been made to embed a coil in a silicon substrate. For example, Patent Document 2 discloses a silicon interposer with passive components embedded therein, but the passive components embedded are trench capacitors, diodes, and electrical taps. Since silicon is a semiconductor and conductor wiring is required, an insulating film needs to be formed, which poses problems in terms of both cost and performance in LC filter applications.

[0029] In addition, Patent Document 3 discloses an LC frequency filter composed of a 3D-structured reactor formed by providing through-conductors on a glass substrate and a capacitor formed on the surface of the glass substrate. However, the LC frequency filter of Patent Document 3 does not have an interposer function.

[0030] An integrated module of an RF circuit mounts a frequency filter, an amplifier, and a high-speed switch on a resin substrate that constitutes an interposer. In existing thin mobile communication devices with existing communication standards, for the frequency filter, a center frequency of 0.8 to 3.5 GHz, a passband width of 30 to 120 MHz, and sharp suppression are required. Therefore, filters using physical resonances such as Surface Acoustic Wave (SAW) and Balk Acoustic Wave (BAW) are used. On the other hand, it is difficult for an LC filter using electrical resonance to perform such sharp suppression, and thus there has been a situation where it has not been used in the past.

[0031] In contrast, the 5G communication standard requires a wider bandwidth, such as a center frequency of 3.7 GHz: a passband bandwidth of 600 MHz, and a center frequency of 4.5 GHz: a passband bandwidth of 500 MHz, which eases the demand for sharp suppression. In addition, the increase in insertion loss (heat generation) associated with higher frequencies has become a problem in the 5G communication standard.

[0032] In order to achieve a wide passband width in AW filters, components need to be connected in parallel, which increases the number of parts. In addition, since physical resonance is used, the insertion loss associated with high frequencies becomes severe. On the other hand, LC filters that use electrical resonance can achieve a wide passband width with a single component, and since electrical resonance is used, the insertion loss associated with high frequencies is also smaller.

[0033] However, since it is difficult to reduce the thickness of a Low Temperature Co-fired Ceramics (LTCC) type filter, which is a common small LC filter, it is difficult to mount it on a thin module interposer substrate.

[0034] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a low-cost and compact circuit board capable of handling large-capacity communications of, for example, the next generation of thin mobile communication devices.

[0035] In order to solve the above-mentioned problems, the circuit substrate of the present invention is a circuit substrate having a glass plate provided with a through hole and a plurality of circuit elements, characterized in that it has a circuit formed by a conductive member arranged on the inner periphery of the through hole and the surface of the glass plate, another laminated circuit with resin as an insulating material is arranged on at least one surface of the glass plate, the circuit on the surface of the glass plate is electrically connected to the laminated circuit, one of the circuit elements is a solenoid coil element arranged in a coil shape along the inner periphery of the through hole and the surface of the glass plate, and one of the circuit elements is a capacitor element including a lower electrode, a dielectric layer and an upper electrode, the lower electrode being composed of The circuit structure configured on the surface of the glass plate is composed of the stacked circuit, the dielectric layer is formed on the lower electrode, the upper electrode is formed on the dielectric layer, at least one LC frequency filter is formed by the solenoid coil element and the capacitor element, a first terminal is formed on one surface of the circuit substrate, and a second terminal is formed on the other surface of the circuit substrate, the circuit or the stacked circuit on one surface of the glass plate can be electrically connected to at least one electronic component via the first terminal, and the circuit or the stacked circuit on the other surface of the glass plate can be electrically connected to other circuit substrates via the second terminal.

[0036] Effects of the Invention

[0037] According to the present invention, it is possible to provide a circuit board that can handle large-capacity communication, is low-cost and compact, for example, for next-generation thin mobile communication devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1A is a block diagram of a circuit board incorporating circuit elements according to the present invention.

[0039] Figure 1B is a block diagram of a circuit board incorporating circuit elements according to the present invention.

[0040] Figure 2 is a cross-sectional view of a capacitor included in an embodiment of the present invention.

[0041] Figure 3 is a perspective view of an inductor included in an embodiment of the present invention.

[0042] Figure 4A is a circuit diagram of a band-pass filter included in an embodiment of the present invention.

[0043] Figure 4B is a diagram showing an example of the frequency characteristics of the band-pass filter.

[0044] Figure 5A is a cross-sectional view of a circuit board having a band-pass filter included in an embodiment of the present invention.

[0045] Figure 5B is a top view of a circuit board having an LC frequency filter.

[0046] Figure 6A is a diagram showing the manufacturing process of the circuit board according to an embodiment of the present invention.

[0047] Figure 6B is a diagram showing the manufacturing process of the circuit board according to an embodiment of the present invention.

[0048] Figure 6C is a diagram showing the manufacturing process of the circuit board according to an embodiment of the present invention.

[0049] Figure 6D is a diagram showing the manufacturing process of the circuit board according to an embodiment of the present invention.

[0050] Figure 7A is a diagram showing the manufacturing process of the circuit board according to an embodiment of the present invention.

[0051] Figure 7B is a diagram showing the manufacturing process of the circuit board according to an embodiment of the present invention.

[0052] Figure 7CIt is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0053] Figure 8A It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0054] Figure 8B It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0055] Figure 8C It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0056] Figure 9A It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0057] Figure 9B It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0058] Figure 10A It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0059] Figure 10B It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0060] Figure 10C It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0061] Figure 11A It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0062] Figure 11B It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0063] Figure 12A It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0064] Figure 12B It is a diagram showing the manufacturing process of the circuit board related to the embodiment of the present invention.

[0065] Figure 13 It is a diagram showing the process of mounting electronic components on the circuit board and mounting it on the motherboard.

[0066] Figure 14 It is a diagram showing the process of mounting electronic components on the circuit board and mounting it on the motherboard.

[0067] Figure 15This is a diagram showing the process of mounting electronic components on a circuit board and then mounting the board on a motherboard.

[0068] Figure 16 This is a diagram showing the process of mounting electronic components on a circuit board and then mounting the board on a motherboard.

[0069] Figure 17 This is a schematic view of the circuit board as seen from the bottom surface side. Detailed implementation mode

[0070] <Embodiment>

[0071] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, in this specification, "up" refers to the direction away from the glass substrate, and "down" refers to the direction close to the glass substrate. In addition, "circuit element" refers to passive elements such as resistors, capacitors, and inductors, and preferably refers to elements that are structural elements of an LC circuit. Preferably, the circuit element is a component of an LC filter, and the LC filter constitutes a band-pass filter used in multi-band communication and in TDD with a frequency band of at least 2 GHz or more. The LC filter can also be configured as a wave division filter such as a low-pass filter, a high-pass filter, a diplexer, or a notch filter that removes noise in a specific frequency band.

[0072] "LC filter" is also called an LC frequency filter, which refers to a circuit that combines an inductor (L) and a capacitor (C) to cut off or pass a specific frequency band, and is a circuit having the functions of a band-pass filter, a low-pass filter, a high-pass filter, and a diplexer. In particular, the LC frequency filter used in this embodiment is preferably used in time-division duplex transceiver communication in a frequency band of 2 GHz or more in mobile body communication, and is preferably a band-pass filter having a passband of 50 MHz or more.

[0073] First, refer to Figure 1A to explain the overall structure and function of the transceiver circuit using the circuit board according to this embodiment. Figure 1A The shown transceiver circuit can be applied to next-generation smartphones. Next-generation smartphones are smartphones that use a cellular RF circuit corresponding to the CA method for simultaneous multi-band communication and high-speed communication, and have a band-pass filter, a switch, and an amplifier used as a frequency filter in each communication frequency band, and optionally have a circuit board that integrates any RF components such as a high-pass filter, a low-pass filter, and a diplexer.

[0074] At reception, the RF circuit 215 controlled by the transceiver LSI 202 extracts the communication wave from the radio wave received by the antenna 214. The baseband processor 210 extracts the baseband signal from the communication wave and reconstructs the data packet. The application processor 211 constructs the service required by the user based on the received data packet. In contrast, transmission proceeds along the reverse path.

[0075] The operation of the RF circuit 215 in the CA mode will be described in more detail.

[0076] The radio wave received by the antenna 214 is split by the duplexer 213 into a higher-frequency band and a lower-frequency band (Low Band) with 1000 MHz as the boundary. The higher-frequency band is further split by the duplexer 212 into a middle-frequency band (Middle Band) and a high-frequency band (High Band) with 2300 MHz as the boundary. The low band contains the communication wave of band 8FDD, the middle band contains the communication waves of bands 1FDD and 3FDD, and the high band contains the communication waves of bands 41TDD and 42TDD. In this way, before extracting the communication wave of each band through the frequency filter, the band is separated using the diplexer filter, which is an effective means for suppressing inter-band interference in the CA mode where multiple bands are used simultaneously.

[0077] When different frequency filters (203 and 204, 205 and 206) exist on the same circuit without separation in the diplexer filter, it is also effective to add adjustment LC elements for each filter that needs to suppress interference. The adjustment LC elements can be effectively used as needed even between the filters separated by the diplexer filter. By incorporating such interference suppression LC elements into the module circuit board, a highly functional and compact circuit board can also be effectively realized.

[0078] A set of band-pass filters 205 to 206 for FDD transceiver use is called a duplexer. In TDD, a switch 208 is used for one band-pass filter 203, 204 to be used for transmission and reception in a time-division manner. At transmission, in both FDD and TDD, the communication wave is amplified by the amplifier 209 before passing through the frequency filter.

[0079] The CA unit module 1 includes two duplexers, two band-pass filters, two switches, three diplexers, and five amplifiers. According to this embodiment, the two duplexers and two band-pass filters are formed as LC filters within the module circuit board, and at least a part of the solenoid coil element of the LC filter is disposed within the circuit board, thereby enabling thinning. RF components other than the LC filter can be mounted on the module circuit board, and by mounting them on the LC filter, the module area can be reduced. Thus, a highly functional and compact circuit board can be achieved.

[0080] Figure 1A The RF circuit 215 has one CA unit module 201, but in the case of a smartphone corresponding to multiple communication carriers, multiple CA unit modules corresponding to different CAs can also be mounted.

[0081] In this embodiment, as Figure 1B shown, it can also be set to an existing type modularization in which frequency filters, amplifiers, and switches are concentrated for each frequency band and communication method, and used as a high-frequency band TDD module. In Figure 1B , the high-pass filter 302 and the TDD band-pass filters 303 and 304 can be formed as LC filters within the module circuit board. In Figure 1B , the same reference numerals are assigned to common components, and repeated descriptions are omitted.

[0082] Preferably, the circuit elements according to this embodiment are components of the LC filter that constitutes the band-pass filter used in TDD. In addition, the circuit elements according to this embodiment are preferably components of the LC filter that constitutes duplexers, high-pass filters, low-pass filters, and other demultiplexing filters. And the circuit elements according to this embodiment are preferably solenoid coil elements for an adjustment circuit that suppresses interference between the band-pass filters.

[0083] Next, taking a substrate in which wiring layers and insulating resin layers are alternately formed on both sides of a glass plate as a core material as an example, examples of capacitors and inductors as circuit elements constituting the LC circuit will be described respectively.

[0084] Regarding the capacitor, it is configured to sandwich a dielectric between two conductor plates. As an example of the capacitor, as Figure 2 shown, a conductor pattern is formed by laminating a lower electrode 12 directly above an unillustrated glass substrate or on an insulating resin layer 11 formed on the glass substrate. A dielectric layer 13 is laminated on the conductor pattern, and then a conductor serving as an upper electrode 14 is laminated on the dielectric layer 13. The lower electrode 12 and the upper electrode 14 usually have a multilayer structure composed of a seed layer and a conductive layer.

[0085] Regarding an inductor, the same performance as that of a spiral coil can be incorporated into a glass substrate having a through-hole. In Figure 3 a parallel-plate glass plate having through-holes arranged in two columns is made transparent and illustrated. In Figure 3 on the front and back surfaces of the glass plate, wirings 21 and 22 are formed so as to connect the openings of adjacent through-holes to each other. In addition, a conductor layer is formed on the inner wall of the through-hole 23 that connects the front and back surfaces of the glass plate, and is designated as TGV.

[0086] Here, the nth conductor layer TGV in the first column is designated as TGV(1, n), and the nth conductor layer TGV in the second column is designated as TGV(2, n). If the conductor layer TGV(1, n) is connected to the conductor layer TGV(2, n) through the wiring 22 on the back side, and the conductor layer TGV(1, n) is connected to the conductor layer TGV(2, n + 1) through the wiring 21 on the front side, an open circuit in which the conductor winds around once (one turn) inside and on the surface of the glass plate can be formed through the wiring 22, the conductor layer TGV(1, n), the wiring 21, and the conductor layer TGV(1, n + 1). By passing a current through this circuit formed in a coil shape, it can function as an inductor. The characteristics of the inductor can be adjusted by changing the number of turns.

[0087] Next, a band-pass filter (BPF), that is, an LC frequency filter, formed of an LC circuit inside a substrate will be described. The basic circuit diagram of the BPF is as shown in Figure 4A Moreover, by appropriately setting the capacitance of the capacitor (hereinafter referred to as capacitance) and the inductance coefficient of the inductor (hereinafter referred to as inductance) in the circuit, a band-pass effect can be found in which only the frequencies in a desired frequency band pass through and the other frequencies are cut off.

[0088] Figure 4B is a characteristic diagram of the Figure 4A band-pass filter. In Figure 4B the horizontal axis represents frequency and the vertical axis represents insertion loss. According to Figure 4B it can be clarified that in this band-pass filter, the sharp suppression is alleviated.

[0089] Figure 5A is a diagram showing that Figure 4ASchematic diagram of the states of capacitors and inductors shown in the circuit diagram. In the figure, C1 to C3 represent capacitors, and L1 to L3 represent inductors. Capacitors C1 to C3 are formed by disposing a lower electrode 33 as a conductive member on the upper surface of the glass core 31 and disposing an upper electrode 34 with a dielectric layer 35 interposed therebetween. As a whole, capacitors C1 to C3 are embedded in the insulating resin layer 32 above the upper surface of the glass core 31. When it is desired to connect to an electrode outside the circuit board, via holes are made in the insulating resin layer 32, and connection can be made via a conductor inside thereof. In addition, although not shown, the lower electrode 33 may be a conductive portion of a stacked circuit formed on one surface of the glass core 31 and insulated by a resin layer.

[0090] Inductors L1 to L3 can connect the conductor layer TGV in the glass core 31 to the wirings on the front and back surfaces of the glass core 31 (refer to Figure 5A ) to fabricate solenoid coils. The main bodies of inductors L1 to L3 are embedded in the glass core 31 and the insulating resin layer 32 on its front and back surfaces. Similar to the conduction with the electrodes on the outermost layer of the circuit board and capacitors C1 to C3, it can be performed via via holes in the insulating resin layer 32.

[0091] The first LC frequency filter is formed using capacitor C1 and inductor L1, the second LC frequency filter having characteristics different from those of the first LC frequency filter is formed using capacitor C2 and inductor L2, and the third LC frequency filter having characteristics different from those of the first LC frequency filter and the second LC frequency filter is formed using capacitor C3 and inductor L3. Thus, a plurality of LC frequency filters having different characteristics can be incorporated in one circuit board. For example, when used in a thin mobile communication device corresponding to the 5G communication standard, etc., communication in a plurality of frequency bands can be optimized as one module.

[0092] In the 5G communication standard, Carrier Aggregation (CA), a high-speed data communication technology that simultaneously uses multiple frequency bands, has become widespread. This technology is, for example, a technology for performing high-speed communication while simultaneously using three frequency bands of 900 MHz, 2.5 GHz, and 3.7 GHz. The function of existing frequency filters is that in CA where interference from communication frequency bands of external noise is suppressed, it is necessary to suppress interference between its own communication frequency bands, and suppressing noise has become an even more important issue. As a countermeasure, it is necessary to configure an integrated module in units of CA to optimize the circuit and suppress external noise. According to the present embodiment, since the LC filter structure within the module is realized, in addition to the effect of reducing the mounting area, functional integration can also be achieved.

[0093] Figure 5BIt is a top view of a part of a circuit board. A capacitor C is formed by connecting multiple low-capacitance capacitor elements CE along a conductive pattern UPT formed on the upper surface. Additionally, the conductive pattern UPT is connected to a conductive pattern LPT (illustrated by a dashed line) formed on the lower surface of the circuit board via a conductor layer (conductive component) TGV in a via hole, forming a coil-shaped inductor L. Here, the conductive patterns UPT, LPT, and the conductor layer TGV constitute a circuit.

[0094] (Substrate manufacturing process)

[0095] Next, use Figures 6A to 12B to show an example of the circuit board manufacturing process using a glass substrate.

[0096] First, for circuit design, using simulation software, calculate the necessary capacitance and inductance corresponding to the frequency band of the passing or blocking radio wave. For example, for a frequency band greater than or equal to 3400 MHz and less than or equal to 3600 MHz, the specifications of the components for achieving the desired characteristics in the circuit structure shown in Figure 4A are shown in Tables 1 and 2. Here, for inductors L1 and L3, since the inductance is very small, it is not necessary to form a coil shape, and the self-inductance of a single wire is sufficient, so the dimensions of this wire are shown in the table.

[0097] [Table 1]

[0098] C1 C2 C3 Capacitor 5.37 pF 53.59 fF 35.07 pF Dielectric SiN SiN SiN Relative dielectric constant 6.3 6.3 6.3 Dielectric thickness 200 nm 200 nm 200 nm Length of one side 138.7 μm 13.9 μm 354.5 μm

[0099] [Table 2]

[0100]

[0101]

[0102] For the BPF for the frequency band greater than or equal to 2499 MHz and less than or equal to 2690 MHz, through the same steps, calculate the capacitance and inductance and perform the necessary circuit design (numerical values are omitted).

[0103] Based on the above circuit design, manufacture the necessary circuit board. First, as shown in Figure 6A , prepare a low-expansion glass core 42 (thickness 300 μm, CTE: 3.5 ppm / K), and then as shown in Figure 6BAs shown, a through-hole 43 with an opening diameter of 80 μm to 100 μm is formed in the glass core 42. When forming, as the first stage, the position where the through-hole 43 is desired to be formed is pulse-irradiated with UV laser, and a fragile part is made in the irradiated glass. As the second stage, the entire glass plate is etched with an aqueous hydrofluoric acid solution. Thus, the fragile part is selectively etched, and a high-precision through-hole 43 is formed rapidly. Compared with the case of using a glass epoxy substrate, a through-hole 43 with a higher-precision inner diameter and an inner peripheral surface without unevenness can be formed.

[0104] Next, as Figure 6C shown, as an adhering layer 44 under the wiring layer and on the inner wall of the through-hole 43 of the glass core 42, a two-layer film of a Ti film and a Cu film is sequentially formed on the entire surface of the glass core 42 by sputtering to conductify the glass surface. As the film thickness, the Ti film is set to 50 nm and the Cu film is set to 300 nm.

[0105] Next, as Figure 6D shown, in order to supplement the thin part of the sputtered film on the inner wall of the through-hole 43, electroless nickel plating 45 is performed. The entire surface, back surface, and inside of the through-hole 43 of the glass core 42 are processed, and the plating thickness is set to 0.2 μm. As Figure 7A shown, the seed layer 45' is formed by the adhering layer 44 and the nickel plating layer 45.

[0106] Although not shown, next, in order to use the seed layer 45', conductor patterns 46 such as wiring of an inductor, a lower electrode of a capacitor, and pads for external connection are formed by a semi-additive method, and a dry film resist, trade name RY-3525 (thickness 25 μm) manufactured by, for example, "Hitachi Chemical Co., Ltd." is laminated on both sides of the glass core 42. The formation of the resist layer can also be the application of a liquid resist. Then, by photolithography, the resist layer is exposed through a mask for forming a conductor pattern, that is, a wiring pattern, and a wiring pattern (opening) is formed in the resist layer by development.

[0107] Next, copper is deposited in the above opening by electroplating copper to form a conductor pattern 46 as a conductive component with a thickness of 15 μm. At this stage, the copper plating is also deposited on the inner wall of the through-hole 43 of the glass core 42. Next, the dry film resist is peeled off. At this stage, as Figure 7A shown, on the surface and back surface of the glass core 42, there are portions covered by the seed layer 45' composed of Ti / Cu / Ni and portions further laminated with Cu conductor patterns 46 thereon. In Figure 7A the process, a lower electrode of a capacitor is formed at a specified position of the conductor pattern 46. Alternatively, a part of the conductor pattern 46 can also be used as a lower electrode of a capacitor.

[0108] Next, asFigure 7B As shown, first, on the entire surface of the glass core 42 on the side where the capacitor is to be formed, a SiN film is formed by CVD film formation method with a thickness of 200 nm to 400 nm to form the dielectric layer 47 of the capacitor. And, as Figure 7C shown, as the seed layer 48 when forming the upper electrode of the capacitor, a Ti film and a Cu film with thicknesses of 50 nm and 300 nm respectively are sequentially formed on the entire dielectric layer 47 by sputtering film formation method.

[0109] Next, as Figure 8A shown, in order to form the upper electrode of the capacitor, by photolithography, a state is achieved where only the part for forming the upper electrode is exposed from the dry film resist. Next, as Figure 8B shown, the upper electrode 49 is formed by electrolytic copper plating with a thickness of 9 - 10 μm. After that, as Figure 8C shown, the dry film resist is removed. At this time point, in addition to the capacitor, a SiN layer etc. are also laminated.

[0110] Therefore, as Figure 9A shown, in order to remove the excess adhering layer, plating seed layer, etc., first, by photolithography, only the area above the upper electrode 49 of the capacitor is protected using the dry film resist 50.

[0111] Next, in order to remove the excess part in the sputtered copper layer when forming the upper electrode 49 of the capacitor, the substrate is processed by wet etching method, and in order to remove the excess Ti layer and SiN layer, the substrate is processed by dry etching method.

[0112] More specifically, first, the sputtered Cu layer located at the uppermost part of the excess part is removed by the etching solution. Next, the sputtered Ti layer and the SiN layer formed by CVD film formation below it are removed by dry etching. After that, the dry film resist 50 protecting the upper electrode 49 of the capacitor is peeled off. As Figure 9B shown, at this time point, the seed layer 45' directly above the glass core 42 still remains.

[0113] Next, as Figure 10A shown, in order to remove the seed layer of the lower electrode of the capacitor and other conductive layers formed on the surface of the glass core 42, it is processed by wet etching method in the order of Ni and Cu. At the same time, the sputtered Cu layer below it is also removed. On the other hand, the Cu layer on which wirings, capacitor electrodes, etc. are formed will dissolve in the etching solution to some extent, but since its thickness is relatively large, it will not be completely removed. After that, the sputtered Ti layer is removed by etching. If it ends here, the glass core 42 is exposed in the part without wirings, electrodes, etc. As a result of the above processing, a capacitor 101 is formed on the surface of the glass core 42, and in addition, an inductor 102 is formed (refer to Figure 11BA part of the continuous wiring HN is also formed and connected to the conductor layer TGV. In the surface area AR of the glass core 42 where neither the capacitor 101 nor the wiring HN exists, the adherend layer and the seed layer are removed and exposed to the outside.

[0114] Next, as Figure 10B shown, an insulating resin (trade name "ABF-GX-T31R" manufactured by Ajinomoto Fine-Techno Co., Inc.) is pasted on both sides of the glass core 42 to form an insulating resin layer (resin build-up layer) 51. The processing is carried out by a vacuum pressure laminating device to encapsulate the insulating resin without voids inside the through-hole 43 of the glass core 42. The thickness of the insulating resin layer 51 is about 35 μm, and it reliably fills up to the upper electrode 49 of the capacitor. Thus, the stacked circuit including the capacitor is covered with the insulating resin layer 51.

[0115] And, by laser processing, the insulating resin layer 51 is penetrated at the position where conduction is desired, and as Figure 10C shown, a hole (via hole) 52 reaching the wiring layer of the glass core is formed. The diameter of the hole 52 is preferably about 60 μm.

[0116] Although not shown, the surface and the back surface of the insulating resin layer 51 of the glass core 42 are treated with an alkaline surface roughening solution to adjust the arithmetic surface roughness Ra to 60 nm. This is to improve the adhesion force of the seed layer in the next process.

[0117] Next, as Figure 11A shown, electroless copper plating is performed on the surface and the back surface of the insulating resin layer 51 of the glass core 42 to form a conductive seed layer 53. Its thickness is preferably 0.6 μm. By this treatment, the conductive seed layer 53 is formed not only on the surface and the back surface but also on the inner wall of the via hole 52 formed by laser processing before.

[0118] Next, although not shown, dry film resist is pasted on both sides of the substrate, and openings are provided in the portions where the wiring 54 is desired to be provided by photolithography. Next, as Figure 11B shown, electroplating is performed on the substrate to form the wiring 54 with a thickness of 15 μm. In addition, in this electroplating process, the inside of the via hole 52 in the insulating resin layer 51 is also filled with copper, and conduction between the surface of the glass core 42 and the conductor layer is also achieved.

[0119] Thereafter, the unnecessary conductive seed layer is removed by etching. Through the above processing, the basic circuit board 41 including the built-in components for the LC circuit is completed. If the total thickness of the circuit board 41 is less than or equal to 0.5 mm, it is suitable for use in thin mobile communication devices and the like. In addition, in the figure, regarding the combined wiring on the lower side of the glass core 42, it is shown as if there is a copper layer assuming that it is grounded for the capacitors and inductors built in the circuit board, but this is not necessarily required in the actual circuit board, and as long as the specified capacitors and inductors are grounded when the circuit board is completed.

[0120] Thereafter, the process of Figures 10B to 11B can be repeated as needed, such as Figure 12A , 12B shown, the insulating layer 61 and the conductor wiring layers 62A and 62B electrically connected to the wiring 54 are laminated, and electronic components are mounted. In addition, a planar (e.g., spiral) spiral coil element (coil) can also be formed on the surface of the glass core 42 or the insulating resin layer 51. In addition, an electrically neutral through-hole can be arranged between the solenoid coil elements to reduce the loss caused by mutual inductance, and a capacitor can also be provided in the through-hole.

[0121] In addition, when a copper conductor pattern 46 is laminated on the glass core 42, in order to prevent warping and cracking of the glass core 42 due to the destruction of the stress balance, for example, a silicon nitride layer or the like can be formed directly above the glass core 42. The silicon nitride layer has the function of eliminating the residual stress of the copper conductor pattern 46, and through this combination, a combined wiring layer with adjusted stress is formed. However, the silicon nitride layer is an example and is not limited thereto.

[0122] And, with reference to Figures 13 to 16 , the process of mounting the circuit board of the present embodiment on the mother board and mounting electronic components on the circuit board 41 will be described.

[0123] First, as Figure 13 shown, a solder resist 63 is applied in a pattern on both sides of the Figure 12B circuit board 41 by a screen printing method or the like. At this time, holes 63a that can communicate with the upper conductor wiring layer (first terminal) 62A from the outside and holes 63b that can communicate with the lower conductor wiring layer (second terminal) 62B from the outside are formed in the solder resist 63. In addition, in the lower conductor wiring layer 62B, there is also a conductor wiring layer that is electrically insulated from the wiring 54 (i.e., the circuit) of the circuit board 41.

[0124] Next, as Figure 14As shown, on the upper surface side of the circuit board 41, solder bumps 64 are placed in the holes 63a, and electronic components 65 are placed on top of the solder bumps 64 in contact with the conductive portions. Examples of the electronic components 65 include switches, amplifiers, filters, etc., but are not limited thereto.

[0125] Then, as Figure 15 shown, the entire upper surface of the circuit board 41 including the electronic components 65 is covered with a molding resin 66. Additionally, on the lower surface side of the circuit board 41, solder bumps 64 are placed in the holes 63b.

[0126] As Figure 16 shown, if the circuit board 41 formed in this way is placed on a mother board 67 which is another circuit board and put into a reflow oven (not shown), the solder bumps 64 in the holes 63b melt, and a part of the conductor wiring layer 62B is electrically connected to the conductive pattern 68 of the mother board 67. Additionally, the solder bumps 64 in the holes 63a melt, and the conductor wiring layer 62A is electrically connected to the conductive portions of the electronic components 65. The interval between adjacent holes 63a is a distance such that the solder flowing out during melting does not interfere.

[0127] In thin mobile communication devices etc. corresponding to the 5G communication standard, it is required to optimize the transmission and reception in multiple frequency bands through one module. Therefore, it is preferable to compactly mount multiple electronic components including an LC frequency filter. According to the present embodiment, since the LC frequency filter is built into the circuit board 41 and other electronic components 65 are mounted on one surface and can be connected to the conductive pattern 68 of the mother board 67 on the other surface, by having such an interposer function, compact functional integration can be achieved.

[0128] However, a part of the conductor wiring layer 62B (referred to as a connection pad CP) is electrically connected to the circuit within the circuit board 41, but the remaining part of the conductor wiring layer 62B (referred to as a heat dissipation pad HP) is not electrically connected to the circuit within the circuit board 41, becoming a so-called dummy terminal. In circuit modules corresponding to thin mobile communication devices etc. for the 5G communication standard, it is expected that the heat generation will become excessive. On the other hand, since the glass core has a lower thermal conductivity compared to resin etc., it is preferable to take measures against this heat generation.

[0129] Therefore, in the present embodiment, the Figure 17 connection pads CP represented by white circles and the heat dissipation pads HP represented by black circles in are arranged in a mixed manner in two columns surrounding near the outer periphery of the circuit board 41, thereby promoting heat dissipation from the circuit board 41 via the heat dissipation pads HP. It is preferable that the number of heat dissipation pads HP is larger than the number of connection pads CP.

[0130] The heat dissipation pad HP is electrically connected only to the conductive pattern 68 via solder bumps 64, and the conductive pattern 68 is not electrically connected to the circuit of the mother board 67 or other components 69, thereby achieving a state of improving the heat dissipation effect and being electrically insulated (isolated). However, at least one of the heat dissipation pads HP may be grounded via a ground wire 70 ( Figure 16 ).

[0131] Description of reference numerals

[0132] 11…Insulating resin layer, 12…Lower electrode of capacitor, 13…Dielectric layer of capacitor, 14…Conductor (upper electrode of capacitor), 21, 22…Wiring, 23…Through-hole, 31…Glass core, 32…Insulating resin layer, 33…Lower electrode, 34…Upper electrode, 35…Dielectric layer, 41…Circuit board, 42…Glass core, 43…Through-hole, 44…Adhesive layer (Ni / Cu sputtering layer), 45…Nickel plating (Ni) layer, 45’…Seed layer (Ni / Cu / Ni layer), 46…Conductor pattern (copper wiring directly above glass: including lower electrode of capacitor), 47…Dielectric layer, 48…Seed layer (Ni / Cu sputtering layer above dielectric layer), 49…Upper electrode of capacitor, 50…Dry film resist layer for capacitor protection, 51…Insulating resin layer, 52…Hole (via hole) in insulating resin layer, 101…Capacitor, 102…Inductor, 202…Transceiver LSI, 203…Band-pass filter, 204…Band-pass filter, 205…Band-pass filter, 206…Band-pass filter, 207…Band-pass filter, 208…Switch, 209…Amplifier, 210…Baseband processor, 211…Application processor, 212…Duplexer, 213…Duplexer, 214…Antenna, 215…RF circuit, 302…High-pass filter, 303…Band-pass filter for TDD, 304…Band-pass filter for TDD.

Claims

1. A circuit board having a glass plate provided with through-holes and a plurality of circuit elements, wherein the circuit board is characterized in that it has a circuit formed by conductive members disposed on the inner periphery of the through-holes and the surface of the glass plate, on at least one surface of the glass plate, another laminated circuit with resin as an insulating material is disposed, and the circuit above the surface of the glass plate is electrically connected to the laminated circuit, one of the circuit elements is a solenoid coil element arranged in a coil shape along the inner periphery of the through-hole and the surface of the glass plate, one of the circuit elements is a capacitor element including a lower electrode, a dielectric layer, and an upper electrode, the lower electrode being constituted by the circuit disposed on the surface of the glass plate or by the laminated circuit, the dielectric layer being formed above the lower electrode, and the upper electrode being formed above the dielectric layer, at least one LC frequency filter is constituted by the solenoid coil element and the capacitor element, a first terminal is formed on one surface of the circuit board, and a second terminal is formed on the other surface of the circuit board, the circuit or the laminated circuit above one surface of the glass plate can be electrically connected to at least one electronic component via the first terminal, and the circuit or the laminated circuit above the other surface of the glass plate can be electrically connected to another circuit board via the second terminal, a heat sink pad and a conductive connection pad are formed on the other surface of the circuit board, the conductive connection pad is electrically connected to the circuit or the laminated circuit above the surface of the glass plate, the heat sink pad is not electrically connected to the circuit, and the connection pad is the second terminal, the connection pad and the heat sink pad are arranged in a mixed manner in two rows surrounding the periphery of the circuit board, and the number of the heat sink pads is more than the number of the connection pads.

2. The circuit board according to claim 1, wherein the LC frequency filter has the function of at least one of a band-pass filter, a low-pass filter, a high-pass filter, and a duplexer.

3. The circuit board according to claim 1 or 2, wherein the LC frequency filter is used in time-division duplex transceiver communication in a frequency band of 2 GHz or higher in mobile body communication.

4. The circuit board according to claim 1 or 2, wherein the LC frequency filter is a band-pass filter having a passband of 50 MHz or higher.

5. The circuit board according to claim 1 or 2, wherein the total thickness is less than or equal to 0.5 mm.

6. The circuit board according to claim 1 or 2, wherein the connection pad and the heat sink pad are connected to the conductive pattern of the other circuit board.

7. The circuit board according to claim 6, wherein the heat sink pad is grounded.

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