Key generation and secure storage in noisy environments

Abstract

The present invention relates to a method implemented in a computing device, comprising: generating an initial key from key injection or based on a value provided by at least one Physical Unclonable Function (PUF); generating an obfuscated key based on the initial key; and storing the obfuscated key in a non-volatile memory.

Description

[0001] Related Applications

[0002] This application claims the benefit of the filing date of U.S. Patent Application Serial No. 15 / 970,660, filed on May 3, 2018, and entitled “Key Generation and Secure Storage in a Noisy Environment,” the entire contents of which are hereby incorporated herein by reference.

[0003] This application is related to U.S. non-provisional application serial number 15 / 853,498, entitled “PHYSICAL UNCLONABLE FUNCTION USING MESSAGE AUTHENTICATION CODE,” filed by Mondello et al. on 12 / 22 / 2017, the entire contents of which are incorporated herein by reference as if fully set forth.

[0004] This application is also related to U.S. non-provisional application serial number 15 / 965,731 filed by Mondello et al. on April 27, 2018, entitled “SECURE DISTRIBUTION OF SECRET KEY USING A MONOTONIC COUNTER,” the entire contents of which are incorporated herein by reference as if fully set forth. Technical Field

[0005] At least some embodiments disclosed herein relate generally to key generation, and more particularly, but not limited to, key generation and secure storage in noisy environments. Background Art

[0006] A Physical Unclonable Function (PUF) provides a digital value that can be used, for example, as a unique identification of a semiconductor device, such as a microprocessor. A PUF is based on physical variations that occur naturally, for example during semiconductor manufacturing, and allow otherwise identical semiconductor chips to be distinguished.

[0007] PUFs are commonly used in cryptography. A PUF can be a physical entity, for example, embedded in a physical structure. PUFs are often implemented in integrated circuits and are often used in applications with high density requirements. For example, PUFs can be used as unique and unalterable device identifiers. PUFs can also be used for secure key generation and as a source of randomness. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings in which like references indicate similar elements.

[0009] Figure 1 A system for generating a unique key from the output of a message authentication code (MAC) that receives input from a physically unclonable function (PUF) device is shown according to one embodiment.

[0010] Figure 2 A system for generating a unique key from the output of a MAC that receives input from one or more PUF devices selected by a selector module is shown according to one embodiment.

[0011] Figure 3 A system for generating a unique key from the output of a MAC that receives input from one or more PUF devices and input from a monotonic counter (and / or input from another freshness mechanism such as a NONCE, timestamp, etc.) is shown according to one embodiment.

[0012] Figure 4 A method of generating an output from a MAC using one or more input values ​​provided from one or more PUFs is shown according to one embodiment.

[0013] Figure 5 A system for generating a root key from the output of a MAC is shown according to one embodiment, which receives input from one or more PUF devices and input from a monotonic counter (and / or input from another freshness mechanism such as a NONCE, timestamp, etc.) and adds additional MACs to generate session keys.

[0014] Figure 6 A computing device for storing obfuscated keys in non-volatile memory is shown according to one embodiment.

[0015] Figure 7 An example of an intermediate key generated during the obfuscation process according to one embodiment is shown.

[0016] Figure 8 Demonstrating an embodiment of Figure 7 An instance of another intermediate key generated during the obfuscation process.

[0017] Fig. 9 A method for generating obfuscated keys and storing the obfuscated keys in non-volatile memory according to one embodiment is shown.

[0018] Fig.10 A computing device for generating an initial key based on key injection, obfuscating the initial key, and storing the obfuscated key in non-volatile memory is shown according to one embodiment. DETAILED DESCRIPTION

[0019] At least some embodiments disclosed herein provide an improved architecture for generating a Physical Unclonable Function (PUF) value. In general, the architecture generates an output by feeding input provided from one or more PUFs into a Message Authentication Code (MAC). The output from the MAC provides an improved PUF.

[0020] Generally speaking, semiconductor chip manufacturers face the problem of key injection, which is programming a unique secret key for each chip or die provided, for example, from a semiconductor wafer. It is desirable to perform the key injection in a secret environment to avoid leaking or revealing the secret key injected into the chip. It is also desirable to ensure that the key cannot be hacked or read back after the chip is manufactured. In some cases, for example, the key injection process is authenticated or performed by a third-party infrastructure.

[0021] Chip manufacturers want to reduce the manufacturing cost of chips that include encryption capabilities. Chip manufacturers also want to simplify the manufacturing process while maintaining a consistent level of security performance for the chips being manufactured. However, key injection is one of the more expensive manufacturing steps.

[0022] Chip manufacturers also face the problem of improving the consistency of PUFs when used as pseudo-random number generators. In some cases, this problem can include cross-correlation between dies due to the phenomenon on which the seed values ​​provided by the PUF are based.

[0023] PUF is based on unpredictable physical phenomena that are unique to each die, such as, for example, on-chip parasitics, on-chip path delays, etc. These phenomena are used, for example, to provide seed values ​​for pseudo-random number generators.

[0024] Two different chips selected in a production line must have different PUF values. The PUF value generated in each chip must remain constant during the life of the device. If two chips have similar keys (e.g., there is a small Hamming distance between them), then using the key of one chip it is possible to guess the key of the other chip (e.g., pre-image hacking).

[0025] Use of the improved PUF architecture described below can provide a solution to one or more of the above problems by providing an output value suitable for providing the functionality of a PUF on each chip or die. The improved PUF architecture below uses a PUF that enables each chip or die to automatically generate a unique security key each time the chip or die is powered on. The security key does not need to be stored in a non-volatile memory that can be hacked or otherwise leaked.

[0026] The improved PUF architecture further uses a MAC to generate an improved PUF output (eg, a unique key) for use by a cryptographic function or process, such as integrated into a semiconductor chip. The use of a MAC can, for example, increase the Hamming distance between keys generated on different chips.

[0027] In at least some embodiments disclosed herein, an improved PUF architecture using the output from a MAC is provided as a way to generate a seed or other value. Thus, the improved PUF architecture provides a way to, for example, perform key injection that reduces manufacturing costs and improves the reliability and / or consistency of PUF operations on the final chip.

[0028] In one embodiment, a method includes: providing at least one value by at least one PUF; and generating a first output based on a MAC, wherein the MAC uses the at least one value provided by the at least one PUF as an input for generating the first output.

[0029] In one embodiment, a system includes: at least one PUF device; a message authentication code (MAC) module configured to receive a first input based on at least one value provided by the at least one PUF device; at least one processor; and a memory containing instructions configured to instruct the at least one processor to generate a first output from the MAC module based on the first input. In various embodiments, the MAC module can be implemented using hardware and / or software.

[0030] In one embodiment, the system further includes a selector module for selecting one or more of the PUF devices for providing values ​​to the MAC module. For example, values ​​provided from several PUF devices may be concatenated and provided as input to the MAC module. In various embodiments, the selector module may be implemented using hardware and / or software.

[0031] Figure 1 A system is shown that provides a PUF architecture 111 for generating a unique key 125 (or other value) from the output of a message authentication code (MAC) module 123, according to one embodiment. The MAC module 123 receives an input value obtained from a physically unclonable function (PUF) device 121 .

[0032] Figure 1 The PUF device 121 in the MAC module 123 may be, for example, any of various known types of PUFs. The MAC module 123 provides one-way functions such as, for example, SHA1, SHA2, MD5, CRC, TIGER, etc.

[0033] The architecture 111 can, for example, improve the Hamming distance of the PUF values ​​or codes generated between chips. The MAC function is unpredictable (e.g., a sequence of inputs provided to the MAC function that differ only slightly provides two completely different output results). Therefore, the inputs to the MAC function cannot be discerned or determined when only the output is known. The architecture 111 can also, for example, improve the consistency of the PUF as a pseudo-random number generator.

[0034] In one example, the value generated by the PUF architecture 111 (e.g., the unique key 125 or another value) can be a number having N bits, where N depends on the encryption algorithm implemented on the chip (e.g., the memory device 103 or another device) that includes the PUF architecture 111. In one example, the chip implements an encryption function using HMAC-SHA256, in which case the output from the MAC module 123 has a size N of 256 bits. Using the output from the MAC module 123 provides a message length suitable for an output value used as a key (without further compression or padding).

[0035] The PUF architecture 111 is implemented in a device such as the illustrated memory device 103, or may be implemented in other types of computing devices such as, for example, integrated circuits implemented in a number of semiconductor chips provided by a wafer fabrication line.

[0036] In one embodiment, MAC module 123 cooperates with and / or is integrated into or is part of encryption module 127, e.g., encryption module 127 may provide encryption functions for memory device 103. For example, the output of MAC module 123 may be suitable for use as a key because the MAC is used by memory device 103 for other encryption purposes.

[0037] The operation of the PUF architecture 111, the encryption module 127, and / or other functions of the memory device 103 may be controlled by the controller 107. The controller 107 may include, for example, one or more microprocessors.

[0038] exist Figure 1 In the embodiment, the host 101 can communicate with the memory device 103 via a communication channel. The host 101 can be a computer having one or more central processing units (CPUs), and computer peripheral devices such as the memory device 103 can be attached to the one or more central processing units (CPUs) via interconnections such as a computer bus (e.g., Peripheral Component Interconnect (PCI), PCI-Extended (PCI-X), PCI Express (PCIe)), a communication portion, and / or a computer network.

[0039] The memory device 103 can be used to store data of the host 101 in, for example, a non-volatile storage medium 109. Examples of memory devices generally include a hard disk drive (HDD), a solid-state drive (SSD), a flash memory, a dynamic random access memory, a tape, a network attached storage device, etc. The memory device 103 has a host interface 105 that implements communication with the host 101 using a communication channel. For example, in one embodiment, the communication channel between the host 101 and the memory device 103 is a peripheral component interconnect express (PCI express or PCIe) bus; and the host 101 and the memory device 103 communicate with each other using the NVMe protocol (Non-Volatile Memory Host Control Interface Specification (NVMHCI), also known as NVM Express (NVMe)).

[0040] In some embodiments, the communication channel between the host 101 and the memory device 103 includes a computer network, such as a local area network, a wireless local area network, a wireless personal area network, a cellular communication network, a broadband high-speed always-connected wireless communication connection (such as a current or next-generation mobile network link); and the host 101 and the memory device 103 can be configured to communicate with each other using data storage management and usage commands similar to the data storage management and usage commands in the NVMe protocol.

[0041] Controller 107 may execute firmware 104 to perform operations in response to communications from host 101 and / or other operations. Firmware is generally a type of computer program that provides control, monitoring, and data manipulation of an engineering computing device. Figure 1 , firmware 104 controls the operation of controller 107 in operating memory device 103, such as the operation of PUF architecture 111, as discussed further below.

[0042] The memory device 103 has a non-volatile storage medium 109, such as a magnetic material coated on a hard disk and / or a memory cell in an integrated circuit. The storage medium 109 is non-volatile because power is not required to maintain the data / information stored in the non-volatile storage medium 109, which can be retrieved after the non-volatile storage medium 109 is powered off and then powered on again. The memory cell can be implemented using various memory / storage technologies, such as NAND gate-based flash memory, phase change memory (PCM), magnetic memory (MRAM), resistive random access memory, and 3D XPoint, so that the storage medium 109 is non-volatile and can retain the data stored therein without power for days, months, and / or years.

[0043] The memory device 103 includes volatile dynamic random access memory (DRAM) 106 for storing runtime data and instructions used by the controller 107 to improve the computing performance of the controller 107 and / or to provide a buffer for data transferred between the host 101 and the non-volatile storage medium 109. The DRAM 106 is volatile because it requires power to maintain the data / information stored therein, which is immediately or rapidly lost when power is interrupted.

[0044] Volatile DRAM 106 typically has less latency than non-volatile storage media 109, but quickly loses its data when power is removed. Therefore, it is advantageous to use volatile DRAM 106 to temporarily store instructions and data used by controller 107 in its current computing task to improve performance. In some examples, volatile DRAM 106 is replaced with volatile static random access memory (SRAM) that uses less power than DRAM in some applications. When non-volatile storage media 109 has comparable data access performance (e.g., in terms of latency, read / write speed) to volatile DRAM 106, volatile DRAM 106 can be eliminated; and controller 107 can perform calculations by operating on non-volatile storage media 109 for instructions and data rather than on volatile DRAM 106.

[0045] For example, cross-point storage and memory devices, such as 3D XPoint memory, have data access performance comparable to volatile DRAM 106. Cross-point memory devices use transistor-free memory elements, each of which has memory cells and selectors stacked together as a column. The columns of memory elements are connected via two layers of vertical wires, one layer above the columns of memory elements and the other layer below the columns of memory elements. Each memory element can be individually selected at the intersection of a line on each of the two layers. Cross-point memory devices are fast and non-volatile, and can be used as a unified memory pool for processing and storage.

[0046] In some examples, the controller 107 has an in-processor cache memory that has better data access performance than the volatile DRAM 106 and / or the non-volatile storage medium 109. Therefore, it is preferred that a portion of the instructions and data used in the current computing task be cached in the in-processor cache memory of the controller 107 during computing operations of the controller 107. In some examples, the controller 107 has multiple processors, each with its own in-processor cache memory.

[0047] Optionally, controller 107 performs data-intensive in-memory processing using the data and / or instructions organized in memory device 103. For example, in response to a request from host 101, controller 107 performs real-time analysis of a data set stored in memory device 103 and in response transmits a reduced data set to host 101. For example, in some applications, memory device 103 is connected to a real-time sensor to store sensor input; and a processor of controller 107 is configured to perform machine learning and / or pattern recognition based on the sensor input to support an artificial intelligence (AI) system implemented at least in part via memory device 103 and / or host 101.

[0048] In some embodiments, the processor of controller 107 is integrated with memory (e.g., 106 or 109) at the time of computer chip manufacturing to enable processing in memory and thus overcome the von Neumann bottleneck that limits computing performance due to throughput limitations caused by latency in data movement between a processor and memory configured solely according to a von Neumann architecture. The integration of processing and memory increases processing speed and memory transfer rates and reduces latency and power usage.

[0049] The memory device 103 may be used in various computing systems such as cloud computing systems, edge computing systems, fog computing systems, and / or stand-alone computers. In cloud computing systems, remote computer servers are connected into a network to store, manage, and process data. Edge computing systems optimize cloud computing by performing data processing at the edge of a computer network close to the data source and thereby reduce data communications with centralized servers and / or data storage devices. Fog computing systems use one or more end-user devices or near-user edge devices to store data and thereby reduce or eliminate the need to store data in a centralized data warehouse.

[0050] At least some of the embodiments disclosed herein may be implemented using computer instructions, such as firmware 104, executed by controller 107. In some examples, hardware circuitry may be used to implement at least some of the functionality of firmware 104. Firmware 104 may initially be stored in non-volatile storage media 109 or another non-volatile device and loaded into volatile DRAM 106 and / or in-processor cache memory for execution by controller 107.

[0051] For example, firmware 104 may be configured to operate a PUF architecture using the techniques discussed below. However, the techniques discussed below are not limited to use for Figure 1 's computer system and / or the examples discussed above.

[0052] In some implementations, the output of MAC module 123 may be used to provide, for example, a root key or seed value. In other implementations, the output may be used to generate one or more session keys.

[0053] In one embodiment, the output from the MAC module 123 may be transmitted to another computing device. For example, the unique key 125 may be transmitted to the host 101 via the host interface 105 .

[0054] Figure 2 Demonstrating a method for using a method similar to Figure 1 The PUF architecture of architecture 111 generates a unique key 125 from the output of MAC module 123 but includes a system of multiple PUF devices 202 and a selector module 204. MAC module 123 receives input from one or more PUF devices 202 selected by selector module 204. In one example, PUF device 202 includes PUF device 121.

[0055] PUF devices 202 may be, for example, identical or different (eg, based on different random physical phenomena). In one embodiment, selector module 204 functions as a smart PUF selection block or circuit that selects one or more of PUF devices 202 from which to obtain the value provided as input to MAC module 123.

[0056] In one embodiment, the selector module 204 makes a selection of the PUF devices 202 based at least in part on the results from testing the PUF devices 202. For example, the selector module 204 may test the repeatability of each PUF device 202. If any PUF device 202 fails the test, the selector module 204 excludes the faulty device from being used to provide input values ​​to the MAC module 123. In one example, the faulty device may be excluded temporarily or indefinitely.

[0057] In some implementations, the selector module 204 permits testing of the PUF functionality of each chip during manufacturing and / or during use in the field (e.g., by checking the repeatability of the values ​​provided by each PUF device 202). If two or more values ​​provided by a given PUF device are different, then the PUF device is determined to be faulty and is precluded from use as input to the MAC module 123.

[0058] In one embodiment, the selector module 204 is used to simultaneously use multiple PUF devices 202 as sources for calculating an improved PUF output from the MAC module 123. For example, the selector module 204 may concatenate a value from a first PUF device with a value from a second PUF device to provide as input to the MAC module 123. In some implementations, this architecture permits a robust PUF output to be obtained due to its reliance on several different physical phenomena.

[0059] Figure 3 A system for generating a unique key 125 from the output of a MAC module 123 is shown according to one embodiment. Figure 3 The PUF architecture described in is similar to Figure 2 , except including a monotonic counter 302 that provides a value to the selector module 204. In various embodiments, the monotonic counter 302 may be implemented using hardware and / or software.

[0060] The MAC module 123 receives input from one or more PUF devices 202 and input from a monotonic counter 302. In one example, the values ​​obtained from the PUF device 202 and the monotonic counter 302 are concatenated and then provided as input to the MAC module 123. In some implementations, the monotonic counter 302 is a non-volatile counter that increments its value only when requested. In some embodiments, the monotonic counter 302 is incremented after each power cycle of the chip.

[0061] In some embodiments, Figure 3 The PUF architecture may be used to provide a way to securely share keys between semiconductor chips and other components in an application such as, for example, a public key authority.

[0062] In some implementations, the monotonic counter 302 is incremented before each calculation of the PUF, which ensures that the input to the MAC module 123 is different in each cycle, and thus provides a different output (and / or output pattern). In some examples, this method can be used to generate session keys, where each session key is different.

[0063] In some embodiments, the selector module 204 may selectively include or exclude the use of the monotonic counter 302 (or other freshness mechanism such as NONCE, timestamp) for providing the counter value as input to the MAC module 123 .

[0064] In some embodiments, the monotonic counter 302 is also used by the encryption module 127. In some embodiments, the PUF architecture including the monotonic counter can be used as a session key generator to ensure that the key is different in each cycle. In some implementations, the generated session key is protected in this way: Session Key = MAC [One or more PUFs | MTC or Fresh]

[0065] In other embodiments, the mechanism is used as follows:

[0066] Session Key = MAC key_based [Root_Key, MTC or other new institutions]

[0067] Where: Root_key = the output value provided from the MAC module 123 above or any other kind of key present on the chip.

[0068] MAC key_based The function is, for example, a MAC algorithm based on a secret key. For example, there may be two types of MAC algorithms in cryptography:

[0069] 1. Secret key based algorithms, such as for example the HMAC family (HMAC-SHA256 is key based).

[0070] 2. Algorithms that are not based on secret keys, such as SHA256 (SHA alone is not key-based).

[0071] It should be noted that a key-based MAC can be transformed into a non-key-based MAC by setting the key to a known value (eg, 0x000...0xFFFF, etc....).

[0072] Figure 5 A system for generating a root key from the output of a MAC according to one embodiment is shown, which receives input from one or more PUF devices 202 and input from a monotonic counter 302 (and / or input from another fresh mechanism such as a NONCE, a timestamp, etc.) and adds an additional MAC module 504 to generate a session key using the root key input. In this embodiment, the MAC module 123 provides the root key 502 as an output from the MAC module 123. The root key 502 is an input to the MAC module 504, which can use a MAC function, such as the session key=MAC function described above. key_based [Root_Key, MTC or other fresh authority] The root key input in this key-based function may be the illustrated root key 502 .

[0073] Additionally, in one embodiment, the monotonic counter 302 may provide an input to the MAC module 504. In other embodiments, a different monotonic counter or another value from the chip may be provided as an input to the MAC module 504 instead of using the monotonic counter 302. In some cases, the monotonic counter 302 provides the counter value to the MAC module 504 instead of to the selector module 204. In other cases, the counter value may be provided to both MAC modules or excluded from both modules.

[0074] Figure 4 A method of generating an output from a MAC using one or more input values ​​provided from one or more PUFs is shown according to one embodiment. For example, Figure 4 The method can be implemented in Figure 1 in the memory device 103.

[0075] Figure 4 The method includes providing one or more values ​​by at least one PUF at block 411 (eg, providing values ​​from one or more of the PUF devices 202 ).

[0076] At block 413, one or more of the PUFs may be tested for repeatability, such as described above. This testing is optional.

[0077] At block 415, if testing has been performed at block 413 and it has been determined that the PUF device has failed the test, then the faulty PUF device is excluded from providing input to the MAC. This exclusion may be performed, for example, by the selector module 204 as discussed above.

[0078] At block 417, a value is provided from a monotonic counter, such as monotonic counter 302. The use of a monotonic counter in a PUF architecture is optional.

[0079] At block 419, an output is generated from the MAC, which uses one or more values ​​provided to the MAC by the PUF as input (and optionally at least one value from a monotonic counter).

[0080] Various other embodiments are now described below for a method implemented in a computing device, the method comprising: providing at least one value by at least one physically unclonable function (PUF); and generating a first output based on a message authentication code (MAC), wherein the MAC uses the at least one value provided by the at least one PUF as an input for generating the first output.

[0081] In one embodiment, the computing device is a first computing device, and the method further includes transmitting the first output to a second computing device, wherein the first output is a unique identifier of the first computing device.

[0082] In one embodiment, providing the at least one value comprises selecting a first value from a first PUF and selecting a second value from a second PUF.

[0083] In one embodiment, the method further comprises: providing a value from a monotonic counter; wherein generating the first output further comprises using the value from the monotonic counter as an additional input to the MAC for generating the first output.

[0084] In one embodiment, the method further includes: generating a plurality of session keys based on respective outputs provided by the MAC, wherein the monotonic counter provides a value used as input to the MAC; and incrementing the monotonic counter after generating each of the session keys.

[0085] In one embodiment, the method further comprises: testing a first PUF of the at least one PUF for repeatability; and based on determining that the first PUF fails the test, excluding the first PUF from being used to provide any input to the MAC in generating the first output.

[0086] In one embodiment, the testing comprises comparing two or more values ​​provided by the first PUF.

[0087] In one embodiment, the computing device is a memory device, and the memory device includes a non-volatile storage medium configured to store output values ​​generated using the MAC.

[0088] In one embodiment, the method further comprises performing, by at least one processor, at least one cryptographic function, wherein performing the at least one cryptographic function comprises using an output value generated using the MAC.

[0089] In one embodiment, a non-transitory computer storage medium storing instructions that, when executed on a memory device (e.g., memory device 103), cause the memory device to perform a method, the method comprising: providing at least one value by at least one physically unclonable function (PUF); and generating a first output based on a message authentication code (MAC), wherein the MAC uses the at least one value provided by the at least one PUF as an input for generating the first output.

[0090] In various other embodiments described below, the following may be executed on a system including: Figure 4 A method for: at least one physically unclonable function (PUF) device; a message authentication code (MAC) module configured to receive a first input based on at least one value provided by the at least one PUF device; at least one processor; and a memory containing instructions configured to instruct the at least one processor to generate a first output from the MAC module based on the first input.

[0091] In one embodiment, the MAC module includes circuitry. In one embodiment, the first output from the MAC module is a key identifying a die. In one embodiment, the first output from the MAC module is a root key, and the instructions are further configured to instruct the at least one processor to generate a session key using the output from the MAC module.

[0092] In one embodiment, the system is part of a semiconductor chip (e.g., one of several chips obtained from a semiconductor wafer), the first output from the MAC module is a unique value that identifies the chip, and the instructions are further configured to instruct the at least one process to transmit the unique value to a computing device.

[0093] In one embodiment, the at least one PUF device includes a plurality of PUF devices (eg, PUF device 202), and the system further includes a selector module configured to select the at least one PUF device that provides the at least one value.

[0094] In one embodiment, the selector module is further configured to generate a first input to the MAC module by concatenating a first value from the first PUF device and a second value from the second PUF device.

[0095] In one embodiment, the system further includes a monotonic counter configured to provide a counter value, and the instructions are further configured to instruct the at least one processor to generate the first input by concatenating the counter value with the at least one value provided by the at least one PUF device.

[0096] In one embodiment, the system further comprises a selector module configured to select the at least one PUF device providing the at least one value, wherein concatenating the counter value with the at least one value provided by the at least one PUF device is performed by the selector module.

[0097] In one embodiment, the monotonic counter is further configured to increment the counter value after generating the first input to provide an incremented value; and the instructions are further configured to instruct the at least one processor to generate a second output from the MAC module based on the incremented value and at least one new value provided by the at least one PUF device.

[0098] Key generation and secure storage

[0099] As mentioned above, PUFs can be used for secure key generation. Various embodiments discussed below relate to generating an initial key using at least one PUF, applying processing to increase obfuscation of the initial key, and storing the final obfuscated key in non-volatile memory. The final obfuscated key and / or the intermediate key used to generate the final obfuscated key can be shared with another computing device and used to communicate securely with the other computing device (e.g., sending messages using symmetric encryption based on the shared key). In some embodiments, secure key generation is performed for a computing device to be used in an automotive application, such as a controller in an autonomous vehicle.

[0100] In an alternative embodiment, the initial key is generated in other ways without using the at least one PUF described above. In one embodiment, the initial key can be generated by using an injected key. For example, the initial key is present in the chip due to injection in a factory or other secure environment. In this case, the application process that increases the obfuscation of the initial key is performed by applying an obfuscation process to the injected key.

[0101] The automotive environment presents a technical problem of introducing "noise" during the key generation phase. The various embodiments described below provide a technical solution to this problem by using a method to reduce or avoid key changes due to this induced noise by storing obfuscated keys inside a non-volatile memory area.

[0102] The automotive environment can affect key generation in various ways. For example, powering up the engine can cause a drop in power applied to the computing device, causing the key to be generated in an erroneous manner. Temperature extremes can also affect the circuitry that generates the key. Other sources, such as magnetic fields from power lines, can cause inter-symbol interference, or crosstalk, preventing the host from recognizing the device.

[0103] In contrast, if the key is generated in a secure environment and stored in memory, it will be immune to noise. The secure environment may depend on the strategy used to propagate the key among end users / customers of the computing device product, such as directly installed in a car, in a test environment, or in a factory (e.g., where the computing devices where the keys are generated are manufactured).

[0104] In one example, an ADAS or other computing system used in a vehicle is subject to power supply changes. This may occur, for example, during starting the vehicle, braking, powering the engine, etc.

[0105] The various embodiments of generating and storing keys discussed below provide the advantage of being substantially independent of external factors such as power supply variations, temperature and other external noise sources. In some embodiments, another advantage is that for each cycle, for example, the generation of the key vector is the same.

[0106] When storing a key, another advantage provided in some embodiments is that the key is substantially protected from hardware attacks (e.g., such as those that a hacker might be carrying out). For example, one such attack is to monitor the power-on current of the device in order to correlate current changes to bits associated with the key. Other attacks may use, for example, voltage measurements (e.g., Vdd supply voltage). Some attacks may use, for example, temperature changes to interfere with the operation of the device.

[0107] In some embodiments, the initial key may be used as described above for Figures 1 to 5The described methods and / or architectures generate, for example, a PUF for generating a key for each power-on cycle of a computing device that is storing a key. In alternative embodiments, other methods may be used to generate the initial key.

[0108] In one exemplary method, as previously discussed above, key injection uses at least one PUF and a MAC algorithm (e.g., SHA256) to generate a key for a device that is significantly different from other devices (e.g., significantly different from an adjacent die located on a wafer). The MAC encryption algorithm provides the benefit of increasing the entropy of the bits generated by the PUF.

[0109] In one embodiment, pre-processing is performed on the generated key (e.g., as the initial key provided from the PUF and then from the MAC algorithm) before it is stored in the non-volatile area of ​​the device in order to reduce or avoid hacker attacks and also improve the reliability of the stored key. In one embodiment, after the key is stored, the circuit that generates the key can be disabled. Pre-processing is generally referred to as obfuscation in this article. In one example, the circuit system and / or other logic is used to implement obfuscation on the device. In one example, the stored key can be read by the device because the key is independent of external noise sources. The internal mechanism is used to read any data of the device.

[0110] In various embodiments, storing the key as described herein increases the margin against noise. Moreover, this makes it difficult for hackers to read the stored key, for example using power monitoring or other intrusive methods.

[0111] At least some embodiments herein use PUF and encryption algorithms (e.g., HMAC-SHA256) to make key generation independent of external factors such as temperature or voltage that might otherwise cause the key to be different from one power-up of the device to the next. If this occurs, enabling the host to exchange messages with the device may be a problem. Various embodiments make key generation more robust by placing the stored key in memory so that it is not affected by external factors.

[0112] In one embodiment, the key is generated once on the device (e.g., at SRAM reset) and stored in the device's non-volatile memory. The key may also be generated at other times as needed by a command sequence. In one embodiment, this key generation is independent of the encryption performed by the device. The generated key is shared with the host. This embodiment stores and / or reads the key in the device in a way that prevents a hacker from guessing the key and using the key internally (e.g., by analyzing the shape of the current drawn by the device during key use, for example).

[0113] In addition, for example, in asymmetric cryptography, the generated key becomes a variable password that is a secret key of the system. The key is not shared with others. For public key encryption, the key is used to generate a corresponding public key.

[0114] In various embodiments, the initial key is generated using an injection key or using one or more PUFs (e.g., to provide an initial key PUF0). The initial key is then subjected to one or more obfuscation steps to provide an intermediate key (e.g., PUF1, PUF2, ..., PUF5), such as described below. The output from this process (e.g., PUF5) is an obfuscated key stored in a non-volatile memory of the device. When an injection key is used, an obfuscation process is applied to the injection key similarly to that described below for the non-limiting example PUF0.

[0115] In one embodiment, as mentioned above, the mechanism is as follows for the case of initial injection of keys.

[0116] Session Key = MAC key_based [Root_Key, MTC or other new institutions]

[0117] Where: Root_Key = any other kind of key present on the chip (for example, the key may be the initial key injected into the chip at the factory or other secure environment)

[0118] In one embodiment, when the device is powered on for the first time, a special sequence wakes up at least one circuit of the device (e.g., a reading circuit) and verifies that the circuit is performing properly. The device then generates an initial key PUF0, as mentioned above. This key can be stored or further processed to make it more robust for secure storage, as described below.

[0119] The intermediate key PUF1 is generated by concatenating PUF0 with a predetermined bit sequence (eg, a sequence known to others) to generate PUF1. In one embodiment, PUF1 is used to verify the ability of the device to accurately read the key and ensure that noise (eg, fluctuations in the power supply) does not affect the generated key.

[0120] The next intermediate key PUF2 is generated. PUF1 is interleaved with an inverted bit pattern (eg, formed by inverting the bits of PUF1, and sometimes referred to herein as a PUF1 strip) to generate PUF2.

[0121] In one embodiment, PUF2 has the same number of bits 0 and 1. This makes the shape of the device current essentially the same for any key (e.g., any key stored on the device). This reduces the likelihood that a hacker can guess the value of a key by looking at the shape of the device current when the key is being read by the device.

[0122] The next intermediate key PUF3 is generated. The bits of PUF2 are interleaved with pseudo-random bits to form PUF3. This further helps obfuscate the key. In one embodiment, the pseudo-random bits are derived from PUF1 or PUF2 by using a hash function. For example, these derived bits are added to PUF2 to form PUF3.

[0123] The next intermediate key PUF4 is generated. An error correction code (ECC) is generated by the internal circuitry of the device (e.g., during programming). The bits of the ECC are added to PUF3 to generate PUF4. In one embodiment, the ECC bits help prevent the effects of aging of non-volatile memory (e.g., NVRAM) which can be caused by, for example, device endurance limitations, X-rays, and particles. Non-volatile memory aging can also be caused, for example, by an increase in the number of electrons in the NV cells which can cause bit flips.

[0124] The next intermediate key PUF5 is generated. PUF5 is a concatenation of several copies of PUF4. The redundancy of having multiple copies of PUF4 present in PUF5 further increases robustness by increasing the likelihood that the key can be accurately read at a later time. In one embodiment, several copies of PUF5 are stored in various non-volatile memory storage areas to further increase robustness. For example, even if PUF5 is damaged in one of the areas, PUF5 can be read from the other ones in the area and the correct key can be extracted.

[0125] In one embodiment, PUF1 or PUF3 is a key shared with the host for symmetric encryption or used to generate a public key for asymmetric encryption. In one embodiment, PUF4 and PUF5 are not shared with the end user or the host.

[0126] The above method is modular because PUF2, PUF3, PUF4 and / or PUF5 are not required to generate the obfuscated key. Instead, in various embodiments, one or more of the aforementioned obfuscation steps may be applied to the initial key, and in addition, the order may be changed. For example, the number of obfuscation steps may be reduced for systems that are known not to have a Vdd voltage supply drop.

[0127] In one embodiment, when storing an obfuscated key, the bit pattern will be physically distributed around the non-volatile storage medium (e.g., in different rows and words). For example, a device is able to read bits simultaneously and be immune to multi-bit errors.

[0128] Figure 6A computing device 603 is shown for storing an obfuscated key 635 in a non-volatile memory, such as a non-volatile storage medium 109, according to one embodiment. An initial key 625 is generated based on a value provided by at least one physical unclonable functional device 121. An obfuscated key 635 is generated based on the initial key 625. After being generated, the obfuscated key 635 is stored in the non-volatile storage medium 109.

[0129] In one embodiment, message authentication code (MAC) 123 uses the value from PUF device 121 as input and provides as output an initial key 625. In one embodiment, obfuscation processing module 630 is used to perform processing on initial key 625 to provide an obfuscated key 635 (e.g., PUF5), such as discussed above.

[0130] In one embodiment, the obfuscated key 635 is securely distributed to another computing device as described in related U.S. non-provisional application Ser. No. 15 / 965,731, filed Apr. 27, 2018, by Mondello et al., entitled “SECURE DISTRIBUTION OF SECRET KEY USING A MONOTONIC COUNTER,” the entire contents of which are incorporated herein by reference as if fully set forth. In other embodiments, the initial key 625 and / or any one or more of the intermediate keys from the obfuscation process described herein may be securely distributed in the same or similar manner. Optionally, the end user / customer reads the value of the initial key (e.g., PUF0), the intermediate key, and / or the final obfuscated key (e.g., PUF5) using the aforementioned methods. For example, the end user may verify that the device is properly performing the internal generation of the key and / or monitor the statistical quality of the key generation.

[0131] Figure 7 An example of an intermediate key (PUF2) generated by the obfuscation processing module 630 during the obfuscation process according to one embodiment is shown. As mentioned above, the bits of PUF1 are reversed to provide reversed bits 702. Bits 702 are interleaved with the bits of PUF1 as illustrated. For example, every two bits in the illustrated key are interleaved reversed bits 702.

[0132] Figure 8 Demonstrating an embodiment of Figure 7 802. As mentioned above, the bits of PUF2 are further interleaved with pseudo-random bits 802. As illustrated, bits 802 are interleaved with PUF2. For example, every three bits in the illustrated key are interleaved pseudo-random bits 802.

[0133] Fig. 9 A method for generating an obfuscated key, such as obfuscated key 635, and storing the obfuscated key in a non-volatile memory, such as non-volatile storage medium 109, is shown according to one embodiment. At block 911, an initial key is generated based on a value provided by at least one physically unclonable function (PUF).

[0134] In other embodiments, an initial key is generated by key injection at block 911. For example, the initial key may simply be a value injected into the chip during manufacturing.

[0135] At block 913, an obfuscated key is generated based on the initial key. For example, the generated obfuscated key is PUF3 or PUF5.

[0136] At block 915, the obfuscated key is stored in a non-volatile memory of the computing device. For example, the obfuscated key is stored in NAND flash memory or EEPROM.

[0137] In one embodiment, a method includes: generating an initial key using key injection; generating an obfuscated key based on the initial key; and storing the obfuscated key in a non-volatile memory. For example, the initial key may be a key injected during a key injection process at manufacturing time.

[0138] In one embodiment, a method includes: generating an initial key provided by key injection or based on a value provided by at least one physically unclonable function (PUF); generating an obfuscated key based on the initial key; and storing the obfuscated key in a non-volatile memory of a computing device.

[0139] In one embodiment, generating the initial key includes using a value from the PUF (or another value on the chip, for example) as an input to a message authentication code (MAC) to generate the initial key.

[0140] In one embodiment, the obfuscated key is stored outside of a user addressable memory space in the non-volatile memory.

[0141] In one embodiment, generating the obfuscated key comprises concatenating the initial key with a predetermined bit pattern.

[0142] In one embodiment, concatenating the initial key and the predetermined bit pattern provides a first key (eg, PUF1); and generating the obfuscated key further comprises interleaving the first key with an inverted bit pattern, wherein the inverted bit pattern is provided by inverting bits of the first key.

[0143] In one embodiment, interleaving the first key and the inverted bit pattern provides a second key (eg, PUF2); and generating the obfuscated key further includes interleaving the second key with pseudo-random bits.

[0144] In one embodiment, the method further comprises deriving the pseudo-random bits from the first key or the second key using a hash function.

[0145] In one embodiment, interleaving the second key with pseudo-random bits provides a third key (eg, PUF3); and generating the obfuscated key further includes concatenating the third key with error correction code bits.

[0146] In one embodiment, the computing device is a first computing device, and the method further includes: sharing at least one of the initial key, the first key, or the third key with a second computing device; and receiving a message encrypted using the shared at least one of the initial key, the first key, or the third key from the second computing device.

[0147] In one embodiment, concatenating the third key with error correction code bits provides a fourth key (eg, PUF4); and generating the obfuscated key further includes concatenating the fourth key with one or more copies of the fourth key.

[0148] In one embodiment, concatenating the fourth key with one or more copies of the fourth key provides a fifth key (e.g., PUF5); and storing the obfuscated key includes storing a first copy of the fifth key on at least one of a row or block of the non-volatile memory that is different from a row or block on which a second copy of the fifth key is stored.

[0149] In one embodiment, a system includes: at least one physical unclonable function (PUF) device (e.g., PUF device 121) configured to provide a first value; a non-volatile memory (e.g., non-volatile storage medium 109) configured to store an obfuscated key (e.g., key 635); at least one processor; and a memory containing instructions configured to instruct the at least one processor to: generate an initial key based on the first value provided by the at least one PUF device; generate an obfuscated key based on the initial key; and store the obfuscated key in the non-volatile memory.

[0150] In one embodiment, the system further includes a message authentication code (MAC) module (e.g., MAC 123) configured to receive a value provided by the at least one PUF device, wherein generating the initial key includes using the first value as an input to the MAC module to generate the initial key.

[0151] In one embodiment, generating the obfuscated key includes at least one of: concatenating a key with a predetermined bit pattern; interleaving a first key with an inverted bit pattern of the first key; interleaving a key with pseudo-random bits; concatenating a key with error correction code bits; or concatenating a second key with one or more copies of the second key.

[0152] In one embodiment, the stored obfuscation key has an equal number of 0 bits and 1 bits.

[0153] In one embodiment, generating the obfuscated key includes concatenating the initial key with a first bit pattern.

[0154] In one embodiment, concatenating the initial key and the first bit pattern provides a first key; and generating the obfuscated key further includes interleaving the first key and a second bit pattern.

[0155] In one embodiment, generating the obfuscated key further comprises interleaving the key with pseudo-random bits.

[0156] In one embodiment, generating the obfuscated key further comprises concatenating a key with error correction code bits.

[0157] In one embodiment, a non-transitory computer storage medium storing instructions that, when executed on a computing device, cause the computing device to perform a method comprising: generating an initial key using at least one physically unclonable function (PUF); generating an obfuscated key based on the initial key; and storing the obfuscated key in a non-volatile memory.

[0158] Fig.10 A computing device 1003 is shown for generating an initial key 625 based on key injection 1010, obfuscating the initial key, and storing the obfuscated key in non-volatile memory, according to one embodiment.

[0159] In one embodiment, the initial key 625 is generated by using the injection key 1010. For example, the initial key 625 is present in the chip by injection in a factory or other secure environment during manufacturing or other assembly or testing. In this case, the application process of increasing the obfuscation of the initial key is performed by applying the obfuscation process (via module 630) to the injected key (e.g., the value from key injection 1010). In other embodiments, the obfuscation process may be applied to any other value that may be stored or otherwise present on the chip or die.

[0160] Changes in key generation and secure storage

[0161] Various additional non-limiting embodiments are now described below. In one embodiment, after (or during) the first power-up of the system board, a special sequence is activated to turn on the device containing the cryptographic engine (e.g., cryptographic module 127). The sequence further wakes up the internal PUF and verifies its functionality, and then the PUF generates an initial value PUFO, such as described above. The PUFO value is processed by an on-chip algorithm (e.g., by the obfuscation processing module 630) and is written in a special area of ​​the non-volatile array (outside the user addressable space). In an alternative embodiment, instead of the PUFO value, the injected key is similarly processed by the on-chip algorithm as described below to provide an obfuscated key for storage.

[0162] In one embodiment, an obfuscation process is performed to prevent Vdd (voltage) and / or temperature fault hacking attacks. This process includes cascading PUF0 with a well-known pattern (e.g., it contains a fixed number of 0 / 1 bits). These bits permit determination of whether the read circuitry can properly distinguish 0 / 1 bits when the PUF value is read internally during the lifetime of the device (e.g., chip). For example, PUF1 = PUF0||010101...01

[0163] Next, the result of the above processing (e.g., PUF1) is further embodied with dummy bits (e.g., to avoid Icc hacker analysis). Specifically, for example, the bits of PUF1 are interleaved with an inverted version of PUF1 (i.e., PUF1 strips formed by inverting each bit of PUF1). For example, PUF2 = PUF1 interleaved PUF1 strips.

[0164] In one embodiment, the interleaving rule depends on the kind of column decoder (e.g., of the NV non-volatile array) present on the chip / device. The device ensures that every time a PUF value is read (from the non-volatile array), the read circuitry processes (in a single shot) the same number of bits as PUF1 and PUF1 strip. This ensures that the same number of bit values ​​0 and 1 are read, which provides a regular shape for the supply current (Idd).

[0165] Next, the bits of PUF2 are further interleaved with pseudo-random bits. In one example, the interleaving depends on the non-volatile array column decoder structure. In one embodiment, the output has the same number of PUF2 bits padded with a specific number of pseudo-random bits (e.g., in order to obfuscate the last remaining correlation that may exist in the PUF2 pattern).

[0166] In one embodiment, pseudo-random bits may be derived from PUF1 or PUF2 by using a hash function.Other alternative methods may also be used.

[0167] In one embodiment, optionally, to reduce or prevent bit loss due to non-volatile aging, the bits of PUF3 are concatenated with error correction code (ECC) bits. In one embodiment, optionally, the bits of PUF4 are replicated one or more times (this also extends ECC capabilities). For example, the foregoing may be implemented on a NAND memory. In one example, PUF5 = PUF4 || PUF4 || ... || PUF4

[0168] In one embodiment, the value of PUF5 may be written two or more times on different rows and / or blocks of a non-volatile memory array.

[0169] As a result of the obfuscation process described above, for example, once the final PUF value is written to a non-volatile array block, the value can be used with reduced or no concerns about the authenticity of the key (e.g., due to noise or charge loss) or any attempts to infer its value through Idd analysis or brute-force its value through Vdd fault attacks.

[0170] In one embodiment, once the obfuscation process is complete, the PUF circuitry may be disabled. In one embodiment, after deactivation, the PUF device may provide a value for internal use on the device for other purposes (eg, using a standard read operation within a non-volatile array).

[0171] In one embodiment, the key bits are distinguished from the random bits when extracting the key from PUF3. For example, the internal logic of the device storing the key knows the location and method needed to go back from PUF5 to the previous or original PUF (eg, PUF3).

[0172] In one embodiment, the device extracting the key knows the bit positions of the key bits. For example, the internal logic of the device may receive one of the intermediate PUF or the final key PUF5 depending on the design choice. Then, applying the operations in reverse order will obtain the original PUF. For example, the processing steps from PUF1 to PUF5 are performed to store the obfuscated PUF in a way that a hacker would have to both: read the content (e.g., key bits), and also know the operations that were applied in order to go back to and determine the original key.

[0173] Conclusion

[0174] Non-transitory computer storage media may be used to store the instructions of the firmware 104. When the instructions are executed by the memory device 103 or the controller 107 of the computing device 603, the instructions cause the controller 107 to perform any of the methods discussed above.

[0175] In this description, various functions and operations may be described as being performed or caused by computer instructions to simplify the description. However, those skilled in the art will recognize that such expressions mean that the functions are generated by the execution of computer instructions by one or more controllers or processors (such as microprocessors). Alternatively, or in combination, the functions and operations may be implemented using dedicated circuit systems with or without software instructions, such as using application specific integrated circuits (ASICs) or field programmable gate arrays (FPGAs). Embodiments may be implemented using hard-wired circuit systems without the use of software instructions, or in combination with software instructions. Therefore, the technology is neither limited to any specific combination of hardware circuit systems and software, nor to any specific source of instructions executed by the data processing system.

[0176] While some embodiments may be implemented on fully functional computers and computer systems, various embodiments are capable of being distributed as computing products in various forms and can be used regardless of the specific type of machine or computer-readable media used to actually effectuate the distribution.

[0177] At least some aspects of the disclosure may be embodied at least in part in software. That is, the techniques may be implemented in a computer system or other data processing system in response to a processor (e.g., a microprocessor or microcontroller) of the computer system or other data processing system executing sequences of instructions contained in a memory (e.g., ROM, volatile RAM, non-volatile memory, cache, or remote storage device).

[0178] The routines executed to implement the embodiments may be implemented as part of an operating system or a specific application, component, program, object, module or sequence of instructions (referred to as a "computer program"). A computer program generally includes one or more instructions that are placed at various times in various memories and storage devices in a computer, and when the instructions are read and executed by one or more processors in a computer, causes the computer to perform the operations necessary to execute the elements involved in the various aspects.

[0179] Tangible non-temporary computer storage media can be used to store software and data, which, when executed by a data processing system, causes the system to perform various methods. Executable software and data can be stored in various places, including, for example, ROM, volatile RAM, non-volatile memory and / or cache. Portions of this software and / or data can be stored in any of these storage devices. In addition, data and instructions can be obtained from a centralized server or a peer-to-peer network. Different portions of data and instructions are obtained from different centralized servers and / or peer-to-peer networks at different times and in different communication sessions or in the same communication session. Data and instructions can be fully obtained before executing the application. Alternatively, portions of data and instructions can be obtained in a timely manner only when execution is required. Therefore, it is not required that data and instructions be completely on machine-readable media at a specific time.

[0180] Examples of computer-readable storage media include, but are not limited to, recordable and non-recordable types of media, such as volatile and non-volatile memory devices, read-only memory (ROM), random access memory (RAM), flash memory devices, floppy disks and other removable disks, magnetic disk storage media, and optical disk storage media (e.g., compact disk read-only memory (CDROM), digital versatile disk (DVD), etc.), among others. Instructions may be embodied in transitory media, such as electrical, optical, acoustical or other forms of propagated signals, such as carrier waves, infrared signals, digital signals, etc. Transient media are typically used to transmit instructions, but are not considered capable of storing instructions.

[0181] In various embodiments, hard-wired circuitry may be used in conjunction with software instructions to implement the techniques. Thus, the techniques are not limited to any specific combination of hardware circuitry and software, nor to any specific source for the instructions executed by the data processing system.

[0182] Although some figures illustrate several operations in a particular order, operations that are not order-dependent may be reordered, and other operations may be combined or decomposed. Although some reordering or other groupings are specifically mentioned, other groupings will be apparent to one of ordinary skill in the art, and therefore no exhaustive list of alternatives is provided. Furthermore, it should be recognized that the stages may be implemented in hardware, firmware, or any combination thereof.

[0183] The above description and drawings are illustrative and should not be construed as limiting. Numerous specific details are described to provide a thorough understanding. However, in certain examples, well-known or conventional details are not described in order to avoid obscuring the description. References to one or an embodiment in the present invention are not necessarily references to the same embodiment; and such references mean at least one.

[0184] In the foregoing specification, the invention has been described with reference to specific exemplary embodiments of the invention. It will be apparent that various modifications may be made thereto without departing from the broader spirit and scope set forth in the appended claims. Therefore, the specification and drawings should be regarded in an illustrative rather than a restrictive sense.

Claims

1. A method implemented in a computing device, the method comprising: generating an initial key based on a value provided by at least one physically unclonable function (PUF); generating a first key based on concatenating the initial key with a predetermined bit pattern; generating an obfuscated key based on interleaving the first key with an inverted bit pattern, wherein the inverted bit pattern is provided by inverting bits of the first key; and The obfuscated key is stored in non-volatile memory of the computing device. 2 . The method of claim 1 , wherein generating the initial key comprises using the value as an input to a message authentication code (MAC) to generate the initial key.

3. The method of claim 1, wherein the obfuscated key is stored in a special area of ​​the non-volatile memory, wherein the special area is outside of a user addressable memory space.

4. The method according to claim 1, wherein: interleaving the first key with the inverted bit pattern provides a second key; and Generating the obfuscated key further includes interleaving the second key with pseudo-random bits. 5 . The method of claim 4 , further comprising deriving the pseudo-random bits from the first key or the second key using a hash function.

6. The method according to claim 4, wherein: interleaving the second key with pseudo-random bits to provide a third key; and Generating the obfuscated key further includes concatenating the third key with error correction code bits.

7. The method of claim 6, wherein the computing device is a first computing device, the method further comprising: sharing at least one of the initial key, the first key, or the third key with a second computing device; and receiving, from the second computing device, a message encrypted using the share of at least one of the initial key, the first key, or the third key.

8. The method according to claim 6, wherein: Concatenating the third key with error correction code bits provides a fourth key; and Generating the obfuscated key further includes concatenating the fourth key with one or more copies of the fourth key.

9. The method according to claim 8, wherein: concatenating the fourth key with one or more copies of the fourth key to provide a fifth key; and Storing the obfuscated key includes storing the first copy of the fifth key on at least one of a row or block of the non-volatile memory that is different from a row or block on which a second copy of the fifth key is stored.

10. A system comprising: at least one physically unclonable function (PUF) device configured to provide a first value; a non-volatile memory configured to store an obfuscated key; at least one processor; and A memory containing instructions configured to instruct the at least one processor to: generating an initial key based on the first value provided by the at least one PUF device; generating a first key based on concatenating the initial key with a predetermined bit pattern; generating the obfuscated key based on interleaving the first key with an inverted bit pattern, wherein the inverted bit pattern is provided by inverting bits of the first key; and The obfuscated key is stored in the non-volatile memory.

11. The system of claim 10, further comprising a message authentication code (MAC) module configured to receive a value provided by the at least one PUF device, wherein generating the initial key comprises using the first value as an input to the MAC module to generate the initial key.

12. The system of claim 10, wherein generating the obfuscated key comprises at least one of: interleaving the first key with the inverted bit pattern to provide a second key; interleaving the second key with pseudo-random bits to provide a third key; concatenating the third key with error correction code bits to provide a fourth key; or The fourth key is concatenated with the one or more copies of the fourth key.

13. The system of claim 10, wherein the stored obfuscated key has an equal number of 0 bits and 1 bits.

14. The system of claim 10, wherein generating the obfuscated key further comprises interleaving a key with pseudorandom bits.

15. The system of claim 10, wherein generating the obfuscated key further comprises concatenating a key with error correction code bits.

16. A non-transitory computer storage medium storing instructions that, when executed on a computing device, cause the computing device to perform a method, the method comprising: Generate an initial key using key injection or at least one physically unclonable function (PUF); generating a first key based on concatenating the initial key with a predetermined bit pattern; generating an obfuscated key based on interleaving the first key with an inverted bit pattern, wherein the inverted bit pattern is provided by inverting bits of the first key; and The obfuscated key is stored in non-volatile memory.

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