Semiconductor packaging structure and its manufacturing method

Abstract

The present invention provides a semiconductor packaging structure and a preparation method thereof. By using a WB wire including a wire incision to reduce the radial size of the WB wire, when performing the wire bonding process, only one solder joint can be formed. Then, through stretching, the WB wire is disconnected from the wire incision, and a metal ball is formed by discharging, so as to prepare a first metal wire with the solder joint as the bottom, the metal ball as the top, and including a straight metal wire. After subsequent packaging and removal of part of the packaging layer, the metal ball is exposed, and the metal ball can be directly used as a metal layer connecting the first metal wire and the second metal wire, thereby reducing the steps, time, and cost of forming the metal layer and improving the product quality.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor packaging, and particularly to a semiconductor packaging structure and a preparation method thereof. Background Art

[0002] As the functions of integrated circuits become stronger, and the performance and integration level become higher, packaging technology plays an increasingly important role in integrated circuit products. Lower cost, more reliable, faster, and higher density circuits are the goals pursued by integrated circuit packaging.

[0003] In the existing semiconductor packaging process, the wire bonding process (WB) is one of the most important and challenging process steps. Currently, the wire bonds used in the industry are formed by drawing a wire column multiple times to obtain a wire bond with a certain wire diameter and a smooth surface. When performing wire bonding, it is necessary to use the method of making the second bond (2nd Bond), that is, using a special wire bonder to first semi-cut the wire bond through the 2nd Bond method, then stretch and cut the wire bond to form the required wire shape, and then perform packaging. Considering the special functional requirements of the package, it is usually necessary to prepare wire bonds on the surface of the package to form a stacked wire bond structure. When preparing the stacked wire bond structure, since the wire diameter of the wire bond is relatively thin, in order to improve the firmness and stability of the combination of the first wire bond located in the lower layer and the second wire bond located in the upper layer, it is usually necessary to use electroplating on the package to prepare a metal layer that can increase the contact area between wire bonds, so as to connect the first wire bond located in the lower layer and the second wire bond located in the upper layer through the metal layer. The process steps of forming the metal layer by electroplating are complex, and after the wire bond is bent, it cannot form a straight wire bond that meets the requirements after stretching, and during the stretching process of the wire bond, quality problems such as virtual welding of the wire bond are likely to occur.

[0004] Therefore, it is necessary to provide a new type of semiconductor packaging structure and a preparation method thereof. Summary of the Invention

[0005] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a semiconductor packaging structure and a preparation method thereof, which are used to solve the above-mentioned process and product quality problems faced in the prior art when preparing a stacked wire bond structure.

[0006] To achieve the above purpose and other related purposes, the present invention provides a preparation method of a semiconductor packaging structure, including the following steps:

[0007] Provide a chip, the surface of the chip includes pads;

[0008] Form a first metal wire bond, which includes:

[0009] Provide a WB wire, the WB wire includes a wire incision, and the wire incision extends radially from the surface of the WB wire to the WB wire to reduce the radial size of the WB wire;

[0010] Electrically connect the WB wire to the pad to form a solder joint;

[0011] Stretch the WB wire from the solder joint so that the WB wire breaks at the wire incision;

[0012] Perform discharging to form a metal ball, and prepare the first metal wire bond with the solder joint as the bottom and the metal ball as the top, and the first metal wire bond includes a straight metal wire bond located between the solder joint and the metal ball;

[0013] Form an encapsulation layer, and the encapsulation layer covers the chip and the first metal wire bond;

[0014] Remove the encapsulation layer to expose the metal ball on the surface of the encapsulation layer;

[0015] Form a second metal wire bond on the encapsulation layer, and the second metal wire bond is electrically connected to the metal ball.

[0016] Optionally, the preparation method of the second metal wire bond is the same as that of the first metal wire bond.

[0017] Optionally, after exposing the metal ball and before forming the second metal wire bond, it further includes a step of forming a metal layer, and the metal layer includes one of an Au layer and a Ni / Au layer.

[0018] Optionally, the metal ball exposed on the surface of the encapsulation layer covers the first metal wire bond in the vertical area.

[0019] Optionally, the first metal wire bond includes one of a Cu wire, an Au wire, a Cu alloy wire, an Au alloy wire, and a Cu / Au alloy wire; the second metal wire bond includes one of a Cu wire, an Au wire, a Cu alloy wire, an Au alloy wire, and a Cu / Au alloy wire.

[0020] Optionally, the wire incision includes one of a groove, an annular groove, and a through hole.

[0021] The present invention also provides a semiconductor package structure, and the semiconductor package structure includes:

[0022] A chip, and the surface of the chip includes pads;

[0023] The first metal wire bond, the first metal wire bond includes a solder joint at the bottom, a metal ball at the top, and a straight metal wire bond between the solder joint and the metal ball, and the first metal wire bond is electrically connected to the pad through the solder joint;

[0024] The encapsulation layer, the encapsulation layer covers the chip and the first metal wire bond, and the surface of the encapsulation layer exposes the metal ball;

[0025] The second metal wire bond, the second metal wire bond is electrically connected to the metal ball.

[0026] Optionally, the second metal wire bond has the same structure as the first metal wire bond.

[0027] Optionally, a metal layer is further included between the metal ball and the second metal wire bond, and the metal layer includes one of an Au layer and a Ni / Au layer.

[0028] Optionally, the metal ball exposed on the surface of the encapsulation layer covers the first metal wire bond in the vertical region.

[0029] Optionally, the first metal wire bond includes one of a Cu wire, an Au wire, a Cu alloy wire, an Au alloy wire, and a Cu / Au alloy wire; the second metal wire bond includes one of a Cu wire, an Au wire, a Cu alloy wire, an Au alloy wire, and a Cu / Au alloy wire.

[0030] As described above, the semiconductor package structure and its manufacturing method of the present invention use a WB metal wire including a metal wire incision to reduce the radial size of the WB metal wire. Thus, during the wire bonding process, only one solder joint can be formed, and then through stretching, the WB metal wire is disconnected from the metal wire incision, and a metal ball is formed by discharging. A first metal wire bond with a solder joint as the bottom, a metal ball as the top, and including a straight metal wire bond is prepared. After subsequent encapsulation and removal of part of the encapsulation layer, the metal ball is exposed, and the metal ball can be directly used as the metal layer connecting the first metal wire bond and the second metal wire bond. Therefore, the steps, time, and cost of forming the metal layer can be reduced, and the product quality can be improved. Description of the Drawings

[0031] Figure 1 It shows a process flow schematic diagram of the manufacturing method of the semiconductor package structure in the present invention.

[0032] Figures 2a to 2d It shows an axial cross-sectional structure schematic diagram of a WB metal wire including a groove in the present invention.

[0033] Figure 3 It shows Figure 2a An enlarged structure schematic diagram of the cross-section A - A' in

[0034] Figure 4 It shows a schematic axial cross-sectional structure diagram of the WB metal wire in the present invention.

[0035] Figures 5a to 5c Shown as Figure 4 an enlarged structural schematic diagram of the cross-section B-B' in

[0036] Figure 6 It shows a schematic axial cross-sectional structure diagram of a WB metal wire including a through hole in the present invention.

[0037] Figure 7 Shown as Figure 6 an enlarged structural schematic diagram of the cross-section C-C' in

[0038] Figure 8 It shows a schematic diagram of the formation process of the first metal bonding wire in the present invention.

[0039] Figure 9 It shows a schematic structural diagram after forming the first metal bonding wire in the present invention.

[0040] Figure 10 It shows a schematic structural diagram after forming the encapsulation layer in the present invention.

[0041] Figure 11 It shows a schematic structural diagram of removing the encapsulation layer to expose the metal ball in the present invention.

[0042] Figure 12 It shows a schematic structural diagram of forming a metal layer in the present invention.

[0043] Figure 13 It shows a schematic structural diagram after forming the second metal bonding wire in the present invention.

[0044] Description of component labels

[0045] 100 Chip

[0046] 101 Pad

[0047] 200 WB metal wire

[0048] 201 Metal wire notch

[0049] 300 First metal bonding wire

[0050] 301 Solder joint

[0051] 302 Straight metal bonding wire

[0052] 303 Metal ball

[0053] 400 Wedge

[0054] 500 Encapsulation layer

[0055] 600 Metal layer

[0056] 700 Second metal wire bond

[0057] X-axis direction

[0058] Y-radial direction

[0059] D running direction Detailed implementation manners

[0060] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0061] Please refer to Figures 1 to 13 . It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0062] Such as Figure 1 , this embodiment provides a method for preparing a semiconductor package structure. By using a WB metal wire including a metal wire incision to reduce the radial size of the WB metal wire, so that when performing the wire bonding process, only one solder joint can be formed. Then, through stretching, the WB metal wire is disconnected from the metal wire incision, and a metal ball is formed by discharging. A first metal wire bond with a solder joint as the bottom, a metal ball as the top, and including a straight metal wire bond is prepared. After subsequent packaging and removing part of the packaging layer, the metal ball is exposed. Thus, the first metal wire bond and the subsequently prepared second metal wire bond can be directly connected through the metal ball, thereby reducing the steps, time, and cost of forming the metal layer and improving the product quality.

[0063] As shown in FIGS. 2 to Figure 13 , it schematically shows the diagram of preparing a semiconductor package structure in this embodiment.

[0064] First, a chip 100 is provided, and the surface of the chip 100 includes pads 101.

[0065] Secondly, a first metal bonding wire 300 is formed, which includes: providing a WB metal wire 200, electrically connecting the WB metal wire 200 to the pad 101 to form a solder joint 301; stretching the WB metal wire 200 from the solder joint 301 so that the WB metal wire 200 is disconnected at the wire notch 201; discharging to form a metal ball 303, and preparing the first metal bonding wire 300 with the solder joint 301 as the bottom and the metal ball 303 as the top, and the first metal bonding wire 300 includes a straight metal bonding wire 302 located between the solder joint 301 and the metal ball 303.

[0066] Specifically, as Figures 2a to 7 , it shows the morphology of the provided WB metal wire 200 in this embodiment. Among them, as Figures 2a to 2d , the WB metal wire 200 includes an axial direction X and a radial direction Y, and the wire notch 201 of the WB metal wire 200 extends from the surface of the WB metal wire 200 to the radial direction Y of the WB metal wire 200 to reduce the radial dimension of the WB metal wire 200 through the wire notch 201. The specific wire diameter of the WB metal wire 200 can be selected according to needs and is not limited here. The formation method of the wire notch 201 can be selected according to needs, such as laser method, mechanical cutting method, etc., and is not limited here.

[0067] As a further embodiment of this embodiment, the wire notch 201 includes a groove, and the cross-sectional morphology of the groove includes one or a combination of V-shaped, U-shaped, square, and trapezoidal.

[0068] Specifically, as Figure 2a , Figure 2d and Figure 3 , among which, Figure 3 shows Figure 2a the enlarged structural schematic diagram of the A-A' cross-section in Figure 2a . Among them, the WB metal wire 200 may include only 1 groove in a radial Y cross-section, and the cross-sectional morphology of the groove may include V-shaped (such as Figure 2b ), U-shaped (such as Figure 2c ), square (such as Figure 2d ), and trapezoidal (such as

[0069] ). Along the axial direction X of the WB metal wire 200, preferably, the grooves have the same morphology. Of course, the grooves may also include one of the combinations formed by V-shaped, U-shaped, square, and trapezoidal, and are not overly limited here.

[0070] Specifically, when the percentage is 20%, the stability of the WB wire 200 can be improved, the probability of breakage of the WB wire 200 can be reduced, so as to reduce the time for loading the wire into the capillary due to the breakage of the WB wire 200; when the percentage is 80%, the process difficulty of disconnecting the WB wire 200 from the wire incision 201 can be reduced. Combining with the process requirements, in this embodiment, it is preferred that the percentage of the depth of the groove to the diameter of the WB wire 200 is 50%, so as to reduce the process difficulty of disconnecting the WB wire 200 on the premise of meeting the stability of the WB wire 200. The value of the ratio is not limited to this, and can be selected according to the specific material and size of the WB wire 200, such as 30%, 45%, 60%, etc.

[0071] As a further embodiment of this embodiment, the WB wire 200 may include N≥2 grooves in a radial Y cross-section, and the N grooves are symmetrically distributed.

[0072] Specifically, such as Figure 4 、 Figure 5a and Figure 5b , wherein, Figure 5a and Figure 5b are shown as Figure 4 two enlarged structural schematic diagrams of the B-B' cross-section in . The WB wire 200 has N = 2 in a radial Y cross-section, and preferably the grooves are symmetrically distributed, so as to increase the convenience and process difficulty of the subsequent wire breaking process. The value of N and the distribution of the grooves are not limited to this, and can be selected according to needs, such as N can be 3, 4, 5, etc., and the N grooves can also be evenly distributed at equal intervals.

[0073] As a further embodiment of this embodiment, the wire incision 201 includes an annular groove, and the cross-sectional morphology of the annular groove includes one or a combination of V-shaped, U-shaped, square, and trapezoidal.

[0074] Specifically, such as Figure 4 and Figure 5c , wherein, Figure 5c is shown as Figure 4 another enlarged structural schematic diagram of the B-B' cross-section in . Figure 4The metal wire incision 201 therein is an annular groove. The axial X-section of the annular groove is V-shaped. The annular groove and the WB metal wire 200 have the same center, so as to improve the stability of the WB metal wire 200 and reduce the process difficulty during the subsequent wire cutting process. The cross-sectional morphology of the annular groove is not limited to this, and it can also be one of U-shaped, square and trapezoidal. And along the axial X of the WB metal wire 200, preferably the annular groove has the same morphology. Of course, it can also make the annular groove have one of the combinations formed by the V-shaped, U-shaped, square and trapezoidal, and can be specifically selected according to needs, and there is no excessive limitation here.

[0075] As a further embodiment of this embodiment, the metal wire incision 201 includes a through hole penetrating the WB metal wire 200, and the cross-sectional morphology of the through hole includes one or a combination of a circle and a polygon.

[0076] Specifically, as Figure 6 and Figure 7 , when the metal wire incision 201 adopts a through hole penetrating the WB metal wire 200, the maximum distance of the through hole in the radial Y of the WB metal wire 200 needs to be less than the diameter of the WB metal wire 200, and its percentage can include 20% - 80%, preferably 50%, and can be specifically selected according to needs.

[0077] As a further embodiment of this embodiment, the metal wire incision 201 can also include a combination of the groove, the annular groove and the through hole, which will not be elaborated here.

[0078] As a further embodiment of this embodiment, on the axial X of the WB metal wire 200, there is an equal spacing between adjacent metal wire incisions 201.

[0079] Specifically, the spacing between adjacent metal wire incisions 201 determines the length of the straight metal bonding wire 302. The setting of the spacing between adjacent metal wire incisions 201 can be selected according to specific needs, and there is no excessive limitation here.

[0080] As a further embodiment of this embodiment, the WB metal wire 200 can include one of Cu wire, Au wire, Cu alloy wire, Au alloy wire and Cu / Au alloy wire, but is not limited thereto.

[0081] Such as Figure 8 schematically shows the formation process diagram of the first metal bonding wire 300 in this embodiment.

[0082] Specifically, as Figure 8 and Figure 9, mount the WB wire 200 on the bonding tool 400; connect the WB wire 200 to the pad 101 to form the solder joint 301; stretch the WB wire 200 along the required running direction D from the solder joint 301 to break the WB wire 200 at the wire cut 201 to form the straight metal bonding wire 302; perform discharge balling on the broken surface of the wire cut 201 to form the metal ball 303, thereby preparing the first metal bonding wire 300 with the solder joint 301 as the bottom and the metal ball 303 as the top and having the straight metal bonding wire 302. In this embodiment, only one solder joint 301 is formed. By stretching, the WB wire 200 is broken at the wire cut 201 to form the straight metal bonding wire 302, thereby improving the UPH of the process and the product quality. Among them, the range of the angle between the straight metal bonding wire 302 and the surface of the chip 100 may include 45° to 90°, such as 60°, 75°, etc., so as to facilitate setting the electrical lead-out of the first metal bonding wire 300 as needed; the metal ball 303 can increase the effective area of the first metal bonding wire 300, so that the metal ball 303 can be directly used as the metal layer for connecting the bonding wire, thereby reducing the steps, time and cost of forming the metal layer and improving the product quality.

[0083] such as Figure 10 , form a package layer 500 covering the chip 100 and the first metal bonding wire 300.

[0084] Specifically, the package layer 500 covers the surface of the chip 100 and the first metal bonding wire 300. Among them, the package layer 500 may include one of a polyimide package layer, a silicone package layer and an epoxy resin package layer, and the method of forming the package layer 500 may include one of compression molding, transfer molding, liquid encapsulation molding, vacuum lamination and spin coating.

[0085] such as Figure 11 , remove the package layer 500 to expose the metal ball 303 on the surface of the package layer 500.

[0086] Specifically, the method of removing the package layer 500 may include chemical mechanical polishing, but is not limited thereto. Preferably, the metal ball 303 exposed on the surface of the package layer 500 covers the first metal bonding wire 300 in the vertical area, that is, the area of the exposed metal ball 303 is larger than the area of the straight metal bonding wire 302, so as to increase the area of the first metal bonding wire 300 through the metal ball 303 to facilitate the subsequent connection of the bonding wire.

[0087] such as Figure 12 and Figure 13, a second metal wire 700 is formed on the encapsulation layer 500, and the second metal wire 700 is electrically connected to the metal ball 303.

[0088] As a further embodiment of this embodiment, the preparation method of the second metal wire 700 is the same as that of the first metal wire 300.

[0089] Specifically, the second metal wire 700 can also use the WB metal wire 200 and the method of preparing the first metal wire 300 to prepare the second metal wire 700, but it is not limited thereto. The second metal wire 700 can also use other types of wire, and no excessive restrictions are made here.

[0090] As a further embodiment of this embodiment, after exposing the metal ball 303 and before forming the second metal wire 700, it further includes the step of forming a metal layer 600, and the metal layer 600 includes one of an Au layer and a Ni / Au layer.

[0091] Specifically, the first metal wire 300 can include one of a Cu wire, an Au wire, a Cu alloy wire, an Au alloy wire, and a Cu / Au alloy wire; the second metal wire 700 can include one of a Cu wire, an Au wire, a Cu alloy wire, an Au alloy wire, and a Cu / Au alloy wire. For example, when the first metal wire 300 uses an Au wire and the second metal wire 700 uses an Au wire, after exposing the metal ball 303, the first metal wire 300 and the second metal wire 700 can be directly connected through the metal ball 303, and there is no need to form the metal layer 600 anymore, thereby avoiding preparing a metal layer between the first metal wire 300 and the second metal wire 700. When the first metal wire 300 uses a Cu wire and the second metal wire 700 uses a Cu wire, after exposing the metal ball 303, the metal layer 600 can be prepared on the surface of the encapsulation layer 500 by methods such as electroplating, PVD, and CVD. The metal layer 600 includes one of an Au layer and a Ni / Au layer to further enhance the firmness and stability of the bond between the first metal wire 300 and the second metal wire 700. Thus, in this embodiment, through the metal ball 303, the step of preparing a metal layer on the surface of the encapsulation layer 500 can be avoided or reduced, thereby reducing process steps, time, and costs.

[0092] Such as Figure 13 , this embodiment also provides a semiconductor encapsulation structure, and the semiconductor encapsulation structure can be prepared by the above method, but it is not limited thereto.

[0093] Among them, the semiconductor packaging structure includes: a chip 100, a first metal wire 300, a packaging layer 500, and a second metal wire 700. The surface of the chip 100 includes pads 101. The first metal wire 300 includes a solder joint 301 at the bottom, a straight metal wire 302, and a metal ball 303 at the top, and the first metal wire 300 is electrically connected to the pad 101 through the solder joint 301; the packaging layer 500 covers the chip 100 and the first metal wire 300, and the metal ball 303 is exposed on the surface of the packaging layer 500, and the second metal wire 700 is electrically connected to the metal ball 303.

[0094] In this embodiment, the first metal wire 300 and the second metal wire 700 can be directly connected through the metal ball 303, thereby reducing the steps, time, and cost of forming a metal layer, and a straight metal wire 302 can be formed to improve product quality.

[0095] As a further embodiment of this embodiment, the second metal wire 700 has the same structure as the first metal wire 300.

[0096] As a further embodiment of this embodiment, a metal layer 600 is further included between the metal ball 303 and the second metal wire 700, and the metal layer 600 includes one of an Au layer and a Ni / Au layer.

[0097] As a further embodiment of this embodiment, the metal ball 303 exposed on the surface of the packaging layer 500 covers the first metal wire 300 in the vertical region.

[0098] As a further embodiment of this embodiment, the first metal wire includes one of a Cu wire, an Au wire, a Cu alloy wire, an Au alloy wire, and a Cu / Au alloy wire; the second metal wire includes one of a Cu wire, an Au wire, a Cu alloy wire, an Au alloy wire, and a Cu / Au alloy wire.

[0099] In summary, for the semiconductor packaging structure and its manufacturing method of the present invention, by using a WB metal wire including a metal wire incision to reduce the radial size of the WB metal wire, when performing a wire bonding process, only one solder joint can be formed, and then through stretching, the WB metal wire is disconnected from the metal wire incision, and a metal ball is formed through discharging, to prepare a first metal wire with a solder joint as the bottom, a metal ball as the top, and including a straight metal wire. After subsequent packaging and removing part of the packaging layer, the metal ball is exposed, and the metal ball can be directly used as a metal layer connecting the first metal wire and the second metal wire, thereby reducing the steps, time, and cost of forming a metal layer and improving product quality. Therefore, the present invention effectively overcomes various drawbacks in the prior art and has high industrial utilization value.

[0100] The above embodiments are only illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A method for preparing a semiconductor package structure, characterized in that, Including the following steps: Providing a chip, the surface of the chip includes pads; Forming a first metal wire bond, which includes: Providing a WB metal wire, the WB metal wire includes a wire notch, the wire notch extends radially from the surface of the WB metal wire to the radial direction of the WB metal wire to reduce the radial size of the WB metal wire, and the wire notch includes a through hole penetrating the WB metal wire; Electrically connecting the WB metal wire to the pad to form a solder joint; Stretching the WB metal wire from the solder joint to break the WB metal wire at the wire notch; Performing discharging to form a metal ball, preparing the first metal wire bond with the solder joint as the bottom and the metal ball as the top, and the first metal wire bond includes a straight metal wire bond located between the solder joint and the metal ball; Forming a packaging layer, the packaging layer covers the chip and the first metal wire bond; Removing the packaging layer to expose the metal ball on the surface of the packaging layer, and the metal ball exposed on the surface of the packaging layer covers the first metal wire bond in the vertical area; Forming a second metal wire bond on the packaging layer, the second metal wire bond is electrically connected to the metal ball.

2. The manufacturing method of the semiconductor package structure according to claim 1, wherein: The preparation method of the second metal wire bond is the same as that of the first metal wire bond.

3. The method for manufacturing the semiconductor package structure according to claim 1, wherein: After exposing the metal ball and before forming the second metal wire bond, it further includes the step of forming a metal layer, the metal layer includes one of an Au layer and a Ni / Au layer.

4. The method for manufacturing a semiconductor package structure according to claim 1, wherein: The first metal wire bond includes one of a Cu wire, an Au wire, a Cu alloy wire, and an Au alloy wire; the second metal wire bond includes one of a Cu wire, an Au wire, a Cu alloy wire, and an Au alloy wire.

5. A semiconductor package structure, characterized in that, The semiconductor packaging structure is prepared by using the preparation method described in any one of claims 1 to 4, wherein the semiconductor packaging structure includes: A chip, the surface of the chip includes pads; A first metal wire bond, the first metal wire bond includes a solder joint at the bottom, a metal ball at the top, and a straight metal wire bond located between the solder joint and the metal ball, and the first metal wire bond is electrically connected to the pad through the solder joint; A packaging layer, the packaging layer covers the chip and the first metal wire bond, and the metal ball is exposed on the surface of the packaging layer, and the metal ball exposed on the surface of the packaging layer covers the first metal wire bond in the vertical area; A second metal wire bond, the second metal wire bond is electrically connected to the metal ball.

6. The semiconductor package structure according to claim 5, wherein: The second metal wire bond has the same structure as the first metal wire bond.

7. The semiconductor package structure according to claim 5, wherein: There is also a metal layer between the metal ball and the second metal wire bond, the metal layer includes one of an Au layer and a Ni / Au layer.

8. The semiconductor package structure according to claim 5, wherein: The first metal wire bond includes one of a Cu wire, an Au wire, a Cu alloy wire, and an Au alloy wire; the second metal wire bond includes one of a Cu wire, an Au wire, a Cu alloy wire, and an Au alloy wire.

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