A wiring safety guarantee method and system for transformer integrated tester

Abstract

The present invention discloses a wiring safety guarantee method and system for a transformer integrated tester, which runs on all circuit boards in the system, and includes: a hardware layer, which is responsible for executing the hardware function implementation of the transformer integrated tester; a connection layer, which is used to establish communication between the hardware in the hardware layer; an application layer, which realizes the connection between the hardware in the hardware layer according to the received test task and the hardware connection rules and verifies the connection relationship between the hardware in the hardware layer; a main control layer, which sends the current test task to the application layer for comparison with the hardware connection verification database. The present invention monitors the connection status of each hardware module and generates an internal connection diagram, and compares the internal connection diagram with the pre-set hardware connection rule library and hardware connection verification database to realize wiring monitoring and achieve the role of wiring safety guarantee.

Description

Technical Field

[0001] The invention relates to the technical field of transformer testing, and in particular to a wiring safety assurance method system applied to an integrated transformer tester. Background Art

[0002] The transformer integrated tester is a tool that provides multiple test contents with one-time wiring. Compared with traditional transformer testers, this tester realizes automated and integrated measurement through automatic switching of internal circuits. Since the instrument adopts automatic internal circuit wiring switching and is used in the field of high-voltage transformers, the correctness of the connection of the instrument is extremely high. In the case of incorrect connection, the instrument may be damaged or even a safety accident may occur. Summary of the invention

[0003] One of the technical problems to be solved by the present invention is to provide a wiring safety assurance method applied to an integrated transformer tester in order to ensure the correctness of the internal circuit wiring of the instrument and prevent wiring errors from occurring during the testing process of the integrated transformer tester.

[0004] The second technical problem to be solved by the present invention is to provide a wiring safety assurance system applied to the transformer integrated tester to ensure the correctness of the internal circuit wiring of the instrument to prevent wiring errors.

[0005] As a first aspect of the present invention, a wiring safety guarantee method applied to a transformer integrated tester is characterized in that: after the main control module switches the measurement task, the internal hardware circuit of the transformer integrated tester starts to reconnect automatically. In this process, the internal hardware circuit reconnects layer by layer starting from VCC - the hardware circuit that bears the test function after reconnection is called a test network - when a hardware IC module is connected to the test network, the hardware connection communication system of the connection layer sends a startup instruction to the data communication interface circuit of the hardware IC module, and after the data communication interface circuit receives the startup instruction information, the memory storage module sends a response information to the data communication interface circuit to the hardware connection abstract system;

[0006] After receiving the response information of a hardware IC module, the hardware connection abstraction system analyzes the path part of the response information, and verifies the ictype of the hardware IC module and the ictype of the upper-level hardware IC module by querying the hardware connection rule library to ensure that the connection at each level is normal;

[0007] After all hardware IC modules are connected, the hardware connection abstraction system abstracts all the response information obtained to obtain the current hardware connection tree, and compares it with the hardware connection tree stored in the hardware connection verification database. If the hardware connection tree does not exist in the hardware connection verification database, the connection error information is directly reported to the main control module in the main control layer; if the hardware connection verification database shows that the hardware connection tree is the same as the hardware connection tree of "Task A", the main control module in the main control layer is requested to name the current measurement task; if the current measurement task name is "Task A", the connection correct information is returned, otherwise the connection error information is returned.

[0008] As a second aspect of the present invention, a wiring safety assurance system applied to a transformer integrated tester runs on all circuit boards in the wiring safety assurance system applied to the transformer integrated tester, and includes:

[0009] The hardware layer is responsible for implementing the hardware functions of the transformer integrated tester;

[0010] A connection layer, which is used to establish communication between hardware in the hardware layer;

[0011] The application layer realizes the connection between the hardware in the hardware layer according to the received test task and the hardware connection rules and verifies the connection relationship between the hardware in the hardware layer;

[0012] The main control layer sends the current test task to the application layer for comparison with the hardware connection verification database.

[0013] In a preferred embodiment of the present invention, the hardware layer is composed of a plurality of hardware IC modules and a memory storage module attached to each hardware IC module and connected to the corresponding hardware IC module, wherein each hardware IC module is responsible for executing the hardware function implementation of the transformer integrated tester, and each memory storage module stores relevant information of the corresponding hardware IC module.

[0014] In a preferred embodiment of the present invention, each memory storage module is connected to the corresponding hardware IC module via a data communication interface circuit, and the data communication interface circuit is connected after the hardware IC module is called. After the data communication interface circuit is connected, it sends a startup instruction information to the corresponding memory storage module. The format of the startup instruction information is shown in the following formula:

[0015] {'status':'enable'}

[0016] The status part represents the enabled state of the hardware IC module, which is the enabled state;

[0017] After receiving the start instruction, the memory storage module sends a response message to the data communication interface circuit, and the message format is:

[0018] {'status":'enable','ictype':xxx,'icid':xxx,'icparam':data,'path':[]}

[0019] Among them, status is consistent with the definition in the above formula, ictype is the chip type of the current hardware IC module, icid is the unique ID of the hardware IC module, and icparam contains the functions and performance parameters of the hardware IC module; the response information is also uploaded to the application layer through the data communication interface circuit for subsequent calls.

[0020] In a preferred embodiment of the present invention, the connection layer includes a hardware connection communication system, which is composed of data communication channels between various hardware IC modules in the hardware layer, each data communication channel is connected to the corresponding data communication interface circuit, and is responsible for maintaining the smooth flow of channels between various hardware IC modules, and is responsible for transmitting the startup instruction information sent by the application layer after the hardware IC module is called, and transmitting the response information of the hardware IC module after the hardware IC module responds to the startup command. At the same time, the hardware connection communication system is also responsible for adding path information to the response information and the startup instruction information of the hardware IC module.

[0021] In a preferred embodiment of the present invention, the application layer includes three modules: a hardware connection abstraction system, a hardware connection rule base, and a hardware connection verification database; wherein:

[0022] The hardware connection abstraction system is responsible for extracting the connection relationship of each hardware IC module, and abstracting the connection structure of the overall hardware layer into a tree diagram, called a hardware connection tree, for subsequent connection verification of each hardware IC module. The hardware connection abstraction system is provided with a starting node at the beginning, i.e., the VCC position. After each subsequent hardware IC module is called, the hardware connection tree table structure is constructed through the response information;

[0023] The hardware connection rule base specifies the connection rules of each hardware IC module, which is identified by the ictype field. In the connection relationship of each hardware IC module extracted by the hardware connection abstract system, the connection between each node and the upper node is checked for compliance; each ictype field contains the upper ictype that can be connected, and the hardware connection rule query can be completed by traversing each node in the hardware connection tree and checking whether the ictype of its upper child node conforms to the node record and the ictype in the hardware connection rule base;

[0024] The hardware connection verification database specifies the shape of the hardware connection tree, and various forms of hardware connection trees of the transformer integrated tester are recorded in the hardware connection verification database. After the transformer integrated tester completes the circuit switching, it will not be directly connected to the high-voltage line extended from the transformer temporarily, but the abstracted hardware connection tree will be matched with each hardware connection tree in the hardware connection verification database and the test task name published in the main control layer. If the one-to-one matching is completed, the hardware connection verification is passed, so as to connect the high-voltage line extended from the transformer for testing.

[0025] In a preferred embodiment of the present invention, the main control layer includes a main control module.

[0026] The present invention is mainly used for an integrated transformer tester, which mainly monitors the connection status of each hardware module and generates an internal connection diagram, and compares the internal connection diagram with a preset hardware connection rule library and a hardware connection verification database to realize wiring monitoring and achieve the purpose of wiring safety protection. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 The schematic diagram of the architecture of the wiring safety assurance system of the present invention applied to the transformer integrated tester.

[0028] Figure 2 The present invention is a connection diagram of various circuit modules in the connection layer of the wiring safety assurance system of the transformer integrated tester. DETAILED DESCRIPTION

[0029] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments.

[0030] The wiring safety assurance system applied to the transformer integrated tester of the present invention is mainly used for the transformer integrated tester. The transformer integrated tester is an integrated transformer performance parameter testing instrument. Compared with the traditional multi-instrument transformer testing device, the instrument can achieve multiple measurements and multiple measurements with one wiring. Its principle is mainly to achieve automation through internal hardware circuit reuse and the use of digital switches for circuit switching. Therefore, non-manual wiring may cause miswiring due to digital circuit failure or transmission failure during the wiring process, resulting in safety hazards. This system mainly monitors the connection status of each hardware module and generates an internal connection diagram, and compares the diagram with the pre-set hardware connection rule library and hardware connection verification database to achieve wiring monitoring and achieve the purpose of wiring safety assurance.

[0031] The wiring safety guarantee system applied to the transformer integrated tester of the present invention runs on all circuit boards in the system.

[0032] See also Figure 1 The wiring safety assurance system applied to the transformer integrated tester of the present invention is divided into four levels, namely, a hardware layer 10, a connection layer 20, an application layer 30 and a main control layer 40.

[0033] The hardware layer 10 is mainly composed of a number of hardware IC modules 11 and a memory storage module 12 attached to each hardware IC module 11. All the hardware IC modules 11 are responsible for implementing the hardware functions of the transformer integrated tester.

[0034] On each hardware IC module 11, there is a memory storage module 12, and the memory storage module 12 stores the relevant information of the corresponding hardware IC module 11 (IC type, IC function, IC number, etc.). On the connection part of each hardware IC module 11, there is a data communication interface circuit, which is connected after the corresponding hardware IC module 11 is called. After the data communication interface circuit is connected, it sends a startup instruction information to the corresponding memory storage module 12. The format of the startup instruction information is shown as follows:

[0035] {'status':'enable'}

[0036] The status part represents the enabled state of the hardware IC module 11, which is the enabled state. After receiving the startup instruction information, the memory storage module 12 sends a response message to the data communication interface circuit. The format of the response message is:

[0037] {'status":'enable','ictype':xxx,'icid':xxx,'icparam':data,'path':[]}

[0038] Wherein status is consistent with the definition in the above formula. ictype is the chip type of the current hardware IC module 11, such as adc, dac, amplifier, attenuator, etc. icid is the unique ID of the hardware IC module 11. icparam contains the function and performance parameters of the hardware IC module 11. This information is uploaded to the hardware connection abstraction system 31 of the application layer 30 through the data communication interface circuit for subsequent calls. path contains the path to which the hardware IC module 11 belongs, which will be explained in detail below.

[0039] The connection layer 20 includes a hardware connection communication system 21. The hardware connection communication system 21 is mainly composed of data communication channels between hardware IC modules 11, which connects the data communication interface circuits above each hardware IC module 11, is responsible for maintaining the smooth flow of channels between each hardware IC module 11, is responsible for transmitting the startup instruction information sent by the hardware connection abstraction system 31 of the application layer 30 after the hardware IC module 11 is called, and transmits the response information of the hardware IC module 11 after the hardware IC module 11 responds to the command. At the same time, the hardware connection communication system 21 is also responsible for adding path information to the response information and startup instruction information of the hardware IC module 11.

[0040] See also Figure 2 In the circuit module connection sequence of the hardware connection communication system 21, the path of the hardware connection abstract system 31 transmitted by module A to the application layer 30 is [VCC]; during the transmission process of module B, the data communication interface circuit of module B passes through the data communication interface circuit of module A, and in the connection layer 20, the information of module A is added to the path part of the response information of module B, and then passes through the VCC part, so the path transmitted back to the hardware abstract connection system is [A, VCC]. Similarly, the information transmitted back by module C is [B, A, VCC]. Similarly, the information transmitted back by module D is [D, VCC]. Similarly, the VDD module transmits back two pieces of information, namely [C, B, A, VCC] and [D, VCC]. Through this process, the connection relationship of each hardware IC module 11 is clearly shown.

[0041] The application layer 30 includes three modules: a hardware connection abstraction system 31 , a hardware connection rule base 32 and a hardware connection verification database 33 .

[0042] The hardware connection abstraction system 31 is responsible for extracting the connection relationship of each hardware IC module 11, and abstracting the connection structure of the overall hardware layer 10 into a tree diagram, called a hardware connection tree, for subsequent connection verification of each hardware IC module 11. The hardware connection abstraction system 31 is provided with a starting node at the beginning, i.e., the VCC position. After the subsequent hardware IC module 11 is called, the table structure of the hardware connection tree is constructed through the response information.

[0043] The hardware connection rule base 32 mainly stipulates the rules for connecting each hardware IC module 11, such as the rule that the ADC module is followed by the digital operation chip module. The rule is identified by the ictype field. It is mainly aimed at checking whether the connection between each node and the upper node is compliant in the connection relationship of each hardware IC module 11 extracted by the above-mentioned hardware connection abstract system 31. Each ictype field contains the upper ictype that can be connected. The hardware connection rule query can be completed by traversing each node in the hardware connection tree and checking whether the ictype of its upper child node conforms to the node record and the ictype in the hardware connection rule base.

[0044] The hardware connection verification database 33 mainly specifies the shape of the hardware connection tree. Various forms of hardware connection trees of the transformer integrated tester are recorded in the hardware connection verification database 33. After the transformer integrated tester completes the circuit switching, it temporarily does not directly connect to the high-voltage line extended from the transformer, but matches the abstracted hardware connection tree with each hardware connection tree in the hardware connection verification database 33 and the test task name published in the main control layer 40. If the one-to-one matching is completed, the hardware connection verification is passed, so as to connect the high-voltage line extended from the transformer for testing.

[0045] The main control layer 40 includes a main control module 41 , which mainly sends the name of the current test task to the hardware connection abstraction system 31 for comparison with the hardware connection verification database.

[0046] In the specific measurement process, after the main control module 41 switches the measurement task, the internal hardware circuit of the transformer integrated tester starts to reconnect automatically. In this process, the wiring safety assurance system applied to the transformer integrated tester of the present invention starts to run. The internal hardware circuit starts to reconnect layer by layer from VCC - the hardware circuit that bears the test function after the reconnection is called the test network - when a hardware IC module 11 is connected to the test network, the hardware connection communication system 21 of the connection layer 20 sends a startup instruction to the data communication interface circuit of the hardware IC module 11. After the data communication interface circuit receives the startup instruction information, the memory storage module 12 sends a response information to the data communication interface circuit to the hardware connection abstract system 31.

[0047] After receiving the response information of a hardware IC module 11, the hardware connection abstraction system 31 analyzes the path part of the response information, and verifies the ictype of the hardware IC module 11 and the ictype of the upper-level hardware IC module 11 by querying the hardware connection rule library to ensure that the connection at each level is normal.

[0048] After all the hardware IC modules 11 are connected, the hardware connection abstraction system 31 abstracts all the response information obtained to obtain the current hardware connection tree, and compares it with the hardware connection tree stored in the hardware connection verification database 33. If the hardware connection tree does not exist in the hardware connection verification database 33, the connection error information is directly reported to the main control module 41 in the main control layer 40. If the hardware connection verification database 33 shows that the hardware connection tree is the same as the hardware connection tree of "Task A", the main control module 41 in the main control layer 40 is requested to name the current measurement task. If the current measurement task name is "Task A", the connection correct information is returned, otherwise the connection error information is returned.

Claims

1. A wiring safety assurance method for a transformer integrated tester, characterized in that : After the main control module switches the measurement task, the internal hardware circuit of the transformer integrated tester starts to reconnect automatically. In this process, the internal hardware circuit reconnects layer by layer starting from VCC - the hardware circuit that bears the test function after reconnection is called the test network - when a hardware IC module is connected to the test network, the hardware connection communication system of the connection layer sends a startup instruction to the data communication interface circuit of the hardware IC module. After receiving the startup instruction information, the memory storage module sends a response information to the data communication interface circuit to the hardware connection abstract system; After receiving the response information of a hardware IC module, the hardware connection abstraction system analyzes the path part of the response information, and verifies the ictype of the hardware IC module and the ictype of the upper-level hardware IC module by querying the hardware connection rule library to ensure that the connection at each level is normal; After all hardware IC modules are connected, the hardware connection abstraction system abstracts all the response information obtained to obtain the current hardware connection tree, and compares it with the hardware connection tree stored in the hardware connection verification database. If the hardware connection tree does not exist in the hardware connection verification database, the connection error information is directly reported to the main control module in the main control layer; If the hardware connection verification database shows that the hardware connection tree is the same as the hardware connection tree of "Task A", the main control module in the main control layer is requested to name the current measurement task; if the current measurement task name is "Task A", a connection correct information is returned, otherwise a connection error information is returned.

2. A wiring safety assurance system applied to a transformer integrated tester, running on all circuit boards in the wiring safety assurance system applied to the transformer integrated tester, characterized in that: include: The hardware layer is responsible for implementing the hardware functions of the transformer integrated tester; A connection layer, which is used to establish communication between hardware in the hardware layer; The application layer realizes the connection between the hardware in the hardware layer according to the received test task and the hardware connection rules and verifies the connection relationship between the hardware in the hardware layer; The main control layer sends the current test task to the application layer for comparison with the hardware connection verification database; The hardware layer is composed of a number of hardware IC modules and a memory storage module attached to each hardware IC module and connected to the corresponding hardware IC module, wherein each hardware IC module is responsible for executing the hardware function implementation of the transformer integrated tester, and each memory storage module stores relevant information of the corresponding hardware IC module; Each memory storage module is connected to the corresponding hardware IC module through a data communication interface circuit. The data communication interface circuit is connected after the hardware IC module is called. After the data communication interface circuit is connected, it sends a startup instruction message to the corresponding memory storage module. The format of the startup instruction message is shown in the following formula: {'status':'enable'} The status part represents the enabled state of the hardware IC module, which is the enabled state; After receiving the start instruction, the memory storage module sends a response message to the data communication interface circuit, and the message format is: {'status":'enable','ictype':xxx,'icid':xxx,'icparam':data,'path':[]} Among them, status is consistent with the definition in the above formula, ictype is the chip type of the current hardware IC module, icid is the unique id of the hardware IC module, and icparam contains the functions and performance parameters of the hardware IC module; the response information is also uploaded to the application layer through the data communication interface circuit for subsequent calls; path contains the path to which the hardware IC module belongs, and the connection layer contains the hardware connection communication system, which is mainly composed of data communication channels between hardware IC modules, which connects the data communication interface circuits above each hardware IC module, is responsible for maintaining the smooth channels between each hardware IC module, and is responsible for transmitting the startup instruction information sent by the hardware connection abstract system of the application layer after the hardware IC module is called, and transmitting the response information of the hardware IC module after the hardware IC module responds to the startup instruction information; at the same time, the hardware connection communication system is also responsible for adding path information in the response information and startup instruction information of the hardware IC module.

3. A wiring safety assurance system for a transformer integrated tester as claimed in claim 2, characterized in that: The application layer includes three modules: hardware connection abstraction system, hardware connection rule base and hardware connection verification database; wherein: The hardware connection abstraction system is responsible for extracting the connection relationship of each hardware IC module, and abstracting the connection structure of the overall hardware layer into a tree diagram, called a hardware connection tree, for subsequent connection verification of each hardware IC module. The hardware connection abstraction system is provided with a starting node at the beginning, i.e., the VCC position. After each subsequent hardware IC module is called, the hardware connection tree table structure is constructed through the response information; The hardware connection rule base specifies the connection rules of each hardware IC module, which is identified by the ictype field. In the connection relationship of each hardware IC module extracted by the hardware connection abstract system, the connection between each node and the upper node is checked for compliance; each ictype field contains the upper ictype that can be connected, and the hardware connection rule query can be completed by traversing each node in the hardware connection tree and checking whether the ictype of its upper child node conforms to the node record and the ictype in the hardware connection rule base; The hardware connection verification database specifies the shape of the hardware connection tree, and various forms of hardware connection trees of the transformer integrated tester are recorded in the hardware connection verification database; after the transformer integrated tester completes the circuit switching, it will not be directly connected to the high-voltage line extended from the transformer temporarily, but the abstracted hardware connection tree will be matched with each hardware connection tree in the hardware connection verification database and the test task name published in the main control layer. If the one-to-one matching is completed, the hardware connection verification is passed to connect the high-voltage line extended from the transformer for testing.

4. A wiring safety assurance system for a transformer integrated tester as claimed in claim 3, characterized in that: The main control layer includes a main control module.

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