A dual-channel underwater acoustic communication transmitter

Abstract

The invention discloses a dual-channel underwater acoustic communication transmitter. The underwater acoustic communication transmitter includes a digital-to-analog conversion circuit, a single-ended to differential circuit, a power amplifier circuit, an impedance matching circuit and a power supply circuit. The invention adopts a 24V lithium battery for power supply, which is converted into +15V, +12V, +5V, +3.3V, +2.5V and -5V through the power supply circuit to power the digital-to-analog conversion circuit, the single-ended to differential circuit and the power amplifier circuit. The digital-to-analog conversion circuit is used to convert two-way modulated and encoded digital signals into analog signals, and the two-way analog signals are then converted into two-way differential signals through the single-ended to differential circuit, and the two-way differential signals are then amplified through the power amplifier circuit to provide sufficient transmission power. The impedance matching circuit is used to match the underwater transducer so that the output power is efficiently transmitted to the water. The transmission power of each channel of the invention can reach 65W, which improves the underwater acoustic communication distance, can transmit 10km underwater, and is also relatively small in size.

Description

Technical Field

[0001] The invention relates to underwater communication systems and the field of acoustic wave signal processing, and in particular to a dual-channel underwater acoustic communication transmitter. Background Art

[0002] With the continuous improvement of underwater communication technology, underwater acoustic communication has entered the era of networking. Underwater communication network networking requires a large number of communication nodes, and among underwater communication nodes, a key link is the underwater acoustic communication transmitter, which is directly related to the communication quality and the number of nodes required for the underwater communication network. The document "Underwater Acoustic Modems" shows that most underwater communication nodes in the 9K-15KHz frequency band have only one channel to send signals, and the power is generally below 50W, the communication distance is limited and the communication quality is average (Sendra S, Lloret J, Jimenez JM, et al. Underwater Acoustic Modems [J]. IEEE sensors journal, 2016, 16 (11): 4063-4071.). The present invention proposes a dual-channel underwater acoustic communication transmitter, the power of each channel can reach 65W, which improves the underwater acoustic communication distance. At the same time, dual-channel transmission can improve communication reliability, transmission range and throughput. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a dual-channel underwater acoustic communication transmitter that can meet the function of underwater communication and send data.

[0004] The purpose of the present invention is to provide a dual-channel underwater acoustic communication transmitter. The present invention adopts 24V lithium battery for power supply, which is converted into +15V, +12V, +5V, +3.3V, +2.5V and -5V through the power supply circuit to power the digital-to-analog conversion circuit, the single-ended differential conversion circuit and the power amplifier circuit. The digital-to-analog conversion circuit is used to convert the two-way modulated and encoded digital signals into analog signals, and the two-way analog signals are then converted into two-way differential signals through the single-ended differential conversion circuit. The two-way differential signals are then amplified through the power amplifier circuit to provide sufficient transmission power. The impedance matching circuit is used to match the underwater transducer so that the output power is efficiently transmitted to the water.

[0005] The purpose of the present invention is achieved by at least one of the following technical solutions.

[0006] A dual-channel underwater acoustic communication transmitter, comprising a digital-to-analog conversion circuit, a single-ended to differential circuit, a power amplifier circuit, an impedance matching circuit and a power supply circuit;

[0007] The digital-to-analog conversion circuit is used to convert the modulated and encoded digital signals input from two paths into two paths of analog waveforms and input them into the single-ended to differential conversion circuit;

[0008] The single-ended to differential circuit is used to convert the two single-ended signals output by the digital-to-analog conversion circuit into two differential signals and input them into the power amplifier circuit, and the phase difference of the differential signals is 180°;

[0009] The power amplifier circuit is used to amplify the power of the two differential signals and input them into the impedance matching circuit;

[0010] The impedance matching circuit is used to transmit the two-way differential signal energy output by the power amplifier circuit to the water through the underwater acoustic transducer as much as possible;

[0011] The power supply circuit is used to convert the 24V lithium battery into different voltages to supply power to the digital-to-analog conversion circuit, the single-ended to differential circuit and the power amplifier circuit.

[0012] Further, the digital-to-analog conversion circuit includes a digital-to-analog conversion chip DAC8814, a current amplifier AD8066, a first MMZ2012S121A inductor, and capacitors of various values; the capacitors include a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, and a sixth capacitor;

[0013] The digital-to-analog conversion chip DAC8814 is a four-channel serial digital-to-analog converter with a settling time of 0.5us. Two of the channels are used, and the sampling rate of each channel reaches 500k. The current signal output by the digital-to-analog conversion chip DAC8814 is converted into a voltage signal through the current amplifier AD8066. The first MMZ2012S121A inductor isolates the power supply voltage.

[0014] The first MMZ2012S121A inductor is connected to GND and AGND; the VREFA, VREFB, VREFC and VREFD pins of the digital-to-analog conversion chip DAC8814 are connected to 2V5; the VDD pin of the digital-to-analog conversion chip DAC8814 is connected to 3V3; the VSS, AGNDA, AGNDB, AGNDC, AGNDD and AGNDF pins of the digital-to-analog conversion chip DAC8814 are all connected to AGND; the DGND pin of the digital-to-analog conversion chip DAC8814 is connected to GND; the IOUTA and IOUTB pins of the digital-to-analog conversion chip DAC8814 are connected to IOUTA and IOUTB respectively; the REFA and REFB pins of the digital-to-analog conversion chip DAC8814 are connected to REFA and REFB respectively; the digital-to-analog conversion chip DAC8814 The CLK, CS*, LDAC*, MSB, RS*, SDI and SDO pins of the AD8066 are connected to DAC-SCLK, DAC-CS, DAC-LDAC, DAC-MSB, DAC-RS, DAC-SDI and DAC-SDO respectively; the +IN1 pin and +IN2 pin of the current amplifier AD8066 are connected to AGND; one end of the fifth capacitor is connected to the -IN1 pin and IOUTA of the current amplifier AD8066, and the other end is connected to RFBA; one end of the sixth capacitor is connected to the -IN2 pin and IOUTB of the current amplifier AD8066, and the other end is connected to RFBB; the first capacitor is connected in parallel with the second capacitor, the positive electrode of the first capacitor is connected to the +VS pin and DAC+5V of the current amplifier AD8066, and the negative electrode is connected to AGND; the fourth capacitor is connected in parallel with the third capacitor, the negative electrode of the fourth capacitor is connected to the -VS pin and DAC-5V of the current amplifier AD8066, and the positive electrode is connected to AGND; the VOUT1 and VOUT2 pins of the current amplifier AD8066 are connected to DAC-OUTA and DAC-OUTB respectively.

[0015] Further, the single-ended to differential circuit includes an amplifier chip NE5532, a second MMZ2012S121A inductor, and resistors and capacitors of various values; the resistors include first resistors to fourteenth resistors, and the capacitors include eleventh capacitors to thirtieth capacitors;

[0016] The amplifier chip NE5532 is a two-channel voltage amplifier. Two amplifier chips NE5532 are used to convert two-channel analog single-ended signals output from the digital-to-analog conversion circuit into two-channel differential analog signals. The two amplifier chips NE5532 are represented by the first amplifier chip NE5532 and the second amplifier chip NE5532 respectively.

[0017] The second MMZ2012S121A inductor is connected to +12V and 12V-OA; the first resistor is connected to 12-OA and VMID; the second resistor, the eleventh capacitor and the twelfth capacitor are connected in parallel, one end of the second resistor is connected to VMID, and the other end is connected to AGND; one end of the nineteenth capacitor is connected to DAC-OUTA, and the other end is connected to the seventh resistor, and the other end of the seventh resistor is connected to the 1IN- pin of the first amplifier chip NE5532; the seventeenth capacitor is connected in parallel with the fifth resistor, one end is connected to TEMPA and the 1OUT pin of the first amplifier chip NE5532, and the other end is connected to the 1IN- pin of the first amplifier chip NE5532; one end of the fourteenth capacitor is connected to the first amplifier The 1OUT pin of the chip NE5532 is connected to the 1OUT pin of the first amplifier chip NE5532, and the other end is connected to the third resistor, the other end of the third resistor is connected to PA-INA and the thirteenth capacitor, and the other end of the thirteenth capacitor is connected to AGND; the pin 1IN+ of the first amplifier chip NE5532 is connected to VMID; the seventh resistor is connected to TEMPA and the IN- pin of the first amplifier chip NE5532; the eighteenth capacitor is connected in parallel with the sixth resistor, one end is connected to the 2OUT pin of the first amplifier chip NE5532, and the other end is connected to the 2IN- pin of the first amplifier chip NE5532; one end of the sixteenth capacitor is connected to the 2OUT pin of the first amplifier chip NE5532, and the other end is connected to the fourth resistor, the other end of the fourth resistor One end is connected to PA-INB and the fifteenth capacitor, and the other end of the fifteenth capacitor is connected to AGND; the pin 2IN+ of the first amplifier chip NE5532 is connected to VMID; the twentieth capacitor is connected in parallel with the twenty-first capacitor, one end is connected to the VCC+ pin of the first amplifier chip NE5532, and the other end is connected to the VCC- pin of the first amplifier chip NE5532; one end of the twenty-eighth capacitor is connected to DAC-OUTB, and the other end is connected to the thirteenth resistor, and the other end of the thirteenth resistor is connected to the 1IN- pin of the second amplifier chip NE5532; the twenty-sixth capacitor is connected in parallel with the eleventh resistor, and one end is connected to TEMPB and the 1OUT pin of the second amplifier chip NE5532, The other end is connected to the 1IN- pin of the second amplifier chip NE5532; one end of the twenty-third capacitor is connected to the 1OUT pin of the second amplifier chip NE5532, and the other end is connected to the ninth resistor, the other end of the ninth resistor is connected to PA-INC and the twenty-second capacitor, and the other end of the twenty-second capacitor is connected to AGND; the pin 1IN+ of the second amplifier chip NE5532 is connected to VMID; the fourteenth resistor is connected to TEMPB and the IN- pin of the second amplifier chip NE5532; the twenty-seventh capacitor is connected in parallel with the twelfth resistor, one end is connected to the 2OUT pin of the second amplifier chip NE5532, and the other end is connected to the 2IN- pin of the second amplifier chip NE5532;One end of the 25th capacitor is connected to the 2OUT pin of the second amplifier chip NE5532, and the other end is connected to the tenth resistor, the other end of the tenth resistor is connected to PA-IND and the 24th capacitor, and the other end of the 24th capacitor is connected to AGND; the pin 2IN+ of the second amplifier chip NE5532 is connected to VMID; the 29th capacitor is connected in parallel with the 30th capacitor, one end is connected to the VCC+ pin of the second amplifier chip NE5532, and the other end is connected to the VCC- pin of the second amplifier chip NE5532.;

[0018] Further, the power amplifier circuit includes a power amplifier chip TPA3251 and resistors, capacitors, diodes and inductors of various values; the inductors include a fifth inductor to an eighth inductor; the diodes include a first diode and a second diode; the resistors include a fifteenth resistor to a twenty-fourth resistor; the capacitors include a thirty-first capacitor to a sixty-third capacitor;

[0019] The power amplifier chip TPA3251 is a four-channel power amplifier. The power amplifier chip TPA3251 is used to amplify the two differential signals output from the single-ended differential circuit. The two diodes are used to indicate the working status of the power amplifier chip TPA3251, respectively detecting whether it is overheated and overloaded.

[0020] The thirty-sixth capacitor, the thirty-second capacitor and the thirty-third capacitor are connected in parallel, the positive electrode of the thirty-third capacitor is connected to the PVDD_AB pin of the power amplifier chip TPA3251 and VCC+24V, and the negative electrode is connected to GND; the thirty-fifth capacitor, the thirty-fourth capacitor and the thirty-seventh capacitor are connected in parallel, the positive electrode of the thirty-fifth capacitor is connected to the PVDD_CD pin of the power amplifier chip TPA3251 and VCC+24V, and the negative electrode is connected to GND; the thirty-ninth capacitor, the fortieth capacitor and the forty-first capacitor are connected in parallel, the positive electrode of the thirty-ninth capacitor is connected to 12V and the VDD pin of the power amplifier chip TPA3251, and the negative electrode is connected to GND; the seventeenth resistor is connected to 12V and the GVDD_AB pin of the power amplifier chip TPA3251; the nineteenth resistor is connected to 12V and the GVDD_CD pin of the power amplifier chip TPA3251; the forty-second capacitor is connected to GND and the GVDD_CD pin of the power amplifier chip TPA3251; one end of the fifteenth resistor is connected to the CLIP of the power amplifier chip TPA3251 OTW_N pin, and the other end is connected to the cathode of the first diode, and the anode of the first diode is connected to 3V3; one end of the thirty-first capacitor is connected to the VBG pin of the power amplifier chip TPA3251, and the other end is connected to GND; one end of the sixteenth resistor is connected to the FAULT_N pin of the power amplifier chip TPA3251, and the other end is connected to the cathode of the second diode, and the anode of the second diode is connected to 3V3; one end of the thirty-eighth capacitor is connected to the FREQ_ADJ pin of the power amplifier chip TPA3251, and the other end is connected to GND; one end of the eighteenth resistor is connected to the C_START pin of the power amplifier chip TPA3251, and the other end is connected to GND; the GND pin of the power amplifier chip TPA3251 is connected to GND; the pins INPUTA, INPUTB, and INPU of the power amplifier chip TPA3251 TC and pin INPUTD are connected to PA-INA, PA-INB, PA-INC and PA-IND respectively; the forty-sixth capacitor is connected to the BST_A pin and the OUT_A pin of the power amplifier chip TPA3251; one end of the fifth inductor is connected to the OUT_A pin of the power amplifier chip TPA3251, and the other end is connected to the forty-eighth capacitor, and the other end of the forty-eighth capacitor is connected to GND; the forty-ninth capacitor is connected in parallel with the forty-eighth capacitor; the forty-seventh capacitor is connected in series with the twenty-first resistor, the other end of the twenty-first resistor is connected to GND, and the other end of the forty-seventh capacitor is connected to the non-grounded end of the forty-ninth capacitor; the positive electrode of the forty-fifth capacitor is connected to the non-grounded end of the forty-ninth capacitor, and the negative electrode of the forty-fifth capacitor is connected to PA-OUTA; the fiftieth capacitor is connected to the BST_B pin and the OUT_B pin of the power amplifier chip TPA3251;One end of the first inductor is connected to the OUT_B pin of the power amplifier chip TPA3251, and the other end is connected to the fifty-first capacitor, and the other end of the fifty-first capacitor is connected to GND; the fifty-second capacitor is connected in parallel with the fifty-first capacitor; the fifty-third capacitor is connected in series with the twenty-second resistor, and the other end of the twenty-second resistor is connected to GND, and the other end of the fifty-third capacitor is connected to the non-grounded end of the fifty-second capacitor; the positive electrode of the fifty-fourth capacitor is connected to the non-grounded end of the fifty-second capacitor, and the negative electrode of the fifty-fourth capacitor is connected to PA-OUTB; the fifty-ninth capacitor is connected to the BST_C pin and the OUT_C ​​pin of the power amplifier chip TPA3251; one end of the seventh inductor is connected to the OUT_C ​​pin of the power amplifier chip TPA3251, and the other end is connected to the fifty-seventh capacitor, and the other end of the fifty-seventh capacitor is connected to GND; the fifty-eighth capacitor is connected in parallel with the fifty-seventh capacitor; The 56th capacitor is connected in series with the 23rd resistor, the other end of the 23rd resistor is connected to GND, and the other end of the 56th capacitor is connected to the non-grounded end of the 58th capacitor; the positive electrode of the 55th capacitor is connected to the non-grounded end of the 58th capacitor, and the negative electrode of the 55th capacitor is connected to PA-OUTC; the 64th capacitor is connected to the BST_D pin and OUT_D pin of the power amplifier chip TPA3251; one end of the 8th inductor is connected to the OUT_D pin of U5B, and the other end is connected to the 60th capacitor, and the other end of the 60th capacitor is connected to GND; the 61st capacitor is connected in parallel with the 60th capacitor; the 62nd capacitor is connected in series with the 24th resistor, the other end of the 24th resistor is connected to GND, and the other end of the 62nd capacitor is connected to the non-grounded end of the 61st capacitor; the positive electrode of the 63rd capacitor is connected to the non-grounded end of the 61st capacitor, and the negative electrode of the 63rd capacitor is connected to PA-OUTD. ;

[0021] Furthermore, the underwater acoustic transducer is a capacitive load, and it is necessary to match the underwater acoustic transducer to reduce the reactive components in the circuit, so that the output power of the signal source is converted into the transmission power of the underwater acoustic transducer as much as possible, thereby improving the efficiency of the entire transmitter;

[0022] The impedance matching circuit includes a first transformer, a second transformer and a plurality of inductors; the inductors include a second inductor and a third inductor; PA-OUTA and PA-OUTB are respectively connected to pin 1 and pin 2 of the first transformer; pin 3 and pin 4 of the first transformer are respectively connected to two ends of the second inductor, and the two ends of the second inductor are respectively connected to OUT1-1 and OUT1-2; PA-OUTC and PA-OUTD are respectively connected to pin 1 and pin 2 of the second transformer; pin 3 and pin 4 of the second transformer are respectively connected to two ends of the third inductor, and the two ends of the third inductor are respectively connected to OUT2-1 and OUT2-2.

[0023] Further, the power supply circuit includes a chip LM2940, a chip LM2596, a chip LM1117, a chip TPS7A4701, a chip TPS5430 and a chip ADR03, as well as resistors, capacitors, diodes and inductors of various values; the inductors include a ninth inductor and an eleventh inductor; the resistors include a twenty-fifth resistor to a twenty-ninth resistor; the capacitors include a seventh capacitor to a tenth capacitor and a sixty-sixth capacitor to an eighty-second capacitor; the diodes include a third diode and a fourth diode;

[0024] The 24V lithium battery is converted into +15V through the power chip LM2596, and then into +5V through the chip TPS7A4701. The 15V voltage is then converted into 12V through the power chip LM2940. The 12V voltage is then converted into 3.3V through the power chip LM1117. The chip ADR03 converts +5V into +2.5V. The 24V lithium battery is converted into -5V through the power chip TPS5430, which supplies power to the digital-to-analog conversion circuit, the single-ended to differential circuit, and the power amplifier circuit respectively.

[0025] The positive electrode of the sixty-sixth capacitor is connected to VCC+24V and the VIN pin of the chip LM2940, and the other end is connected to the ON_OFF_N pin of the chip LM2940 and GND; the sixty-fifth capacitor is connected in parallel with the twenty-fifth resistor, one end is connected to the FEEDBACK pin of the chip LM2940, and the other end is connected to +15V; the twenty-sixth resistor is connected to the FEEDBACK pin of the chip LM2940 and GND; the third diode is connected to the OUTPUT pin of the chip LM2940 and GND; the eleventh inductor is connected to the OUTPUT pin of the chip LM2940 and +15V; the positive electrode of the sixty-seventh capacitor is connected to +15V, the negative pole is connected to GND; the seventy-second capacitor is connected in parallel with the seventy-third capacitor, one end is connected to GND, and the other end is connected to +15V and the IN pin of the chip LM2596; the sixty-eighth capacitor is connected in parallel with the sixty-ninth capacitor, the positive pole of the sixty-eighth capacitor is connected to +12V and the OUT pin of the chip LM2596, and the negative pole is connected to GND and the GND pin of the chip LM2596; one end of the seventieth capacitor is connected to the IN pin of the chip LM1117, and the other end is connected to GND and the GND pin; the positive pole of the seventy-first capacitor is connected to 3V3 and the OUT pin of the chip LM1117, and the negative pole is connected to GND;

[0026] The seventy-fifth capacitor is connected in parallel with the seventy-fourth capacitor, the positive pole of the seventy-fifth capacitor is connected to the IN pin and +12V of the chip TPS7A4701; the EN pin of the chip TPS7A4701 is connected to +12V; the 3P2V and 0P4V pins of the chip TPS7A4701 are both connected to AGND; the GND pin and PAD pin of the chip TPS7A4701 are connected to AGND; the eightieth capacitor is connected to the NR pin and AGND of the chip TPS7A4701; the seventy-sixth capacitor, the seventy-seventh capacitor, the seventy-eighth capacitor and the seventy-ninth capacitor are connected in parallel, one end is connected to DAC+5V, the OUT pin and the SENSE_FB pin of the chip TPS7A4701, and the other end is connected to AGND; one end of the ninth capacitor is connected to the VIN pin and VCC+24V of the chip TPS5430, and the other end is connected to DAC-5V; the chip The GND pin and pwpd pin of chip TPS5430 are connected to DAC-5V; the seventh capacitor is connected to the BOOT pin and PH pin of chip TPS5430; the fourth diode is connected to the PH pin of chip TPS5430 and DAC-5V; the ninth inductor is connected to the PH pin of chip TPS5430 and AGND; the eighth capacitor is connected in parallel with the twenty-seventh resistor, the positive electrode of the eighth capacitor is connected to AGND, the negative electrode of the eighth capacitor is connected to the twenty-eighth resistor, the other end of the twenty-eighth resistor is connected to the twenty-ninth resistor, and the other end of the twenty-ninth resistor is connected to DAC-5V; the eighty-first capacitor is connected in parallel with the eighty-second capacitor, the positive electrode of the eighty-first capacitor is connected to DAC+5V and VIN of chip ADR03, and the negative electrode of the eighty-first capacitor is connected to AGND; one end of the tenth capacitor is connected to 2V5 and the VOUT pin of chip ADR03, and the other end is connected to AGND.

[0027] Compared with the prior art, the present invention has at least the following beneficial effects:

[0028] 1. The present invention can send MFSK and QPSK signals with a frequency of 9-15Khz underwater, which is sufficient

[0029] It has sufficient sending function for underwater acoustic communication and supports dual-channel simultaneous sending, which can improve communication reliability, transmission range and throughput.

[0030] 2. The transmission power of each channel of the present invention can reach 65W, which improves the underwater acoustic communication distance and can transmit 10km underwater. At the same time, the volume is relatively small. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 The figure is a schematic diagram of the overall framework of a dual-channel underwater acoustic communication transmitter of the present invention.

[0032] FIG2 is a schematic diagram of an analog-to-digital conversion circuit of a dual-channel underwater acoustic communication transmitter of the present invention, wherein Figure 2a The schematic diagram of the two-channel current amplifier AD8066 is shown below. Figure 2b It is the schematic diagram of the analog-to-digital conversion circuit of two channels;

[0033] FIG3 is a schematic diagram of a single-ended to differential circuit of a dual-channel underwater acoustic communication transmitter of the present invention, wherein Figure 3a This is a schematic diagram of a single-ended to differential circuit for one channel. Figure 3b This is the schematic diagram of the single-ended to differential circuit for two channels;

[0034] FIG4 is a schematic diagram of a power amplifier circuit of a dual-channel underwater acoustic communication transmitter of the present invention. Figure 4a This is the circuit schematic diagram of the power amplifier configuration part. Figure 4b This is the circuit schematic diagram of the input and output parts of the power amplifier;

[0035] Figure 5 The present invention is a schematic diagram of an impedance matching circuit of a dual-channel underwater acoustic communication transmitter.

[0036] FIG6 is a schematic diagram of a power supply circuit of a dual-channel underwater acoustic communication transmitter of the present invention. Figure 6a This is the circuit schematic diagram for converting 24V of lithium battery to +15V. Figure 6b 6c is the circuit schematic diagram for converting +15V to +12V and +3.3V. Figure 6d This is the schematic diagram of the circuit that converts lithium battery 24V to DAC-5V, and 6e is the schematic diagram of the circuit that converts DAC+5V to +2.5V. DETAILED DESCRIPTION

[0037] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the specific implementation of the present invention is described in detail below with reference to the accompanying drawings and examples.

[0038] Example:

[0039] A dual-channel underwater acoustic communication transmitter, such as Figure 1 As shown, it includes a digital-to-analog conversion circuit, a single-ended to differential conversion circuit, a power amplifier circuit, an impedance matching circuit and a power supply circuit;

[0040] The digital-to-analog conversion circuit is used to convert the modulated and encoded digital signals input from two paths into two paths of analog waveforms and input them into the single-ended to differential conversion circuit;

[0041] The single-ended to differential circuit is used to convert the two single-ended signals output by the digital-to-analog conversion circuit into two differential signals and input them into the power amplifier circuit, and the phase difference of the differential signals is 180°;

[0042] The power amplifier circuit is used to amplify the power of the two differential signals and input them into the impedance matching circuit;

[0043] The impedance matching circuit is used to transmit the two-way differential signal energy output by the power amplifier circuit to the water through the underwater acoustic transducer as much as possible;

[0044] The power supply circuit is used to convert the 24V lithium battery into different voltages to supply power to the digital-to-analog conversion circuit, the single-ended to differential circuit and the power amplifier circuit.

[0045] like Figure 2a , Figure 2b As shown, the digital-to-analog conversion circuit includes a digital-to-analog conversion chip DAC8814 U1, a current amplifier AD8066U2, a first MMZ2012S121A inductor L1 and capacitors of various values; the capacitors include a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5 and a sixth capacitor C6;

[0046] The digital-to-analog conversion chip DAC8814U1 is a four-channel serial digital-to-analog converter with a settling time of 0.5us. Two of the channels are used, and the sampling rate of each channel reaches 500k. The current signal output by the digital-to-analog conversion chip DAC8814 U1 is converted into a voltage signal through the current amplifier AD8066U2. The first MMZ2012S121A inductor L1 isolates the power supply voltage.

[0047] In this embodiment, the specific component values ​​are as follows: the first capacitor C1 and the fourth capacitor C4 are 10uF; the second capacitor C2 and the third capacitor C3 are 0.1uF; the fifth capacitor C5 and the sixth capacitor C6 are 1.8pF;

[0048] The first MMZ2012S121A inductor L1 is connected to GND and AGND; the VREFA, VREFB, VREFC and VREFD pins of the digital-to-analog conversion chip DAC8814 U1 are connected to 2V5; the VDD pin of the digital-to-analog conversion chip DAC8814 U1 is connected to 3V3; the VSS, AGNDA, AGNDB, AGNDC, AGNDD and AGNDF pins of the digital-to-analog conversion chip DAC8814 U1 are all connected to AGND; the DGND pin of the digital-to-analog conversion chip DAC8814 U1 is connected to GND; the IOUTA and IOUTB pins of the digital-to-analog conversion chip DAC8814 U1 are connected to IOUTA and IOUTB respectively; the REFA and REFB pins of the digital-to-analog conversion chip DAC8814 U1 are connected to REFA and REFB respectively; the digital-to-analog conversion chip DAC8814 The CLK, CS*, LDAC*, MSB, RS*, SDI and SDO pins of U1 are connected to DAC-SCLK, DAC-CS, DAC-LDAC, DAC-MSB, DAC-RS, DAC-SDI and DAC-SDO respectively; the +IN1 pin and +IN2 pin of the current amplifier AD8066U2 are connected to AGND; one end of the fifth capacitor C5 is connected to the -IN1 pin and IOUTA of the current amplifier AD8066U2, and the other end is connected to RFBA; one end of the sixth capacitor C6 is connected to the -IN1 pin of the current amplifier AD8066U2 IN2 pin and IOUTB, and the other end is connected to RFBB; the first capacitor C1 is connected in parallel with the second capacitor C2, the positive electrode of the first capacitor C1 is connected to the +VS pin of the current amplifier AD8066U2 and DAC+5V, and the negative electrode is connected to AGND; the fourth capacitor C4 is connected in parallel with the third capacitor C3, the negative electrode of the fourth capacitor C4 is connected to the -VS pin of the current amplifier AD8066U2 and DAC-5V, and the positive electrode is connected to AGND; the VOUT1 and VOUT2 pins of the current amplifier AD8066U2 are connected to DAC-OUTA and DAC-OUTB respectively.

[0049] like Figure 3a , Figure 3b As shown, the single-ended to differential circuit includes an amplifier chip NE5532, a second MMZ2012S121A inductor L4, and resistors and capacitors of various values; the resistors include the first resistor R1 to the fourteenth resistor R14, and the capacitors include the eleventh capacitor C11 to the thirtieth capacitor C30;

[0050] The amplifier chip NE5532 is a two-channel voltage amplifier. Two amplifier chips NE5532 are used to convert two-channel analog single-ended signals output from the digital-to-analog conversion circuit into two-channel differential analog signals. The two amplifier chips NE5532 are represented by the first amplifier chip NE5532U3 and the second amplifier chip NE5532U4 respectively.

[0051] In this embodiment, the specific component values ​​are as follows: the first resistor R1, the second resistor R2, the fifth resistor R5 to the eighth resistor R8, the eleventh resistor R11 to the fourteenth resistor R14 are 10k ohms; the third resistor R3, the fourth resistor R4, the ninth resistor R9 and the tenth resistor R10 are 100R; the eleventh capacitor C11, the fourteenth capacitor C14, the sixteenth capacitor C16, the nineteenth capacitor C19, the twenty-first capacitor C21, the twenty-third capacitor C23, the twenty-fifth capacitor C25, the twenty-eighth capacitor C28 and the thirtieth capacitor C30 are 10uf; the twelfth capacitor C12 is 100nF-35V; the thirteenth capacitor C13, the fifteenth capacitor C15, the twenty-second capacitor C22 and the twenty-fourth capacitor C24 are 100pF; the seventeenth capacitor C17, the eighteenth capacitor C18, the twenty-sixth capacitor C26 and the twenty-seventh capacitor C27 are 22pF; the twentieth capacitor C20 and the twenty-ninth capacitor C29 are 100nF.

[0052] The second MMZ2012S121A inductor L4 is connected to +12V and 12V-OA; the first resistor R1 is connected to 12-OA and VMID; the second resistor R2, the eleventh capacitor C11 and the twelfth capacitor C12 are connected in parallel, one end of the second resistor R2 is connected to VMID, and the other end is connected to AGND; one end of the nineteenth capacitor C19 is connected to DAC-OUTA, and the other end is connected to the seventh resistor R7, and the other end of the seventh resistor R7 is connected to the 1IN- pin of the first amplifier chip NE5532U3; the seventeenth capacitor C17 is connected in parallel with the fifth resistor R5, one end is connected to TEMPA and the 1OUT pin of the first amplifier chip NE5532U3, and the other end is connected to the first amplifier chip NE5532 U3; one end of the fourteenth capacitor C14 is connected to the 1OUT pin of the first amplifier chip NE5532U3, and the other end is connected to the third resistor R3, the other end of the third resistor R3 is connected to PA-INA and the thirteenth capacitor C13, and the other end of the thirteenth capacitor C13 is connected to AGND; the pin 1IN+ of the first amplifier chip NE5532U3 is connected to VMID; the seventh resistor R7 is connected to TEMPA and the IN- pin of the first amplifier chip NE5532U3; the eighteenth capacitor C18 is connected in parallel with the sixth resistor R6, one end is connected to the 2OUT pin of the first amplifier chip NE5532U3, and the other end is connected to the 2IN- pin of the first amplifier chip NE5532U3 ; One end of the sixteenth capacitor C16 is connected to the 2OUT pin of the first amplifier chip NE5532U3, and the other end is connected to the fourth resistor R4, the other end of the fourth resistor R4 is connected to PA-INB and the fifteenth capacitor C15, and the other end of the fifteenth capacitor C15 is connected to AGND; the pin 2IN+ of the first amplifier chip NE5532U3 is connected to VMID; the twentieth capacitor C20 is connected in parallel with the twenty-first capacitor C21, one end is connected to the VCC+ pin of the first amplifier chip NE5532U3, and the other end is connected to the VCC- pin of the first amplifier chip NE5532U3; one end of the twenty-eighth capacitor C28 is connected to DAC-OUTB, and the other end is connected to the thirteenth resistor R13, the thirteenth capacitor C28 is connected to DAC-OUTB, and the other end is connected to the thirteenth resistor R13. The other end of the resistor R13 is connected to the 1IN- pin of the second amplifier chip NE5532U4; the twenty-sixth capacitor C26 is connected in parallel with the eleventh resistor R11, one end of which is connected to TEMPB and the 1OUT pin of the second amplifier chip NE5532U4, and the other end of which is connected to the 1IN- pin of the second amplifier chip NE5532U4; one end of the twenty-third capacitor C23 is connected to the 1OUT pin of the second amplifier chip NE5532U4, and the other end of which is connected to the ninth resistor R9, the other end of which is connected to PA-INC and the twenty-second capacitor C22, the other end of which is connected to AGND; the pin 1IN+ of the second amplifier chip NE5532U4 is connected to VMID;The fourteenth resistor R14 is connected to TEMPB and the IN- pin of the second amplifier chip NE5532U4; the twenty-seventh capacitor C27 is connected in parallel with the twelfth resistor R12, one end of which is connected to the 2OUT pin of the second amplifier chip NE5532U4, and the other end of which is connected to the 2IN- pin of the second amplifier chip NE5532U4; the twenty-fifth capacitor C25 is connected to the 2OUT pin of the second amplifier chip NE5532U4 at one end, and the other end is connected to the tenth resistor R10, the other end of the tenth resistor R10 is connected to PA-IND and the twenty-fourth capacitor C24, the other end of the twenty-fourth capacitor C24 is connected to AGND; the pin 2IN+ of the second amplifier chip NE5532U4 is connected to VMID; the twenty-ninth capacitor C29 is connected in parallel with the thirtieth capacitor C30, one end of which is connected to the VCC+ pin of the second amplifier chip NE5532U4, and the other end of which is connected to the VCC- pin of the second amplifier chip NE5532U4. ;

[0053] like Figure 4a , Figure 4b As shown, the power amplifier circuit includes a power amplifier chip TPA3251U5 and resistors, capacitors, diodes and inductors of various values; in this embodiment, the power amplifier chip TPA3251 U5 is specifically represented by two parts, U5A and U5B; the inductor includes a fifth inductor L5 to an eighth inductor L8; the diode includes a first diode D1 and a second diode D2; the resistor includes a fifteenth resistor R15 to a twenty-fourth resistor R24; the capacitor includes a thirty-first capacitor C31 to a sixty-third capacitor C63;

[0054] The power amplifier chip TPA3251U5 is a four-channel power amplifier. It uses the power amplifier chip TPA3251 to amplify the two differential signals output from the single-ended differential circuit. The two diodes are used to indicate the working status of the power amplifier chip TPA3251U5, detecting whether it is overheated or overloaded.

[0055] In this embodiment, the specific component values ​​are as follows: the fifth inductor L5~the eighth inductor L8 are 15uH; the first diode D1 and the second diode D2 are red LED lights; the eighteenth resistor R18 is 10k ohms; the fifteenth resistor R15 and the sixteenth resistor R16 are 1.6K ohms; the seventeenth resistor R17, the nineteenth resistor R19, the twenty-first resistor R21~the twenty-fourth resistor R24 ​​are 3.3 ohms; the twentieth resistor R20 is 22k ohms; the thirty-first capacitor C31, the fortieth capacitor C40~the forty-second capacitor C42 are 100nF; the thirty-second capacitor C32, the thirty-fourth capacitor C34, the thirty-sixth capacitor C36, the thirty-seventh capacitor C37, the forty-third capacitor C43 and the forty-fourth capacitor C44 are 1uF; the thirty-first The third capacitor C33, the thirty-fifth capacitor C35, the thirty-ninth capacitor C39, the forty-fifth capacitor C45, the fifty-fourth capacitor C54, the fifty-fifth capacitor C55 and the sixty-third capacitor C63 are 470uF; the thirty-eighth capacitor C38 is 470nF; the forty-sixth capacitor C46, ​​the fiftieth capacitor C50 and the fifty-ninth capacitor C59 are 33nF; the forty-seventh capacitor C47, the fifty-third capacitor C53, the fifty-sixth capacitor C56 and the sixty-second capacitor C62 are 10nF; the forty-eighth capacitor C48, the fifty-first capacitor C51, the fifty-seventh capacitor C57 and the sixtieth capacitor C60 are 0.68uF; the forty-ninth capacitor C49, the fifty-second capacitor C52, the fifty-eighth capacitor C58 and the sixty-first capacitor C61 are 1nF.

[0056] The thirty-sixth capacitor C36, the thirty-second capacitor C32 and the thirty-third capacitor C33 are connected in parallel, the positive electrode of the thirty-third capacitor C33 is connected to the PVDD_AB pin of the power amplifier chip TPA3251U5 and VCC+24V, and the negative electrode is connected to GND; the thirty-fifth capacitor C35, the thirty-fourth capacitor C34 and the thirty-seventh capacitor C37 are connected in parallel, the positive electrode of the thirty-fifth capacitor C35 is connected to the PVDD_CD pin of the power amplifier chip TPA3251U5 and VCC+24V, and the negative electrode is connected to GND; the thirty-ninth capacitor C39, the fortieth capacitor C40 and the forty-first capacitor C41 In parallel, the positive electrode of the thirty-ninth capacitor C39 is connected to 12V and the VDD pin of the power amplifier chip TPA3251U5, and the negative electrode is connected to GND; the seventeenth resistor R17 is connected to 12V and the GVDD_AB pin of the power amplifier chip TPA3251U5; the nineteenth resistor R19 is connected to 12V and the GVDD_CD pin of the power amplifier chip TPA3251U5; the forty-second capacitor C42 is connected to GND and the GVDD_CD pin of the power amplifier chip TPA3251U5; one end of the fifteenth resistor R15 is connected to the CLIP of the power amplifier chip TPA3251U5 The OTW_N pin is connected to the cathode of the first diode D1, and the anode of the first diode D1 is connected to 3V3; one end of the thirty-first capacitor C31 is connected to the VBG pin of the power amplifier chip TPA3251U5, and the other end is connected to GND; one end of the sixteenth resistor R16 is connected to the FAULT_N pin of the power amplifier chip TPA3251U5, and the other end is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to 3V3; one end of the thirty-eighth capacitor C38 is connected to the FREQ_ADJ pin of the power amplifier chip TPA3251U5, and the other end is connected to GND; one end of the eighteenth resistor R18 is connected to the C_START pin of the power amplifier chip TPA3251U5, and the other end is connected to GND; the GND pin of the power amplifier chip TPA3251U5 is connected to GND; the pin INPUTA, the pin INPUTB, the pin INPUTC and the pin INPUTD of the power amplifier chip TPA3251U5 are connected to PA-INA, PA-INB, PA-INC and PA-IND respectively; the forty-sixth capacitor C46 is connected to the BST_A pin and the OUT_A pin of the power amplifier chip TPA3251U5; one end of the fifth inductor L5 is connected to the OUT_A pin of the power amplifier chip TPA3251U5, and the other end is connected to the forty-eighth capacitor C48, and the other end of the forty-eighth capacitor C48 is connected to GND; the forty-ninth capacitor C49 is connected in parallel with the forty-eighth capacitor C48;The forty-seventh capacitor C47 is connected in series with the twenty-first resistor R21, the other end of the twenty-first resistor R21 is connected to GND, and the other end of the forty-seventh capacitor C47 is connected to the non-grounded end of the forty-ninth capacitor C49; the positive electrode of the forty-fifth capacitor C45 is connected to the non-grounded end of the forty-ninth capacitor C49, and the negative electrode of the forty-fifth capacitor C45 is connected to PA-OUTA; the fiftieth capacitor C50 is connected to the BST_B pin and the OUT_B pin of the power amplifier chip TPA3251U5; one end of the lth inductor L6 is connected to the OUT_B pin of the power amplifier chip TPA3251U5, and the other end is connected to the fifty-first capacitor C51, the fifty-first The other end of the capacitor C51 is connected to GND; the fifty-second capacitor C52 is connected in parallel with the fifty-first capacitor C51; the fifty-third capacitor C53 is connected in series with the twenty-second resistor R22, the other end of the twenty-second resistor R22 is connected to GND, and the other end of the fifty-third capacitor C53 is connected to the non-grounded end of the fifty-second capacitor C52; the positive electrode of the fifty-fourth capacitor C54 is connected to the non-grounded end of the fifty-second capacitor C52, and the negative electrode of the fifty-fourth capacitor C54 is connected to PA-OUTB; the fifty-ninth capacitor C59 is connected to the BST_C pin and the OUT_C ​​pin of the power amplifier chip TPA3251U5; one end of the seventh inductor L7 is connected to the power amplifier chip The OUT_C ​​pin of the chip TPA3251U5 is connected to the 57th capacitor C57 at the other end, and the other end of the 57th capacitor C57 is connected to GND; the 58th capacitor C58 is connected in parallel with the 57th capacitor C57; the 56th capacitor C56 is connected in series with the 23rd resistor R23, the other end of the 23rd resistor R23 is connected to GND, and the other end of the 56th capacitor C56 is connected to the non-grounded end of the 58th capacitor C58; the positive electrode of the 55th capacitor C55 is connected to the non-grounded end of the 58th capacitor C58, and the negative electrode of the 55th capacitor C55 is connected to PA-OUTC; the 64th capacitor C64 is connected to the power amplifier chip TPA3 251U5's BST_D pin and OUT_D pin; one end of the eighth inductor L8 is connected to the OUT_D pin of U5B, and the other end is connected to the 60th capacitor C60, and the other end of the 60th capacitor C60 is connected to GND; the 61st capacitor C61 is connected in parallel with the 60th capacitor C60; the 62nd capacitor C62 is connected in series with the 24th resistor R24, and the other end of the 24th resistor R24 ​​is connected to GND, and the other end of the 62nd capacitor C62 is connected to the non-grounded end of the 61st capacitor C61; the positive electrode of the 63rd capacitor C63 is connected to the non-grounded end of the 61st capacitor C61, and the negative electrode of the 63rd capacitor C63 is connected to PA-OUTD. ;

[0057] like Figure 5As shown, the underwater acoustic transducer is a capacitive load. It is necessary to match the underwater acoustic transducer to reduce the reactive components in the circuit so that the output power of the signal source can be converted into the transmission power of the underwater acoustic transducer as much as possible, thereby improving the efficiency of the entire transmitter.

[0058] The impedance matching circuit includes a first transformer B1, a second transformer B2 and a plurality of inductors; the inductors include a second inductor L2 and a third inductor L3; PA-OUTA and PA-OUTB are respectively connected to pin 1 and pin 2 of the first transformer B1; pin 3 and pin 4 of the first transformer B1 are respectively connected to two ends of the second inductor L2, and two ends of the second inductor L2 are respectively connected to OUT1-1 and OUT1-2; PA-OUTC and PA-OUTD are respectively connected to pin 1 and pin 2 of the second transformer B2; pin 3 and pin 4 of the second transformer B2 are respectively connected to two ends of the third inductor L3, and two ends of the third inductor L3 are respectively connected to OUT2-1 and OUT2-2.

[0059] In this embodiment, specific component values ​​are as follows: the first transformer B1 and the second transformer B2 are 100uH:8800uH transformers; the second inductor L2 and the third inductor L3 are 8800uH inductors.

[0060] like Figure 6a , Figure 6b , Figure 6c , Figure 6d , Figure 6e As shown, the power supply circuit includes a chip LM2940U6, a chip LM2596U7, a chip LM1117U8, a chip TPS7A4701U9, a chip TPS5430TPS1 and a chip ADR03U11 as well as resistors, capacitors, diodes and inductors of various values; the inductors include a ninth inductor L9 and an eleventh inductor L11; the resistors include a twenty-fifth resistor R25 to a twenty-ninth resistor R29; the capacitors include a seventh capacitor C7 to a tenth capacitor C10 and a sixty-sixth capacitor C66 to an eighty-second capacitor C82; the diodes include a third diode D3 and a fourth diode D4;

[0061] In this embodiment, the specific values ​​of the components are as follows: the ninth inductor L9 is 10uH; the eleventh inductor L11 is 68uH; the twenty-fifth resistor R25 is 11K; the twenty-sixth resistor R26 is 1K; the twenty-seventh resistor R27 is 10K; the twenty-eighth resistor R28 is 3K; the twenty-ninth resistor R29 is 240R. The third diode D3 is Diode 1N5825, and the fourth diode D4 is B340A;

[0062] The 24V lithium battery is converted into +15V through the power chip LM2596U7, and then converted into +5V through the chip TPS7A4701U9. The 15V voltage is then converted into 12V through the power chip LM2940U6. The 12V voltage is then converted into 3.3V through the power chip LM1117U8. The chip ADR03U11 converts +5V into +2.5V. The 24V lithium battery is converted into -5V through the power chip TPS5430TPS1, which supplies power to the digital-to-analog conversion circuit, the single-ended to differential circuit, and the power amplifier circuit respectively.

[0063] The positive electrode of the sixty-sixth capacitor C66 is connected to VCC+24V and the VIN pin of the chip LM2940U6, and the other end is connected to the ON_OFF_N pin of the chip LM2940U6 and GND; the sixty-fifth capacitor C65 is connected in parallel with the twenty-fifth resistor R25, one end is connected to the FEEDBACK pin of the chip LM2940U6, and the other end is connected to +15V; the twenty-sixth resistor R26 is connected to the FEEDBACK pin of the chip LM2940U6 and GND; the third diode D3 is connected to the OUTPUT pin of the chip LM2940U6 and GND; the eleventh inductor L11 is connected to the OUTPUT pin of the chip LM2940U6 and +15V; the positive electrode of the sixty-seventh capacitor C67 is connected Connected to +15V, the negative pole is connected to GND; the seventy-second capacitor C72 is connected in parallel with the seventy-third capacitor C73, one end is connected to GND, and the other end is connected to +15V and the IN pin of the chip LM2596U7; the sixty-eighth capacitor C68 is connected in parallel with the sixty-ninth capacitor C69, the positive pole of the sixty-eighth capacitor C68 is connected to +12V and the OUT pin of the chip LM2596U7, and the negative pole is connected to GND and the GND pin of the chip LM2596U7; one end of the seventieth capacitor C70 is connected to the IN pin of the chip LM1117U8, and the other end is connected to GND and the GND pin; the positive pole of the seventy-first capacitor C71 is connected to 3V3 and the OUT pin of the chip LM1117U8, and the negative pole is connected to GND;

[0064] The seventy-fifth capacitor C75 is connected in parallel with the seventy-fourth capacitor C74. The positive electrode of the seventy-fifth capacitor C75 is connected to the IN pin and +12V of the chip TPS7A4701U9; the EN pin of the chip TPS7A4701U9 is connected to +12V; the 3P2V and 0P4V pins of the chip TPS7A4701U9 are both connected to AGND; the GND pin and PAD pin of the chip TPS7A4701U9 are connected to AGND; the eightieth capacitor C80 is connected to the chip TPS7A4701 U9's NR pin and AGND; the seventy-sixth capacitor C76, the seventy-seventh capacitor C77, the seventy-eighth capacitor C78 and the seventy-ninth capacitor C79 are connected in parallel, one end is connected to DAC+5V, the OUT pin and the SENSE_FB pin of the chip TPS7A4701U9, and the other end is connected to AGND; one end of the ninth capacitor C9 is connected to the VIN pin and VCC+24V of the chip TPS5430TPS1, and the other end is connected to DAC-5V; the GND pin and the pwpd pin of the chip TPS5430TPS1 are connected to DAC-5V; the seventh capacitor C7 is connected to the BOOT pin and the PH pin of the chip TPS5430TPS1; the fourth diode D4 is connected to the PH pin of the chip TPS5430TPS1 and DAC-5V; the ninth inductor L9 is connected to the PH pin of the chip TPS5430TPS1 and AGND; the eighth capacitor C8 is connected in parallel with the twenty-seventh resistor R27, the positive electrode of the eighth capacitor C8 is connected to AGND, and the negative electrode of the eighth capacitor C8 is connected to the second The eighteenth resistor R28, the other end of the twenty-eighth resistor R28 is connected to the twenty-ninth resistor R29, and the other end of the twenty-ninth resistor R29 is connected to DAC-5V; the eighty-first capacitor C81 and the eighty-second capacitor C82 are connected in parallel, the positive electrode of the eighty-first capacitor C81 is connected to DAC+5V and the VIN of the chip ADR03U11, and the negative electrode of the eighty-first capacitor C81 is connected to AGND; one end of the tenth capacitor C10 is connected to 2V5 and the VOUT pin of the chip ADR03U11, and the other end is connected to AGND.

[0065] The present invention allows the external input of two-channel data through the SPI interface, which is converted into two analog signals through a digital-to-analog conversion circuit, and then converted into two differential signals through a single-ended differential circuit. The two differential signals are then amplified by a power amplifier to make the power of the two signals reach 65W, and finally the power is sent out through an underwater acoustic transducer through an impedance matching circuit. Therefore, the present invention can send MFSK signals and QPSK signals with a frequency of 9-15Khz underwater, meeting the sending function of underwater acoustic communication, and supporting dual-channel simultaneous sending, which can improve communication reliability, transmission range and throughput. The transmission power of each channel of the present invention can reach 65W, which improves the underwater acoustic communication distance, can transmit 10km underwater, and is also relatively small in size.

Claims

1. A dual-channel underwater acoustic communication transmitter, characterized in that: It includes a digital-to-analog conversion circuit, a single-ended-to-differential circuit, a power amplifier circuit, an impedance matching circuit and a power supply circuit; The digital-to-analog conversion circuit is used to convert the modulated and encoded digital signals input from two paths into two paths of analog waveforms and input them into the single-ended to differential conversion circuit; The single-ended to differential circuit is used to convert the two single-ended signals output by the digital-to-analog conversion circuit into two differential signals and input them into the power amplifier circuit, and the phase difference of the differential signals is 180°; The power amplifier circuit is used to amplify the power of the two differential signals and input them into the impedance matching circuit; The impedance matching circuit is used to transmit the two-way differential signal energy output by the power amplifier circuit into the water through the underwater acoustic transducer; The power supply circuit is used to convert the 24V lithium battery into different voltages to power the digital-to-analog conversion circuit, the single-ended to differential circuit and the power amplifier circuit; The digital-to-analog conversion circuit includes a digital-to-analog conversion chip DAC8814 (U1), a current amplifier AD8066 (U2), a first MMZ2012S121A inductor (L1) and capacitors of various values; the capacitors include a first capacitor (C1), a second capacitor (C2), a third capacitor (C3), a fourth capacitor (C4), a fifth capacitor (C5) and a sixth capacitor (C6); The digital-to-analog conversion chip DAC8814 (U1) is a four-channel serial digital-to-analog converter with a settling time of 0.5us. Two of its channels are used, and the sampling rate of each channel reaches 500k. The current signal output by the digital-to-analog conversion chip DAC8814 (U1) is converted into a voltage signal through the current amplifier AD8066 (U2). The first MMZ2012S121A inductor (L1) isolates the power supply voltage. The first MMZ2012S121A inductor (L1) is connected to GND and AGND; the VREFA, VREFB, VREFC and VREFD pins of the digital-to-analog conversion chip DAC8814 (U1) are connected to 2V5; the VDD pin of the digital-to-analog conversion chip DAC8814 (U1) is connected to 3V3; the VSS, AGNDA, AGNDB, AGNDC, AGNDD and AGNDF pins of the digital-to-analog conversion chip DAC8814 (U1) are all connected to AGND; the DGND pin of the digital-to-analog conversion chip DAC8814 (U1) is connected to GND; the IOUTA and IOUTB pins of the digital-to-analog conversion chip DAC8814 (U1) are connected to IOUTA and IOUTB respectively; the RFBA and RFBB pins of the digital-to-analog conversion chip DAC8814 (U1) are connected to RFBA and RFBB respectively; the digital-to-analog conversion chip DAC8814 The CLK, CS*, LDAC*, MSB, RS*, SDI and SDO pins of (U1) are connected to DAC-SCLK, DAC-CS, DAC-LDAC, DAC-MSB, DAC-RS, DAC-SDI and DAC-SDO respectively; the +IN1 pin and +IN2 pin of the current amplifier AD8066 (U2) are connected to AGND; one end of the fifth capacitor (C5) is connected to the -IN1 pin and IOUTA of the current amplifier AD8066 (U2), and the other end is connected to RFBA; one end of the sixth capacitor (C6) is connected to the -IN2 pin of the current amplifier AD8066 (U2) The first capacitor (C1) is connected to the +VS pin and IOUTB of the current amplifier AD8066 (U2), and the other end is connected to RFBB; the first capacitor (C1) is connected in parallel with the second capacitor (C2), the positive electrode of the first capacitor (C1) is connected to the +VS pin of the current amplifier AD8066 (U2) and DAC+5V, and the negative electrode is connected to AGND; the fourth capacitor (C4) is connected in parallel with the third capacitor (C3), the negative electrode of the fourth capacitor (C4) is connected to the -VS pin and DAC-5V of the current amplifier AD8066 (U2), and the positive electrode is connected to AGND; the VOUT1 and VOUT2 pins of the current amplifier AD8066 (U2) are connected to DAC-OUTA and DAC-OUTB respectively; The single-ended to differential circuit includes an amplifier chip NE5532, a second MMZ2012S121A inductor (L4), and resistors and capacitors of various values; the resistors include a first resistor (R1) to a fourteenth resistor (R14), and the capacitors include an eleventh capacitor (C11) to a thirtieth capacitor (C30); The amplifier chip NE5532 is a two-channel voltage amplifier. Two amplifier chips NE5532 are used to convert two-channel analog single-ended signals output from the digital-to-analog conversion circuit into two-channel differential analog signals. The two amplifier chips NE5532 are represented by the first amplifier chip NE5532 (U3) and the second amplifier chip NE5532 (U4). The second MMZ2012S121A inductor (L4) is connected to +12V and 12V-OA; the first resistor (R1) is connected to 12-OA and VMID; the second resistor (R2), the eleventh capacitor (C11) and the twelfth capacitor (C12) are connected in parallel, one end of the second resistor (R2) is connected to VMID, and the other end is connected to GND; one end of the nineteenth capacitor (C19) is connected to DAC-OUTA, and the other end is connected to the seventh resistor (R7), and the other end of the seventh resistor (R7) is connected to the 1IN- pin of the first amplifier chip NE5532 (U3); the seventeenth capacitor (C17) is connected in parallel with the fifth resistor (R5), and one end is connected to TEMPA and the first amplifier chip N The 1OUT pin of E5532 (U3) is connected to the 1IN- pin of the first amplifier chip NE5532 (U3); one end of the fourteenth capacitor (C14) is connected to the 1OUT pin of the first amplifier chip NE5532 (U3), and the other end is connected to the third resistor (R3), the other end of the third resistor (R3) is connected to PA-INA and the thirteenth capacitor (C13), and the other end of the thirteenth capacitor (C13) is connected to GND; the pin 1IN+ of the first amplifier chip NE5532 (U3) is connected to VMID; the seventh resistor (R7) is connected to TEMPA and the IN- pin of the first amplifier chip NE5532 (U3); the eighteenth capacitor (C18 ) is connected in parallel with the sixth resistor (R6), one end of which is connected to the 2OUT pin of the first amplifier chip NE5532 (U3), and the other end is connected to the 2IN- pin of the first amplifier chip NE5532 (U3); one end of the sixteenth capacitor (C16) is connected to the 2OUT pin of the first amplifier chip NE5532 (U3), and the other end is connected to the fourth resistor (R4), the other end of the fourth resistor (R4) is connected to PA-INB and the fifteenth capacitor (C15), and the other end of the fifteenth capacitor (C15) is connected to GND; the pin 2IN+ of the first amplifier chip NE5532 (U3) is connected to VMID; the twentieth capacitor (C20) and the twenty-first capacitor (C21) are connected in parallel The twenty-eighth capacitor (C28) is connected in parallel, one end of which is connected to the VCC+ pin of the first amplifier chip NE5532 (U3), and the other end of which is connected to the VCC- pin of the first amplifier chip NE5532 (U3); one end of the twenty-eighth capacitor (C28) is connected to DAC-OUTB, and the other end of which is connected to the thirteenth resistor (R13), and the other end of the thirteenth resistor (R13) is connected to the 1IN- pin of the second amplifier chip NE5532 (U4); the twenty-sixth capacitor (C26) is connected in parallel with the eleventh resistor (R11), one end of which is connected to TEMPB and the 1OUT pin of the second amplifier chip NE5532 (U4), and the other end of which is connected to the 1IN- pin of the second amplifier chip NE5532 (U4);One end of the twenty-third capacitor (C23) is connected to the 1OUT pin of the second amplifier chip NE5532 (U4), and the other end is connected to the ninth resistor (R9), the other end of the ninth resistor (R9) is connected to PA-INC and the twenty-second capacitor (C22), and the other end of the twenty-second capacitor (C22) is connected to GND; the pin 1IN+ of the second amplifier chip NE5532 (U4) is connected to VMID; the fourteenth resistor (R14) is connected to TEMPB and the IN- pin of the second amplifier chip NE5532 (U4); the twenty-seventh capacitor (C27) is connected in parallel with the twelfth resistor (R12), one end is connected to the 2OUT pin of the second amplifier chip NE5532 (U4), and the other end is connected to the second amplifier 2IN- pin of chip NE5532 (U4); one end of the 25th capacitor (C25) is connected to the 2OUT pin of the second amplifier chip NE5532 (U4), and the other end is connected to the tenth resistor (R10), the other end of the tenth resistor (R10) is connected to PA-IND and the 24th capacitor (C24), and the other end of the 24th capacitor (C24) is connected to GND; the pin 2IN+ of the second amplifier chip NE5532 (U4) is connected to VMID; the 29th capacitor (C29) and the 30th capacitor (C30) are connected in parallel, one end is connected to the VCC+ pin of the second amplifier chip NE5532 (U4), and the other end is connected to the VCC- pin of the second amplifier chip NE5532 (U4). ; 2. A dual-channel underwater acoustic communication transmitter according to claim 1, characterized in that: The power amplifier circuit includes a power amplifier chip TPA3251 (U5) and resistors, capacitors, diodes and inductors of various values; the inductors include the fifth inductor (L5) to the eighth inductor (L8); the diodes include the first diode (D1) and the second diode (D2); the resistors include the fifteenth resistor (R15) to the twenty-fourth resistor (R24); the capacitors include the thirty-first capacitor (C31) to the sixty-third capacitor (C63); The power amplifier chip TPA3251 (U5) is a four-channel power amplifier, which uses the power amplifier chip TPA3251 to amplify the two differential signals output from the single-ended differential circuit; the two diodes are used to indicate the working status of the power amplifier chip TPA3251 (U5), respectively detecting whether it is overheated and overloaded; The thirty-sixth capacitor (C36), the thirty-second capacitor (C32) and the thirty-third capacitor (C33) are connected in parallel, the positive electrode of the thirty-third capacitor (C33) is connected to the PVDD_AB pin of the power amplifier chip TPA3251 (U5) and VCC+24V, and the negative electrode is connected to GND; the thirty-fifth capacitor (C35), the thirty-fourth capacitor (C34) and the thirty-seventh capacitor (C37) are connected in parallel, the positive electrode of the thirty-fifth capacitor (C35) is connected to the PVDD_CD pin of the power amplifier chip TPA3251 (U5) and VCC+24V, and the negative electrode is connected to GND; the thirty-ninth capacitor (C39), the fortieth capacitor (C40) and the forty-first capacitor (C 41) are connected in parallel, the positive electrode of the 39th capacitor (C39) is connected to 12V and the VDD pin of the power amplifier chip TPA3251 (U5), and the negative electrode is connected to GND; the 17th resistor (R17) is connected to 12V and the GVDD_AB pin of the power amplifier chip TPA3251 (U5); the 19th resistor (R19) is connected to 12V and the GVDD_CD pin of the power amplifier chip TPA3251 (U5); the 42nd capacitor (C42) is connected to GND and the GVDD_CD pin of the power amplifier chip TPA3251 (U5); one end of the 15th resistor (R15) is connected to the CLIP pin of the power amplifier chip TPA3251 (U5). The OTW_N pin is connected to the cathode of the first diode (D1), and the anode of the first diode (D1) is connected to 3V3; one end of the thirty-first capacitor (C31) is connected to the VBG pin of the power amplifier chip TPA3251 (U5), and the other end is connected to GND; one end of the sixteenth resistor (R16) is connected to the FAULT_N pin of the power amplifier chip TPA3251 (U5), and the other end is connected to the cathode of the second diode (D2), and the anode of the second diode (D2) is connected to 3V3; one end of the thirty-eighth capacitor (C38) is connected to the FREQ_ADJ pin of the power amplifier chip TPA3251 (U5), and the other end is connected to GND; one end of the eighteenth resistor (R18) is connected to the C_START pin, and the other end is connected to GND; the GND pin of the power amplifier chip TPA3251 (U5) is connected to GND; the pins INPUTA, INPUTB, INPUTC and INPUTD of the power amplifier chip TPA3251 (U5) are connected to PA-INA, PA-INB, PA-INC and PA-IND respectively; the forty-sixth capacitor (C46) is connected to the BST_A pin and the OUT_A pin of the power amplifier chip TPA3251 (U5); one end of the fifth inductor (L5) is connected to the OUT_A pin of the power amplifier chip TPA3251 (U5), and the other end is connected to the forty-eighth capacitor (C48), and the other end of the forty-eighth capacitor (C48) is connected to GND;The forty-ninth capacitor (C49) is connected in parallel with the forty-eighth capacitor (C48); the forty-seventh capacitor (C47) is connected in series with the twenty-first resistor (R21), the other end of the twenty-first resistor (R21) is connected to GND, and the other end of the forty-seventh capacitor (C47) is connected to the non-grounded end of the forty-ninth capacitor (C49); the positive electrode of the forty-fifth capacitor (C45) is connected to the non-grounded end of the forty-ninth capacitor (C49), and the negative electrode of the forty-fifth capacitor (C45) is connected to PA-OUTA; the fiftieth capacitor (C50) is connected to the BST_B pin and the OUT_B pin of the power amplifier chip TPA3251 (U5); one end of the sixth inductor (L6) is connected to the power amplifier chip TPA3251 (U 5) OUT_B pin, the other end is connected to the fifty-first capacitor (C51), and the other end of the fifty-first capacitor (C51) is connected to GND; the fifty-second capacitor (C52) is connected in parallel with the fifty-first capacitor (C51); the fifty-third capacitor (C53) is connected in series with the twenty-second resistor (R22), the other end of the twenty-second resistor (R22) is connected to GND, and the other end of the fifty-third capacitor (C53) is connected to the non-grounded end of the fifty-second capacitor (C52); the positive electrode of the fifty-fourth capacitor (C54) is connected to the non-grounded end of the fifty-second capacitor (C52), and the negative electrode of the fifty-fourth capacitor (C54) is connected to PA-OUTB; the fifty-ninth capacitor (C59) is connected to the power amplifier chip TPA32 51 (U5)'s BST_C pin and OUT_C ​​pin; one end of the seventh inductor (L7) is connected to the OUT_C ​​pin of the power amplifier chip TPA3251 (U5), and the other end is connected to the fifty-seventh capacitor (C57), and the other end of the fifty-seventh capacitor (C57) is connected to GND; the fifty-eighth capacitor (C58) is connected in parallel with the fifty-seventh capacitor (C57); the fifty-sixth capacitor (C56) is connected in series with the twenty-third resistor (R23), and the other end of the twenty-third resistor (R23) is connected to GND, and the other end of the fifty-sixth capacitor (C56) is connected to the non-grounded end of the fifty-eighth capacitor (C58); the positive electrode of the fifty-fifth capacitor (C55) is connected to the non-grounded end of the fifty-eighth capacitor (C58) , the negative electrode of the fifty-fifth capacitor (C55) is connected to PA-OUTC; the sixty-fourth capacitor (C64) is connected to the BST_D pin and the OUT_D pin of the power amplifier chip TPA3251 (U5); one end of the eighth inductor (L8) is connected to the OUT_D pin of U5B, and the other end is connected to the sixtieth capacitor (C60), and the other end of the sixtieth capacitor (C60) is connected to GND; the sixty-first capacitor (C61) is connected in parallel with the sixtieth capacitor (C60); the sixty-second capacitor (C62) is connected in series with the twenty-fourth resistor (R24), the other end of the twenty-fourth resistor (R24) is connected to GND, and the other end of the sixty-second capacitor (C62) is connected to the non-grounded end of the sixty-first capacitor (C61);The positive electrode of the sixty-third capacitor (C63) is connected to the non-grounded terminal of the sixty-first capacitor (C61), and the negative electrode of the sixty-third capacitor (C63) is connected to PA-OUTD. ; 3. A dual-channel underwater acoustic communication transmitter according to claim 1, characterized in that: The underwater acoustic transducer is a capacitive load, which matches the underwater acoustic transducer, reduces the reactive component in the circuit, converts the output power of the signal source into the transmission power of the underwater acoustic transducer, and improves the efficiency of the entire transmitter; The impedance matching circuit includes a first transformer (B1), a second transformer (B2) and a plurality of inductors; the inductors include a second inductor (L2) and a third inductor (L3); PA-OUTA and PA-OUTB are respectively connected to pin 1 and pin 2 of the first transformer (B1); pin 3 and pin 4 of the first transformer (B1) are respectively connected to two ends of the second inductor (L2), and two ends of the second inductor (L2) are respectively connected to OUT1-1 and OUT1-2; PA-OUTC and PA-OUTD are respectively connected to pin 1 and pin 2 of the second transformer (B2); pin 3 and pin 4 of the second transformer (B2) are respectively connected to two ends of the third inductor (L3), and two ends of the third inductor (L3) are respectively connected to OUT2-1 and OUT2-2.

4. A dual-channel underwater acoustic communication transmitter according to claim 1, characterized in that: The power supply circuit includes a chip LM2940 (U7), a chip LM2596 (U6), a chip LM1117 (U8), a chip TPS7A4701 (U9), a chip TPS5430 (TPS1) and a chip ADR03 (U11) as well as resistors, capacitors, diodes and inductors of various values; the inductors include a ninth inductor (L9) and an eleventh inductor (L11); the resistors include a twenty-fifth resistor (R25) to a twenty-ninth resistor (R29); the capacitors include a seventh capacitor (C7) to a tenth capacitor (C10) and a sixty-fifth capacitor (C65) to an eighty-second capacitor (C82); the diodes include a third diode (D3) and a fourth diode (D4); The 24V lithium battery is converted into +15V through the power chip LM2596 (U6), and then converted into +5V through the chip TPS7A4701 (U9). The 15V voltage is then converted into 12V through the power chip LM2940 (U7), and the 12V voltage is then converted into 3.3V through the power chip LM1117 (U8). The chip ADR03 (U11) converts +5V into +2.5V. The 24V lithium battery is converted into -5V through the power chip TPS5430 (TPS1), which supplies power to the digital-to-analog conversion circuit, the single-ended to differential circuit, and the power amplifier circuit respectively. The positive electrode of the sixty-sixth capacitor (C66) is connected to VCC+24V and the VIN pin of the chip LM2940 (U7), and the other end is connected to the ON_OFF_N pin of the chip LM2940 (U7) and GND; the sixty-fifth capacitor (C65) is connected in parallel with the twenty-fifth resistor (R25), one end is connected to the FEEDBACK pin of the chip LM2940 (U7), and the other end is connected to +15V; the twenty-sixth resistor (R26) is connected to the FEEDBACK pin of the chip LM2940 (U7) and GND; the third diode (D3) is connected to the OUTPUT pin of the chip LM2940 (U7) and GND; the eleventh inductor (L11) is connected to the OUTPUT pin of the chip LM2940 (U7) and +15V; the positive electrode of the sixty-seventh capacitor (C67) Connected to +15V, the negative pole is connected to GND; the seventy-second capacitor (C72) is connected in parallel with the seventy-third capacitor (C73), one end is connected to GND, and the other end is connected to +15V and the IN pin of the chip LM2596 (U6); the sixty-eighth capacitor (C68) is connected in parallel with the sixty-ninth capacitor (C69), the positive pole of the sixty-eighth capacitor (C68) is connected to +12V and the OUT pin of the chip LM2596 (U6), and the negative pole is connected to GND and the GND pin of the chip LM2596 (U6); one end of the seventieth capacitor (C70) is connected to the IN pin of the chip LM1117 (U8), and the other end is connected to GND and the GND pin; the positive pole of the seventy-first capacitor (C71) is connected to 3V3 and the OUT pin of the chip LM1117 (U8), and the negative pole is connected to GND; The seventy-fifth capacitor (C75) is connected in parallel with the seventy-fourth capacitor (C74), the positive pole of the seventy-fifth capacitor (C75) is connected to the IN pin and +12V of the chip TPS7A4701 (U9); the EN pin of the chip TPS7A4701 (U9) is connected to +12V; the 3P2V and 0P4V pins of the chip TPS7A4701 (U9) are both connected to AGND; the GND pin and PAD pin of the chip TPS7A4701 (U9) are connected to AGND; the eightieth capacitor (C80) is connected to the chip TPS7A4701 (U9) )'s NR pin and AGND; the seventy-sixth capacitor (C76), the seventy-seventh capacitor (C77), the seventy-eighth capacitor (C78) and the seventy-ninth capacitor (C79) are connected in parallel, one end is connected to DAC+5V, the OUT pin and the SENSE_FB pin of the chip TPS7A4701 (U9), and the other end is connected to AGND; one end of the ninth capacitor (C9) is connected to the VIN pin and VCC+24V of the chip TPS5430 (TPS1), and the other end is connected to DAC-5V; the GN pin of the chip TPS5430 (TPS1) The D pin and the pwpd pin are connected to DAC-5V; the seventh capacitor (C7) is connected to the BOOT pin and the PH pin of the chip TPS5430 (TPS1); the fourth diode (D4) is connected to the PH pin of the chip TPS5430 (TPS1) and DAC-5V; the ninth inductor (L9) is connected to the PH pin of the chip TPS5430 (TPS1) and AGND; the eighth capacitor (C8) is connected in parallel with the twenty-seventh resistor (R27), the positive electrode of the eighth capacitor (C8) is connected to AGND, and the negative electrode of the eighth capacitor (C8) is connected to the twenty-eighth resistor (R27). The twenty-eighth resistor (R28) is connected to the twenty-ninth resistor (R29), and the other end of the twenty-ninth resistor (R29) is connected to DAC-5V; the eighty-first capacitor (C81) is connected in parallel with the eighty-second capacitor (C82), the positive electrode of the eighty-first capacitor (C81) is connected to DAC+5V and the VIN of the chip ADR03 (U11), and the negative electrode of the eighty-first capacitor (C81) is connected to AGND; one end of the tenth capacitor (C10) is connected to 2V5 and the VOUT pin of the chip ADR03 (U11), and the other end is connected to AGND.

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