FPGA-based resource allocation method, device, storage medium, and computer equipment

Abstract

The present invention discloses an FPGA-based resource allocation method, apparatus, storage medium, and computer device. The method includes determining an allocation strategy for FPGA memory resources, wherein the allocation strategy includes allocating the FPGA memory resources to at least two users; and transmitting the allocation strategy to the FPGA, causing the FPGA to allocate memory resources to the at least two users based on the allocation strategy. This invention addresses the technical problem of wasteful onboard memory resources that inevitably results from employing a single-card, single-user mode in related technologies.

Description

Technical Field

[0001] The present invention relates to the field of computers, and in particular to a resource allocation method, device, storage medium and computer equipment based on FPGA. Background Art

[0002] In public cloud platforms, where FPGA (Field Programmable Gate Array) servers reside, FPGA resources are currently typically used in a single-card, single-user mode. Specifically, one FPGA is allocated to a single user, providing that user with corresponding cloud services. However, this single-card, single-user mode often results in a waste of FPGA resources. Therefore, as FPGA resources expand, the use of this single-card, single-user mode in related technologies inevitably leads to a waste of onboard memory resources.

[0003] To address the above-mentioned problems, no effective solutions have been proposed so far. Summary of the Invention

[0004] The embodiments of the present invention provide an FPGA-based resource allocation method, apparatus, storage medium, and computer equipment to at least solve the technical problem of waste of onboard memory resources that is inevitably caused by adopting a single-card single-user mode in the related art.

[0005] According to one aspect of an embodiment of the present invention, a FPGA-based resource allocation method is provided, comprising: determining an allocation strategy for memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users; and sending the allocation strategy to the FPGA, so that the FPGA provides allocated memory resources to the at least two users according to the allocation strategy.

[0006] According to another aspect of an embodiment of the present invention, a FPGA-based resource allocation method is also provided, comprising: receiving an allocation strategy for the memory resources of the FPGA sent by a processor, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users; and providing allocated memory resources to the at least two users according to the allocation strategy.

[0007] According to another aspect of an embodiment of the present invention, a FPGA-based resource allocation method is provided, comprising: a processor determining an allocation strategy for memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users; the processor sending the allocation strategy to the FPGA; and the FPGA providing allocated memory resources to the at least two users based on the allocation strategy.

[0008] According to another aspect of an embodiment of the present invention, a FPGA-based resource allocation method is provided, comprising: receiving a memory request from each of at least two users, wherein the memory request carries a requested number of channels and a requested memory usage; allocating FPGA memory resources to the at least two users based on the memory request; and feeding back the FPGA memory resource allocation result to the at least two users.

[0009] According to one aspect of an embodiment of the present invention, there is also provided an FPGA-based resource allocation device, comprising: a first determination module, configured to determine an allocation strategy for the memory resources of the FPGA, wherein the allocation strategy comprises allocating the memory resources of the FPGA to at least two users; and a first sending module, configured to send the allocation strategy to the FPGA, so that the FPGA provides allocated memory resources to the at least two users according to the allocation strategy.

[0010] According to another aspect of an embodiment of the present invention, a FPGA-based resource allocation device is also provided, including: a first receiving module, used to receive an allocation strategy for the memory resources of the FPGA sent by a processor, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users; and a providing module, used to provide allocated memory resources to the at least two users based on the allocation strategy.

[0011] According to another aspect of an embodiment of the present invention, a server is provided, comprising: a processor and an FPGA, wherein the FPGA includes a logic processing chip, wherein the processor is configured to determine an allocation strategy for memory resources of the FPGA and send the allocation strategy to the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users; and the FPGA is configured to provide allocated memory resources to the at least two users according to the allocation strategy through the logic processing chip.

[0012] According to another aspect of an embodiment of the present invention, a FPGA-based resource allocation device is provided, comprising a second receiving module for receiving a memory request from each of at least two users, wherein the memory request carries a requested number of channels and a requested memory usage; an allocation module for allocating FPGA memory resources to the at least two users based on the memory request; and a feedback module for feeding back the FPGA memory resource allocation result to the at least two users.

[0013] According to one aspect of an embodiment of the present invention, a storage medium is further provided, which includes a stored program, wherein when the program is running, the device where the storage medium is located is controlled to execute any one of the above-mentioned FPGA-based resource allocation methods.

[0014] According to another aspect of an embodiment of the present invention, a computer device is provided, comprising: a memory and a processor, wherein the memory stores a computer program; and the processor is configured to execute the computer program stored in the memory, wherein the computer program executes any one of the above-described FPGA-based resource allocation methods when the computer program is running.

[0015] In an embodiment of the present invention, a strategy for allocating memory resources of the FPGA is determined, wherein the strategy includes allocating the memory resources of the FPGA to at least two users; and the strategy is sent to the FPGA, so that the FPGA provides allocated memory resources to the at least two users according to the strategy. By allocating the memory resources of the FPGA to the at least two users, cloud services are provided to the at least two users via the FPGA, thereby achieving the purpose of multiple users sharing the memory resources of the FPGA, thereby achieving the technical effect of improving onboard memory utilization, and further solving the technical problem of waste of onboard memory resources that is inevitably caused by adopting a single-card single-user mode in related technologies. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0017] Figure 1 1 is a hardware structure block diagram of a computer terminal for implementing an FPGA-based resource allocation method according to an embodiment of the present invention;

[0018] Figure 2 is a flowchart of a first FPGA-based resource allocation method according to embodiment 1 of the present invention;

[0019] Figure 3 is a flowchart of a second FPGA-based resource allocation method according to an embodiment of the present invention;

[0020] Figure 4 is a flowchart of a third FPGA-based resource allocation method according to an embodiment of the present invention;

[0021] Figure 5 is a flowchart of a fourth FPGA-based resource allocation method according to an embodiment of the present invention;

[0022] Figure 6 is an architecture diagram for implementing a resource allocation method based on FPGA according to a preferred embodiment of the present invention;

[0023] Figure 7is a schematic diagram of a resource allocation method based on FPGA provided according to a preferred embodiment of the present invention;

[0024] Figure 8 is a schematic diagram of another FPGA-based resource allocation method provided according to a preferred embodiment of the present invention;

[0025] Figure 9 2 is a schematic diagram of a device for a first resource allocation method based on FPGA according to embodiment 2 of the present invention;

[0026] Figure 10 Schematic diagram of a device for a second FPGA-based resource allocation method according to embodiment 3 of the present invention;

[0027] Figure 11 is a schematic diagram of a server according to the third FPGA-based resource allocation method of embodiment 4 of the present invention;

[0028] Figure 12 2 is a schematic diagram of an apparatus for a fourth FPGA-based resource allocation method according to embodiment 5 of the present invention. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0030] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0031] First, some nouns or terms that appear in the description of the embodiments of the present application are subject to the following interpretations:

[0032] A Field Programmable Gate Array (FPGA) utilizes the concept of a logic cell array (LCA). Its internal components include configurable logic blocks (CLBs), input and output blocks (IOBs), and interconnects. FPGAs are programmable devices with a different structure than traditional logic circuits and gate arrays (such as PALs, GALs, and CPLDs). FPGA logic is implemented by loading programming data into internal static memory cells. The values ​​stored in these memory cells determine the logical functions of the logic cells, the connections between modules, and between modules and I / O, and ultimately the functions that the FPGA can implement. FPGAs allow for unlimited programming.

[0033] A virtual machine (VM) is a complete computer system with full hardware system functionality, simulated through software and running in a completely isolated environment. A virtual system creates a completely new virtual image of an existing operating system, providing the same functionality as a real Windows system. Once inside the virtual system, all operations are performed within this new, independent virtual system. Software can be installed and run independently, data can be saved, and the system has its own desktop, without affecting the actual system. Furthermore, the operating system can flexibly switch between the existing system and the virtual image.

[0034] Example 1

[0035] According to an embodiment of the present invention, an embodiment of a resource allocation method based on FPGA is also provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0036] The method embodiment provided in the first embodiment of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Figure 1 FIG. 1 is a hardware structure diagram of a computer terminal (or mobile device) for implementing a resource allocation method based on FPGA according to an embodiment of the present invention. Figure 1As shown, the computer terminal 10 (or mobile device 10) may include one or more (illustrated as 102a, 102b, ..., 102n) processors 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA), and a memory 104 for storing data. In addition, it may also include: a transmission module, a display, an input / output interface (I / O interface), a universal serial bus (USB) port (which may be included as one of the ports of the I / O interface), a network interface, a power supply, and / or a camera. It will be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above electronic device. Figure 1 More or fewer components than shown, or with Figure 1 Different configurations shown.

[0037] It should be noted that the one or more processors 102 and / or other data processing circuits described above may generally be referred to herein as "data processing circuitry". The data processing circuitry may be embodied in whole or in part as software, hardware, firmware, or any other combination thereof. In addition, the data processing circuitry may be a single independent processing module, or may be incorporated in whole or in part into any of the other components of the computer terminal 10 (or mobile device). As described in the embodiments of the present application, the data processing circuitry serves as a processor control (e.g., selection of a variable resistor terminal path connected to an interface).

[0038] The memory 104 can be used to store software programs and modules of application software, such as the program instructions / data storage device corresponding to the FPGA-based resource allocation method in the embodiment of the present invention. The processor 102 executes the software programs and modules stored in the memory 104 to perform various functional applications and data processing, thereby implementing the FPGA-based resource allocation method for the above-mentioned application. The memory 104 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories may be connected to the computer terminal 10 via a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0039] The transmission module is configured to receive or transmit data via a network. A specific example of the network may include a wireless network provided by a communications provider of the computer terminal 10. In one embodiment, the transmission module includes a network interface controller (NIC), which can be connected to other network devices via a base station to enable communication with the Internet. In another embodiment, the transmission module may be a radio frequency (RF) module, which is configured to communicate with the Internet wirelessly.

[0040] The display may be, for example, a touch screen liquid crystal display (LCD) that enables a user to interact with a user interface of the computer terminal 10 (or mobile device).

[0041] Figure 1 The hardware structure block diagram shown can be used not only as an exemplary block diagram of the above-mentioned computer terminal 10 (or mobile device), but also as an exemplary block diagram of the above-mentioned server. In an optional embodiment, the computer terminal 10 (or mobile device) can be connected to one or more servers, such as a security server, a resource server, a game server, etc., via a data network connection or an electronic connection. In an optional embodiment, the above-mentioned computer terminal 10 (or mobile device) can be any mobile computing device, etc. The data network connection can be a local area network connection, a wide area network connection, an Internet connection, or other types of data network connections. The computer terminal 10 (or mobile device) can be executed to connect to a network service performed by a server (such as a security server) or a group of servers. A network server is a network-based user service, such as a social network, cloud resources, email, online payment or other online applications.

[0042] Under the above operating environment, this application provides Figure 2 The FPGA-based resource allocation method shown. Figure 2 FIG. 1 is a flow chart of a resource allocation method based on FPGA according to embodiment 1 of the present invention. Figure 2 As shown, the method includes the following steps:

[0043] Step S202, determining an allocation strategy for the memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users;

[0044] As an optional embodiment, the above steps can be performed by a processor in a server, where an FPGA is installed. The processor manages the memory resources on the FPGA through communication with the FPGA. For example, the processor can determine the allocation policy for the FPGA's memory resources, that is, manage the allocation of FPGA memory resources to users. For example, when allocating memory resources to multiple users, how to allocate them is determined.

[0045] As an optional embodiment, the FPGA may include the following features: hardware programmability, low power consumption, low latency, etc., and may be applied to high-performance computing. The cloud platform may include one or more FPGA-based cloud servers for providing services to users.

[0046] As an optional embodiment, the FPGA can allocate resources to multiple users, enabling multiple users to share the same resources. For example, the resources of a single FPGA can be allocated to multiple users. As multi-user usage scenarios gradually emerge, numerous issues need to be considered in these scenarios, making FPGA memory resources even more valuable. Therefore, if FPGAs can provide services to multiple users, the issue of inefficient resource utilization can be largely addressed. For example, shared DMA and shared DDR memory also face resource waste due to improper allocation and management methods. Using FPGAs to provide services to multiple users can also, to a certain extent, address the resource waste associated with shared DMA and shared DDR memory.

[0047] As an optional embodiment, the memory resources of the FPGA may be of various types, for example, may include at least one of the following: direct memory access memory resources, double data rate memory resources.

[0048] As an optional embodiment, the FPGA memory resource allocation strategy can be determined based on specific parameters for allocating memory resources. For example, taking into account the number of users, the number of memory channels used by each user, and the memory usage of each user, the FPGA memory resource allocation strategy can be determined in the following manner: first, the specific values ​​of the aforementioned parameters are determined. For example, the number of at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users are obtained; then, the FPGA memory resource allocation strategy is determined based on the number of at least two users, the number of memory channels used by each user, and the memory usage of each user. Using this processing approach, a more specific allocation can be made based on the specific parameters corresponding to the allocation strategy, thereby providing specific services to users.

[0049] As an optional embodiment, various methods can be used to obtain the number of at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users. For example, requests can be received from multiple users and then allocated based on the user requests and the specific conditions of the FPGA. For example, the following method can be used to obtain these parameters: receiving a memory request from each of the at least two users, wherein the memory request includes the requested number of channels and the requested memory usage; and determining the number of at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users based on the memory requests. Obtaining parameters for allocating memory resources based on user requests allows for flexible and variable allocation.

[0050] Step S204: Send the allocation strategy to the FPGA, so that the FPGA provides allocated memory resources for at least two users according to the allocation strategy.

[0051] As an optional embodiment, after determining a strategy for allocating memory resources to users, the strategy can be sent to the FPGA, which then allocates memory resources to multiple users. It should be noted that the FPGA's memory resource allocation can be executed by the FPGA's processing chip. Specifically, the processing chip manages the interaction between the FPGA and the processor, receives processing commands from the processor, and performs processing based on these commands.

[0052] As an optional embodiment, after sending the allocation policy to the FPGA so that the FPGA provides allocated memory resources to at least two users according to the allocation policy, the method may further include: receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested by the predetermined user for adjustment; determining dynamically adjusted memory resources for the predetermined user based on the information about the resources requested by the predetermined user, and sending the adjusted memory resource information to the FPGA so that the FPGA provides the adjusted allocated memory resources to the predetermined user. Because memory resources on the FPGA can be dynamically adjusted, after the processor, in conjunction with the FPGA, allocates memory resources to multiple users, the allocated memory resources can be adjusted due to changes in user service requirements. Dynamically adjusting the allocated memory resources can avoid wasting memory resources while also effectively utilizing them, improving resource utilization.

[0053] As an optional embodiment, the memory resources allocated to at least two users are physically isolated by different physical addresses. This physical isolation ensures absolute physical access to the FPGA memory resources allocated to each user. Physical isolation, compared to software isolation, can ensure security, thereby preventing data leakage caused by users sharing memory resources and improving security.

[0054] In an embodiment of the present invention, a server processor determines an allocation strategy for FPGA memory resources, wherein the allocation strategy includes allocating the FPGA memory resources to at least two users. The allocation strategy is then sent to the FPGA, and the FPGA provides allocated memory resources to the at least two users according to the allocation strategy. By allocating the FPGA memory resources to the at least two users, cloud services are provided to the at least two users via the FPGA, thereby achieving the purpose of multiple users sharing the FPGA memory resources, thereby achieving the technical effect of improving onboard memory utilization, and further solving the technical problem of onboard memory resource waste that is inevitably caused by adopting a single-card, single-user mode in related technologies.

[0055] As an optional embodiment, different methods can be used to determine the allocation strategy for the FPGA's memory resources based on different FPGA usage scenarios. For example, to implement cross-FPGA usage scenarios, the FPGA's memory resource allocation strategy can be determined in the following manner: An allocation strategy for the FPGA's memory resources under FPGA pooling is determined, where the allocation strategy includes allocating the FPGA's memory resources to at least two users and allocating memory resources of at least two FPGAs to the at least two users. The allocation strategy is then transmitted to the FPGA, which then allocates memory resources to the at least two users based on the allocation strategy.

[0056] As an optional embodiment, in the case where the FPGA belongs to an FPGA under FPGA pooling, the allocation strategy includes allocating the memory resources of the FPGA to at least two users, and also includes: allocating the memory resources of at least two FPGAs to at least two users. Among them, FPGA pooling is to configure and use the resources (including memory resources) of the FPGA cluster including multiple FPGAs as a resource pool as a whole, and allocate the memory resources of at least two FPGAs to at least two users, thereby achieving the effect of cross-FPGA memory use. In this cross-FPGA memory use scenario, through the pooled interconnection node (used to realize management interaction between FPGAs, such as including memory resource configuration interaction, etc.) combined with the allocation strategy measures of the memory management unit, the user mirror can not only use the memory of this FPGA, but also use the memory of another FPGA. This cross-FPGA memory use configuration method can flexibly configure the mirror and memory allocation of the entire FPGA cluster. For example, the memory included in the entire FPGA cluster (including multiple FPGAs) can be provided to the user as a whole. In this way, when the user's memory allocation needs cannot be met by using one FPGA, the memory allocation needs can be met by using another FPGA. Even when two FPGAs cannot meet the memory allocation needs, the memory allocation needs can be met by continuing to use another FPGA. This achieves the effect of flexible memory allocation for users and effectively improves the user experience of using FPGA memory.

[0057] As an optional embodiment, at least two FPGAs in an FPGA pool communicate via a pooled interconnect node, enabling the exchange of memory resource information between the at least two FPGAs and achieving synchronization of memory resource information between the at least two FPGAs. The pooled interconnect node is used to connect the FPGAs in the FPGA pool. The pooled interconnect node in the FPGA pool manages multiple FPGAs, for example, by exchanging memory resource information between multiple FPGAs. This exchange of memory resource information across multiple FPGAs enables timely and efficient updates of memory resources allocated to users, thereby more accurately allocating appropriate memory resources to users.

[0058] In an embodiment of the present invention, a resource allocation method based on FPGA is also provided. Figure 3 : is a flow chart of a second FPGA-based resource allocation method according to an embodiment of the present invention. Figure 3 As shown, the method includes the following steps:

[0059] Step S302: receiving an allocation strategy for FPGA memory resources sent by a processor, wherein the allocation strategy includes allocating the FPGA memory resources to at least two users;

[0060] As an optional embodiment, the execution entity of the above steps may be an FPGA. Specifically, it may be a processing chip within the FPGA, which is used to manage the processing logic on the FPGA. In this embodiment, the FPGA processing chip receives an allocation policy sent from a server processor and allocates memory resources to multiple users based on the allocation policy.

[0061] As an optional embodiment, the FPGA processing chip executes the allocation of the memory resources of an FPGA to at least two users. Compared with the related art, an FPGA can only be allocated to one user. This enriches the use of the FPGA's memory resources, not only making the use of memory resources more flexible, but also improving the utilization rate of memory resources.

[0062] Step S304: providing allocated memory resources to at least two users according to the allocation strategy.

[0063] As an optional embodiment, when providing allocated memory resources to at least two users based on an allocation policy, for example, when an FPGA processing chip specifically provides allocated memory resources to multiple users based on the allocation policy, various execution methods can be employed. For example, the following execution method can be employed: first, according to the allocation policy, the number of users, the number of channels used by each user, and the memory usage of each user are set; then, a channel address is determined for each of the at least two users based on the number of channels used by each user and the memory usage of each user, and allocated memory resources are provided to each user based on the channel address. In other words, the FPGA processing chip specifically performs the allocation of memory resources on the FPGA to multiple users. This allows each user to achieve allocation and use of the FPGA's memory resources according to the channel address corresponding to the parameters set by the FPGA processing chip.

[0064] As an optional embodiment, the memory resources allocated to at least two users have non-overlapping physical addresses. That is, the memory resources allocated to at least two users are physically isolated, meaning different users use memory resources corresponding to different physical addresses. This physical address isolation ensures absolute isolation of memory resources used by each user, ensuring the security of user data and improving the user experience of using memory resources.

[0065] As an optional embodiment, in the case where the FPGA belongs to an FPGA under FPGA pooling, the allocation strategy also includes: allocating memory resources of at least two FPGAs to at least two users. Among them, FPGA pooling is to configure and use the resources (including memory resources) of an FPGA cluster including multiple FPGAs as a resource pool as a whole, and allocate memory resources of at least two FPGAs to at least two users, thereby achieving the effect of using memory across FPGAs. In this scenario of using memory across FPGAs, through the pooled interconnection node (used to implement management interaction between FPGAs, such as including memory resource configuration interaction, etc.) combined with the allocation strategy measures of the memory management unit, the user mirror can not only use the memory of this FPGA, but also use the memory of another FPGA. This configuration method of using memory across FPGAs can flexibly configure the mirror and memory allocation of the entire FPGA cluster. For example, the memory included in the entire FPGA cluster (including multiple FPGAs) can be provided to the user as a whole. In this way, when the user's memory allocation needs cannot be met by using one FPGA, the memory allocation needs can be met by using another FPGA. Even when two FPGAs cannot meet the memory allocation needs, the memory allocation needs can be met by continuing to use another FPGA. This achieves the effect of flexible memory allocation for users and effectively improves the user experience of using FPGA memory.

[0066] In an embodiment of the present invention, an allocation strategy for FPGA memory resources transmitted by a processor is received by an FPGA processing chip. The allocation strategy includes allocating the FPGA memory resources to at least two users and providing the allocated memory resources to the at least two users according to the allocation strategy. By allocating the FPGA memory resources to the at least two users, cloud services are provided to the at least two users via the FPGA, thereby achieving the purpose of multiple users sharing the FPGA memory resources. This achieves the technical effect of improving onboard memory utilization, thereby resolving the technical problem of waste of onboard memory resources that is inevitably caused by adopting a single-card, single-user mode in related technologies.

[0067] In an embodiment of the present invention, a resource allocation method based on FPGA is also provided. Figure 4 : is a flow chart of a third FPGA-based resource allocation method according to an embodiment of the present invention, such as Figure 4 As shown, the method includes the following steps:

[0068] Step S402: The processor determines an allocation strategy for memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users.

[0069] Step S404: the processor sends the allocation strategy to the FPGA;

[0070] In step S406, the FPGA provides allocated memory resources to at least two users according to the allocation strategy.

[0071] In an optional embodiment, in combination with the above-mentioned FPGA-based resource allocation method 1 executed by the server's processor and the FPGA-based resource allocation method 2 executed by the FPGA processing chip, an embodiment of the present invention provides an FPGA-based resource allocation method 3 including a processor and an FPGA as execution entities.

[0072] In an optional embodiment, the FPGA provides allocated memory resources to at least two users based on an allocation strategy, including: the FPGA determines the number of users of the at least two users, the number of channels used by each of the at least two users, and the memory usage of each of the at least two users based on the allocation strategy; the FPGA determines a channel address for each of the at least two users based on the number of channels used by each user and the memory usage of each user, and controls the channel address to provide allocated memory resources to each user.

[0073] In an embodiment of the present invention, a processor determines an allocation strategy for FPGA memory resources, wherein the allocation strategy includes allocating the FPGA memory resources to at least two users; the processor sends the allocation strategy to the FPGA; and the FPGA provides the allocated memory resources to the at least two users based on the allocation strategy. By allocating the FPGA memory resources to the at least two users, cloud services are provided to the at least two users via the FPGA, thereby achieving the purpose of multiple users sharing the FPGA memory resources, thereby achieving the technical effect of improving onboard memory utilization, and further solving the technical problem of onboard memory resource waste that is inevitably caused by adopting a single-card, single-user mode in related technologies.

[0074] In an embodiment of the present invention, a resource allocation method based on FPGA is also provided. Figure 5 : is a flowchart of a fourth FPGA-based resource allocation method according to an embodiment of the present invention, such as Figure 5 As shown, the method includes the following steps:

[0075] Step S502: receiving a memory request from each of at least two users, wherein the memory request carries a requested number of channels and a requested memory usage;

[0076] Step S504: allocating memory resources of the FPGA to at least two users based on the memory request;

[0077] Step S506: Feedback the FPGA memory resource allocation result to at least two users.

[0078] As an optional embodiment, receiving a memory request from each of the at least two users may be receiving a configuration request from the user, that is, the user may proactively request the memory he or she needs, so that subsequent memory allocation not only satisfies the memory allocation rules but also meets the user's needs, thereby achieving the effect of flexible allocation of FPGA memory.

[0079] As an optional embodiment, after allocating FPGA memory resources to at least two users based on memory requests, the method further includes: receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested by the predetermined user for adjustment; and dynamically adjusting the memory resources for the predetermined user based on the information about the resources requested by the predetermined user. Therefore, after allocating memory to a user based on the memory request sent by the user, if the user needs to adjust the allocated memory based on business needs, the user can request a memory resource adjustment, and then the memory resources are adjusted for the user based on the request. This process ensures that the memory allocated to the user is not static but can be flexibly changed and adjusted based on the user's business needs. This not only meets the user's usage needs, but also effectively improves the efficiency of memory resource utilization and avoids waste of memory resources.

[0080] As an optional embodiment, when the FPGA belongs to an FPGA under FPGA pooling, based on memory requests, the memory resources of at least two FPGAs are allocated to at least two users. FPGA pooling is to configure and use the resources (including memory resources) of an FPGA cluster including multiple FPGAs as a resource pool as a whole, and allocate the memory resources of at least two FPGAs to at least two users, thereby achieving the effect of cross-FPGA memory use. In this cross-FPGA memory use scenario, through the pooled interconnection node (used to implement management interaction between FPGAs, such as memory resource configuration interaction, etc.) combined with the allocation strategy measures of the memory management unit, the user mirror can not only use the memory of this FPGA, but also use the memory of another FPGA. This cross-FPGA memory use configuration method can flexibly configure the mirror and memory allocation of the entire FPGA cluster. For example, the memory included in the entire FPGA cluster (including multiple FPGAs) can be provided to the user as a whole. In this way, when the user's FPGA cannot meet the memory allocation needs, the memory allocation needs can be met by using another FPGA. Even when two FPGAs cannot meet the memory allocation needs, the memory allocation needs can be met by continuing to use another FPGA. This achieves the effect of flexible memory allocation for users and effectively improves the user experience of using FPGA memory.

[0081] In an embodiment of the present invention, a user-configured processing method is adopted to achieve allocation of FPGA memory resources through interaction with the user, and the FPGA memory resources are allocated to at least two users, thereby providing cloud services to the at least two users through the FPGA, achieving the purpose of multiple users sharing the FPGA memory resources, thereby achieving the technical effect of improving onboard memory utilization, and further solving the technical problem of waste of onboard memory resources that is inevitably caused by the use of a single-card single-user mode in related technologies.

[0082] Based on the above embodiments and preferred embodiments, a preferred implementation manner is provided, which is described below.

[0083] Figure 6 is an architecture diagram for implementing a resource allocation method based on FPGA according to a preferred embodiment of the present invention, such as Figure 6 As shown, multiple virtual machines VM (for example, corresponding to the multiple users mentioned above) share FPGA resources to achieve rational utilization of FPGA resources. This solution is divided into two parts: user resources (corresponding to the memory resources of the FPGA allocated to the user (device)) and management resources (resources occupied by the management device on the FPGA used to manage memory resources). User resource part - the FPGA is divided into multiple ULs (User Logic, each user's image is downloaded through mgntpf (management device)), which share FPGA resources through USRPF (user device), UL and DRM (memory request management unit). Management resource part - through a remote server (control service, for example, a remote server, corresponding to the processor of the server mentioned above) to manage multiple users such as image downloading and memory allocation.

[0084] Figure 7 Schematic diagram of a resource allocation method based on FPGA provided according to a preferred embodiment of the present invention, such as Figure 7As shown, the use and management of multiple users on the FPGA onboard memory is completed through (1) to (3). (1) The number of users, the number of channels used by each user, and the memory usage of each user are set through the management device (mgntpf), and then transmitted to the memory management device (calculated by the memory request management unit in the figure); (2) The memory management device performs overall management of the DDR channel address based on the memory capacity information transmitted by the allocation module (for example, the control service); (3) The policy execution unit executes the command issued in step (2). Through the above steps, the configuration request of the number of user channels and the request for memory usage of each user are realized; because the memory resources allocated by the FPGA to multiple users are isolated by physical memory addresses, different users can achieve the effect of physical isolation when using the memory space, and user data leakage will not be caused by memory sharing.

[0085] Through the multi-user memory management steps (1) to (3) above, the purpose of multiple users sharing FPGA memory resources can be achieved. In addition, the number of channels used by users and the memory size used can also be dynamically configured to avoid channel and memory waste.

[0086] Figure 8 A schematic diagram of another FPGA-based resource allocation method provided according to a preferred embodiment of the present invention is shown as follows: Figure 8 As shown, for example, the FPGA-based resource allocation method provided by the preferred embodiment supports cross-FPGA memory usage scenarios under FPGA pooling. In this cross-FPGA memory usage scenario, through the pooled interconnected nodes combined with the allocation strategy measures of the memory management unit, the user image can not only use the memory of this FPGA, but also use the memory of another FPGA. This cross-FPGA memory usage configuration method can flexibly configure the image and memory allocation of the entire FPGA cluster. For example, the memory included in the entire FPGA cluster (including multiple FPGAs) can be provided to the user as a whole, so that when the user uses one FPGA that cannot meet the memory allocation requirements, the memory allocation requirements can be met by using another FPGA. Even when two FPGAs cannot meet the memory allocation requirements, the memory allocation requirements can be met by continuing to use another FPGA, thereby achieving the effect of flexibly allocating memory to the user and effectively improving the user's experience of using FPGA memory.

[0087] Example 2

[0088] According to an embodiment of the present invention, a device for implementing the first method of resource allocation based on FPGA in the above embodiment 1 is also provided. Figure 9 Schematic diagram of a device according to a first method of resource allocation based on FPGA according to embodiment 2 of the present invention, Figure 9As shown, the device includes: a determination module 92 and a sending module 94. The device will be described in detail below.

[0089] A determination module 92 is configured to determine an allocation strategy for the FPGA's memory resources, wherein the allocation strategy includes allocating the FPGA's memory resources to at least two users. A sending module 94 is connected to the determination module 92 and configured to send the allocation strategy to the FPGA, so that the FPGA provides allocated memory resources to the at least two users based on the allocation strategy.

[0090] It should be noted that the determination module 92 and the sending module 94 correspond to steps S202 to S204 in Example 1. The examples and application scenarios implemented by the two modules and the corresponding steps are the same, but are not limited to the contents disclosed in the above-mentioned Example 1. It should be noted that the above-mentioned modules, as part of the device, can be run in the computer terminal 10 provided in Example 1.

[0091] Example 3

[0092] According to an embodiment of the present invention, a device for implementing the second FPGA-based resource allocation method in the above embodiment 1 is also provided. Figure 10 Schematic diagram of a device for resource allocation method 2 based on FPGA according to embodiment 3 of the present invention, Figure 10 As shown, the device includes: a first receiving module 102 and a providing module 104. The device will be described in detail below.

[0093] The first receiving module 102 is used to receive the allocation strategy of the FPGA memory resources sent by the processor, wherein the allocation strategy includes allocating the FPGA memory resources to at least two users; the providing module 104 is connected to the above-mentioned first receiving module 102 and is used to provide the allocated memory resources to the at least two users according to the allocation strategy.

[0094] It should be noted that the first receiving module 102 and providing module 104 correspond to steps S302 to S304 in Example 1. The examples and application scenarios implemented by the two modules and the corresponding steps are the same, but are not limited to the contents disclosed in Example 1. It should be noted that the above modules, as part of the device, can be run in the computer terminal 10 provided in Example 1.

[0095] Example 4

[0096] According to an embodiment of the present invention, a server for implementing the third FPGA-based resource allocation method in the above embodiment 1 is also provided. Figure 11 Schematic diagram of a server according to the third FPGA-based resource allocation method of embodiment 4 of the present invention, as shown in FIG. Figure 11As shown, the server 110 includes: a processor 112 and an FPGA 114, wherein the FPGA includes a logic processing chip. The server 110 is described in detail below.

[0097] Processor 112 is configured to determine an allocation strategy for FPGA memory resources and send the allocation strategy to the FPGA, wherein the allocation strategy includes allocating the FPGA memory resources to at least two users. FPGA 114 is connected to the processor 112 and configured to provide allocated memory resources to the at least two users according to the allocation strategy through a logic processing chip.

[0098] It should be noted that the processor 102 and FPGA 104 described above correspond to steps S402 to S404 in Example 1. The examples and application scenarios implemented by the two modules and the corresponding steps are the same, but are not limited to the contents disclosed in Example 1. It should be noted that the above modules, as part of the device, can be run in the computer terminal 10 provided in Example 1.

[0099] Example 5

[0100] According to an embodiment of the present invention, there is also provided a device for implementing the fourth FPGA-based resource allocation method in the above-mentioned embodiment 1. Figure 12 Schematic diagram of a device according to a fourth method of resource allocation based on FPGA according to embodiment 5 of the present invention, Figure 12 As shown, the device includes: a second receiving module 122, an allocation module 124 and a feedback module 126. The device will be described in detail below.

[0101] A second receiving module 122 is configured to receive a memory request from each of at least two users, wherein the memory request carries the requested number of channels and the requested memory usage. An allocation module 124 is connected to the second receiving module 122 and is configured to allocate the FPGA's memory resources to the at least two users based on the memory requests. A feedback module 126 is connected to the allocation module 124 and is configured to provide feedback to the at least two users on the FPGA's memory resource allocation results.

[0102] It should be noted that the second receiving module 122, the allocation module 124, and the feedback module 126 correspond to steps S502 to S506 in Example 1. The examples and application scenarios implemented by the two modules and the corresponding steps are the same, but are not limited to the contents disclosed in Example 1. It should be noted that the above modules, as part of the device, can be run in the computer terminal 10 provided in Example 1.

[0103] Example 6

[0104] The embodiment of the present invention may provide a computer device, which may be any computer device in a computer device group. Optionally, in this embodiment, the computer device may also be replaced by a terminal device such as a mobile terminal.

[0105] Optionally, in this embodiment, the computer device may be located in at least one network device among a plurality of network devices of a computer network.

[0106] Optionally, in this embodiment, the computer device may include: one or more (only one is shown in the figure) processors and a memory.

[0107] The memory can be used to store software programs and modules, such as the program instructions / modules corresponding to the security vulnerability detection method and device in the embodiments of the present invention. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory, that is, to implement the above-mentioned service satisfaction determination method. The memory may include a high-speed random access memory and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory may further include a memory remotely located relative to the processor, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0108] The processor can call the information and application stored in the memory through the transmission device to perform the following steps: determining an allocation strategy for the memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users; and sending the allocation strategy to the FPGA so that the FPGA provides allocated memory resources to the at least two users according to the allocation strategy.

[0109] Optionally, the processor may further execute program code for the following steps: determining the FPGA memory resource allocation strategy includes: obtaining the number of at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users; and determining the FPGA memory resource allocation strategy based on the number of at least two users, the number of memory channels used by each user, and the memory usage of each user.

[0110] Optionally, the processor may also execute program code for the following steps: obtaining the number of at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users includes: receiving a memory request from each of the at least two users, wherein the memory request carries the requested number of channels and the requested memory usage; determining the number of at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users based on the memory request.

[0111] Optionally, the processor may also execute program code for the following steps: after sending the allocation strategy to the FPGA, for the FPGA to provide allocated memory resources to at least two users according to the allocation strategy, further comprising: receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources after adjustment requested by the predetermined user; determining dynamically adjusted memory resources for the predetermined user based on the information about the resources after adjustment requested by the predetermined user, and sending the information about the adjusted memory resources to the FPGA, for the FPGA to provide the predetermined user with the adjusted allocated memory resources.

[0112] Optionally, the processor may further execute program code of the following steps: memory resources allocated to at least two users are physically isolated by different physical addresses.

[0113] Optionally, the above-mentioned processor can also execute the program code of the following steps: determining the allocation strategy of the FPGA memory resources includes: determining the allocation strategy of the FPGA memory resources under FPGA pooling, wherein the allocation strategy includes allocating the FPGA memory resources to at least two users, and allocating at least two FPGA memory resources to at least two users.

[0114] Optionally, the processor may also execute program code for the following steps: at least two FPGAs in the FPGA pool communicate with each other through a pooled interconnection node, thereby enabling interaction of memory resource information between the at least two FPGAs and synchronizing memory resource information between the at least two FPGAs, wherein the pooled interconnection node is used to connect the FPGAs in the FPGA pool.

[0115] Optionally, the processor can also call the information and application stored in the memory through the transmission device to perform the following steps: receiving the allocation strategy of the FPGA memory resources sent by the processor, wherein the allocation strategy includes allocating the FPGA memory resources to at least two users; and providing the allocated memory resources to the at least two users according to the allocation strategy.

[0116] Optionally, the processor may also execute program code for the following steps: providing allocated memory resources to at least two users based on an allocation strategy, including: setting the number of users, the number of channels used by each user, and the memory usage of each user based on the allocation strategy; determining a channel address for each of the at least two users based on the number of channels used by each user and the memory usage of each user, and providing allocated memory resources to each user through the channel address.

[0117] Optionally, the processor may further execute program code of the following steps: memory resources allocated to at least two users have physical addresses that do not overlap.

[0118] Optionally, the processor can also call the information and application stored in the memory through the transmission device to perform the following steps: the processor determines the allocation strategy of the FPGA's memory resources, wherein the allocation strategy includes allocating the FPGA's memory resources to at least two users; the processor sends the allocation strategy to the FPGA; the FPGA provides allocated memory resources to the at least two users based on the allocation strategy.

[0119] Optionally, the processor may further execute program code of the following steps: the FPGA providing allocated memory resources for at least two users based on an allocation strategy includes: the FPGA determining the number of at least two users, the number of channels used by each of the at least two users, and the memory usage of each of the at least two users based on the allocation strategy; the FPGA determining a channel address for each of the at least two users based on the number of channels used by each user and the memory usage of each user, and controlling the channel address to provide allocated memory resources for each user.

[0120] Optionally, the processor may also call information and applications stored in the memory through the transmission device to perform the following steps: receiving a memory request from each of at least two users, wherein the memory request carries the requested number of channels and the requested memory usage; based on the memory request, allocating the memory resources of the FPGA to the at least two users; and feeding back the FPGA memory resource allocation result to the at least two users.

[0121] Optionally, the processor may also execute program code for the following steps: after allocating the memory resources of the FPGA to at least two users based on the memory request, the program code further includes: receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources after adjustment requested by the predetermined user; and dynamically adjusting the memory resources for the predetermined user based on the information about the resources after adjustment requested by the predetermined user.

[0122] Optionally, the processor may further execute program code of the following steps: when the FPGA is an FPGA under FPGA pooling, allocating memory resources of at least two FPGAs to at least two users based on memory requests.

[0123] According to an embodiment of the present invention, a strategy for allocating memory resources of an FPGA is determined, wherein the strategy includes allocating the memory resources of the FPGA to at least two users; and the strategy is sent to the FPGA, so that the FPGA provides allocated memory resources to the at least two users according to the strategy. By allocating the memory resources of the FPGA to the at least two users, cloud services are provided to the at least two users via the FPGA, thereby achieving the purpose of multiple users sharing the memory resources of the FPGA, thereby achieving the technical effect of improving onboard memory utilization, and further solving the technical problem of waste of onboard memory resources that is inevitably caused by adopting a single-card single-user mode in related technologies.

[0124] Those skilled in the art will appreciate that the computer terminal may also be a smartphone (such as an Android phone, an iOS phone, etc.), a tablet computer, a handheld computer, a mobile Internet device (MID), a PAD, or other terminal devices.

[0125] A person skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing the hardware related to the terminal device through a program, and the program can be stored in a computer-readable storage medium, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0126] Example 7

[0127] The embodiment of the present invention further provides a storage medium. Optionally, in this embodiment, the storage medium can be used to store the program code executed by the FPGA-based resource allocation method provided in any one of the above-mentioned embodiments 1.

[0128] Optionally, in this embodiment, the storage medium may be located in any computer terminal in a computer terminal group in a computer network, or in any mobile terminal in a mobile terminal group.

[0129] Optionally, in this embodiment, the storage medium is configured to store program code for performing the following steps: determining an allocation strategy for the memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users; and sending the allocation strategy to the FPGA, so that the FPGA provides allocated memory resources to the at least two users according to the allocation strategy.

[0130] Optionally, the storage medium is further configured to store program code for executing the following steps: determining the allocation strategy of the memory resources of the FPGA includes: obtaining the number of at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users; and determining the allocation strategy of the memory resources of the FPGA based on the number of at least two users, the number of memory channels used by each user, and the memory usage of each user.

[0131] Optionally, the storage medium is further configured to store program code for executing the following steps: obtaining the number of at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users includes: receiving a memory request from each of the at least two users, wherein the memory request carries the requested number of channels and the requested memory usage; determining the number of at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users based on the memory request.

[0132] Optionally, the storage medium is further configured to store program code for executing the following steps: after sending the allocation strategy to the FPGA, for the FPGA to provide allocated memory resources to at least two users according to the allocation strategy, further comprising: receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources after adjustment requested by the predetermined user; determining dynamically adjusted memory resources for the predetermined user based on the information about the resources after adjustment requested by the predetermined user, and sending the information about the adjusted memory resources to the FPGA, for the FPGA to provide the adjusted allocated memory resources to the predetermined user.

[0133] Optionally, the storage medium is further configured to store program code for executing the following steps: memory resources allocated to at least two users are physically isolated by different physical addresses.

[0134] Optionally, the storage medium is also configured to store program code for executing the following steps: determining the allocation strategy of the FPGA's memory resources includes: determining the allocation strategy of the FPGA's memory resources under FPGA pooling, wherein the allocation strategy includes allocating the FPGA's memory resources to at least two users, and allocating at least two FPGA memory resources to at least two users.

[0135] Optionally, the storage medium is also configured to store program code for executing the following steps: at least two FPGAs under the FPGA pool communicate through a pooled interconnection node, realize the interaction of memory resource information between the at least two FPGAs, and complete the synchronization of memory resource information between the at least two FPGAs, wherein the pooled interconnection node is used to connect the FPGAs under the FPGA pool.

[0136] Optionally, in this embodiment, the storage medium is configured to store program code for performing the following steps: receiving an allocation strategy for the memory resources of the FPGA sent by the processor, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users; and providing allocated memory resources to the at least two users according to the allocation strategy.

[0137] Optionally, the storage medium is further configured to store program code for executing the following steps: providing allocated memory resources to at least two users based on an allocation strategy, including: setting the number of users, the number of channels used by each user, and the memory usage of each user based on the allocation strategy; determining a channel address for each of the at least two users based on the number of channels used by each user and the memory usage of each user, and providing allocated memory resources to each user through the channel address.

[0138] Optionally, the storage medium is further configured to store program codes for executing the following steps: the memory resources allocated to at least two users are physical addresses that do not overlap with each other.

[0139] Optionally, in this embodiment, the storage medium is configured to store program code for executing the following steps: the processor determines an allocation strategy for the memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users; the processor sends the allocation strategy to the FPGA; and the FPGA provides allocated memory resources to the at least two users based on the allocation strategy.

[0140] Optionally, the storage medium is further configured to store program code for executing the following steps: the FPGA provides allocated memory resources for at least two users according to the allocation strategy, including: the FPGA determines the number of users of the at least two users, the number of channels used by each of the at least two users, and the memory usage of each of the at least two users according to the allocation strategy; the FPGA determines a channel address for each of the at least two users based on the number of channels used by each user and the memory usage of each user, and controls the channel address to provide allocated memory resources for each user.

[0141] Optionally, in this embodiment, the storage medium is configured to store program code for performing the following steps: receiving a memory request from each of at least two users, wherein the memory request carries a requested number of channels and a requested memory usage; based on the memory request, allocating memory resources of the FPGA to the at least two users; and feeding back the FPGA memory resource allocation result to the at least two users.

[0142] Optionally, the storage medium is further configured to store program code for executing the following steps: after allocating the memory resources of the FPGA to at least two users based on the memory request, the further steps include: receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources after adjustment requested by the predetermined user; and dynamically adjusting the memory resources for the predetermined user based on the information about the resources after adjustment requested by the predetermined user.

[0143] Optionally, the storage medium is further configured to store program code for executing the following steps: when the FPGA belongs to an FPGA under FPGA pooling, based on memory requests, allocating memory resources of at least two FPGAs to at least two users.

[0144] The serial numbers of the above embodiments of the present invention are for description only and do not represent the advantages or disadvantages of the embodiments.

[0145] In the above embodiments of the present invention, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0146] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0147] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0148] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0149] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk, etc. Various media that can store program codes.

[0150] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A resource allocation method based on FPGA, characterized in that: include: Determining an allocation strategy for memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users, and the allocation strategy is determined based on the number of users, channel data of memory used by the users, and memory usage of each user; Sending the allocation strategy to the FPGA, so that the FPGA provides allocated memory resources to the at least two users according to the allocation strategy, wherein the memory resources allocated to the at least two users are physically isolated by different physical addresses, so that different users use memory resources corresponding to different physical addresses to avoid data leakage caused by memory sharing; The method further comprises: Receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested to be adjusted by the predetermined user; According to the information of the adjusted resources requested by the predetermined user, the dynamically adjusted memory resources for the predetermined user are determined, and the information of the adjusted memory resources is sent to the FPGA, so that the FPGA provides the adjusted allocated memory resources for the predetermined user.

2. The method according to claim 1, characterized in that Determining the allocation strategy of the memory resources of the FPGA includes: Obtaining the number of the at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users; An allocation strategy for memory resources of the FPGA is determined based on the number of the at least two users, the number of memory channels used by each user, and the memory usage of each user.

3. The method according to claim 2, characterized in that Acquiring the number of the at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users includes: Receiving a memory request from each of the at least two users, wherein the memory request carries a requested number of channels and a requested memory usage; According to the memory request, the number of the at least two users, the number of memory channels used by each of the at least two users, and the memory usage of each of the at least two users are determined.

4. The method according to any one of claims 1 to 3, characterized in that Determining the allocation strategy of the memory resources of the FPGA includes: Determine an allocation strategy for memory resources of the FPGA under FPGA pooling, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users, and allocating memory resources of at least two FPGAs to the at least two users.

5. The method according to claim 4, characterized in that The at least two FPGAs in the FPGA pool communicate with each other through a pooled interconnect node, thereby enabling interaction of memory resource information between the at least two FPGAs and synchronizing memory resource information between the at least two FPGAs. The pooled interconnect node is used to connect the FPGAs in the FPGA pool.

6. A resource allocation method based on FPGA, characterized in that: include: receiving an allocation strategy for memory resources of the FPGA sent by a processor, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users, and the allocation strategy is determined based on the number of users, channel data of memory used by the users, and memory usage of each user; Providing allocated memory resources to the at least two users according to the allocation policy, wherein the memory resources allocated to the at least two users are physically isolated by different physical addresses, so that different users use memory resources corresponding to different physical addresses to avoid data leakage caused by memory sharing; The method further comprises: Receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested to be adjusted by the predetermined user; According to the information of the adjusted resources requested by the predetermined user, the dynamically adjusted memory resources for the predetermined user are determined, and the information of the adjusted memory resources is sent to the FPGA, so that the FPGA provides the adjusted allocated memory resources for the predetermined user.

7. The method according to claim 6, characterized in that Providing allocated memory resources to the at least two users according to the allocation strategy includes: According to the allocation strategy, the number of users, the number of channels used by each user, and the memory usage of each user are set; A channel address is determined for each of the at least two users according to the number of channels used by each user and the memory usage of each user, and allocated memory resources are provided to each user through the channel address.

8. The method according to claim 6 or 7, characterized in that The memory resources allocated to the at least two users have physical addresses that do not overlap with each other.

9. A resource allocation method based on FPGA, characterized in that: include: The processor determines an allocation strategy for memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users, and the allocation strategy is determined based on the number of users, channel data of memory used by the users, and memory usage of each user; The processor sends the allocation strategy to the FPGA; The FPGA provides allocated memory resources to the at least two users according to the allocation strategy, wherein the memory resources allocated to the at least two users are physically isolated by different physical addresses, and different users use memory resources corresponding to different physical addresses to avoid data leakage caused by memory sharing; The method further comprises: The processor receives a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested to be adjusted by the predetermined user; The processor determines the dynamically adjusted memory resources for the predetermined user based on the information of the adjusted resources requested by the predetermined user, and sends the information of the adjusted memory resources to the FPGA, so that the FPGA provides the adjusted allocated memory resources for the predetermined user.

10. The method according to claim 9, characterized in that The FPGA providing allocated memory resources for the at least two users according to the allocation strategy includes: The FPGA determines the number of users of the at least two users, the number of channels used by each of the at least two users, and the memory usage of each of the at least two users according to the allocation strategy; The FPGA determines a channel address for each of the at least two users according to the number of channels used by each user and the memory usage of each user, and controls the channel address to provide allocated memory resources for each user.

11. A resource allocation method based on FPGA, characterized in that: include: Receiving a memory request from each of at least two users, wherein the memory request carries a requested number of channels and a requested memory usage; Allocating memory resources of the FPGA to the at least two users based on the memory request; Feedback of the FPGA memory resource allocation result to the at least two users, wherein the memory resources allocated to the at least two users are physically isolated by different physical addresses, so that different users use memory resources corresponding to different physical addresses to avoid data leakage caused by memory sharing; The method further comprises: Receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested to be adjusted by the predetermined user; According to the information of the adjusted resources requested by the predetermined user, the dynamically adjusted memory resources for the predetermined user are determined, and the information of the adjusted memory resources is sent to the FPGA, so that the FPGA provides the adjusted allocated memory resources for the predetermined user.

12. The method according to claim 11, characterized in that After allocating the memory resources of the FPGA to the at least two users based on the memory request, the method further includes: Receiving a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested to be adjusted by the predetermined user; Dynamically adjust memory resources for the predetermined user according to the information of the adjusted resources requested by the predetermined user.

13. The method according to claim 11 or 12, characterized in that Also includes: In a case where the FPGA is an FPGA in FPGA pooling, memory resources of at least two FPGAs are allocated to the at least two users based on the memory request.

14. A resource allocation device based on FPGA, characterized in that: include: a determination module, configured to determine an allocation strategy for memory resources of the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users, and the allocation strategy is determined based on the number of users, channel data of memory used by the users, and memory usage of each user; a sending module, configured to send the allocation policy to the FPGA, so that the FPGA provides allocated memory resources to the at least two users according to the allocation policy, wherein the memory resources allocated to the at least two users are physically isolated by different physical addresses, so that different users use memory resources corresponding to different physical addresses to avoid data leakage caused by memory sharing; The apparatus is further configured to receive a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested to be adjusted by the predetermined user; According to the information of the adjusted resources requested by the predetermined user, the dynamically adjusted memory resources for the predetermined user are determined, and the information of the adjusted memory resources is sent to the FPGA, so that the FPGA provides the adjusted allocated memory resources for the predetermined user.

15. A resource allocation device based on FPGA, characterized in that: include: a first receiving module, configured to receive an allocation strategy for memory resources of the FPGA sent by a processor, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users, and the allocation strategy is determined based on the number of users, channel data of memory used by the users, and memory usage of each user; providing a module for allocating memory resources to the at least two users according to the allocation policy, wherein the memory resources allocated to the at least two users are physically isolated by different physical addresses, so that different users use memory resources corresponding to different physical addresses to avoid data leakage caused by memory sharing; The apparatus is further configured to receive a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested to be adjusted by the predetermined user; According to the information of the adjusted resources requested by the predetermined user, the dynamically adjusted memory resources for the predetermined user are determined, and the information of the adjusted memory resources is sent to the FPGA, so that the FPGA provides the adjusted allocated memory resources for the predetermined user.

16. A server, characterized in that: include: Processor and FPGA, wherein the FPGA includes a logic processing chip, wherein, The processor is configured to determine an allocation strategy for memory resources of the FPGA and send the allocation strategy to the FPGA, wherein the allocation strategy includes allocating the memory resources of the FPGA to at least two users, and the allocation strategy is determined based on the number of users, channel data of memory used by the users, and memory usage of each user; The FPGA is configured to provide allocated memory resources to the at least two users according to the allocation policy through the logic processing chip, wherein the memory resources allocated to the at least two users are physically isolated by different physical addresses, so that different users use memory resources corresponding to different physical addresses to avoid data leakage caused by memory sharing; The processor is further configured to receive a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources after adjustment requested by the predetermined user; determine the dynamically adjusted memory resources for the predetermined user based on the information about the resources after adjustment requested by the predetermined user, and send the information about the adjusted memory resources to the FPGA, so that the FPGA provides the predetermined user with the adjusted allocated memory resources.

17. A resource allocation device based on FPGA, characterized in that: include: a second receiving module, configured to receive a memory request from each of the at least two users, wherein the memory request carries a requested number of channels and a requested memory usage, and the allocation strategy is determined based on the number of users, channel data of memory used by the users, and the memory usage of each user; an allocation module, configured to allocate memory resources of the FPGA to the at least two users based on the memory request; a feedback module, configured to feed back a result of memory resource allocation of the FPGA to the at least two users, wherein the memory resources allocated to the at least two users are physically isolated by different physical addresses, and different users use memory resources corresponding to different physical addresses to avoid data leakage caused by memory sharing; The apparatus is further configured to receive a memory resource adjustment request from a predetermined user among the at least two users, wherein the memory resource adjustment request carries information about the resources requested to be adjusted by the predetermined user; According to the information of the adjusted resources requested by the predetermined user, the dynamically adjusted memory resources for the predetermined user are determined, and the information of the adjusted memory resources is sent to the FPGA, so that the FPGA provides the adjusted allocated memory resources for the predetermined user.

18. A storage medium, characterized in that The storage medium includes a stored program, wherein when the program is running, the device where the storage medium is located is controlled to execute the FPGA-based resource allocation method according to any one of claims 1 to 13.

19. A computer device, characterized in that: include: memory and processor, The memory stores a computer program; The processor is configured to execute a computer program stored in the memory, and the computer program executes the FPGA-based resource allocation method according to any one of claims 1 to 13 when running.

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