Overvoltage protection circuit and method, power board and electrical equipment

Abstract

The present disclosure provides an overvoltage protection circuit and method, a power supply board and electrical equipment, and relates to the field of overvoltage protection technology. The overvoltage protection circuit includes: a first overvoltage protection circuit, connected between an intermediate node and a first voltage terminal, and configured to disconnect the intermediate node from the first voltage terminal when the voltage of a main circuit is less than a first threshold value; and connect the intermediate node to the first voltage terminal when the voltage of the main circuit is greater than the first threshold value; a second overvoltage protection circuit, connected between the intermediate node and the second voltage terminal, and configured to connect the intermediate node to the second voltage terminal when the voltage of the main circuit is less than the first threshold value; and disconnect the intermediate node from the second voltage terminal when the voltage of the main circuit is greater than the first threshold value; a control circuit, configured to control a switch device in the main circuit to turn on when the intermediate node is at a second level; and to control the switch device to turn off when the intermediate node is at a first level.

Description

Technical Field

[0001] The present disclosure relates to the technical field of overvoltage protection, and in particular to an overvoltage protection circuit and method, a power supply board and electrical equipment. Background Art

[0002] During the operation of the main circuit (also called the main power circuit) of the power board, it is inevitable that the voltage will be too high. Excessive voltage in the main circuit will damage the related components or equipment connected to the main circuit, and may also pose a certain threat to the user's life. Summary of the invention

[0003] In order to solve the above problems, the embodiments of the present disclosure provide the following technical solutions.

[0004] According to one aspect of an embodiment of the present disclosure, an overvoltage protection circuit is provided, including: a first overvoltage protection circuit, connected between an intermediate node and a first voltage terminal at a first level, configured to disconnect the intermediate node from the first voltage terminal when the voltage of a main circuit is less than a first threshold value; and to connect the intermediate node to the first voltage terminal when the voltage of the main circuit is greater than the first threshold value; a second overvoltage protection circuit, connected between the intermediate node and a second voltage terminal at a second level logically opposite to the first level, configured to connect the intermediate node to the second voltage terminal when the voltage of the main circuit is less than the first threshold value; and to disconnect the intermediate node from the second voltage terminal when the voltage of the main circuit is greater than the first threshold value; and a control circuit, connected to the intermediate node, configured to control a switch device in the main circuit to turn on when the intermediate node is at the second level; and to control the switch device to turn off when the intermediate node is at the first level.

[0005] In some embodiments, the first overvoltage protection circuit includes: a first comparator, wherein the non-inverting input terminal of the first comparator is connected to the main circuit via a first voltage-dividing resistor, and is connected to the second voltage terminal via a second voltage-dividing resistor, the inverting input terminal of the first comparator is configured to receive a first reference signal, the voltage of the first reference signal is equal to the difference between the first threshold value and the divided voltage of the first voltage-dividing resistor, the output terminal of the first comparator is connected to the third voltage terminal via a first node and a third voltage-dividing resistor in sequence; and a first switch, wherein the control terminal of the first switch is connected to the first node via a fourth voltage-dividing resistor, the first terminal of the first switch is connected to the first voltage terminal, and the second terminal of the first switch is connected to the intermediate node.

[0006] In some embodiments, the second overvoltage protection circuit includes: a second comparator, the inverting input terminal of the second comparator is connected to the main circuit via a fifth voltage-dividing resistor, and is connected to the second voltage terminal via a sixth voltage-dividing resistor, the non-inverting input terminal of the second comparator is configured to receive a second reference signal, the voltage of the second reference signal is equal to the difference between the first threshold and the divided voltage of the fifth voltage-dividing resistor, the output terminal of the second comparator is connected to the fourth voltage terminal via a second node and a seventh voltage-dividing resistor in sequence; and a second switch, the control terminal of the second switch is connected to the second node via an eighth voltage-dividing resistor, the first terminal of the second switch is connected to the second voltage terminal, and the second terminal of the second switch is connected to the intermediate node.

[0007] In some embodiments, the first voltage-dividing resistor is the same as the fifth voltage-dividing resistor, and the second voltage-dividing resistor is the same as the sixth voltage-dividing resistor.

[0008] In some embodiments, the first switch and the second switch include transistors, the control end is a base, the first end is a collector, and the second end is an emitter.

[0009] In some embodiments, the control circuit includes: a controller connected to the intermediate node and configured to continuously send a first pulse width modulated signal when the intermediate node is at the first level and the second level; and a level conversion circuit, an enable pin of which is connected to the intermediate node, configured to convert the first pulse width modulated signal into a second pulse width modulated signal when the intermediate node is at the second level, and use the second pulse width modulated signal to control the switching device to be turned on, the voltage of the second pulse width modulated signal being greater than the voltage of the first pulse width modulated signal; when the intermediate node is at the first level, stop converting the first pulse width modulated signal into the second pulse width modulated signal to control the switching device to be turned off.

[0010] In some embodiments, the controller is configured to stop sending the first pulse width modulation signal when the number of times the intermediate node is at the first level is greater than a preset number.

[0011] In some embodiments, the level conversion circuit includes: a level conversion chip, the enable pin of the level conversion chip is connected to the intermediate node, and is configured to convert the first pulse width modulation signal into a second pulse width modulation signal when the intermediate node is at the second level; stop converting the first pulse width modulation signal into the second pulse width modulation signal when the intermediate node is at the first level; and a driving circuit, configured to control the switching device to be turned on using the second pulse width modulation signal; and control the switching device to be turned off when the second pulse width modulation signal is not received.

[0012] In some embodiments, the switching device includes an N-type insulated gate bipolar transistor or an N-type metal oxide semiconductor transistor.

[0013] In some embodiments, the first level is a high level and the second level is a low level.

[0014] According to another aspect of the embodiments of the present disclosure, there is provided a power supply board, comprising: the main circuit, including the switching device; and the overvoltage protection circuit described in any one of the above embodiments.

[0015] In some embodiments, the power board includes an energy storage battery.

[0016] According to another aspect of the embodiments of the present disclosure, there is provided an electrical device, comprising: a power board as described in any one of the above embodiments.

[0017] According to another aspect of the embodiments of the present disclosure, there is provided an overvoltage protection method based on the overvoltage protection circuit described in any one of the above embodiments, comprising: when the voltage of the main circuit is less than the first threshold value, the intermediate node is connected to the second voltage end and is disconnected from the first voltage end to control the switching device to be turned on; when the voltage of the main circuit is greater than the first threshold value, the intermediate node is connected to the first voltage end and is disconnected from the second voltage end to control the switching device to be turned off.

[0018] In the overvoltage protection circuit provided in the embodiment of the present disclosure, overvoltage protection for the main circuit can be implemented in a timely manner through the first overvoltage protection circuit, the second overvoltage protection circuit and the control circuit, thereby effectively avoiding excessive voltage in the main circuit.

[0019] Other features, aspects and advantages of the present disclosure will become apparent from the following detailed description of exemplary embodiments of the present disclosure with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings constitute a part of this specification, and illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0021] The present disclosure may be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0022] Figure 1 is a schematic diagram showing the structure of an overvoltage protection circuit according to some embodiments of the present disclosure;

[0023] Figure 2 is a schematic structural diagram showing an overvoltage protection circuit according to other embodiments of the present disclosure;

[0024] Figure 3 is a schematic structural diagram showing an overvoltage protection circuit according to some other embodiments of the present disclosure;

[0025] Figure 4 is a schematic diagram showing the structure of a driving circuit according to some implementations of the present disclosure.

[0026] It should be understood that the size of each part shown in the accompanying drawings is not necessarily drawn according to the actual proportional relationship. In addition, the same or similar reference numerals represent the same or similar components. DETAILED DESCRIPTION

[0027] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. The description of the exemplary embodiments is merely illustrative and is in no way intended to limit the present disclosure and its application or use. The present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided to make the present disclosure thorough and complete and to fully express the scope of the present disclosure to those skilled in the art. It should be noted that unless otherwise specifically stated, the relative arrangement of the components and steps, the composition of the materials, the numerical expressions and the numerical values ​​set forth in these embodiments should be interpreted as being merely exemplary and not as limiting.

[0028] The words "first", "second" and similar words used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different parts. The words "include" or "comprises" and similar words mean that the elements before the word include the elements listed after the word, and do not exclude the possibility of including other elements. "Up", "down" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0029] In the present disclosure, when a specific component is described as being located between a first component and a second component, there may or may not be an intermediate component between the specific component and the first component or the second component. When a specific component is described as being connected to other components, the specific component may be directly connected to the other components without an intermediate component, or may not be directly connected to the other components but have an intermediate component.

[0030] All terms (including technical terms or scientific terms) used in the present disclosure have the same meanings as those understood by ordinary technicians in the field to which the present disclosure belongs, unless otherwise specifically defined. It should also be understood that terms defined in general dictionaries, such as general dictionaries, should be interpreted as having meanings consistent with their meanings in the context of the relevant technology, and should not be interpreted in an idealized or extremely formal sense, unless explicitly defined herein.

[0031] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.

[0032] Figure 1 is a schematic diagram of the structure of an overvoltage protection circuit according to some embodiments of the present disclosure.

[0033] like Figure 1 As shown, the overvoltage protection circuit may include a first overvoltage protection circuit 102 connected to the main circuit 101, a second overvoltage protection circuit 103 connected to the main circuit 101, and a control circuit 104. Here, the main circuit 101 may also be referred to as a main power loop, which may implement voltage conversion, such as step-up conversion or step-down conversion.

[0034] The main circuit 101 includes a switching device 111. The switching device 111 can control the voltage and current of the main circuit 101. In some embodiments, the switching device 111 can include an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET). For example, the switching device is an N-type IGBT or an N-type MOSFET.

[0035] The first overvoltage protection circuit 102 is connected between the middle node N0 and the first voltage terminal V1 at the first level. The first overvoltage protection circuit 102 is configured to disconnect the middle node N0 from the first voltage terminal V1 when the voltage of the main circuit 101 is less than the first threshold value; and connect the middle node N0 to the first voltage terminal V1 when the voltage of the main circuit 101 is greater than the first threshold value.

[0036] The second overvoltage protection circuit 103 is connected between the middle node N0 and a second voltage terminal V2 at a second level which is logically opposite to the first level. For example, the first level is a high level and the second level is a low level.

[0037] The second overvoltage protection circuit 103 is configured to connect the intermediate node N0 to the second voltage terminal V2 when the voltage of the main circuit 101 is less than the first threshold; and to disconnect the intermediate node N0 from the second voltage terminal V2 when the voltage of the main circuit 101 is greater than the first threshold.

[0038] The control circuit 104 is connected to the intermediate node N0, and is configured to control the switch device 111 to be turned on when the intermediate node N0 is at the second level; and to control the switch device 111 to be turned off when the intermediate node N0 is at the first level. In other words, when the voltage of the main circuit 101 is not over-voltage, the control circuit 104 can control the switch device 111 to be turned on to normally control the voltage and current of the main circuit 101; when the voltage of the main circuit 101 is over-voltage, the control circuit 104 can control the switch device 111 to be turned off to achieve overvoltage protection.

[0039] In the above embodiment, the overvoltage protection of the main circuit 101 can be timely implemented through the first overvoltage protection circuit 102, the second overvoltage protection circuit 103 and the control circuit 104, thereby effectively preventing the voltage of the main circuit from being too high.

[0040] Figure 2 is a schematic diagram of the structure of an overvoltage protection circuit according to some other embodiments of the present disclosure.

[0041] In some embodiments, see Figure 2 , the control circuit 104 includes a controller 114 connected to the middle node N0, and a level conversion circuit 124 whose enable pin EN is connected to the middle node N0. In other words, the signal of the middle node N0 can be used as an enable signal of the level conversion circuit 124. In addition, Figure 2 The interrupt pin INT of the control circuit 104 is shown connected to the intermediate node N0.

[0042] The controller 114 is configured to continuously send the first pulse width modulation signal PWMA to the level conversion circuit 124 when the intermediate node N0 is at the first level and the second level.

[0043] The level conversion circuit 124 is configured to convert the first pulse width modulation signal PWMA into the second pulse width modulation signal PWM_A when the intermediate node N0 is at the second level, and use the second pulse width modulation signal PWM_A to control the switch device 111 to turn on. Here, the voltage of the second pulse width modulation signal PWM_A is greater than the voltage of the first pulse width modulation signal PWMA. The level conversion circuit 124 is also configured to stop converting the first pulse width modulation signal PWMA into the second pulse width modulation signal PWM_A when the intermediate node N0 is at the first level, so as to control the switch device 111 to turn off.

[0044] In the above embodiment, the enable pin EN of the level conversion circuit 124 is connected to the intermediate node N0. The level conversion circuit 124 works when the level of the enable signal is the second level to control the switch device 111 to be turned on; and stops working when the level of the enable signal is the first level to control the switch device 111 to be turned off. In this way, there is no need to sample and judge the level of the intermediate node N0, and the switch device 111 can be turned off more quickly.

[0045] In some embodiments, see Figure 2 The level conversion circuit 124 includes a level conversion chip 1241 and a driving circuit 1242. The enable pin EN of the level conversion chip 1241 is connected to the middle node N0. The driving circuit 1242 is connected to the level conversion chip 1241.

[0046] The level conversion chip 1241 is configured to convert the first pulse width modulation signal PWMA into the second pulse width modulation signal PWM_A when the intermediate node N0 is at the second level; and stop converting the first pulse width modulation signal PWMA into the second pulse width modulation signal PWM_A when the intermediate node N0 is at the first level.

[0047] The driving circuit 1242 is configured to control the switch device 111 to turn on using the second pulse width modulation signal PWM_A; when the second pulse width modulation signal PWM_A is not received, the switch device 111 is controlled to turn off. For example, when the level conversion chip 1241 is not working, it is equivalent to outputting a low level signal to the driving circuit 1242. The driving circuit 1242 can then control the switch device 111 to turn off.

[0048] It should be noted that the specific implementation of the driving circuit 1242 is not limited, as long as it can control the switch device 111 to be turned on or off. Figure 4 Some implementations of the driving circuit 1242 are introduced.

[0049] In some embodiments, the controller 114 is configured to stop transmitting the first pulse-width modulation signal PWMA when the number of times the intermediate node N0 is at the first level is greater than a preset number. For example, the controller 114 includes a memory and a processor coupled to the memory. The processor is configured to perform an operation of counting the number of times the intermediate node N0 is at the first level based on instructions stored in the memory, and then stop transmitting the first pulse-width modulation signal PWMA when the number of times the intermediate node N0 is at the first level is greater than the preset number.

[0050] The memory may include, for example, a system memory, a fixed non-volatile storage medium, etc. The system memory may store, for example, an operating system, application programs, a boot loader, and other programs.

[0051] In this way, it is possible to avoid overly frequent turning off of the switching device 111 due to unexpected situations, thereby reducing the possibility of damage to the components connected to the main circuit 101 caused by frequent turning off of the switching device 111.

[0052] Figure 3 FIG. is a schematic structural diagram of an overvoltage protection circuit according to still some other embodiments of the present disclosure.

[0053] In some embodiments, referring to Figure 3 , the first overvoltage protection circuit 102 may include a first comparator OP1 and a first switch Q1.

[0054] The non-inverting input terminal V1+ of the first comparator OP1 is connected to the main circuit 101 via a first voltage-dividing resistor R1 and is connected to a second voltage terminal V2 via a second voltage-dividing resistor R2. The inverting input terminal V1- of the first comparator OP1 is configured to receive a first reference signal Vref1.

[0055] Here, the voltage of the first reference signal Vref1 is equal to the difference between the first threshold and the voltage division of the first voltage-dividing resistor R1. For example, the second voltage terminal V2 is grounded, the voltage of the non-inverting input terminal V1+ can be expressed as r2*Vz / (r1+r2), and the voltage of the first reference signal Vref1 can be expressed as r2*Vf / (r1+r2). Vz is the voltage of the main circuit 101, Vf is the first threshold, r1 is the resistance value of the second voltage-dividing resistor R1, and r2 is the resistance value of the second voltage-dividing resistor R2.

[0056] The output terminal of the first comparator OP1 is connected to the third voltage terminal V3 via the first node N1 and the third voltage-dividing resistor R3 in sequence. It should be understood that the voltage of the third voltage terminal V3 needs to meet the level requirements of the controller 114 and the level conversion circuit 124. For example, the voltage of the third voltage terminal V3 is less than the withstand voltage value of the controller 114 and the withstand voltage value of the level conversion circuit 124. At the same time, the voltage of the third voltage terminal V3 makes the current flowing to the controller 114 and the level conversion circuit 124 less than the withstand current value of the controller 114 and the withstand current value of the level conversion circuit 124, respectively.

[0057] In addition, the first comparator OP1 may further include two pins, respectively connected to a fifth voltage terminal V5 and a second voltage terminal V2. Here, the voltage of the fifth voltage terminal V5 is a power supply voltage to ensure normal operation of the first comparator OP1.

[0058] The control end of the first switch Q1 is connected to the first node N1 via the fourth voltage-dividing resistor R4, the first end of the first switch Q1 is connected to the first voltage end V1, and the second end of the first switch Q1 is connected to the middle node N0. For example, the first switch Q1 is a triode. Accordingly, the control end is the base, the first end is the collector, and the second end is the emitter.

[0059] In some embodiments, see Figure 3 The second overvoltage protection circuit 103 includes a second comparator OP2 and a second switch Q2.

[0060] The inverting input terminal V2- of the second comparator OP2 is connected to the main circuit 101 via the fifth voltage-dividing resistor R5, and connected to the second voltage terminal V2 via the sixth voltage-dividing resistor R6. The non-inverting input terminal V2+ of the second comparator OP2 is configured to receive the second reference signal Vref2.

[0061] Here, the voltage of the second reference signal Vref2 is equal to the difference between the first threshold and the divided voltage of the fifth voltage-dividing resistor R5. For example, the second voltage terminal V2 is grounded, the voltage of the inverting input terminal V1- can be expressed as r6*Vz / (r5+r6), and the voltage of the second reference signal Vref2 can be expressed as r6*Vf / (r5+r6). Vz is the voltage of the main circuit 101, Vf is the first threshold, r5 is the resistance value of the fifth voltage-dividing resistor R5, and r6 is the resistance value of the sixth voltage-dividing resistor R6.

[0062] The output terminal of the second comparator OP2 is connected to the fourth voltage terminal V4 via the second node N2 and the seventh voltage-dividing resistor R7. It should be understood that, similar to the third voltage terminal V3, the voltage of the fourth voltage terminal V4 needs to meet the level requirements of the controller 114 and the level conversion circuit 124.

[0063] In addition, the second comparator OP2 may further include two pins, respectively connected to the sixth voltage terminal V6 and the second voltage terminal V2. Here, the voltage of the sixth voltage terminal V6 is a power supply voltage to ensure the normal operation of the second comparator OP2.

[0064] The control end of the second switch Q2 is connected to the second node N2 via the eighth voltage-dividing resistor R8 , the first end of the second switch Q2 is connected to the second voltage end V2 , and the second end of the second switch Q2 is connected to the middle node N0 .

[0065] In some embodiments, at least one of the first overvoltage protection circuit 102 and the second overvoltage protection circuit 103 may be Figure 3 For example, the first overvoltage protection circuit 102 and the second overvoltage protection circuit 103 may both be Figure 3 By implementing the first overvoltage protection circuit 102 and the second overvoltage protection circuit 103 in a hardware manner, overvoltage protection can be implemented in a timely manner.

[0066] In some embodiments, the first voltage-dividing resistor R1 is the same as the fifth voltage-dividing resistor R5, and the second voltage-dividing resistor R2 is the same as the sixth voltage-dividing resistor R6. In this way, the response speeds of the first over-protection circuit 102 and the second over-protection circuit 103 are close, and the intermediate node N0 can be pulled to the first level or the second level more quickly, so that overvoltage protection can be achieved more timely.

[0067] The following takes the second voltage terminal V2 being grounded and the first switch Q1 and the second switch Q2 being triodes as an example to describe the working modes of the first overvoltage protection circuit 102 and the second overvoltage protection circuit 103 .

[0068] When the main circuit 101 operates normally, the voltage Vz of the main circuit is less than the first threshold Vf.

[0069] For the first comparator OP1, the voltage of the non-inverting input terminal V1+ is less than the voltage of the inverting input terminal V1-. In this case, the first comparator OP1 pulls the voltage of its output terminal down to the ground, thereby pulling the voltage of the third power supply terminal V3 down to the ground. The emitter and collector of the transistor Q1 are disconnected, and the emitter voltage is equal to zero.

[0070] For the second comparator OP2, the voltage of the in-phase input terminal V2+ is greater than the voltage of the inverting input terminal V2-. In this case, the output of the second comparator OP2 is in a high impedance state, and the voltage of the base of the transistor Q2 is pulled to the voltage of the sixth voltage terminal V6, so that the collector and emitter of the transistor Q2 are connected. Since the emitter and collector of the transistor Q1 are disconnected, the enable pin EN of the level conversion chip 1241 is pulled down to the ground. This can prevent the enable pin EN from being mistakenly pulled high due to external interference. The level conversion chip 1241 converts the PWM wave control signal PWMA of the controller 114 into the PWM_A signal that drives the switching device, thereby controlling the voltage and current of the main power circuit.

[0071] When the main circuit 101 does not work normally, the voltage Vz of the main circuit is greater than the first threshold Vf.

[0072] For the first comparator OP1, the voltage of the non-inverting input terminal V1+ is greater than the voltage of the inverting input terminal V1-. In this case, the output of the first comparator OP1 is in a high impedance state, the base voltage of the transistor Q1 is pulled to the voltage of the fifth voltage terminal V5, and the collector and emitter of the transistor Q1 are connected.

[0073] For the second comparator OP2, the voltage of the in-phase input terminal V2+ is less than the voltage of the inverting input terminal V2-. In this case, the voltage of the output terminal of the second comparator OP2 is pulled down to the ground, thereby pulling the voltage of the fourth voltage terminal V4 down to the ground. The collector and emitter of the transistor Q2 are disconnected, thereby ensuring that the enable pin EN of the level conversion chip 1241 can be effectively pulled high, and the level conversion chip 1241 can reliably stop working to control the switch device 111 to disconnect, thereby achieving the purpose of overvoltage protection.

[0074] Figure 4 is a schematic diagram showing the structure of a driving circuit according to some implementations of the present disclosure.

[0075] exist Figure 4 , the switch device 111 is schematically shown as an NMOS transistor. As some implementations, the drive circuit 1242 may include a transformer T, a ninth resistor R9, a tenth resistor R10, a first capacitor C1, and a second capacitor C2. The two ends of the input winding of the transformer T are respectively connected to the level conversion chip 1241 and one end of the first capacitor C1, and the other end of the first capacitor C1 is grounded. One end of the output winding of the transformer T is connected to the gate of the NMOS transistor via the ninth resistor, and the other end is connected to the first electrode of the NMOS transistor. The tenth resistor R10 and the second capacitor C2 are connected in parallel between the gate and the first electrode of the NMOS transistor.

[0076] The present disclosure also provides a power board, including: a main circuit 101 and an overvoltage protection circuit of any one of the above embodiments. In some embodiments, the power board can be, for example, an energy storage battery. For example, the power board can be used alone, or can be used in electrical equipment.

[0077] The embodiments of the present disclosure also provide an electrical device, comprising a power board according to any one of the embodiments above.

[0078] Based on the overvoltage protection circuit of any one of the above embodiments, an embodiment of the present disclosure further provides an overvoltage protection method.

[0079] When the voltage of the main circuit 101 is less than the first threshold, the intermediate node N0 is connected to the second voltage terminal V2 and disconnected from the first voltage terminal V1 , so as to control the switch device 111 to be turned on.

[0080] When the voltage of the main circuit 101 is greater than the first threshold, the intermediate node N0 is connected to the first voltage terminal V1 and disconnected from the second voltage terminal V2, so as to control the switch device 111 to be turned off.

[0081] So far, various embodiments of the present disclosure have been described in detail. In order to avoid obscuring the concept of the present disclosure, some details known in the art are not described. Based on the above description, those skilled in the art can fully understand how to implement the technical solution disclosed here.

[0082] Although some specific embodiments of the present disclosure have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present disclosure. It should be understood by those skilled in the art that the above embodiments may be modified or some technical features may be replaced by equivalents without departing from the scope and spirit of the present disclosure. The scope of the present disclosure is defined by the appended claims.

Claims

1. An overvoltage protection circuit, include: a first overvoltage protection circuit, connected between the intermediate node and a first voltage terminal at a first level, and configured to disconnect the intermediate node from the first voltage terminal when the voltage of the main circuit is less than a first threshold value; and connect the intermediate node to the first voltage terminal when the voltage of the main circuit is greater than the first threshold value; a second overvoltage protection circuit, connected between the intermediate node and a second voltage terminal at a second level logically opposite to the first level, and configured to connect the intermediate node to the second voltage terminal when the voltage of the main circuit is less than the first threshold; When the voltage of the main circuit is greater than the first threshold, disconnecting the intermediate node from the second voltage terminal; and Control circuit, including: a controller connected to the intermediate node and configured to continuously send a first pulse width modulation signal when the intermediate node is at the first level and the second level; A level conversion circuit, whose enable pin is connected to the intermediate node, is configured to convert the first pulse width modulation signal into a second pulse width modulation signal when the intermediate node is at the second level, and use the second pulse width modulation signal to control the switching device in the main circuit to turn on; when the intermediate node is at the first level, stop converting the first pulse width modulation signal into the second pulse width modulation signal to control the switching device to turn off.

2. The overvoltage protection circuit according to claim 1, in, The first overvoltage protection circuit comprises: a first comparator, wherein a non-inverting input terminal of the first comparator is connected to the main circuit via a first voltage-dividing resistor, and is connected to the second voltage terminal via a second voltage-dividing resistor, an inverting input terminal of the first comparator is configured to receive a first reference signal, a voltage of the first reference signal is equal to a difference between the first threshold value and a divided voltage of the first voltage-dividing resistor, and an output terminal of the first comparator is connected to a third voltage terminal via a first node and a third voltage-dividing resistor in sequence; and A first switch, wherein a control end of the first switch is connected to the first node via a fourth voltage-dividing resistor, a first end of the first switch is connected to the first voltage end, and a second end of the first switch is connected to the intermediate node.

3. The overvoltage protection circuit according to claim 2, in, The second overvoltage protection circuit comprises: a second comparator, wherein an inverting input terminal of the second comparator is connected to the main circuit via a fifth voltage-dividing resistor, and is connected to the second voltage terminal via a sixth voltage-dividing resistor, a non-inverting input terminal of the second comparator is configured to receive a second reference signal, a voltage of the second reference signal is equal to a difference between the first threshold value and the divided voltage of the fifth voltage-dividing resistor, and an output terminal of the second comparator is connected to the fourth voltage terminal via a second node and a seventh voltage-dividing resistor in sequence; and A second switch, wherein a control end of the second switch is connected to the second node via an eighth voltage-dividing resistor, a first end of the second switch is connected to the second voltage end, and a second end of the second switch is connected to the intermediate node.

4. The overvoltage protection circuit according to claim 3, in, The first voltage-dividing resistor is the same as the fifth voltage-dividing resistor, and the second voltage-dividing resistor is the same as the sixth voltage-dividing resistor.

5. The overvoltage protection circuit according to claim 3, in, The first switch and the second switch include a triode, the control end is a base, the first end is a collector, and the second end is an emitter.

6. The overvoltage protection circuit according to any one of claims 1 to 5, in, The controller is configured to stop sending the first pulse width modulation signal if the number of times the intermediate node is at the first level is greater than a preset number.

7. The overvoltage protection circuit according to any one of claims 1 to 5, in, The level conversion circuit comprises: a level conversion chip, wherein the enable pin of the level conversion chip is connected to the intermediate node and is configured to convert the first pulse width modulation signal into a second pulse width modulation signal when the intermediate node is at the second level; and stop converting the first pulse width modulation signal into the second pulse width modulation signal when the intermediate node is at the first level; and The driving circuit is configured to control the switching device to be turned on by using the second pulse width modulation signal; and to control the switching device to be turned off when the second pulse width modulation signal is not received.

8. The overvoltage protection circuit according to claim 1, in, The switch device includes an N-type insulated gate bipolar transistor or an N-type metal oxide semiconductor transistor.

9. The overvoltage protection circuit according to claim 1, in, The first level is a high level, and the second level is a low level.

10. A power board, include: The main circuit includes the switching device; and An overvoltage protection circuit as claimed in any one of claims 1 to 9.

11. The power strip according to claim 10, in, The power board includes an energy storage battery.

12. An electrical device, include: A power strip as claimed in claim 10 or 11.

13. An overvoltage protection method based on the overvoltage protection circuit according to any one of claims 1 to 9, include: When the voltage of the main circuit is less than the first threshold, the intermediate node is connected to the second voltage terminal and is disconnected from the first voltage terminal, so as to control the switch device to be turned on; When the voltage of the main circuit is greater than the first threshold, the intermediate node is connected to the first voltage terminal and disconnected from the second voltage terminal, so as to control the switch device to be turned off.

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