Multi-axis position sensing system

Abstract

Multi-axis self-positioning method and apparatus, in which de Bruijn sequences on two or more axes are convolved into a symbol array (e.g., a halftone dot array) to form a reference scale. By performing a simple, mainly linear operation on a small neighborhood, the bit-by-bit reconstruction of the axis position code can be carried out, and the position of an imaging device (e.g., a camera) relative to the reference scale can be determined from a captured camera image. By appropriately selecting differential coding, LFSR generator polynomials, mathematical operators, and deconvolution kernels, the code digits of the axis can be regenerated while canceling the influence of other axes. It is also possible to optionally provide a uniform DC balance variable, thus greatly improving position interpolation, an isometric implementation that can be decoded from an aspect ratio sample window, a robust concatenated error correction function, and an extension to n-space.

Description

Technical Field

[0001] The present invention relates to an optical position sensor that determines the position of the sensor by imaging and decrypting a portion of a coded reference scale. Background Art

[0002] The optical position sensors mainly considered here consist of two parts: a specially patterned planar reference scale and a sensor or "readhead" that moves in three degrees of freedom in the scale in the x, y, and any angle. The sensor, imager or camera, and the connected image processing unit can identify its position on the plane by decoding a small part of the code patterned on the scale. Commonly known as "self-location", the goal is high-precision (nanometer), multi-axis linear and rotational output measurements, which may require a total of 100 bits.

[0003] Self-location coding schemes have been studied by mathematicians for decades. The discovered two-dimensional, 4-orientation patterns (recognizable on the plane under any rotation) are complex to encode and decode and cannot meet other important system criteria. The mathematically beautiful de Bruijn Tori are computationally cumbersome and difficult to interpret - growing exponentially in the presence of rotation or noise, to an extent known as the "de Bruijn Torus problem". It is well known in the art to use one-dimensional sensors with linear feedback shift register (LFSR) code sequences (a subset of de Bruijn sequences), where the size of the sliding window is typically equal to the size of the LFSR polynomial, resulting in a codeword that uniquely identifies each position. However, extending simple and effective Gray codes or de Bruijn sequences beyond one dimension has proven difficult to achieve. In fact, the industry still relies on one-dimensional sensors.

[0004] Multi-axis machine tools (such as CNC milling machines) use a position sensor on each axis of motion or stage. There are various techniques for such linear or rotational (single-axis) measurements. However, due to orthogonality, Abbe errors, and mechanical play relative to other connected stages in the measurement of each axis, mitigation measures require a very robust support frame, carriage, and high-precision ways and bearings. The result is large, slow, and expensive machine tools, where moving heavy parts requires larger motors, consuming more electricity. The energy embodied in the final product and the multi-ton machine tool itself has economic and ecological impacts and is increasing with the popularity of 3D on-demand printing and distributed manufacturing.

[0005] On the other hand, 3D printers and other low-cost machinery typically use open-loop stepper motor drives, which waste a great deal of power to avoid "slipping" or undetected position deficits, resulting in a decline in the quality of the print run. Servo control with a powerful low-cost position sensor can save power, time, and money while increasing precision and speed. Like their larger machine tool counterparts, 3D printers can benefit from multi-axis sensing, not just scaled-down size, power savings, and error detection / compensation. "Multidimensional" translates to greater degrees of freedom and thus enables designs with very different kinematic constraints, cost trade-offs, and benefits. If a suitable sensing system can be developed, very economical position sensors (e.g., sensors that measure motor bearing wear or spindle runout as well as shaft angle) are doubtless achievable.

[0006] At the priority date of this application, the cost of a CMOS image sensor was less than that of a pound of steel or a limit switch; one could purchase a computer for the price of a hand drill. Commercial megapixel cameras provide a million times more information per frame than is required for the final position result. From a system perspective, any academic research on maximum efficiency coding (the lowest number of discrete symbols representing a digital position) becomes rather murky. In fact, using more camera pixels and processing more symbols is highly beneficial: more information improves interpolation accuracy in the non-integer, sub-discrete domain, and this technique is commonly used by today's one-dimensional position sensors. Most importantly, perhaps better interpolation can reduce scale costs. Large-area 2D scale manufacturing will dominate the system cost, and when using higher-resolution features, gray, or multiple colors for printing, the system cost will increase exponentially. Lithography of 100-meter pitch features in black and white over a meter span is very practical, while nano-features are not. Interpolating a 100p grid to nano-scale resolution is entirely feasible but requires processing thousands of symbols and pixels to achieve. Therefore, integer and fractional position information is essential, and practical code patterns must be designed for both, with an emphasis on interpolation. The integer part of the position measurement may be 16 bits (with a measurement range of 6 meters for 100pm-pitch grid features) and is an exact number. The resolution of the fractional part (an inexact quantity derived from a priori functions) can be 16 or more significant binary digits. Subsequently, in this document, these two constituent coordinate parts shall be referred to as the integer part and the interpolation or fractional part.

[0007] Other important coding design criteria come from previous observations. The row-column-row parallel nature of a typical image sensor array dictates that one dimension of the sampled image is processed serially, and thus position updates are typically limited to a 60Hz frame rate. To bypass this limitation for a servo positioning system with a kHz bandwidth, it is desirable to capture wide images (many columns of pixels) with as few rows as possible. In other words, to be able to decode an image with a high aspect ratio and ideally with characteristics approaching Nyquist limit sampling (fitting the code in as few rows as possible, minimizing the pixel and optical magnification per symbol).

[0008] It will be understood that the image capture process is a quasi-continuous, gray-scale or analog sampling in the presence of noise and has errors due to occlusions, debris, etc. In these cases, reliable decoding and error correction (using data redundancy) are crucial. However, error detection, signal quality assessment, and normal faulting are all important - the safety of heavy machinery is of utmost importance.

[0009] Given the significant data expansion behind precise interpolation and reliability, computational efficiency and algorithm complexity can become important cost factors in high-speed operations. Thus, another goal is to use simple, linear processes that are well-suited to modern CPUs, GPUs, and pipelined vector processing hardware, as opposed to the bit operations, decision trees, search algorithms, feature extraction, etc. often found in discrete mathematics and classical image recognition algorithms.

[0010] Summary of the problems of the prior art: It is desirable to provide a self-positioning system that can automatically, reliably, and efficiently convert a high-redundancy gigabit video stream per second into a kilobit result per second, which mainly uses linear processes, high-resolution interpolation, while leveraging an economically manufactured scale and a high aspect ratio, low magnification camera.

[0011] Description of the Invention

[0012] The present invention solves the above problems by the features of the independent claims. Its preferred advantageous embodiments are defined by the features of the dependent claims. Summary of the Invention

[0013] According to a first aspect of the present invention, there is provided a method for multi-axis position sensing, wherein the method comprises the steps of: an imaging device captures a partial image of a reference scale. The reference scale includes a grid pattern. The grid pattern includes a plurality of discrete symbols at the axis intersections of a plurality of axes in a discrete space, wherein the plurality of discrete symbols represent a combination of axis digits of position codes on each of the plurality of axes defined by a combination function (a mathematical operator applicable to intersecting symbols or groups of intersecting symbols), such that axis data can be reconstructed from a small group of the plurality of discrete symbols, wherein preferably two symbols are used to recover one axis digit, which is smaller than the order of the plurality of position codes. In addition, a processing device is configured to perform several method steps to derive the position of the imaging device relative to the reference scale. The method steps include: performing a resampling transform on the captured image to produce an array having one discrete symbol per entry; applying a kernel to the array to separate and extract axis digits; assembling the extracted axis digits into a plurality of vectors; and decoding the plurality of vectors to determine, for each axis, a value of the integer alignment of the imaging device with the reference scale.

[0014] The reference scale of the present invention can be at any x-y offset and angle and effectively serves as a metrology reference such as a 2D scale with special features that advantageously enable the reference scale to be read with very precise interpolation. Although interpolation itself can be considered a standard technique, due to the use of, for example, differential coding, multi-level halftone grids, and axis linear summation, the nature of the reference scale encoding according to the present invention is completely novel with respect to the prior art. As far as the applicant is concerned, the actual 3D scale rules are unknown in the prior art. According to the present invention, the reference scale is captured by an imaging device such as a camera to produce an input image. Preferably, camera video capture is performed due to its versatility, i.e., it is useful over a wide range from a standard "square-like" pixel array to a special wide and short (aspect ratio) view, which advantageously enables a very high frame / sampling rate. Standard techniques for image capture are known to those skilled in the art, but the present invention preferably implements certain of its forms to achieve aspect ratio sampling. According to the present invention, preferably, two-dimensional Fourier analysis is applied to the captured image to find peaks in the spectrum corresponding to the main point grid frequencies, and these peaks provide angle and phase (interpolation) information to guide affine transformation and image resampling. Such Fourier or similar techniques enable the determination of the alignment of the point grid relative to the sampling / pixel grid. Although those skilled in the art may be familiar with using spectral analysis for registration and realignment in 1D and possibly 2D position sensing environments, the reference scale of the present invention has unique properties such as halftone representation, so points (spectral data) are always present and have a uniform DC balance, and this is almost certainly the case in 2D and higher dimensional applications. According to the present invention, image resampling and alignment are preferably performed by affine transformation. Using the alignment data determined from the above analysis step, the sample picture is transformed into a per-point pixel image with translation (phase and fractional part), rotation, and scaling (affine) transformations, and spatial filtering. According to the present invention, preferably, the realigned pattern is processed with an appropriate kernel to extract the LFSR sequence vector for each dimension. The per-point pixel image is preferably convolved with the corresponding kernel to produce the LFSR bit vector for the digital part of the x and y axes. Thus, the present invention particularly provides novel scale encoding and linear processing. The vector is decoded to identify each axis, its discrete coordinates, and the rotation quadrant, and a fractional part is added to the quadrant to obtain the final result. Preferably, the vector includes the LFSR bit vector. The LFSR bit vector is decoded back to the standard counted binary form and the fractional part is incremented, and error detection / correction is applied using the redundancy of the input vector.Accordingly, the present invention reduces the search space, hardware complexity, processing latency by using mechanical constraints (such as speed), and finds the maximum likelihood result and error tolerance (the difference between the best / correct result and other results) through Hamming distance calculation and / or linear correlation, and realizes effective decoding and identification of the axis through invertible sub-maximal length codes sharing the same LFSR polynomial.

[0015] In a preferred embodiment of the first aspect of the present invention, the plurality of discrete symbols includes at least one of halftone dots in two dimensions, spheres in a high-dimensional lattice, blocks, and hyperspheres, and wherein the value of the plurality of discrete symbols is represented by area or volume.

[0016] In another preferred embodiment of the first aspect, the combination function at the axis digit intersection is modulo or linear addition.

[0017] In another preferred embodiment of the first aspect, the position code of each axis is a differentially encoded de Bruijn sequence or preferably an LFSR sequence that is self-dual under differential encoding.

[0018] In yet another preferred embodiment of the first aspect, the axis combination function is linear addition, and wherein the kernel calculation is extended to accumulate the linear sum over multiple digit decoding opportunities, so as to maintain the intermediate vector result in a linear rather than a discrete processing domain for subsequent processing.

[0019] In another preferred embodiment of the first aspect, preferably, spectral analysis of the captured image is performed by FFT or pruned FFT in the electronic and / or optical domain to extract a plurality of fractional alignment parameters of the imaging device relative to the grid pattern. The method according to this preferred embodiment further includes the steps of: using the determined alignment values to resample the captured image into an array having one discrete symbol for each entry, and extracting a plurality of angular positions and fractional positions, such that subsequent concatenation is performed based on the alignment of the decoded vector with the corresponding integer position.

[0020] In another preferred embodiment of the first aspect, the method further includes estimating an axis of a further degree of freedom between the imaging device and the reference scale according to the perspective analysis of the captured image and the calibration of the mechanical characteristics of the imaging device using enhanced spectral analysis, the mechanical characteristics including optical path length, lens focal length, or other dimensional factors.

[0021] In yet another preferred embodiment of the first aspect, the resampling uses a pixel mapping based on a frequency-domain derived transform, which only includes the values of valid pixels, and wherein the kernel of each symbol group is fully represented in the captured image without being clipped at the edges of the captured image.

[0022] In another preferred embodiment of the first aspect, static, dynamic, inter-frame, and / or intra-frame information, constraints, and heuristics are used to reduce the complexity of position vector decoding and / or increase reliability.

[0023] In another preferred embodiment of the first aspect, the imaging resolution is switched to trade off sampling speed and position accuracy (e.g., continuous servo motion and instantaneous metrology).

[0024] In yet another preferred embodiment of the first aspect, the grid pattern is configured such that when decoded by the processing device, the grid pattern can be used to compensate for systematic interpolation errors caused by deviations associated with the pattern and / or known errors detected during the decoding process.

[0025] According to a second aspect of the present invention, there is provided a position sensing system including an imaging device and a processing device. The position sensing system is configured to perform the method steps of any one or combination of the foregoing first aspect of the present invention or its preferred embodiments.

[0026] In preferred embodiments of the first and second aspects of the present invention, the imaging device includes at least one of an optical camera, an electrostatic, a microelectromechanical, an X-ray, a nuclear magnetic resonance, a magnetic sensor, or other imaging devices.

[0027] In another preferred embodiment of the first and second aspects of the present invention, the imaging device further includes a plurality of sensors, and / or the reference scale further includes a plurality of scale systems. The plurality of scale systems are configured to resolve the complete 6-axis position or motion or bending of the target object relative to the imaging device in higher dimensions.

[0028] In another preferred embodiment of the first and second aspects of the present invention, the grid pattern is configured to serve both as a reference scale and as an electric machine element, the electric machine element including a stator grid of a Sawyer motor, a worm drive, or a motion actuator system, and / or wherein the imaging device is further configured to serve as a motion actuator, which can preferably be used for fiducial marking of silicon wafers and / or microelectromechanical alignment.

[0029] According to a third aspect of the present invention, there is provided a position encoding system for multi-axis position sensing by an imaging device. The position encoding system includes a reference scale. The reference scale includes a grid pattern. The grid pattern includes a plurality of discrete symbols at the axis intersections of a plurality of axes in a discrete space, wherein the plurality of discrete symbols represent a combination of axis digits from a plurality of position codes on each of the plurality of axes defined by a combination function, such that axis data can be reconstructed from a small group of the plurality of discrete symbols, wherein preferably two symbols are used to recover one digit, the digit being less than the order of the plurality of position codes.

[0030] In a preferred embodiment of all aspects of the present invention, modulation is applied that inverts up to half of the position code values to achieve a uniform DC balance reference scale.

[0031] In another preferred embodiment of all aspects of the present invention, the plurality of discrete symbols includes an axis sequence selected for a grid pattern such that each position codeword value used is unique among the sequence codeword values of all axes and can be used to unambiguously identify an axis and a position when processed by a processing device.

[0032] In another preferred embodiment of all aspects of the present invention, the axis sequence is selected such that each position codeword value used and its bit-inverted value are unique within the sequence codeword values of all axes, thereby enabling unambiguous identification of an axis, a position, and a quadrant under any rotation or reflection.

[0033] In yet another preferred embodiment of all aspects of the present invention, the reference scale further includes redundant information that can be used to perform error detection and correction by including at least one of averaging, majority voting, correlation functions, minimum Hamming distance calculation, maximum likelihood, and concatenated error correction.

[0034] In another preferred embodiment of all aspects of the present invention, the grid pattern includes additional or redundant code axes that enable decoding of arbitrary angle, aspect ratio imaging scale patterns, where the additional or redundant code axes preferably include an equidistant arrangement of three axes in 2D or additional diagonal axes in 2D and higher dimensions.

[0035] In another preferred embodiment of all aspects of the present invention, the reference scale uses portions of the plurality of discrete symbols and / or detectable changes for additional non-positioning information, the additional non-positioning information including scale dimensions, auxiliary product information, sub-coding, passwords, or other data.

[0036] In yet another preferred embodiment of all aspects of the present invention, the reference scale is formed by shaping, printing, lithography, displaying, projecting, holographing, or other means on a plane, a plane with a polar coordinate arrangement, a curved surface such as a cylinder or a sphere, and optionally where a scale is seamlessly wrapped around one or more axes using a cyclic code.

[0037] According to a fourth aspect of the present invention, there is provided an apparatus for manufacturing a position encoding scheme according to the third aspect of the present invention or any preferred embodiment thereof. To do this, the apparatus is configured to perform the following method steps: generate a code sequence for each axis; combine the intersecting axis code digits of the code sequences to determine a combined value for each axis; generate a symbol representing the determined combined value; reproduce the symbol at a predetermined position of the symbol. The grid pattern of the reference scale is pre-computed, computed in segments, or preferably dynamically rasterized by a tangible computing device including a CPU, GPU, hardware, or other processing device.

[0038] According to a fifth aspect of the present invention, there is provided a computer-implemented storage medium comprising instructions, i.e., software or firmware stored thereon, which when executed by a computer cause the computer to perform the method steps according to the first aspect of the present invention and any preferred embodiment thereof.

[0039] According to a sixth aspect of the present invention, there is provided a computer-implemented storage medium comprising instructions, i.e., software or firmware stored thereon, which when executed by a computer cause the apparatus to manufacture a position encoding scheme according to the third aspect of the present invention or any preferred embodiment thereof. The computer causes the apparatus to perform the following method steps: generate a code sequence for each axis; combine the intersecting axis code digits of the code sequences to determine a combined value for each axis; generate a symbol representing the determined combined value; reproduce the symbol at a predetermined position of the symbol. The grid pattern of the reference scale is pre-computed, computed in segments, or preferably dynamically rasterized by a tangible computing device including a CPU, GPU, hardware, or other processing device.

[0040] The contributions of the present invention to the art include the following:

[0041] · Bitwise axis separability using simple, differential decoding kernel operations.

[0042] · Linear and symbol combinations enable major linear pipelining.

[0043] · Simple 4-direction codes using reversible multi-axis LFSR codes that share the same polynomial generator and decoding logic.

[0044] · DC balanced patterns enable very high-precision interpolation.

[0045] · Aspect ratio sensor configurations enable high-speed sensing on equidistant and rectangular grids.

[0046] · Use of static system conditions, in-sample and inter-sample constraints to reduce computational load and reduce latency.

[0047] ·Perform high-speed sequence decoding for a smaller search space constrained by mechanical dynamics using discrete or analog domain correlation.

[0048] ·Extend to higher dimensions.

[0049] The present invention, in its simplest form, uses differential coding to establish axes of two or more polarity and DC offset-insensitive sequences combined with modulo or linear addition at orthogonal intersections. The resulting lattice is represented on a scale by symbols such as halftone dots, and in the simplest embodiment, decoding is a process of discrimination and differentiation along the axis of interest, i.e., calculating the difference between adjacent symbols and the absolute value of a threshold. Exemplary embodiments of the present invention utilize LFSR sequences, which are their differential coding duals and thus naturally contain parity checks that can mitigate the error magnification of differential coding. However, it should be noted that any sequence type can be differentially coded and combined, including but not limited to natural binary with word delimiters, de Bruijn, or sigma-delta modulation, and is thus considered within the scope of the present invention. In other preferred embodiments of the present invention, these LFSR examples are enhanced for 4-orientation, enhanced interpolation, and extension to higher dimensions.

[0050] For the sake of brevity and clarity in distinguishing fractions or real numbers from basic integers, the term "analog" hereafter describes any signal that does not represent a discrete or digital field value, including those in the digital domain (e.g., digitized video). "Digital" refers to inherently integer or discrete digital field values. Additionally, the term "codeword" refers to a plurality of bits or digital word values large enough to represent a digital position on an axis. Typically, the codeword size is equal to or greater than the logarithm of the code sequence length or the LFSR polynomial order, but in a constrained context, it can be smaller. Thus, conceptually, a codeword is a small subsequence or a sliding window over a long code sequence. A "vector" is a one-dimensional array, typically having a codeword size or larger, and thus hereafter specifically refers to the raw axis data extracted for each dimension in a multi-dimensional position sensor prior to digital decoding.

[0051] According to an exemplary embodiment, an LFSR sequence is selected such that the deconvolution or reconstruction of each individual code digit or bit for each axis requires only simple mathematical operations on a small neighborhood ("kernel") of the symbol. Relying on the principle that the LFSR digits of one axis can be regenerated from the kernel data while canceling the contributions of all other convolved axes (convolution in a broader sense than the strict mathematical meaning). To combine the complete codewords representing positions, the kernel operator will span the sampled image grid. These criteria are generalizations of multi-axis 2-bit differential encoding and combination and provide any possible implementation for other number bases, higher dimensions, LFSR generator polynomials, convolution operator types, etc. Thus, this aspect of the invention is first illustrated by the following straightforward 2D plane example in the binary Galois field.

[0052] A 22 - order LFSR x - axis sequence where each bit value is derived from two other adjacent bit positions, ( representing modulo - 2 sum, XOR) is convolved with an orthogonal y - axis sequence to construct an xy grid where the value of each grid position is The kernel that reproduces one bit of the 22 - bit x - axis sequence at a distance of 22 bits by summing two adjacent bit symbols along the x - axis modulo 2 while canceling the y - values that repeat at two positions:

[0053] Because:

[0054] Thus, the shifted 22 - bit codeword is reconstructed from 23 two - valued symbols by sweeping an asymmetric 2 - symbol kernel along the x - axis rows or an XOR kernel that varies in column positions swept from the y - axis at any angle. The y - axis data is recovered in the same way as a 90° kernel rotation of the x - axis data ( Figure 2 )). Typically, there will be many 2D positions in the sample image from which each constituent bit can be decoded, and this redundancy can be used for error detection and correction, for example, using simple majority logic. Additionally, the extracted bit vector may be much longer than the LFSR order, and this extra data is used for fault tolerance (e.g., parity - group - covering differential encoding), and crucially for 4 - direction positioning. The correspondence between such cyclic codes and a large body of work in error - detection and correction codes (CRCs, BCH, etc.) is notable, and well - known techniques are applied. These techniques include using lookup tables to decode the LFSR sequence into a canonical binary representation or computing discrete logarithms with the aid of polynomials with small prime factors (as described above). Additionally, the LFSR search solution (at the positions described in the preferred embodiment) results in an unusually simple and fast error - correction decoding.

[0055] However, before performing LFSR decoding, symbols must be extracted from an arbitrarily aligned sample window. The spectrum of the halftone dot grid can be analyzed by well-known methods (such as the Fast Fourier Transform (FFT)) to produce grid spacing, angle, and x-y phase shift data. These affine transformation parameters are used to realign the sampling grid (pixel array) to the symbol grid (scale array), thereby extracting the symbol sequence. The dot symbols labeled 0 and 1 inject useful frequency information even in the presence of a large number of zero patches ( Figure 2 ). The phase information of the FFT frequency peak ( Figure 7 , orthogonal peak 702) gives an estimate of the fractional offset of the grid position, and the achievable interpolation accuracy is roughly proportional to the amount of input information (i.e., the camera resolution). However, due to symmetry, the FFT-derived angle provides angle alignment only within one quadrant. Fully resolving the quadrant (360° or 4 directions) has two further requirements: the ability to distinguish the axes (e.g., 90° rotation) and decode bit reversals (180° rotation) of the sequence. Among all possible sequence codewords, the valid sequence codewords and their bit-reversed values must be unique. The present invention provides two complementary solutions for this: sparse coding and a decoding vector longer than the LFSR order. First, both x and y can be encoded by the same polynomial and occupy small, non-overlapping regions in the full 2 n -1 digital field with the LFSR order n. Decoding the valid position sequence of length n will identify the position and the axes. Second, n + m bits can be decoded to distinguish any overlapping codes caused by bit reversals. For example, for the 22-order LFSR code described previously, if x starts from the code [1100000101100011110000] and y starts from [1011010100100110010011], and both span 65,000 positions, then m must be 12 or greater.

[0056] Summarizing the above exemplary embodiments: two 16-bit axis values can be unambiguously reconstructed from a 35-bit codeword (n + 1 + m = 22 + 1 + 12), while providing error detection. A typical megapixel image sample will present a sequence vector of many (i.e., hundreds of) symbols (much longer than the minimum codeword size), and each sequence vector is determined by a frame of many (i.e., hundreds of) decoding opportunities, thereby providing a very powerful decoding function as well as error detection / correction and a large amount of information about the signal chain integrity. Additionally, such a resolution can provide up to approximately 20 bits of useful interpolation or fractional positioning for each axis. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Figure 1A system diagram according to an embodiment of the present invention is shown. The system diagram shows a printed pattern or reference scale 100 imaged by a camera 101 with a connected image processing unit 102, where the system generates x-y-α coordinates of the camera relative to the scale.

[0058] Figure 2 A 2-axis XOR pattern construction according to an embodiment of the present invention is shown, where a binary-encoded pattern represented by binary halftone dots 200 constructed by taking the x-axis LFRS sequence 201 and the y-axis LFRS sequence 202 and summing the modulo 2 intersection bits (XOR of rows and columns) is shown. The LFSR generator polynomial 203 is selected such that one bit of the LFSR sequence can be recovered from the XOR of two adjacent bits or dot values on the same axis, thereby canceling the values of the orthogonal axes. The kernels representing this relationship are shown for x, 205 and y, 204, and a modulo 2 algorithm is applied.

[0059] Figure 3 A 2-axis linear addition pattern construction according to an embodiment of the present invention is shown, where the scale 300 is similar to the binary halftone dots 200, except that the sum of the intersection bits from each axis is a linear addition point represented by a ternary halftone. The corresponding kernels 301 and 302 use a linear algorithm.

[0060] Figure 4 A 2-axis additional alternating line pattern construction according to an embodiment of the present invention is shown, where the scale 400 is similar to 300, except that the LFSR bit pattern of each axis is negated on alternating lines to achieve zero DC offset. The x kernel 401 using linear addition cancels the alternating y values. According to an embodiment, the x kernel can be extended as in 402 to aggregate the contributions of multiple rows and average them.

[0061] Figure 5 A 3-axis XOR equidistant pattern construction according to an embodiment of the present invention is shown, where the scale 500 is similar to the binary halftone dots 200, except that three axes are provided and different LFSR polynomials 501 are selected. Similarly, the bit values from x, 502, y, 503 and the additional axis w, 504 are summed modulo 2 at each projection intersection. The three x-y-w kernels for this construction are represented as 505, 506 and 507 respectively, and four positions (instead of the previous two) are used to extract one code bit on each axis.

[0062] Figure 6 A 3-axis addition alternating line equidistant pattern construction according to an embodiment of the present invention is shown, where the scale 600 is similar to the scale 500, has 4-level halftone dots, and represents the linear addition of the bit values of each axis, and where the alternating rows are also negated, as Figure 4As shown. According to an embodiment of the present invention, the alternating scale 601 reduces the halftone dot difference to improve interpolation. The decoding kernel 602 of x occupies four positions to reproduce one bit, but can be extended 603 to aggregate values in multiple rows. 604 is an approximately minimal window from which the values of x and w can be fully decoded. According to an embodiment of the present invention, when an axis (in this case y) cannot be directly decoded, it can be inferred from the other two axes, so the example window has sufficient height at any angle.

[0063] Figure 7 Shows a block diagram of a processing algorithm according to an embodiment of the present invention, in which a scale 100 captured by a camera 101 with arbitrary xy offset and angle generates an input image (700). 2D Fourier analysis (701) finds peaks (orthogonal peaks 702) corresponding to the main point grid frequency in the spectrum, which simultaneously provide angle and phase (interpolation) information to guide affine transformation and image resampling. The re-aligned pattern (array 703) is processed using an appropriate kernel to extract the LFSR symbol sequence vectors (704) for each dimension. These vectors are then further decoded (705) to identify each axis and its discrete coordinates and rotation quadrants, where adding the fractional part gives the final result.

[0064] Figure 8 Shows an example of 1-bit-per-pixel image capture according to an embodiment of the present invention, in which an input image (800) is captured at a resolution of 256x256 with a 1-bit threshold "gray level". This is an illustration of a camera image similar to 700, with each halftone dot at an angle of 22.5° and a magnification of 2.16 pixels. Although there are obvious artifacts due to sampling close to the Nyquist limit and there is clearly a lack of any sharpness in the original image, it can still be reliably decoded through Figure 7 the signal chain.

[0065] Figure 9 Shows a non-planar variant according to an embodiment of the present invention, in which a non-maximal length LFSR repeated after an even number of positions is used to wrap the circumference 900 of a cylinder, and its code is similar to 400. The polar variant 901 illustrates the same idea, where the circumferential axis 902 generated by the polynomial x 14 +x 12 +1 repeats after the 254th position. 903 represents a 3D space patterned on multiple walls. 900 and 903 can be imaged by two or more cameras to fully resolve the 6D spatial position.

[0066] Figure 10Shows a backscale and actuator example for a silicon wafer, where the front side of the wafer 1000, on which circuit layers are formed in many process steps, is permanently registered with a backside metal scale or capacitive scale 1001. A sensor / actuator chip 1002 with a surface array of planar capacitors, where the voltage on each capacitor can be sensed or driven. 1002 detects the wafer position (1003) when placed, which is adjacent to the backside of the wafer. In this example, four chips adjust their plate charge patterns to align the scale grid to any desired position and support large wafer traversals and rotations (yaw), while also having additional possibilities for fine sensing and controlling pitch, roll, and height gaps. For clarity, the size of the scale grid and chip array is enlarged, and support structures such as air bearing beds are omitted. Detailed Description

[0067] Decoding Process

[0068] In Figure 7 a preferred embodiment of the decoding pipeline from scale 100 to position output is described and is now disclosed in the order of that process.

[0069] Scale Symbol Representation and Implementation

[0070] In the figures, the preferred halftone representation of digits depicts the area of dots proportional to the digit value. When imaged, this is converted to a gray scale distributed over several pixels and subsequently to a number closely related to the original digit value when these pixels are correctly resampled and integrated. The advantage of dots is that they remain constant during rotation and are easy to print, but it should be noted that any convenient pattern can be used, including but not limited to lines, squares, overprinted printing inks with subtractive overlay characteristics, multi-dot symbols, or full gray scale patterns, all of which fall within the scope of the present invention. The XOR combination produces a 2-value symbol array (binary halftone dots) 200, scale 500. Linear addition produces 3 values (300, 400) for 2-axis combinations and 4-value symbols (scale 600) for 3-axis combinations. For illustrative purposes, Figures 2 to 6 axis data (201, 202, 502, 503, 504, etc., which generally do not form part of the scale) is separated to show LFSR sequence generation and scale construction. The scale can be printed, projected, holographic, or rendered in other ways.

[0071] A significant advantage of the present invention is that due to the separability of axis sequence generation and the simplicity of axis symbol combinations, the construction of the scale pattern is computationally straightforward. Indeed, those skilled in the art will understand that for raster-based systems (e.g., scanning laser writers), the pattern can be generated iteratively, row by row, block by block, or symbol by symbol, using a CPU, GPU, or hardware. The real-time on-the-fly pattern generation avoids the very long processing times of intermediate file formats (e.g., Gerber, CIF) and huge rasterized image output files (which can be TBs per square meter scale). Thus, direct write lithography or photographic scale manufacturing systems utilizing these position encoding schemes can enable the manufacture of custom or one-off scales at little or no additional cost.

[0072] Isometric grids (scale 500, scale 600) using different LFSR polynomials and larger kernels (505, 506, 507) have redundant axes and are decoded by kernels covering at least 4 symbols. The aspect ratio window 604 extracts little information from the y-axis, but sufficient information from the x and w to locate positions through simple geometric calculations. Such windows can access at least 2 of the three axes regardless of angle or translation and can provide a higher decoding speed. In fact, aspect ratio decoding can be achieved with a window height that is larger than the kernel diameter by around a dozen video lines. As with most redundancy, other information can be used for error checking. When no other axis position information is required (e.g., when the sampling window is large enough), the third axis can be used to embed auxiliary side channel data. Additionally, as described in the summary of the invention, if a small portion of the full m-sequence range is used, the remaining range can be used for static information to label, for example, scale characteristics, product identification, manufacturer name. According to an embodiment of the present invention, some of this data can be encoded using cryptographic methods for security or intellectual property protection, such as binding the scale to a specific sensor. According to an embodiment of the present invention, dynamic patterns, for example from a computer screen or a mobile phone display (and using their cameras), can be inserted into data blocks that conveniently align position data to provide motion information and a relatively high bandwidth side channel. DC balanced codes appear almost pure gray and, in display scale applications, can be sub-coded into existing video with alternating polarity per frame. According to an embodiment of the present invention, the foreground video can be cancelled over two frames, leaving a representation of the scale data. Applications can include using subliminal positioning signals for pointing devices and / or data transfer, and bridging the "airgap" between computers.

[0073] According to an embodiment of the present invention, if the smallest dots are still printable and the largest do not overlap, dot size variation (modulation) can maximize the symbol difference, such as scale 600, thus assisting symbol discrimination. A low modulation depth alternating scale 601 improves interpolation accuracy and can be minimized without affecting integer position decoding. To further improve the interpolator performance of the linear addition pattern ( Figure 4 and 6 ), DC balance is achieved by inverting the alternating lines orthogonal to each axis: on scale 400, the sum of every four dots per square is the same median value. Therefore, the data-dependent spectral artifacts that cause interpolation errors can be reduced to minor edge effects. Adapted kernels (e.g., 401, 402, 602, 603 for the x-axis) are responsible for modulation. According to other embodiments of the present invention, schemes other than alternating line inversion are feasible, such as "chequerboard", modulating on larger groups, or having other weighting functions. (For double-layer XOR patterns, modulation is obviously ineffective.)

[0074] The present invention is not limited to binary, Galois fields, two-tap LFSRs, nor to maximum length sequences (m-sequences). Ternary or higher digital bases with larger symbol alphabets are feasible, and polynomial generators can be selected for any specific application. Non-maximum length sequences are useful, for example, because even cycle sequences (circumferential axis 902) allow parity DC balanced scale rings (circumference 900, polar variant 901). In fact, Figure 9 non-planar examples are shown, and one or more cameras can be used with them, for example, to measure the runout of any or each dimension on a machine tool spindle. The scale is not limited to 2D either. The dot becomes a sphere with a variable radius in 3D (a hypersphere in higher dimensions), and its construction and mathematics follow the same rules as in 2D, but using a cubic lattice instead of a square grid. (The isometric version lacks 3D twins.) The kernel now becomes a 3D convolutional body, but is otherwise processed in a similar manner. Printing such a lattice in 3D is quite easy and can be used as a reference target or marker field in tomography, MRI, X-rays, or any volumetric imaging application. The physical implementation of hyperspace is unknown, but it is easy to envision using the hierarchical time series sampling of the present invention (such as multi-dimensional video) or an n-D computer array, and applications can include data transmission and global positioning systems.

[0075] The scale grid establishes a metrological reference, and the system accuracy fundamentally depends on the scale accuracy. However, if there is little correlation with the base grid period, local defects will be averaged within the sampling window.

[0076] Image capture

[0077] The scale (not an optical device) mainly defines the accuracy of x-y-α, provided that the optical axis is at a right angle to the scale. Therefore, data is captured by an imaging device including a sensor pixel array, without cumbersome constraints on the focus point or magnification, and digitized by an analog-to-digital converter ADC for subsequent processing. Usually, motion blur is eliminated by stroboscopic illumination. An ADC with 8 bits or more resolution is typical, but the speed, complexity, and power consumption of the conversion are related to the bit depth. According to a preferred embodiment of the present invention, pixel data is averaged over many sites, so that even a 1-bit ADC processed at an extremely high speed (megahertz frame rate) may work at the expense of interpolation accuracy. Figure 8 A 1-bit sampled image is depicted.

[0078] For those skilled in the art, it will be clear that the present invention is not limited to optical systems, CMOS image sensors, nor to specific scale technologies. Other types of sensors, such as magnetic, electrostatic, micro-mechanical, etc., can be appropriately used. For example, a lithographically defined scale on the back of a semiconductor wafer can be electrostatically sensed by an integrated array of capacitive sensors close to the scale, and processed in a manner similar to the photodiode array of a commercial camera chip. However, unlike an optical system, it is not limited by diffraction, and sub-micron point spacing for the scale and sensor is a real possibility. By attaching the scale carried during the manufacturing process to the back of the wafer, this embodiment can achieve repeatable sub-nanometer mask alignment over many lithography and process steps. In wafer-to-wafer bonding (stacking or "3D manufacturing"), the scale provides an alignment guide on the accessible outer surfaces of the two wafers to be bonded, thus greatly simplifying the often required extraordinary accuracy to bring together the difficult-to-access and invisible active inner layers. Another advantage of electrostatic operation is that the sensor chip can also serve as an enhanced Sawyer motor or a multi-dimensional positioning actuator. The same flat capacitor array can be alternately used as a sensor and an actuator driver, or these two functions can be implemented by separate chips as Figure 10 shown. By selectively charging the capacitor plates of the sensor / actuator array, for example as Figure 8 shown, an electrostatic attraction or repulsion is applied to the scale grid which is itself a capacitor array. When slightly offset from the position sensed to the scale grid, a driver pattern similar to the scale tends to apply a force that will align the actuator and scale charge patterns, thus generating motion in any desired direction. It should be noted that such orthogonal translation (non-rotational motion) of the pattern can be simply achieved by moving the pattern data on the flat capacitor array. In this case, the wafer may be the only moving part, thus avoiding the complex and expensive ultra-precision workbench in a wafer stepper. In other embodiments, the interaction of magnetic or micro-mechanical scales and sensors can be used to achieve a similar effect.

[0079] With two cameras set at approximately 45° and two processing pipelines (redundant sampling rather than Figure 5 and 6 the redundant axis arrangement of Figures 2 to 4 ), the problem of imaging sufficient data in an aspect ratio window in all rotational cases is solved for the scale of ). Here, at least one camera can see two axes, and when arranged to always capture the axis tangent to the line between the cameras, the α calculation accuracy can be improved.

[0080] The goal of using an aspect ratio window is speed. Applications such as metrology that do not require a high sampling rate can use a larger and slower sensor array. A single sensor can accommodate both of these sensors and can be dynamically reconfigured (programmable windowing is a common function of camera chips) to sacrifice speed for accuracy under different operating conditions. For example, high-speed continuous servo motion and instantaneous high-resolution metrology.

[0081] Spectrum analysis, FFT

[0082] The well-known 2D FFT 701 provides an effective spectrum analysis tool and a convenient medium to illustrate this component of the present invention. The frequency (distance from the center of the peak) is related to the magnification or pixel of each point. The angles around the center line of the FFT of the four peaks correspond to α with an uncertain quadrant at this stage. The phases of the two orthogonal peaks 702 (calculated as the arctangent of the complex FFT output) produce a valuable fractional part of the expected x-y position. (Since the FFT input is real, half of the output is repeated and two peaks are redundant.) The FFT output is discrete frequency points, so a smooth and accurate result cannot be produced from a single frequency point or FFT output pixel. However, well-known methods can produce a better "sub-pixel" characterization by using calculations including adjacent points around the peak. In addition, since the encoding is essentially linear (row / column summation) and the Fourier transform is also linear, the contributions of the row and column sign values to the sample window asymmetry and interpolation bias will be separable and linear. In other words, if the integer position is successfully decoded, a pre-computed error map or empirical calibration can be used as a series of fine interpolation corrections. Importantly, in this process, each codeword bit can be considered independently.

[0083] In a preferred embodiment of the present invention, only a small portion of the frequency points (data near the peaks, orthogonal peaks 702) are utilized, and this provides an important opportunity for optimizing the computationally required decoding stage. The peaks can be determined from the first few video lines or rows, and then only two or three small regions (one column region for each horizontal peak) are calculated in the second vertical dimension where the separable 2D FFT calculation can be performed. The actual input horizontal FFT requires half the calculation of the vertical FFT, so for a square format video, 75% of the computational resources and power consumption can be saved, and the memory requirement is reduced. Early estimation and other constraints can also be applied to prune the horizontal FFT calculation and buffering, but since the resampling (the next processing stage) starts earlier, it is more important that the frame storage requirement can be reduced and the system latency can be decreased. In summary, a quick, rough but good enough estimation is made to guide the resampling, and then a more precise phase calculation is performed, making full use of all the data to obtain the best interpolation result.

[0084] The search for peaks in the FFT output can be directed and limited by static and dynamic system constraints. For example, if the magnification or α is known a priori or can be predicted (which is normal in actual kinematics), usually less calculation is required and a higher confidence result can be obtained. If α and the magnification are fixed or vary little, a complete FFT may not be needed at all, and the interpolation calculation is reduced by an order of magnitude. Note that three of the total six peaks will be used for the equidistant scale grid.

[0085] Previous processing considered the digital calculation of the Fourier transform. However, such spectral analysis is not limited to electronic implementation. Optical domain processing is known in the art and can provide simple and virtually instantaneous Fourier transform results for subsequent processing, either electronically or otherwise.

[0086] Alignment and Resampling

[0087] Resampling uses the FFT-derived affine transformation information to reduce the input frame to an array 703 of one symbol per entry by rotation and downscaling, where the symbol grid is aligned with the rows and columns of the output array. Integrating the source pixels by resampling the reserved regions is more linear than using bicubic interpolation and other resizing algorithms. This process is very suitable for the GPU and can be implemented, for example, as oversampling, antialiasing texture mapping. Lens distortion and shadow correction can also be applied in this process.

[0088] The output array of 2D resampling typically forms skewed rectangles in a larger array, and symbols that are only partially captured at its edges should be rejected. The corners of the skewed rectangles will contain fewer symbol repetitions compared to the center with a longer diagonal, which is considered when averaging or weighting the output rows or columns. Depending on the aspect ratio and angle of the input, the width and depth of the effective output samples will vary because some rows and columns do not have valid data. A mask array can be generated to define which output symbol pixels are used.

[0089] In the isometric case, resampling can include a shear component in the affine transformation to make the output array into a rhombus, for example, the w-axis is on the diagonal and the x-y is on the rows and columns.

[0090] Convolution kernel, digital discrimination

[0091] In a preferred embodiment of the present invention, in the case of symbol realignment (array 703), a kernel is applied to each axis to extract a 1D symbol vector (LFSR symbol sequence vector 704). The kernel operation is a convolution in the mathematical sense: multiplying by the kernel values and then summing at each valid site. Typically, in the realigned array, the symbol values will be represented by signed zero-centered values, i.e., the symbol values in the ternary system are nominally +1.0, 0.0, and -1.0, but will vary due to sampling artifacts and noise. Discrimination refers to converting the analog values into binary vectors (one for each axis) by thresholding the results of the kernel calculations. Since the thresholding is applied to the absolute difference (reverse difference coding: large differences represent 1 and small results are 0), this represents a non-linear operation in the signal chain. (For ternary or other digital systems, discrimination is digitized by slicing a more complex eye diagram.) In Figure 2 and Figure 5 's example, each kernel calculation produces one bit of information after discrimination and at multiple positions in the same row or column. Through error-correcting majority voting, many binary values are reduced to a single vector bit. For Figure 3 、 4 and 6's example, the same process can be used (e.g., kernel 401), however, the linear combination scale preferably uses the convolution of the row / column sites with the largest possible kernel. In other words, the discrimination and non-linearity are delayed, and digital majority voting now becomes averaging in the analog domain. In the presence of noise, this has significant advantages and can simplify the implementation logic. The kernel 402 for the x-axis illustrates this with alternating signs on y to illustrate DC balance modulation. Compared to the XOR version (4 symbols per site), the equidistant kernel 603 shows significantly fewer symbols used (2 symbols per site, plus termination points), so it has better noise immunity than its Galois field cousin (axis data 503).

[0092] Those skilled in the art will recognize that resampling, convolution, and discrimination can be combined into a single pipeline stage to simplify the calculations and avoid intermediate frame buffering.

[0093] LFSR decoding, error detection / correction, parsing quadrants

[0094] In a preferred embodiment of the present invention, the bit vector (LFSR symbol sequence vector 704) can be decoded by various known means including discrete logarithms, look-up tables, and searching reference LFSR symbol strings to produce the integer part of the position output. The parsed quadrants and x-y integer translations are added to the interpolation fraction in the spectral analysis stage for the final output. Although the encoding is simple, the decoding cost of the LFSR sequence is relatively high, and the process will be complicated by the larger vectors that may contain errors. However, static system conditions, intra-frame and inter-frame information, or constraints can reduce the algorithm complexity and / or increase the result confidence of multiple stages of the pipeline including LFSR decoding. For example, static information includes the maximum travel of a CNC machine tool, where for certain m-sequences, the x-y integer span is typically in the thousands rather than millions. Such information can reduce the search time to a practical level, typically in milliseconds.

[0095] In a preferred embodiment of the present invention, the computationally intensive and potentially slow calculation of the initial position is discovered from the entire space of possibilities. Then, after a complete and definitive calculation of the 4 directions and positions for the initial positioning, subsequent samples will be highly restricted by the system kinematics and the calculations will be simpler. Typical machine tool speeds and maximum accelerations limit the position translations between samples to a few integer shifts, for example, no more than 10 at 10 kHz sampling, 10 ms -1 and 100 μm scale spacing, and even less if acceleration is taken into account. Similarly, an instantaneous 90° rotation is unthinkable, and once the angular positioning is established, the decoding can track without parsing quadrants or vector inversion. Assuming that expanding the LFSR string around the seed is almost trivial (previous position fixed), then the position vector decoding can now be implemented as a cross-correlation function over 16 positions on this expanded string. Essentially, the Hamming distance between the input vector and the possible next positions is calculated, and the result with the minimum distance (least error) is taken. The Hamming distance of the best match and other candidates can well indicate the operating condition and noise margin of the system, and can be used to determine when the tracking fails and the unconstrained decoding should be restarted, or a hard error should be triggered and the emergency system shutdown function should be called. It will be understood that the input vector typically exceeds 100 bits, has a significant redundancy, and this method is an effective way to implement error detection and correction on long and variable length vector inputs. In addition, it can be calculated in nanoseconds by hardware.

[0096] As an example of the error correction capabilities of a 22 - order LFSR under kinematic constraints ( Figure 2 , 3 and 4), and the initial position has been identified: a 100 - bit input vector, when the travel limit is 2000 points (200 mm at a point pitch of 0.1 mm), associated with 16 potential target positions, the resulting minimum Hamming distance is 27. In the 100 - bit input, at least 13% of the error bits can be corrected, while for the unconstrained case formed by 65,000 points, it is 4%. Note that this LFSR example is far from a "perfect code", so although any error of up to 13 bits can be corrected, most inputs with even more error bits are correctable or detectable.

[0097] For the linear combination scale ( Figure 3 , 4 and 6), the output vector (LFSR symbol sequence vector) 704 can be effectively maintained in the analog domain. Here, the large kernel naturally weights each bit position and covers multiple bit positions, and the intensity of the result reflects the consistency between the aggregated samples (code repetitions). Now, the previous binary Hamming distance calculation has evolved into an analog - related function, resulting in a maximum - likelihood output form.

[0098] The parity - check characteristics of the example LFSR polynomial can also be used for error correction. Alternatively, parity checks and other clues (such as the analysis of regions with high - frequency data features lacking dot patterns) can be used to exclude suspicious results from the Hamming distance and correlation calculations. Where large - scale regions may be occluded, such as in marker - field applications, more complex image - processing algorithms can be implemented to make full use of the sample images. In summary, the present invention proposes a powerful "cascaded error - correction code" that uses repetition codes, parity checks, Hamming distance or correlation, kinematic constraints, and other clues to reliably retrieve integer positions even from signals buried in noise.

[0099] Additional coding axes

[0100] Previous processing considered systems constrained to planar motion where the scale bar served as the primary metrology reference. However, in a preferred embodiment of the present invention, up to six full degrees of freedom can be measured by an adapted single-camera system, albeit with lower precision. Using a simple lens, the point spacing in the sampled image can directly indicate the height z of the camera from the scale bar, and if this height is calibrated, z can be calculated. The z precision now depends on the point-spacing frequency interpolation precision (in parts per million) as part of the effective optical path length. z may not be the reference point spacing of 20 mm, nor the reference point spacing of 100 pm or less, and in many applications such as 3D mice and video game controllers, this is good enough. By analyzing the peak shape and deviation from the orthogonal constellation diagram, the FFT data can also be used to estimate the last two degrees of freedom (camera pitch and roll). Alternatively, the sensor array can be segmented into, for example, four windows, and these quadrants are processed separately to generate perspective information from the point-spacing frequency relationship. In this case, the perspective information must inform the resampling process to correctly extract the sequence vectors. As long as the system remains in reasonable focus, there is a large amount of information that can be used to calculate these additional axes by the above methods or other well-known methods.

Claims

1. A computer-implemented method for multi-axis position sensing, comprising the steps of: capturing a partial image of a reference scale using an imaging device, wherein the reference scale includes a plurality of symbols in a grid pattern, and each symbol represents a symbol value, and wherein the grid positions of the symbols along a plurality of axes in space are encoded using the respective symbol values of the symbols, wherein each symbol value represents a combination of code sequence digits from a differentially encoded position code sequence along each of the plurality of axes, wherein the combination of code sequence digits includes linear or modular addition of code sequence digits, wherein a plurality of code sequence digits form a codeword, the codeword being large enough to represent digital positions on each of the plurality of axes, and wherein the combination is obtained by convolving the code sequence of each axis with a corresponding kernel based on a separable mathematical kernel to thereby define each symbol value by applying a corresponding combination function to two or more code sequence digits of each axis, such that the code sequence digits are decoded from the symbol values by applying an arithmetic function in the form of a kernel to a plurality of symbol values for each axis, each application thereby producing one code sequence digit for the corresponding axis; and by a processing device: performing a resampling transformation on the captured partial image to produce an array in which each entry has a discrete symbol value; applying the kernel to the array to extract the code sequence digits of each axis; assembling the extracted code sequence digits into a plurality of vectors; and decoding the plurality of vectors to determine, for each of the plurality of axes, a value of the integer alignment of the imaging device with the reference scale.

2. The method according to claim 1, wherein, the plurality of symbols includes at least one of halftone dots, spheres, blocks in two dimensions, and hyperspheres in a high-dimensional lattice, and wherein the values of the plurality of symbols are represented by area or volume.

3. The method according to claim 1 or 2, wherein, the position code for each axis is a differentially encoded de Bruijn sequence.

4. The method according to claim 1 or 2, wherein, the combination function is linear addition, and wherein the step of applying the kernel includes extended calculations to accumulate a linear sum over a plurality of symbols, wherein the plurality of vectors remain in a linear processing domain for subsequent processing.

5. The method according to claim 1 or 2, wherein, performing a spectral analysis on the captured image to extract a plurality of fractional alignment parameters of the imaging device with respect to the grid pattern; wherein the method further comprises the steps of: resampling the captured image into the array in which each entry has one symbol using the determined alignment value; and extracting a plurality of angular positions and fractional positions for subsequent concatenation based on the alignment of the decoded vectors with their respective integer positions.

6. The method according to claim 1 or 2, further comprising: estimating a further degree-of-freedom axis between the imaging device and the reference scale based on a perspective analysis of the captured image and calibration of the mechanical characteristics of the imaging device using enhanced spectral analysis.

7. The method according to claim 1 or 2, wherein, The resampling uses a pixel mapping based on a frequency-domain derived transform, which includes only the values of valid pixels, and wherein the kernel of each symbol group is fully represented in the captured image without clipping at the edges of the captured image.

8. The method according to claim 1 or 2, wherein, the imaging resolution is switched to achieve a balance between the sampling speed and the position accuracy.

9. The method according to claim 1 or 2, wherein, the grid pattern is configured such that when decoded by the processing device, the grid pattern can be used to compensate for systematic interpolation errors introduced by deviations associated with the pattern and / or deviations caused by known errors detected during the decoding process.

10. The method according to claim 5, wherein, the captured image is spectrally analyzed by a fast Fourier transform or a pruned fast Fourier transform in the electronic and / or optical domain.

11. The method according to claim 3, wherein, the de Bruijn sequence is a linear feedback shift register sequence that is self-dual under differential coding.

12. The method according to claim 6, wherein, the mechanical characteristics include the optical path length or the lens focal length.

13. A position sensing system comprising an imaging device and a processing device, wherein, the position sensing system is configured to perform the method according to any one of claims 1 to 12.

14. The position sensing system according to claim 13, wherein, the imaging device includes at least one of an optical camera, an electrostatic sensor, a microelectromechanical sensor, an X-ray sensor, a nuclear magnetic resonance sensor, or a magnetic sensor.

15. The position sensing system according to claim 13 or 14, wherein, the imaging device further includes a plurality of sensors, and / or the reference scale further includes a plurality of scale systems, the plurality of scale systems being configured to resolve the complete 6-axis position of the imaging device or to resolve higher-dimensional attributes of a moving or bending target object relative to the imaging device.

16. The position sensing system according to claim 13 or 14, wherein, the grid pattern is configured to serve both as the reference scale and as a motor element, the motor element including a stator grid of a Sawyer motor, a inchworm drive, or a motion actuator system, and wherein the imaging device is further configured to act as a motion actuator.

17. The position sensing system according to claim 16, wherein, the motion actuator is suitable for fiducial marking of silicon wafers and / or microelectromechanical alignment.

18. A position encoding device for multi-axis position sensing by an imaging device, the position encoding device comprising: Reference scale, the reference scale including a plurality of symbols in a grid pattern, and each symbol representing a symbol value, wherein the grid positions of the symbols along a plurality of axes in space are encoded using the respective symbol values of the symbols, wherein each symbol value represents a combination of code sequence digits from a differential-encoded position code sequence along each of the plurality of axes, wherein the combination of code sequence digits includes a linear or modular addition of code sequence digits, wherein a plurality of code sequence digits form a codeword, the codeword being large enough to represent a digital position on each of the plurality of axes, and wherein the combination is obtained by convolving the code sequence of each axis with a corresponding kernel based on a separable mathematical kernel to thereby define each symbol value by applying a respective combination function to two or more code sequence digits of each axis, such that the code sequence digits are decoded from the symbol values by applying an arithmetic function in the form of a kernel to the plurality of symbol values for each axis, each application thereby yielding one code sequence digit for the respective axis.

19. The position encoding device according to claim 18, wherein, modulation is applied, the modulation inverting up to half of the position code values to achieve a uniform DC balanced reference scale.

20. The position encoding device according to claim 18 or 19, wherein, the plurality of symbols includes a sequence of axes selected for the grid pattern such that each position codeword value used is unique among the sequence codeword values of all axes and is capable of being used to unambiguously identify an axis and a position when processed by a processing device.

21. The position encoding device according to claim 20, wherein, the sequence of axes is selected such that each position codeword value used and its bit-inverted value are unique within the sequence codeword values of all axes, thereby unambiguously identifying an axis, a position, and a quadrant under any rotation or reflection.

22. The position encoding device according to claim 18 or 19, wherein, the reference scale further includes redundant information that can be used for error detection and correction by means including at least one of averaging, majority voting, correlation function, minimum Hamming distance calculation, maximum likelihood, and concatenated error correction.

23. The position encoding device according to claim 18 or 19, wherein, the grid pattern includes additional or redundant code axes capable of enabling the decoding of imaging scale patterns at arbitrary angles and aspect ratios.

24. The position encoding device according to claim 23, wherein, the additional or redundant code axes include an equidistant arrangement of three axes in two dimensions or additional diagonal axes in two or higher dimensions.

25. The position encoding device according to claim 18 or 19, wherein, the reference scale uses portions of the plurality of symbols and / or detectable changes for additional non-positioning information.

26. The position encoding device according to claim 18 or 19, wherein, The reference scale is formed by shaping, printing, lithography, display, projection, or holography on a plane with a polar coordinate arrangement or on a surface including at least one of a cylinder or a sphere, and wherein a cyclic code is used to seamlessly wrap around the scale on one or more axes.

27. The position encoding device according to claim 25, wherein, the additional non-positioning information includes scale dimensions, auxiliary product information, sub-coding, or a password.

28. A device for manufacturing the position encoding device according to any one of claims 18 to 27, wherein, the device is configured to perform the following method steps: generate a code sequence for each axis; combine the intersecting axis code digits of the code sequences to determine a combined value for each axis; generate a symbol representing the determined combined value; and reproduce the symbol at a predetermined position of the symbol, wherein the grid pattern of the reference scale is pre-computed, piecewise computed, or real-time rasterized by a tangible computing device including a CPU or a GPU.

29. A computer-implemented storage medium including instructions stored thereon, which when executed by a computer cause the computer to: perform the method according to any one of claims 1 to 12; or cause a device to manufacture the position encoding device according to any one of claims 18 to 27 by performing the following method steps: generate a code sequence for each axis; combine the intersecting axis code digits of the code sequences to determine a combined value for each axis; generate a symbol representing the determined combined value; reproduce the symbol at a predetermined position of the symbol; wherein, the grid pattern of the reference scale is pre-computed, piecewise computed, or real-time rasterized by a tangible computing device including a CPU or a GPU.

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