Light emitting display device and method of manufacturing the same

Abstract

The present disclosure provides a light emitting display device and a manufacturing method thereof. According to an aspect of the present disclosure, a light emitting display device includes a substrate defined by a plurality of sub-pixels and a first overcoat layer disposed on the substrate, a connection electrode and a sacrificial layer disposed on the first overcoat layer, and a first electrode disposed on the connection electrode, a second overcoat layer disposed on the sacrificial layer and including an opening exposing a portion of the first electrode, a dummy first electrode disposed on a top surface of the second overcoat layer and a side surface of the opening and separated from the first electrode, a bank layer covering the portion of the first electrode and the dummy first electrode, and a light emitting layer and a second electrode disposed on the first electrode and the bank layer.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2019-0128964, filed with the Korean Intellectual Property Office on October 17, 2019, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to a light-emitting display device, and more specifically, to a light-emitting display device having enhanced light extraction efficiency through an improved process and a method for manufacturing the same. Background Technology

[0004] With the development of the information age, the field of display devices for visually displaying electrical information signals has developed rapidly. Therefore, research is underway on various display devices to improve performance, such as thinner designs, lighter weights, and lower power consumption.

[0005] Among various display devices, organic light-emitting displays (OLEDs) are self-emissive and, unlike liquid crystal displays (LCDs), do not require a separate light source. Therefore, OLEDs can be manufactured in a lightweight and thin form. Furthermore, since OLEDs are driven by low voltage, they are advantageous in terms of power consumption. In addition, OLEDs possess excellent color performance, high response speed, wide viewing angle, and high contrast ratio (CR). Therefore, it is desirable to apply OLEDs to various fields.

[0006] Meanwhile, light emitted from the emissive layer of the light-emitting display device is output to the outside of the device through various components. However, some of the light emitted from the emissive layer may not be output to the outside of the device, but may be confined within it. This raises the issue of light extraction efficiency in the light-emitting display device.

[0007] For example, due to total internal reflection loss, waveguide loss, and surface plasmon resonance loss, a portion of the light emitted from the emissive layer may be confined within the light-emitting display device. Here, total internal reflection loss refers to the reduction in light extraction efficiency caused by total internal reflection at the interface between the substrate and air, confining the light within the display device. Waveguide loss refers to the reduction in light extraction efficiency caused by total internal reflection at the interface between components in the light-emitting display device, confining the light within the device. When light causes free electrons on a metal surface to vibrate, surface plasmon resonance loss occurs because the light is absorbed onto the metal surface during projection and propagation, preventing reflection or transmission, which leads to a decrease in light extraction efficiency. Summary of the Invention

[0008] An object to be achieved by the present disclosure is to provide a light emitting display apparatus and a manufacturing method thereof in which a dummy anode of a side mirror shape is used to improve total reflection loss and waveguide loss.

[0009] Another object to be achieved by the present disclosure is to provide a light emitting display apparatus and a manufacturing method thereof in which an anode has an undercut structure at an edge thereof to be separated from a dummy anode.

[0010] The object of the present disclosure is not limited to the above-described objects, and other objects not mentioned above can be clearly understood from the following description by those skilled in the art.

[0011] According to an aspect of the present disclosure, a light emitting display apparatus includes a substrate defined by a plurality of sub-pixels and a first outer coating layer disposed on the substrate. The light emitting display apparatus further includes a connection electrode and a sacrificial layer disposed on the first outer coating layer, and a first electrode disposed on the connection electrode. The light emitting display apparatus further includes a second outer coating layer disposed on the sacrificial layer and including an opening exposing a portion of the first electrode. The light emitting display apparatus further includes a dummy first electrode disposed on a top surface of the second outer coating layer and a side surface of the opening and separated from the first electrode. The light emitting display apparatus further includes a bank layer covering a portion of the first electrode and the dummy first electrode, and a light emitting layer and a second electrode disposed on the first electrode and the bank layer.

[0012] According to another aspect of the present disclosure, a method of manufacturing a light emitting display apparatus includes preparing a first outer coating layer on a substrate on which a thin film transistor has been provided. The method further includes preparing a connection electrode on the first outer coating layer, and an insulating layer on an entire surface of the substrate on which the connection electrode and the first outer coating layer have been provided. The method further includes preparing a second outer coating layer including an opening on the insulating layer. The method further includes making an undercut structure at a bottom of a side surface of the second outer coating layer by etching the insulating layer using the second outer coating layer as a mask. The method further includes preparing a first electrode on the connection electrode and inside the undercut structure, and simultaneously preparing a dummy first electrode on a top surface and a side surface of the second outer coating layer. The method further includes preparing a bank layer covering a portion of the dummy first electrode and the first electrode, and a light emitting layer and a second electrode on the first electrode and the bank layer. The first electrode can be separated from the dummy first electrode by the undercut structure.

[0013] Further details of example embodiments include those described in the DETAILED DESCRIPTION and the drawings.

[0014] According to the present disclosure, a side mirror-shaped dummy anode is used. Accordingly, light extraction efficiency of the light emitting display apparatus can be improved.

[0015] According to the present disclosure, an anode has an undercut structure at an edge thereof to be separated from a dummy anode. Accordingly, a contact resistance and a leakage problem can be suppressed.

[0016] According to the present disclosure, the anode is formed without performing a separate patterning process, which means that a photolithography process can be omitted. Accordingly, processability can be improved and manufacturing costs can be reduced.

[0017] According to the present disclosure, a process of forming a hole in a double-layered overcoat layer can be omitted. Accordingly, processability can be improved and a high-resolution design margin can be ensured.

[0018] Effects according to the present disclosure are not limited to what has been described above, and include more various effects in the specification. BRIEF DESCRIPTION OF DRAWINGS

[0019] The above and other aspects, features, and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0020] Figure 1 is a plan view of a light emitting display device according to an exemplary embodiment of the present disclosure;

[0021] Figure 2 is a schematic enlarged plan view of a region "A" of Figure 1

[0022] Figure 3 is a cross-sectional view of a light emitting display device taken along a III-III' line of Figure 2

[0023] Figure 4 is a cross-sectional view of a light emitting display device according to another exemplary embodiment of the present disclosure;

[0024] Figure 5 is a photograph showing an example of an undercut structure of an anode of the present disclosure;

[0025] Figure 6 is a cross-sectional view showing an example of an uneven structure on an outer periphery of an anode according to another exemplary embodiment of the present disclosure;

[0026] Figure 7 shows a result of light extraction simulation using an uneven structure on an outer periphery of an anode;

[0027] Figure 8A , Figure 8B , Figure 8C , Figure 8D , Figure 8E , Figure 8F , Figure 8G and Figure 8H are photographs showing positive taper formation and etch bias levels according to a thickness of a sacrificial layer;

[0028] ​​Figure 9 is a plan view of a light emitting display device according to still another exemplary embodiment of the present disclosure;

[0029] Figure 10A , Figure 10B , Figure 10C , Figure 10D , Figure 10E , Figure 10F and Figure 10G is a cross-sectional view taken along line XII-XII’ of the light emitting display device.

[0030] Figure 11 is a plan view of a light emitting display device according to still another exemplary embodiment of the present disclosure; and

[0031] Figure 12 is a cross-sectional view taken along Figure 11 line XII-XII’ of the light emitting display device. DETAILED DESCRIPTION

[0032] The advantages and features of the present disclosure and a method for achieving the advantages and features will become apparent from the exemplary embodiments described below and the accompanying drawings. However, the present disclosure is not limited to the exemplary embodiments disclosed herein and can be implemented in various forms. The exemplary embodiments are provided by way of example only, so that those skilled in the art can completely understand the disclosure and the scope of the present disclosure. Therefore, the present disclosure is limited only by the scope of the claims attached hereto.

[0033] The shapes, sizes, ratios, angles, numbers, and the like shown in the drawings for describing the exemplary embodiments of the present disclosure are merely examples and the present disclosure is not limited thereto. Throughout the specification, like drawing reference numerals generally designate like elements. Also, in the following description of the present disclosure, detailed descriptions of known related technologies can be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure. The terms such as "include," "have," and "consist of" used herein are generally intended to allow the addition of other components, unless the term is used with the term "only." Unless explicitly stated otherwise, any reference to a singular can include a plural.

[0034] Components are to be interpreted to include ordinary error ranges even if not explicitly stated.

[0035] When positional relationships between two components are described using terms such as "on," "above," "below," and "adjoining," unless the terms are used with the term "immediately" or "directly," one or more components can be located between the two components.

[0036] When an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or layer or intervening layers can also be present.

[0037] Although the terms "first", "second", etc. are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from another. Thus, the first component mentioned below can be the second component.

[0038] For convenience of description, the size and thickness of each component shown in the drawings are shown, and the present disclosure is not limited to the size and thickness of the components shown.

[0039] The features of various embodiments of the present disclosure can be partially or wholly attached to each other or combined with each other, and can be interlocked and operated in various technical ways, and the embodiments can be implemented independently or in association with each other.

[0040] Hereinafter, a light emitting display device according to an exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0041] Figure 1 is a plan view of a light emitting display device according to an exemplary embodiment of the present disclosure.

[0042] Figure 2 is a schematic enlarged plan view of a region "A" of Figure 1

[0043] Figure 3 is a cross-sectional view of the light emitting display device taken along line III-III' of Figure 2

[0044] For convenience of explanation, Figure 2 Only three sub-pixels SPX are shown. In addition, Figure 3 is a cross-sectional view of a first sub-pixel among the three sub-pixels SPX.

[0045] Referring to Figure 1 to Figure 3 The light emitting display device 100 according to an exemplary embodiment of the present disclosure can include a substrate 110 and a thin film transistor 120. In addition, the light emitting display device 100 includes a light emitting element 130, a first outer coating layer 141 and a second outer coating layer 142, a bank layer 114, a sacrificial layer 145, and an encapsulation layer 150.

[0046] The light emitting display device 100 can be implemented as a top emission type light emitting display device.

[0047] The substrate 110 can include an active area A / A and a non-active area N / A. ​​

[0048] The active area A / A is the area in the light-emitting display device 100 where an image is displayed.

[0049] In the active region A / A, display elements and various driving elements for driving the display elements can be disposed. For example, the display element can be configured as a light-emitting element 130 including a first electrode 131, a light-emitting layer 132, and a second electrode 133. In addition, various driving elements for driving the display elements, such as thin-film transistors 120, capacitors, wiring, etc., can be disposed in the active region A / A.

[0050] In the active region A / A, multiple sub-pixels SPX can be defined.

[0051] Each subpixel SPX is the smallest unit for displaying an image. Each of the multiple subpixel SPXs may include a light-emitting element 130 and driving circuitry. Furthermore, the multiple subpixel SPXs may emit light of different wavelengths. For example, the multiple subpixel SPXs may include a first subpixel SPX1 as a red subpixel, a second subpixel SPX2 as a green subpixel, and a third subpixel SPX3 as a blue subpixel, but are not limited thereto. The multiple subpixel SPXs may also include a white subpixel.

[0052] The driving circuitry for each sub-pixel SPX is configured to control the driving of the light-emitting element 130. For example, the driving circuitry may include, but is not limited to, thin-film transistor 120 and capacitors.

[0053] The non-active area N / A is an area in the light-emitting display device 100 where no image is displayed. Various components for driving the multiple sub-pixels SPX disposed in the active area A / A can be provided in the non-active area N / A. For example, a driver IC configured to provide signals for driving the multiple sub-pixels SPX, a flexible film, etc., can be provided in the non-active area N / A.

[0054] like Figure 1 As shown, the non-active region N / A can be a region surrounding the active region A / A, but is not limited to this. For example, the non-active region N / A can be a region extending from the active region A / A.

[0055] Reference Figure 3 The substrate 110 is used to support and protect various components of the light-emitting display device 100.

[0056] The substrate 110 can be formed of glass or a flexible plastic material. If the substrate 110 is formed of a plastic material, it can be formed of, for example, polyimide (PI), but is not limited thereto.

[0057] A buffer layer 111 can be disposed on the substrate 110. The buffer layer 111 serves to enhance adhesion between the substrate 110 and a layer formed on the buffer layer 111, and to block alkali metal elements discharged from the substrate 110.

[0058] The buffer layer 111 can be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer of silicon nitride (SiNx) and / or silicon oxide (SiOx), but is not limited thereto. The buffer layer 111 can be omitted depending on the kind and material of the substrate 110 and the structure and type of the thin film transistor 120.

[0059] The thin film transistor 120 can be disposed on the substrate 110.

[0060] The thin film transistor 120 can serve as a driving element of the light emitting display device 100. The thin film transistor 120 can include a gate electrode 121, an active layer 122, a source electrode 123, and a drain electrode 124. In the light emitting display device 100 according to an exemplary embodiment of the disclosure, the thin film transistor 120 is configured as a bottom-gate thin film transistor in which the active layer 122 is disposed on the gate electrode 121, the source electrode 123 and the drain electrode 124 are disposed on the active layer 122, and the gate electrode 121 is disposed at the bottommost, but is not limited thereto.

[0061] The gate electrode 121 can be disposed on the substrate 110. The gate electrode 121 can be formed of any one of various metal materials such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy of two or more of them, or a multi-layer of them, but is not limited thereto.

[0062] A gate insulating layer 112 can be disposed on the gate electrode 121. The gate insulating layer 112 is an insulating layer for electrically insulating the gate electrode 121 from the active layer 122. The gate insulating layer 112 can be formed of an insulating material. For example, the gate insulating layer 112 can be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer of silicon nitride (SiNx) and / or silicon oxide (SiOx), but is not limited thereto.

[0063] The active layer 122 can be disposed on the gate insulating layer 112.

[0064] The active layer 122 can be disposed to overlap the gate electrode 121.

[0065] For example, the active layer 122 can be formed of an oxide semiconductor, amorphous silicon (a-Si), polycrystalline silicon (poly-Si), or an organic semiconductor.

[0066] An etching stop layer 117 can be disposed on the active layer 122.

[0067] When the source electrode 123 and the drain electrode 124 are patterned by etching and formed, the etching stopper layer 117 can be formed to suppress damage to the back channel surface of the active layer 122 by plasma.

[0068] One end of the etching stopper layer 117 can overlap the source electrode 123, and the other end thereof can overlap the drain electrode 124. The etching stopper layer 117 can also be omitted.

[0069] The source electrode 123 and the drain electrode 124 can be disposed on the active layer 122 and the etching stopper layer 117. The source electrode 123 and the drain electrode 124 can be disposed separately from each other on the same layer.

[0070] The source electrode 123 and the drain electrode 124 can be electrically connected to the active layer 122 by being in contact with the active layer 122.

[0071] The source electrode 123 and the drain electrode 124 can be formed of any one of various metal materials such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy of two or more thereof, or a multilayer thereof, but are not limited thereto.

[0072] The passivation layer 113 can be disposed on the thin film transistor 120. The passivation layer 113 can function to protect the thin film transistor 120, and can be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx), or a multilayer of silicon nitride (SiNx) and / or silicon oxide (SiOx), but is not limited thereto. The passivation layer 113 can also be omitted.

[0073] The first overcoat layer 141 can be disposed on the passivation layer 113. The first overcoat layer 141 is an insulating layer for protecting the thin film transistor 120 and reducing a step difference between layers disposed on the substrate 110. The first overcoat layer 141 can be formed of any one of an acrylic-based resin, an epoxy resin, a phenol-based resin, a polyamide-based resin, a polyimide-based resin, an unsaturated polyester-based resin, a polyphenylene-based resin, benzocyclobutene, a photoresist, and a polyphenylene sulfide-based resin, but is not limited thereto.

[0074] The first overcoat layer 141 can be disposed on the thin film transistor 120. A top surface of the first overcoat layer 141 can be parallel to the substrate 110. Accordingly, the first overcoat layer 141 can flatten a step difference caused by a component disposed below the first overcoat layer 141.

[0075] The connection electrode 125 can be disposed on the first overcoat layer 141.

[0076] The connection electrode 125 can be electrically connected with the drain electrode 124 through a contact hole formed in the first outer coating layer 141 and the passivation layer 113, but is not limited thereto. The connection electrode 125 can also be electrically connected with the source electrode 123 through a contact hole formed in the first outer coating layer 141 and the passivation layer 113.

[0077] The connection electrode 125 can be formed of any one of various metal materials such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy of two or more of them, or a multilayer thereof, but is not limited thereto.

[0078] The sacrificial layer 145 can be disposed on the connection electrode 125 and the first outer coating layer 141.

[0079] The sacrificial layer 145 can be disposed on the first outer coating layer 141 to cover the edge of the connection electrode 125. That is, the sacrificial layer 145 can expose at least the surface of the connection electrode 125 in the light emitting area EA.

[0080] The sacrificial layer 145 can be formed to have a greater thickness than the first electrode 131 to form an undercut structure at the edge of the first electrode 131. For example, if the thickness of the first electrode 131 is set to be 92.3% or less of the thickness of the sacrificial layer 145, the undercut structure of the present disclosure can be formed.

[0081] The sacrificial layer 145 can be patterned to have a positive taper at its edge.

[0082] The sacrificial layer 145 can be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer of silicon nitride (SiNx) and / or silicon oxide (SiOx), but is not limited thereto. For example, the sacrificial layer 145 can be formed as a double layer of silicon nitride (SiNx) and silicon oxide (SiOx) having a thickness of 10 nm to 100 nm, but is not limited thereto. to

[0083] The first electrode 131 can be disposed on the connection electrode 125.

[0084] The first electrode 131 can be disposed on the surface of the connection electrode 125 which is not covered by the sacrificial layer 145 and whose surface is exposed. The first electrode 131 can also be disposed at the bottom of the side surface of the second outer coating layer 142 inside the undercut structure to be in contact with the side surface of the sacrificial layer 145.

[0085] The first electrode 131 can be formed by deposition without performing a mask process.

[0086] The first electrode 131 can be deposited to have an inverse taper at its edge, in contrast to the sacrificial layer 145.

[0087] The thickness of the first electrode 131 can be set to be 92.3% or less of the thickness of the sacrificial layer 145 to form an undercut structure at the edge of the first electrode 131.

[0088] The surface of the first electrode 131 can be substantially flat, but is not limited thereto. A portion of the edge of the first electrode 131 can have a non-flat structure.

[0089] Although not shown in the drawings, a reflective layer electrically connected with the thin film transistor 120 and a transparent conductive layer disposed on the reflective layer can be included in the first electrode 131. However, the present disclosure is not limited thereto. The first electrode 131 can have a three-layer structure including the transparent conductive layer, the reflective layer, and the transparent conductive layer.

[0090] The reflective layer can be disposed on the connection electrode 125. The light emitting display device 100 according to an exemplary embodiment of the present disclosure is a top emission type light emitting display device. Accordingly, the reflective layer can reflect light emitted from the light emitting element 130 in an upward direction.

[0091] The reflective layer can be formed of a metal material such as aluminum (Al), silver (Ag), copper (Cu), a magnesium silver alloy, or the like, but is not limited thereto.

[0092] The reflective layer can be electrically connected with the drain electrode 124 through the connection electrode 125, but is not limited thereto. The reflective layer can also be electrically connected with the source electrode 123 through the connection electrode 125.

[0093] The transparent conductive layer can be disposed on the reflective layer. The transparent conductive layer can be disposed on the reflective layer and electrically connected with the drain electrode through the reflective layer and the connection electrode 125. The transparent conductive layer can be formed of a conductive material having a high work function to provide holes to the light emitting layer 132.

[0094] For example, the transparent conductive layer can be formed of a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), and tin oxide (TO), but is not limited thereto.

[0095] The second outer coating layer 142 can be disposed on the first electrode 131 and the sacrificial layer 145.

[0096] The second outer coating layer 142 can be formed to expose the entire surface of the first electrode 131 except for the edge of the first electrode 131.

[0097] The side surface of the second outer coating layer 142 that exposes the first electrode 131 can have a taper of a predetermined angle. For example, the side surface of the second outer coating layer 142 can be tapered at an angle of 30° to 60°, but is not limited thereto.

[0098] The second outer coating layer 142 can include a top surface and a side surface.

[0099] The top surface of the second outer coating layer 142 is located at the uppermost portion of the second outer coating layer 142, and can be substantially parallel to the substrate 110.

[0100] The side surface of the second outer coating layer 142 can be a surface extending from the top surface of the second outer coating layer 142.

[0101] The second outer coating layer 142 can be formed of the same material as the first outer coating layer 141.

[0102] For example, the second outer coating layer 142 can be formed of any one of an acrylic-based resin, an epoxy resin, a phenol-based resin, a polyamide-based resin, a polyimide-based resin, an unsaturated polyester-based resin, a polyphenylene-based resin, benzocyclobutene, a photoresist, and a polyphenylene sulfide-based resin, but is not limited thereto.

[0103] The second outer coating layer 142 can have an undercut structure at the bottom of the side surface by additionally etching the sacrificial layer 145 from the side surface of the second outer coating layer 142 to the inside of the second outer coating layer 142.

[0104] The etching offset, which is the distance from the end of the side surface of the second outer coating layer 142 to the end of the sacrificial layer 145, varies depending on the process conditions, and can be in the range of 0.8 μm to 1.3 μm.

[0105] The dummy first electrode 131', which is formed of the same material as the first electrode 131, can be disposed on the top surface and the side surface of the second outer coating layer 142. Accordingly, like the first electrode 131, the dummy first electrode 131' can include a reflective layer and a transparent conductive layer disposed on the reflective layer, but is not limited thereto. The dummy first electrode 131' can have a three-layer structure including the transparent conductive layer, the reflective layer, and the transparent conductive layer.

[0106] The dummy first electrode 131' can be deposited on the top surface and the side surface of the second outer coating layer 142 when the first electrode 131 is deposited. Also, the dummy first electrode 131' can be separated from the first electrode 131 by the undercut structure of the second outer coating layer 142.

[0107] As such, the first electrode 131 is separated from the dummy first electrode 131' in the sub-pixel, and thus the first electrode 131 and the dummy first electrode 131' can be formed by full surface deposition without a mask.

[0108] The dummy first electrode 131' can be disposed on the top surface and the side surface of the second outer coating layer 142 along the shape of the second outer coating layer 142.

[0109] The dummy first electrode 131' disposed on the side surface of the second outer coating layer 142 can be tapered at an angle of 30° to 60°, but is not limited thereto.

[0110] The light emitting display device 100 according to an exemplary embodiment of the disclosure is a top emission type light emitting display device. Accordingly, the reflective layer of the dummy first electrode 131' can reflect light emitted from the light emitting element 130 in an upward direction. Light generated from the light emitting layer 132 of the light emitting element 130 is emitted not only in the upward direction but also in a side surface direction. The light emitted in the side surface direction can propagate to the inside of the light emitting display device 100 and can be confined in the inside of the light emitting display device 100 by total reflection. In addition, the light can be lost while traveling to the inside of the light emitting display device 100. Accordingly, the reflective layer of the dummy first electrode 131' can be disposed to cover the side surface of the second outer coating layer 142. Accordingly, the traveling direction of the light can be changed from the side surface direction to the upward direction (see arrows in FIG. 1B). Figure 3

[0111] The bank layer 114 can be disposed on the second outer coating layer 142.

[0112] The bank layer 114 can be disposed on the second outer coating layer 142 to cover a portion of edges of the dummy first electrode 131' and the first electrode 131. The bank layer 114 can fill the inside of the undercut structure at the bottom end of the side surface of the second outer coating layer 142. The bank layer 114 can be interposed between the first electrode 131 and the dummy first electrode 131'.

[0113] The bank layer 114 can cover a portion of edges of the first electrode 131 throughout the plurality of sub-pixels SPX to define the light emitting area EA and the non-light emitting area NEA. For example, in the non-light emitting area NEA, the bank layer 114 is disposed on the first electrode 131 to block generation of light from the non-light emitting area NEA. Meanwhile, in the light emitting area EA, the bank layer 114 is not disposed but the light emitting layer 132 is located just on the first electrode 131. Accordingly, light can be generated from the light emitting layer 132.

[0114] The bank layer 114 can be formed of an organic material or an inorganic material.

[0115] For example, the bank layer 114 can be formed of an organic material such as polyimide, acrylic, or benzocyclobutene, or an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0116] The light emitting layer 132 and the second electrode 133 can be disposed on the bank layer 114. The light emitting layer 132 and the second electrode 133 can form the light emitting element 130 together with the first electrode 131.

[0117] ​The light emitting layer 132 can be disposed in contact with the first electrode 131 throughout the plurality of sub-pixels SPX. For example, the light emitting layer 132 can be disposed on the first electrode 131 throughout the entire surface of the substrate 110, but is not limited thereto. The light emitting layer 132 can be disposed on the first electrode 131 only in the light emitting area EA. In this case, the light emitting layer 132 can be disposed to be surrounded by the bank 114.

[0118] The light emitting layer 132 serves to emit light of a specific color, and has a separate structure for each sub-pixel SPX. For example, the light emitting layer 132 disposed in the first sub-pixel SPX1 which is a red sub-pixel is a red light emitting layer, and the light emitting layer 132 disposed in the second sub-pixel SPX2 which is a green sub-pixel is a green light emitting layer. In addition, the light emitting layer 132 disposed in the third sub-pixel SPX3 which is a blue sub-pixel is a blue light emitting layer. The light emitting layer 132 disposed in the first sub-pixel SPX1, the light emitting layer 132 disposed in the second sub-pixel SPX2, and the light emitting layer 132 disposed in the third sub-pixel SPX3 can be disposed to be separated from each other.

[0119] The light emitting layer 132 can further include various layers, such as a hole transport layer, a hole injection layer, a hole blocking layer, an electron injection layer, an electron blocking layer, and an electron transport layer. In addition, the light emitting layer 132 can be an organic light emitting layer formed of an organic material, but is not limited thereto. For example, the light emitting layer 132 can also be formed of a quantum dot light emitting layer or a micro-LED.

[0120] The second electrode 133 can be disposed on the light emitting layer 132 in the sub-pixel SPX. For example, the second electrode 133 is disposed in contact with the light emitting layer 132 in the light emitting area EA and the non-light emitting area NEA along the shape of the light emitting layer 132, but is not limited thereto.

[0121] The second electrode 133 can supply electrons to the light emitting layer 132. The second electrode 133 can be formed of a metal material such as silver (Ag), copper (Cu), a magnesium silver alloy, or the like, but is not limited thereto. In this regard, if the second electrode 133 is formed of a metal material, it has a very low refractive index. For example, if the second electrode 133 is formed of silver (Ag), the second electrode 133 can have a refractive index of about 0.13.

[0122] The light emitting display device 100 according to an exemplary embodiment of the present disclosure is a top emission type light emitting display device. Thus, it can be manufactured to implement a microcavity. For example, in the light emitting display device 100 according to an exemplary embodiment of the present disclosure, a distance between the reflective layer of the first electrode 131 and the second electrode 133 is set to implement constructive interference of light emitted from the light emitting layer 132. Thus, light efficiency can be improved. Thus, in the light emitting display device 100 according to an exemplary embodiment of the present disclosure, the light emitting layer 132 has a different thickness for each sub-pixel SPX to implement a microcavity.

[0123] Referring to Figure 3 A packaging layer 150 can be disposed on the second electrode 133. The packaging layer 150 can block penetration of oxygen and moisture from the outside into the light emitting display device 100. For example, if the light emitting display device 100 is exposed to moisture or oxygen, pixel shrinkage can occur such that the light emitting area EA is reduced, or a black spot can occur in the light emitting area EA. Thus, the packaging layer 150 can block oxygen and moisture to protect the light emitting display device 100.

[0124] Although not shown, a first packaging layer, a second packaging layer, and a third packaging layer can be included in the packaging layer 150.

[0125] The first packaging layer can be disposed on the second electrode 133 to suppress penetration of moisture or oxygen.

[0126] Herein, the first packaging layer can be formed of an inorganic material such as silicon nitride (SiNx), silicon oxynitride (SiOxNy), or aluminum oxide (AlyOz), but is not limited thereto. The first packaging layer can be formed of a material having a higher refractive index than the second packaging layer. For example, if the first packaging layer is formed of silicon nitride (SiNx) or silicon oxynitride (SiOxNy), the refractive index of the first packaging layer can be about 1.8.

[0127] The second packaging layer can be disposed on the first packaging layer to planarize a surface of the first packaging layer. In addition, the second packaging layer can cover foreign matter or particles that can be generated in a manufacturing process. The second packaging layer can be formed of an organic material such as carbon silicon oxide (SiOxCz) or an acrylic-based resin or an epoxy-based resin, but is not limited thereto. The second packaging layer can be formed of a material having a lower refractive index than the first packaging layer. For example, if the second packaging layer is formed of an acrylic-based resin, the refractive index of the second packaging layer can be about 1.5 to about 1.6.

[0128] The third packaging layer can be disposed on the second packaging layer and can suppress penetration of moisture or oxygen, etc. into the first packaging layer.

[0129] For example, the third encapsulation layer can be formed of an inorganic material such as silicon nitride (SiNx), silicon oxynitride (SiOxNy), silicon oxide (SiOx), or aluminum oxide (AlyOz), but is not limited thereto. The third encapsulation layer can be formed of the same material as the first encapsulation layer, or can be formed of a different material from the first encapsulation layer.

[0130] For a conventional light emitting display apparatus, some of the light emitted from the light emitting layer, which is confined and lost in the light emitting display apparatus, results in a decrease in light efficiency. For example, among the light emitted from the light emitting layer, some light can not be extracted to the outside of the light emitting display apparatus due to total reflection loss or waveguide loss. Accordingly, the light extraction efficiency of the light emitting display apparatus decreases. For example, for a conventional light emitting display apparatus, the first electrode is disposed only on the overcoat layer having a flat top surface. Accordingly, among the light emitted from the light emitting layer, the second light outputted at a low output angle can be confined in the light emitting display apparatus due to total reflection loss or waveguide loss.

[0131] Accordingly, the light emitting display apparatus 100 according to an exemplary embodiment of the present disclosure uses the second overcoat layer 142 having a side surface to improve the light extraction efficiency of the light emitting element 130. For example, in the light emitting display apparatus 100 according to an exemplary embodiment of the present disclosure, the second overcoat layer 142 having a top surface and a side surface is disposed on the first overcoat layer 141. Also, the reflection layer of the dummy first electrode 131' is disposed to cover at least the side surface of the second overcoat layer 142. Accordingly, among the light emitted from the light emitting layer 132 of the light emitting display apparatus 100, the second light outputted at a low output angle can be extracted toward the top surface through the dummy first electrode 131' disposed on the side surface of the second overcoat layer 142. For example, if the first electrode is disposed on a flat overcoat layer as in a conventional light emitting display apparatus, light propagating toward the side surface, for example, light outputted at a low output angle, can not propagate toward the top surface. Also, the light can not be extracted to the outside of the light emitting display apparatus due to total reflection loss or waveguide loss. However, in the light emitting display apparatus 100 according to an exemplary embodiment of the present disclosure, the first light outputted from the light emitting layer 132 toward the top surface together with the second light outputted at a low output angle from the light emitting layer 132 can be reflected by the reflection layer of the dummy first electrode 131' disposed on the side surface of the second overcoat layer 142, and extracted toward the top surface.

[0132] Accordingly, in the light emitting display apparatus 100 according to an exemplary embodiment of the present disclosure, the reflection layer of the dummy first electrode 131' disposed on the side surface of the second overcoat layer 142 functions as a side mirror. Accordingly, light that can be lost in the light emitting display apparatus 100 can be extracted toward the top surface. Accordingly, the light extraction efficiency can be improved and power consumption can be reduced.

[0133] In the light emitting display device 100 according to the exemplary embodiment of the present disclosure, the first electrode 131 is separated from the dummy first electrode 131' provided on the side surface of the second outer coating layer 142. Accordingly, the contact resistance and the leakage problem can be suppressed.

[0134] Meanwhile, an OLED side mirror (OSM) structure in which a mirror-like anode is additionally formed on the side surface of the light emitting layer can be implemented by laminating two outer coating layers or adding a connection electrode between the anode and the drain electrode.

[0135] In this case, if two outer coating layers are laminated, when the anode and the drain electrode are in contact, light emission can not occur due to a residual film of the outer coating layer in the contact hole area.

[0136] Accordingly, the connection electrode can be inserted between the anode and the drain electrode, and each of the first and second outer coating layers can be used for a mask process to reduce generation of a residual film of the outer coating layer. However, in this case, if a margin between the bank layer and the second outer coating layer is small, a leakage current can be generated from the reflection layer of the anode. Otherwise, foreign matter can cause a short circuit between the light emitting layer and the anode and the cathode.

[0137] Accordingly, in the present disclosure, the first electrode 131 is separated from the dummy first electrode 131' provided on the side surface of the second outer coating layer 142 to improve a short circuit failure and increase a contact resistance. In addition, in the present disclosure, the first electrode 131 and the dummy first electrode 131' are formed by deposition without using a mask, and the sacrificial layer 145 is patterned without performing an additional mask process. Accordingly, the processability can be improved and the manufacturing cost can be reduced.

[0138] That is, the present disclosure is characterized by a reflection layer of the dummy first electrode 131' formed on the side surface of the second outer coating layer 142.

[0139] Also, the present disclosure is characterized by an undercut structure formed at a bottom end of the side surface of the second outer coating layer 142. Accordingly, the dummy first electrode 131' and the first electrode 131 are formed separately by the same process.

[0140] Further, the present disclosure is characterized in that the first electrode 131 is electrically connected to the drain electrode 124 through the connection electrode 125 below the first electrode 131.

[0141] Further, the present disclosure is characterized in that the dummy first electrode 131' is provided on the side surface of the second outer coating layer 142 and is tapered at an angle of 30° to 60°.

[0142] In addition, in the present disclosure, the distance between the bank layer 114 and the dummy first electrode 131' can be controlled within a range in which the first electrode 131 does not cover all of the exposed openings.

[0143] Further, in the present disclosure, the sacrificial layer 145 has a greater thickness than the first electrode 131 to form an undercut structure at the edge of the first electrode 131.

[0144] Further, in the present disclosure, the connection electrode 125 is formed to have a size greater than that of the first electrode 131 to improve contact resistance.

[0145] Meanwhile, in the light emitting display device according to the exemplary embodiment of the present disclosure, the entire surface of the first electrode is substantially flat, but is not limited thereto. In the present disclosure, a portion of the edge of the first electrode can have a non-flat structure. This will be described in detail with reference to another exemplary embodiment of the present disclosure.

[0146] Figure 4 is a cross-sectional view of a light emitting display device according to another exemplary embodiment of the present disclosure.

[0147] Figure 5 is a photograph showing an example of an undercut structure of an anode of the present disclosure.

[0148] Figure 6 is a cross-sectional view showing an example of a non-flat structure on the outer periphery of an anode according to another exemplary embodiment of the present disclosure.

[0149] Figure 7 shows the results of light extraction simulation using the non-flat structure on the outer periphery of the anode.

[0150] Figure 8A to Figure 8H is a photograph showing the formation of a positive taper according to the thickness of the sacrificial layer and the etch bias level.

[0151] In addition to forming the non-flat structure 231" at the edge of the first electrode 231, Figure 4 The light emitting display device 200 shown is substantially the same as Figure 2 and Figure 3 The light emitting display device 100 shown is substantially the same as

[0152] Referring to Figure 4 The light emitting display device 200 according to another exemplary embodiment of the present disclosure can include a substrate 110, a thin film transistor 120, a light emitting element 230, a first outer coating layer 141 and a second outer coating layer 142, a bank layer 114, a sacrificial layer 145, and an encapsulation layer 150.

[0153] The light emitting display apparatus 200 can be implemented as a top emission type light emitting display apparatus.

[0154] The substrate 110 serves to support and protect various components of the light emitting display apparatus 200.

[0155] A buffer layer 111 can be disposed on the substrate 110. The buffer layer 111 serves to enhance adhesion between the substrate 110 and a layer formed on the buffer layer 111, and to block an alkali metal element discharged from the substrate 110.

[0156] A thin film transistor 120 can be disposed on the substrate 110.

[0157] The thin film transistor 120 can serve as a driving element of the light emitting display apparatus 200. The thin film transistor 120 can include a gate electrode 121, an active layer 122, a source electrode 123, and a drain electrode 124. In the light emitting display apparatus 200 according to another exemplary embodiment of the disclosure, the thin film transistor 120 is configured as a bottom gate thin film transistor in which the active layer 122 is disposed on the gate electrode 121, the source electrode 123 and the drain electrode 124 are disposed on the active layer 122, and the gate electrode 121 is disposed at the bottommost portion, but is not limited thereto.

[0158] The gate electrode 121 can be disposed on the substrate 110.

[0159] A gate insulating layer 112 can be disposed on the gate electrode 121. The gate insulating layer 112 is an insulating layer for electrically insulating the gate electrode 121 from the active layer 122. The gate insulating layer 112 can be formed of an insulating material.

[0160] The active layer 122 can be disposed on the gate insulating layer 112.

[0161] The active layer 122 can be disposed to overlap the gate electrode 121.

[0162] An etching stop layer 117 can be disposed on the active layer 122.

[0163] The etching stop layer 117 can be formed to suppress damage to a back channel surface of the active layer 122 by plasma when the source electrode 123 and the drain electrode 124 are patterned and formed by etching.

[0164] One end of the etching stop layer 117 can overlap the source electrode 123, and the other end thereof can overlap the drain electrode 124. The etching stop layer 117 can also be omitted.

[0165] The source electrode 123 and the drain electrode 124 can be disposed on the active layer 122 and the etching stop layer 117. The source electrode 123 and the drain electrode 124 can be disposed separately from each other on the same layer.

[0166] The source electrode 123 and the drain electrode 124 can be electrically connected with the active layer 122 by being in contact with the active layer 122.

[0167] The passivation layer 113 can be provided on the thin film transistor 120. The passivation layer 113 can serve to protect the thin film transistor 120, and can also be omitted.

[0168] The first outer coating layer 141 can be provided on the passivation layer 113. The first outer coating layer 141 is an insulating layer for protecting the thin film transistor 120 and reducing a step difference between layers provided on the substrate 110.

[0169] The first outer coating layer 141 can be provided on the thin film transistor 120. A top surface of the first outer coating layer 141 can be parallel with the substrate 110. Accordingly, the first outer coating layer 141 can flatten a step difference caused by components provided under the first outer coating layer 141.

[0170] The connection electrode 125 can be provided on the first outer coating layer 141.

[0171] The connection electrode 125 can be electrically connected with the drain electrode 124 through a contact hole formed in the first outer coating layer 141 and the passivation layer 113, but is not limited thereto. The connection electrode 125 can also be electrically connected with the source electrode 123 through a contact hole formed in the first outer coating layer 141 and the passivation layer 113.

[0172] The sacrificial layer 145 can be provided on the connection electrode 125 and the first outer coating layer 141.

[0173] The sacrificial layer 145 can be provided on the first outer coating layer 141 to cover an edge of the connection electrode 125. That is, the sacrificial layer 145 can expose at least a surface of the connection electrode 125 in the emission area EA.

[0174] The sacrificial layer 145 can be formed to have a greater thickness than the first electrode 231 to form an undercut structure at an edge of the first electrode 231. For example, if the thickness of the first electrode 231 is set to be 92.3% or less of the thickness of the sacrificial layer 145, the undercut structure of the present disclosure can be formed.

[0175] The sacrificial layer 145 can be patterned to have a positive taper at an edge thereof.

[0176] The sacrificial layer 145 can be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a plurality of layers of silicon nitride (SiNx) and / or silicon oxide (SiOx), but is not limited thereto. For example, the sacrificial layer 145 can be formed as a double layer of silicon nitride (SiNx) and silicon oxide (SiOx) having a thickness of 10 nm to 100 nm, but is not limited thereto. to

[0177] The first electrode 231 can be disposed on the connection electrode 125.

[0178] The first electrode 231 can be disposed on a surface of the connection electrode 125 which is not covered by the sacrificial layer 145 and whose surface is exposed. The first electrode 231 can also be disposed at a bottom of a side surface of the second outer coating layer 142 inside the undercut structure to be in contact with a side surface of the sacrificial layer 145.

[0179] The first electrode 231 can be formed by deposition without performing a mask process.

[0180] The first electrode 231 can be deposited to have an inverse taper at an edge thereof, in contrast to the sacrificial layer 145.

[0181] A thickness of the first electrode 231 can be set to be 92.3% or less of a thickness of the sacrificial layer 145 to form an undercut structure at an edge of the first electrode 231.

[0182] A portion of a surface of the first electrode 231 can be substantially flat, but a portion of an edge of the first electrode 231 can have an uneven structure 231" (refer to Figure 6 ).

[0183] Referring to Figure 7 , in the simulation results, a dotted line indicates a flat structure and a solid line indicates the uneven structure 231".

[0184] In the flat structure, light is confined in a waveguide and an SP mode, so it is difficult to extract to the outside, which can result in a decrease in external light extraction efficiency. However, by applying the uneven structure 231", light confined inside can be extracted toward a top surface, thereby improving light extraction efficiency.

[0185] That is, if a portion of an edge of the first electrode 231 is uneven and has the uneven structure 231", a waveguide and an SP mode can be extracted. Accordingly, it can be helpful to improve efficiency of the top surface.

[0186] Referring to Figure 4 , the first electrode 231 can include a reflective layer electrically connected to the thin film transistor 120 and a transparent conductive layer disposed on the reflective layer, but is not limited thereto. The first electrode 231 can have a three-layer structure including the transparent conductive layer, the reflective layer, and the transparent conductive layer.

[0187] The reflective layer can be disposed on the connection electrode 125. The light emitting display device 200 according to another exemplary embodiment of the disclosure is a top emission type light emitting display device. Accordingly, the reflective layer can reflect light emitted from the light emitting element 230 in an upward direction.

[0188] The reflection layer can be electrically connected with the drain electrode 124 through the connection electrode 125, but is not limited thereto. The reflection layer can also be electrically connected with the source electrode 123 through the connection electrode 125.

[0189] The transparent conductive layer can be disposed on the reflection layer. The transparent conductive layer can be disposed on the reflection layer and electrically connected with the drain electrode through the reflection layer and the connection electrode 125. The transparent conductive layer can be formed of a conductive material having a high work function to provide holes to the light emitting layer 232.

[0190] The second outer coating layer 142 can be disposed on the first electrode 231 and the sacrificial layer 145.

[0191] The second outer coating layer 142 can be formed to expose the entire surface of the first electrode 231 except for the edge of the first electrode 231, i.e., the uneven structure 231".

[0192] The side surface of the second outer coating layer 142, which exposes the first electrode 231, can have a taper of a predetermined angle. For example, the side surface of the second outer coating layer 142 can be tapered at an angle of 30° to 60°, but is not limited thereto.

[0193] The second outer coating layer 142 can include a top surface and a side surface.

[0194] The top surface of the second outer coating layer 142 is located at the uppermost portion of the second outer coating layer 142 and can be substantially parallel to the substrate 110.

[0195] The side surface of the second outer coating layer 142 can be a surface extending from the top surface of the second outer coating layer 142.

[0196] The second outer coating layer 142 can be formed of the same material as the first outer coating layer 141.

[0197] The second outer coating layer 142 can have an undercut structure at the bottom of the side surface by additionally etching the sacrificial layer 145 from the side surface of the second outer coating layer 142 to the inside of the second outer coating layer 142.

[0198] The etching bias, which is the distance from the end of the side surface of the second outer coating layer 142 to the end of the sacrificial layer 145, varies depending on the process conditions and can be in the range of 0.8 μm to 1.3 μm.

[0199] In the present disclosure, the sacrificial layer 145 is formed as a bilayer of silicon nitride (SiNx) and silicon oxide (SiOx) having various thicknesses to evaluate the undercut structure.

[0200] For example, the sacrificial layer 145 is formed as a bilayer of silicon nitride (SiNx) and silicon oxide (SiOx) having respective thicknesses of and and and and and A bilayer of silicon nitride (SiNx) and silicon oxide (SiOx).

[0201] In addition, each of the first electrode 331 and the dummy first electrode 331' is deposited with a thickness of respectively. and It consists of three layers: ITO, a reflective layer, and ITO.

[0202] In this case, it can be seen that the thickness ratio of each of the first electrode 331 and the dummy first electrode 331' to the sacrificial layer 145 is 92.3%, 80.0%, 52.2%, and 48.0%, respectively.

[0203] Reference Figure 8A to Figure 8H It can be seen that when the thickness ratio of each of the first electrode 331 and the dummy first electrode 331' to the sacrificial layer 145 is 92.3% or less, a positive taper is formed by etching the sacrificial layer 145. Furthermore, the first electrode 331 and the dummy first electrode 331' can be separated from each other. Additionally, it can be seen that the etching bias, which is the distance from the end of the side surface of the second outer coating 142 to the end of the sacrificial layer 145, varies depending on the process conditions and is in the range of 0.8 μm to 1.3 μm.

[0204] Figure 8A An example with an etching bias of 0.8 μm is shown. Figure 8B An example with an etching bias of 1.2 μm is shown. Figure 8C An example with an etching bias of 0.75 μm is shown. Figure 8D An example with an etching bias of 1.1 μm is shown.

[0205] in addition, Figure 8E An example with an etching bias of 0.9 μm is shown. Figure 8F An example with an etching bias of 1.3 μm is shown. Figure 8G An example with an etching bias of 0.9 μm is shown, and Figure 8H An example with an etching bias of 1.3 μm is shown.

[0206] Refer again Figure 4 A dummy first electrode 231' formed of the same material as the first electrode 231 can be disposed on the top and side surfaces of the second outer coating 142. Therefore, similar to the first electrode 231, the dummy first electrode 231' can include a reflective layer and a transparent conductive layer disposed on the reflective layer, but is not limited thereto. The dummy first electrode 231' can have a three-layer structure including a transparent conductive layer, a reflective layer, and a transparent conductive layer.

[0207] When the first electrode 231 is deposited, the dummy first electrode 231' can be deposited on the top surface and the side surface of the second outer coating layer 142. Also, the dummy first electrode 231' can be separated from the first electrode 231 by the undercut structure of the second outer coating layer 142.

[0208] As such, the first electrode 231 is separated from the dummy first electrode 231' in the sub-pixel, and thus, the first electrode 231 and the dummy first electrode 231' can be formed by full surface deposition without a mask.

[0209] The dummy first electrode 231' can be disposed on the top surface and the side surface of the second outer coating layer 142 along the shape of the second outer coating layer 142.

[0210] The dummy first electrode 231' disposed on the side surface of the second outer coating layer 142 can be tapered at an angle of 30° to 60°, but is not limited thereto.

[0211] The light emitting display device 200 according to another exemplary embodiment of the disclosure is a top emission type light emitting display device. Thus, the reflective layer of the dummy first electrode 231' can reflect light emitted from the light emitting element 230 in an upward direction. Light generated from the light emitting layer 232 of the light emitting element 230 is emitted not only in the upward direction but also in a side surface direction. Light emitted in the side surface direction can travel to the inside of the light emitting display device 200 and can be confined in the inside of the light emitting display device 200 by total reflection. In addition, the light can be lost while traveling to the inside of the light emitting display device 200. Thus, the reflective layer of the dummy first electrode 231' can be disposed to cover the side surface of the second outer coating layer 142. Thus, the traveling direction of the light can be changed from the side surface direction to the upward direction (see arrows in FIG. 10). Figure 4

[0212] The bank layer 114 can be disposed on the second outer coating layer 142.

[0213] The bank layer 114 can be disposed on the second outer coating layer 142 to cover a portion of the edges of the entire dummy first electrode 231' and the first electrode 231. The bank layer 114 can fill the inside of the undercut structure at the bottom end of the side surface of the second outer coating layer 142. Thus, the bank layer 114 can be interposed between the first electrode 231 and the dummy first electrode 231'.

[0214] ​The bank layer 114 can cover a portion of the edge of the first electrode 231 throughout the plurality of sub-pixels SPX to define the light emitting area EA and the non-light emitting area NEA. For example, in the non-light emitting area NEA, the bank layer 114 is disposed on the first electrode 231 to block generation of light from the non-light emitting area NEA. Meanwhile, in the light emitting area EA, the bank layer 114 is not disposed, but the light emitting layer 232 is located just on the first electrode 231. Thus, light can be generated from the light emitting layer 232.

[0215] The light emitting layer 232 and the second electrode 233 can be disposed on the bank layer 114. The light emitting layer 232 and the second electrode 233 can form the light emitting element 230 together with the first electrode 231.

[0216] The light emitting layer 232 can be disposed in contact with the first electrode 231 throughout the plurality of sub-pixels SPX. For example, the light emitting layer 232 can be disposed on the first electrode 231 throughout the entire surface of the substrate 110, but is not limited thereto. The light emitting layer 232 can be disposed on the first electrode 231 only in the light emitting area EA. In this case, the light emitting layer 232 can be disposed to be surrounded by the bank layer 114.

[0217] The second electrode 233 can be disposed on the light emitting layer 232 in the sub-pixel SPX. For example, the second electrode 233 is disposed in contact with the light emitting layer 232 in the light emitting area EA and the non-light emitting area NEA along the shape of the light emitting layer 232, but is not limited thereto.

[0218] The light emitting display device 200 according to another exemplary embodiment of the disclosure is a top emission type light emitting display device. Thus, it can be manufactured to implement a microcavity. For example, in the light emitting display device 200 according to another exemplary embodiment of the disclosure, a distance between the reflective layer of the first electrode 231 and the second electrode 233 is disposed to implement constructive interference of light emitted from the light emitting layer 232. Thus, light efficiency can be improved. Thus, in the light emitting display device 200 according to another exemplary embodiment of the disclosure, the light emitting layer 232 has a different thickness for each sub-pixel SPX to implement a microcavity.

[0219] Referring to Figure 4 The encapsulation layer 150 can be disposed on the second electrode 233. The encapsulation layer 150 can prevent oxygen and moisture from penetrating into the light emitting display device 200 from the outside.

[0220] Although not shown in the drawings, a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer can be included in the encapsulation layer 150.

[0221] The light-emitting display device 200 according to another exemplary embodiment of the present disclosure uses the second overcoat layer 142 having a side surface to improve the light extraction efficiency of the light-emitting element 230. For example, in the light-emitting display device 200 according to another exemplary embodiment of the present disclosure, the second overcoat layer 142 having a top surface and a side surface is disposed on the first overcoat layer 141. Also, the reflective layer of the dummy first electrode 231' is disposed to cover at least the side surface of the second overcoat layer 142. Accordingly, among the light emitted from the light-emitting layer 232 of the light-emitting display device 200, the second light outputted at a low output angle can be extracted toward the front surface by the reflective layer of the dummy first electrode 231' disposed on the side surface of the second overcoat layer 142. That is, in the light-emitting display device 200 according to another exemplary embodiment of the present disclosure, the first light outputted from the light-emitting layer 232 toward the front surface together with the second light outputted from the light-emitting layer 232 at a low output angle can be reflected by the reflective layer of the dummy first electrode 231' disposed on the side surface of the second overcoat layer 142 and extracted toward the front surface.

[0222] Accordingly, in the light-emitting display device 200 according to another exemplary embodiment of the present disclosure, the reflective layer of the dummy first electrode 231' disposed on the side surface of the second overcoat layer 142 functions as a side mirror. Accordingly, the light that can be lost in the light-emitting display device 200 can be extracted toward the front surface. Accordingly, the light extraction efficiency can be improved and the power consumption can be reduced.

[0223] In the light-emitting display device 200 according to another exemplary embodiment of the present disclosure, the first electrode 231 is separated from the dummy first electrode 231' disposed on the side surface of the second overcoat layer 142. Accordingly, the contact resistance and the leakage problem can be suppressed.

[0224] That is, in the present disclosure, the first electrode 231 is separated from the dummy first electrode 231' disposed on the side surface of the second overcoat layer 142 to improve the short circuit failure and to improve the contact resistance. Also, in the present disclosure, the first electrode 231 and the dummy first electrode 231' are formed by deposition without using a mask, and the sacrificial layer 145 is patterned without performing an additional mask process. Accordingly, the processability can be improved and the manufacturing cost can be reduced.

[0225] That is, the present disclosure is characterized in that the reflective layer of the dummy first electrode 231' formed on the side surface of the second overcoat layer 142.

[0226] Also, the present disclosure is characterized in that the undercut structure formed at the bottom end of the side surface of the second overcoat layer 142. Accordingly, the dummy first electrode 231' and the first electrode 231 are formed separately by the same process.

[0227] Further, the present disclosure is characterized in that the first electrode 231 is electrically connected with the drain electrode 124 through the connection electrode 125 under the first electrode 231.

[0228] Further, the present disclosure is characterized in that the dummy first electrode 231' is disposed on the side surface of the second outer coating layer 142 and is tapered at an angle of 30° to 60°.

[0229] In addition, in the present disclosure, the distance between the bank layer 114 and the dummy first electrode 231' can be controlled within a range in which the first electrode 231 does not cover all of the exposed openings.

[0230] Further, in the present disclosure, the sacrificial layer 145 has a greater thickness than the first electrode 231 to form an undercut structure at the edge of the first electrode 231.

[0231] Further, in the present disclosure, the connection electrode 125 is formed to have a size greater than that of the first electrode 231 to improve contact resistance.

[0232] Meanwhile, in the light emitting display device according to the exemplary embodiment and the other exemplary embodiment of the present disclosure, the light emitting layer is formed on the entire surface of the substrate including the non-emitting area NEA and the emitting area EA. However, the present disclosure is not limited thereto. In the present disclosure, the light emitting layer can be formed only in the emitting area EA, which will be described in detail with reference to still another exemplary embodiment of the present disclosure.

[0233] Figure 9 is a plan view of a light emitting display device according to still another exemplary embodiment of the present disclosure.

[0234] In addition to the light emitting layer 332 of the light emitting element 330, Figure 9 The light emitting display device 300 illustrated in Figure 4 is substantially the same as the light emitting display device 200 illustrated in

[0235] Referring to Figure 9 , the light emitting display device 300 according to still another exemplary embodiment of the present disclosure can include a substrate 110, a thin film transistor 120, a light emitting element 330, a first outer coating layer 141 and a second outer coating layer 142, a bank layer 114, a sacrificial layer 145, and an encapsulation layer 150.

[0236] In this case, the light emitting layer 332 and the second electrode 333 can be disposed on the bank layer 114. The light emitting layer 332 and the second electrode 333 can form the light emitting element 330 together with the first electrode 331.

[0237] The light emitting layer 332 can be disposed to be in contact with the first electrode 331 throughout the plurality of sub-pixels SPX. For example, the light emitting layer 332 can be disposed on the first electrode 331 only in the light emitting area EA. In this case, the light emitting layer 332 can be disposed to be surrounded by the bank layer 114.

[0238] The light emitting layer 332 functions to emit light of a specific color, and has a separate structure for each sub-pixel SPX. For example, the light emitting layer 332 disposed in the first sub-pixel SPX1 which is a red sub-pixel is a red light emitting layer, and the light emitting layer 332 disposed in the second sub-pixel SPX2 which is a green sub-pixel is a green light emitting layer. In addition, the light emitting layer 332 disposed in the third sub-pixel SPX3 which is a blue sub-pixel is a blue light emitting layer. The light emitting layer 332 disposed in the first sub-pixel SPX1, the light emitting layer 332 disposed in the second sub-pixel SPX2, and the light emitting layer 332 disposed in the third sub-pixel SPX3 can be disposed separately from each other. For each sub-pixel SPX, the light emitting layer 332 can be patterned and deposited in the corresponding light emitting area EA using an open mask (for example, a fine metal mask (FMM)).

[0239] The light emitting layer 332 can further include various layers, such as a hole transport layer, a hole injection layer, a hole blocking layer, an electron injection layer, an electron blocking layer, and an electron transport layer. The light emitting layer 332 can be an organic light emitting layer formed of an organic material, but is not limited thereto. For example, the light emitting layer 332 can also be formed of a quantum dot light emitting layer or a micro-LED.

[0240] The second electrode 333 can be disposed on the entire surface of the substrate 110 including the light emitting layer 332 patterned in each light emitting area EA.

[0241] Hereinafter, a method of manufacturing the light emitting display apparatus of the disclosure will be described in detail according to another exemplary embodiment of the disclosure.

[0242] Figure 10A to Figure 10G is a cross-sectional view sequentially showing a method of manufacturing a light emitting display apparatus according to another exemplary embodiment of the disclosure.

[0243] Referring to Figure 10A A buffer layer 111 is formed on the substrate 110, and a first metal layer is stacked on the buffer layer 111, and then is patterned.

[0244] The substrate 110 functions to support and protect various components of the light emitting display apparatus 300.

[0245] The substrate 110 can be formed of glass or a plastic material having flexibility. If the substrate 110 is formed of a plastic material, it can be formed of, for example, polyimide (PI), but is not limited thereto.

[0246] The buffer layer 111 serves to enhance adhesion between the substrate 110 and a layer formed on the buffer layer 111, and to block an alkali metal element discharged from the substrate 110.

[0247] The buffer layer 111 can be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a plurality of layers of silicon nitride (SiNx) and / or silicon oxide (SiOx), but is not limited thereto. The buffer layer 111 can be omitted depending on the kind and material of the substrate 110 and the structure and type of the thin film transistor 120.

[0248] The first metal layer can be formed of any one of various metal materials such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy of two or more of them, or a plurality of layers thereof, but is not limited thereto.

[0249] Then, the gate electrode 121 of the thin film transistor is formed by patterning the first metal layer.

[0250] Although not shown in the drawings, a photoresist can be coated on the first metal layer and the first metal layer can be patterned to form the above-described gate electrode 121 by a photolithography process using a photomask. The photolithography process can be performed by a series of processes such as development, etching, peeling, or ashing after exposure by an exposure device using a photomask.

[0251] Then, the gate insulating layer 112 is formed on the substrate 110, and the semiconductor layer is formed on the gate insulating layer 112, and then is patterned to form the active layer 122 of the thin film transistor.

[0252] The gate insulating layer 112 is an insulating layer for electrically insulating the gate electrode 121 from the active layer 122. The gate insulating layer 112 can be formed of an insulating material. For example, the gate insulating layer 112 can be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a plurality of layers of silicon nitride (SiNx) and / or silicon oxide (SiOx), but is not limited thereto.

[0253] The active layer 122 can be disposed to overlap the gate electrode 121.

[0254] For example, the active layer 122 can be formed of an oxide semiconductor, amorphous silicon (a-Si), polycrystalline silicon (poly-Si), or an organic semiconductor.

[0255] Then, the etching stop layer 117 can be formed on the active layer 122.

[0256] When the source electrode 123 and the drain electrode 124 are patterned by etching and formed, the etching stopper layer 117 can be formed to suppress damage to the back channel surface of the active layer 122 by plasma.

[0257] One end of the etching stopper layer 117 can overlap the source electrode 123, and the other end thereof can overlap the drain electrode 124. The etching stopper layer 117 can also be omitted.

[0258] Then, a second metal layer is formed on the substrate 110 on which the etching stopper layer 117 has been formed, and the second metal layer is patterned to form the source electrode 123 and the drain electrode 124.

[0259] The second metal layer can be formed of any one of various metal materials such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy of two or more thereof, or a multilayer thereof, but is not limited thereto.

[0260] Then, a passivation layer 113 can be formed on the substrate 110.

[0261] The passivation layer 113 can serve to protect the thin film transistor 120. The passivation layer 113 can be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx), or a multilayer of silicon nitride (SiNx) and / or silicon oxide (SiOx), but is not limited thereto. The passivation layer 113 can also be omitted.

[0262] Then, a first outer coating layer 141 can be formed on the passivation layer 113. The first outer coating layer 141 is an insulating layer for protecting the thin film transistor 120 and reducing a step difference between layers disposed on the substrate 110. The first outer coating layer 141 can be formed of any one of an acrylic-based resin, an epoxy resin, a phenol resin, a polyamide-based resin, a polyimide-based resin, an unsaturated polyester-based resin, a polyphenyl resin, benzocyclobutene, a photoresist, and a polyphenylene sulfide-based resin, but is not limited thereto.

[0263] The first outer coating layer 141 can be disposed on the thin film transistor 120. A top surface of the first outer coating layer 141 can be parallel to the substrate 110. Thus, the first outer coating layer 141 can flatten a step difference caused by components disposed below the first outer coating layer 141.

[0264] Then, a third metal layer is formed on the first outer coating layer 141, and the third metal layer is patterned to form the connection electrode 125.

[0265] The connection electrode 125 can be electrically connected with the drain electrode 124 through a contact hole formed in the first outer coating layer 141 and the passivation layer 113, but is not limited thereto. The connection electrode 125 can also be electrically connected with the source electrode 123 through a contact hole formed in the first outer coating layer 141 and the passivation layer 113.

[0266] The third metal layer can be formed of any one of various metal materials such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy of two or more thereof, or a multilayer thereof, but is not limited thereto.

[0267] Then, referring to FIG. 1C, Figure 10B An insulating layer 140 is deposited on the entire surface of the substrate 110 on which the connection electrode 125 and the first outer coating layer 141 have been formed.

[0268] The insulating layer 140 can be formed to have a greater thickness than the first electrode 231 to form an undercut structure at the edge of the first electrode 231. For example, if the thickness of the first electrode 231 is set to be 92.3% or less of the thickness of the insulating layer 140, the undercut structure of the present disclosure can be formed.

[0269] The insulating layer 140 can be formed as a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer of silicon nitride (SiNx) and / or silicon oxide (SiOx), but is not limited thereto. For example, the insulating layer 140 can be formed as a double layer of silicon nitride (SiNx) and silicon oxide (SiOx) having a thickness of 1000 Å to 2000 Å, but is not limited thereto. to

[0270] Then, referring to FIG. 1C, Figure 10C An organic insulating layer is formed on the insulating layer 140 and is patterned to form a second outer coating layer 142. Dry etching can be performed to pattern the organic insulating layer.

[0271] The second outer coating layer 142 can also be formed of the same material as the first outer coating layer 141.

[0272] For example, the second outer coating layer 142 can be formed of any one of an acrylic-based resin, an epoxy resin, a phenol resin, a polyamide-based resin, a polyimide-based resin, an unsaturated polyester-based resin, a polyphenylene-based resin, benzocyclobutene, a photoresist, a polyphenylene sulfide-based resin, but is not limited thereto.

[0273] The side surface of the second outer coating layer 142 can have a taper of a predetermined angle. For example, the side surface of the second outer coating layer 142 can be tapered at an angle of 30° to 60°, but is not limited thereto.

[0274] The second outer coating layer 142 can include a top surface and a side surface.

[0275] The top surface of the second outer coating layer 142 is located at the uppermost portion of the second outer coating layer 142 and can be substantially parallel to the substrate 110.

[0276] The side surface of the second outer coating layer 142 can be a surface extending from the top surface of the second outer coating layer 142.

[0277] Then, referring to Figure 10D The second outer coating layer 142 can be used as a mask to additionally etch the insulating layer 140. A wet etching can be performed to etch the insulating layer 140.

[0278] The second outer coating layer 142 can have an undercut structure at the bottom of the side surface by additionally etching the insulating layer 140 from the side surface of the second outer coating layer 142 to the inside in the horizontal direction to form a sacrificial layer 145.

[0279] The etching bias, which is a distance from an end of the side surface of the second outer coating layer 142 to an end of the sacrificial layer 145, varies depending on process conditions and can be in the range of 0.8 μm to 1.3 μm.

[0280] Then, referring to Figure 10E A fourth metal layer and a fifth metal layer are deposited on the entire surface of the substrate 110 to form a first electrode 231 on the connection electrode 125.

[0281] The first electrode 231 can be disposed on a surface of the connection electrode 125 that is not covered by the sacrificial layer 145 and whose surface is exposed. The first electrode 231 can also be disposed at the bottom of the side surface of the second outer coating layer 142 inside the undercut structure to be in contact with the side surface of the sacrificial layer 145.

[0282] When the first electrode 231 is formed, a dummy first electrode 231' can be formed on the top surface and the side surface of the second outer coating layer 142. When the first electrode 231 is deposited, the dummy first electrode 231' can be deposited on the top surface and the side surface of the second outer coating layer 142. Also, the dummy first electrode 231' can be separated from the first electrode 231 by the undercut structure of the second outer coating layer 142.

[0283] The dummy first electrode 231' disposed on the side surface of the second outer coating layer 142 can be tapered at an angle of 30° to 60°, but is not limited thereto.

[0284] The light emitting display device 200 according to another exemplary embodiment of the present disclosure is a top emission type light emitting display device. Accordingly, the reflective layer of the dummy first electrode 231' can reflect light emitted from the light emitting element 230 in an upward direction. Light generated from the light emitting layer 232 of the light emitting element 230 is emitted not only in the upward direction but also in a lateral direction. The light emitted in the lateral direction can travel to the inside of the light emitting display device 200 and can be confined in the inside of the light emitting display device 200 by total reflection. Also, the light can be lost while traveling to the inside of the light emitting display device 200. Accordingly, the reflective layer of the dummy first electrode 231' can be disposed to cover the lateral surface of the second outer coating layer 142. Accordingly, the traveling direction of the light can be changed from the lateral direction to the upward direction.

[0285] The first electrode 231 and the dummy first electrode 231' can be formed by deposition without performing a mask process.

[0286] In contrast to the sacrificial layer 145, the first electrode 231 can be formed to have a reverse taper at an edge thereof.

[0287] The thickness of the first electrode 231 can be set to be 92.3% or less of the thickness of the sacrificial layer 145 to separate the first electrode 231 from the dummy first electrode 231'.

[0288] A portion of the surface of the first electrode 231 can be substantially flat, but a portion of the edge of the first electrode 231 can have an uneven structure 231". If a portion of the edge of the first electrode 231 is uneven and has the uneven structure 231", a waveguide and an SP mode can be extracted. Accordingly, it can be helpful to improve the efficiency of the top surface.

[0289] Although not shown in the drawings, a reflective layer and a transparent conductive layer disposed on the reflective layer can be included in each of the first electrode 231 and the dummy first electrode 231'. However, the present disclosure is not limited thereto. Each of the first electrode 231 and the dummy first electrode 231' can have a three-layer structure including a transparent conductive layer, a reflective layer, and a transparent conductive layer.

[0290] The reflective layer can be disposed on the connection electrode 125. The light emitting display device 200 according to another exemplary embodiment of the present disclosure is a top emission type light emitting display device. Accordingly, the reflective layer can reflect light emitted from the light emitting element 230 in an upward direction.

[0291] The reflective layer as the fourth metal layer can be formed of a metal material such as aluminum (Al), silver (Ag), copper (Cu), a magnesium silver alloy, or the like, but is not limited thereto.

[0292] The reflective layer can be electrically connected with the drain electrode 124 through the connection electrode 125, but is not limited thereto. The reflective layer can also be electrically connected with the source electrode 123 through the connection electrode 125.

[0293] The transparent conductive layer as the fifth metal layer can be disposed on the reflective layer. The transparent conductive layer can be disposed on the reflective layer and electrically connected with the drain electrode through the reflective layer and the connection electrode 125. The transparent conductive layer can be formed of a conductive material having a high work function to provide holes to the light emitting layer 232.

[0294] For example, the transparent conductive layer can be formed of a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), and tin oxide (TO), but is not limited thereto.

[0295] Then, referring to Figure 10F The bank layer 114 can be formed on the second outer coating layer 142.

[0296] The bank layer 114 can be disposed on the second outer coating layer 142 to cover a portion of edges of the dummy first electrode 231' and the first electrode 231. The bank layer 114 can fill the inside of the undercut structure at the bottom end of the side surface of the second outer coating layer 142. Accordingly, the bank layer 114 can be interposed between the first electrode 231 and the dummy first electrode 231'.

[0297] The bank layer 114 can cover a portion of edges of the first electrode 231 throughout the plurality of sub-pixels SPX to define the light emitting area EA and the non-light emitting area NEA. For example, in the non-light emitting area NEA, the bank layer 114 is disposed on the first electrode 231 to block the generation of light from the non-light emitting area NEA. Meanwhile, in the light emitting area EA, the bank layer 114 is not disposed, but the light emitting layer 232 is located just on the first electrode 231. Accordingly, light can be generated from the light emitting layer 232.

[0298] The bank layer 114 can be formed of an organic material or an inorganic material.

[0299] For example, the bank layer 114 can be formed of an organic material such as polyimide, acrylic, or benzocyclobutene, or an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0300] Then, referring to Figure 10G The light emitting layer 232 and the second electrode 233 can be formed on the bank layer 114. The light emitting layer 232 and the second electrode 233 can form the light emitting element 230 together with the first electrode 231.

[0301] The light emitting layer 232 can be disposed in contact with the first electrode 231 throughout the plurality of sub-pixels SPX. For example, the light emitting layer 232 can be disposed on the first electrode 231 throughout the entire surface of the substrate 110, but is not limited thereto. The light emitting layer 232 can be disposed on the first electrode 231 only in the light emitting area EA. In this case, the light emitting layer 232 can be disposed to be surrounded by the bank 114.

[0302] The second electrode 233 can be disposed on the light emitting layer 232 in the sub-pixel SPX. For example, the second electrode 233 is disposed to be in contact with the light emitting layer 232 along the shape of the light emitting layer 232 in the light emitting area EA and the non-light emitting area NEA, but is not limited thereto.

[0303] The second electrode 233 can supply electrons to the light emitting layer 232. The second electrode 233 can be formed of a metal material such as silver (Ag), copper (Cu), a magnesium silver alloy, or the like, but is not limited thereto. If the second electrode 233 is formed of a metal material, it has a very low refractive index. For example, if the second electrode 233 is formed of silver (Ag), the second electrode 233 can have a refractive index of about 0.13.

[0304] Then, the encapsulation layer 150 can be formed on the second electrode 233.

[0305] The encapsulation layer 150 can prevent oxygen and moisture from penetrating into the light emitting display device 200 from the outside.

[0306] Although not shown in the drawings, a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer can be included in the encapsulation layer 150.

[0307] The first encapsulation layer can be disposed on the second electrode 233 to suppress the penetration of moisture or oxygen.

[0308] In this document, the first encapsulation layer can be formed of an inorganic material such as silicon nitride (SiNx), silicon oxynitride (SiOxNy), or aluminum oxide (AlyOz), but is not limited thereto. The first encapsulation layer can be formed of a material having a higher refractive index than the second encapsulation layer. For example, if the first encapsulation layer is formed of silicon nitride (SiNx) or silicon oxynitride (SiOxNy), the refractive index of the first encapsulation layer can be about 1.8.

[0309] The second encapsulation layer can be provided on the first encapsulation layer to planarize a surface of the first encapsulation layer. Also, the second encapsulation layer can cover foreign matter or particles that can be generated in a manufacturing process. The second encapsulation layer can be formed of an organic material such as carbon silicon oxide (SiOxCz) or an acrylic-based resin or an epoxy-based resin, but is not limited thereto. The second encapsulation layer can be formed of a material having a lower refractive index than the first encapsulation layer. For example, if the second encapsulation layer is formed of an acrylic-based resin, the refractive index of the second encapsulation layer can be about 1.5 to about 1.6.

[0310] The third encapsulation layer can be provided on the second encapsulation layer and can suppress the penetration of moisture or oxygen like the first encapsulation layer.

[0311] For example, the third encapsulation layer can be formed of an inorganic material such as silicon nitride (SiNx), silicon oxynitride (SiOxNy), silicon oxide (SiOx), or aluminum oxide (AlyOz), but is not limited thereto. The third encapsulation layer can be formed of the same material as the first encapsulation layer or can be formed of a different material from the first encapsulation layer.

[0312] Meanwhile, the light emitting display apparatus of the present disclosure can also be applied to a case where a touch unit is added on the encapsulation layer. This will be described in detail with reference to still another exemplary embodiment of the present disclosure.

[0313] Figure 11 is a plan view of a light emitting display apparatus according to still another exemplary embodiment of the present disclosure.

[0314] Figure 12 is a cross-sectional view of the light emitting display apparatus taken along the line XII-XII’ of Figure 11

[0315] In addition to the touch unit 460, Figure 11 and Figure 12 The light emitting display apparatus 400 shown in Figure 4 is substantially the same as the light emitting display apparatus 200 shown in Figure 11 Only a plurality of sub-pixels SPX and a touch line 464 are shown.

[0316] Referring to Figure 11 and Figure 12 The touch unit 460 can be provided on the encapsulation layer 150. The touch unit 460 can be provided in an active area A / A including the light emitting element 230 to sense a touch input. The touch unit 460 can sense external touch information provided by a user’s finger or a touch pen. The touch unit 460 can include a first inorganic insulating layer 461, a second inorganic insulating layer 462, a touch line 464, and a touch electrode 465.

[0317] ​The first inorganic insulating layer 461 is disposed on the encapsulation layer 150.

[0318] The first inorganic insulating layer 461 can be disposed on and in contact with the third encapsulation layer of the encapsulation layer 150. The first inorganic insulating layer 461 can be formed of an inorganic material. For example, the first inorganic insulating layer 461 can be formed of an inorganic material such as silicon nitride (SiNx) or silicon oxynitride (SiOxNy). For example, if the first inorganic insulating layer 461 is formed of silicon nitride (SiNx), the refractive index of the first inorganic insulating layer 461 can be about 1.8.

[0319] The touch line 464 can be disposed on the first inorganic insulating layer 461.

[0320] The touch line 464 can be disposed on the first inorganic insulating layer 461 in the non-emitting area NEA. The touch line 464 can be disposed in a row direction or in a column direction. The touch line 464 provides a touch driving signal for driving the touch unit 460. In addition, the touch line 464 can transmit touch information sensed by the touch unit 460 to the driving IC.

[0321] The second inorganic insulating layer 462 can be disposed on the touch line 464 and the first inorganic insulating layer 461. The second inorganic insulating layer 462 can be disposed on the first inorganic insulating layer 461 and the touch line 464 to planarize a top surface thereof.

[0322] The second inorganic insulating layer 462 serves to suppress short-circuiting of the touch line 464 disposed adjacent to the second inorganic insulating layer 462. The second inorganic insulating layer 462 can be formed of the same material as the first inorganic insulating layer 461. For example, the second inorganic insulating layer 462 can be formed of an inorganic material such as silicon nitride (SiNx) or silicon oxynitride (SiOxNy). For example, if the second inorganic insulating layer 462 is formed of silicon nitride (SiNx), the refractive index of the second inorganic insulating layer 462 can be about 1.8. If the second inorganic insulating layer 462 has the same refractive index as the first inorganic insulating layer 461, the material of the second inorganic insulating layer 462 is not limited thereto.

[0323] The touch electrode 465 can be disposed on the touch line 464 and the second inorganic insulating layer 462.

[0324] The touch electrode 465 can be disposed in a row direction or in a column direction. For example, the touch electrode 465 disposed in any one of the row direction and the column direction can be disposed on the touch line 464. In addition, the touch electrode 465 disposed in the other of the row direction and the column direction can be disposed on the second inorganic insulating layer 462. The touch electrode 465 disposed in the column direction and the touch electrode 465 disposed in the row direction can be connected to each other by a bridging electrode to form a mesh structure. Figure 12It is shown that the touch electrode 465 is disposed in the light emission area EA. However, the touch electrode 465 can not be disposed in the light emission area EA, but is not limited thereto.

[0325] The exemplary embodiments of the present disclosure can also be described as follows:

[0326] According to an aspect of the present disclosure, a light emitting display apparatus includes a substrate defined by a plurality of sub-pixels and a first outer coating layer disposed on the substrate. The light emitting display apparatus further includes a connection electrode and a sacrificial layer disposed on the first outer coating layer and a first electrode disposed on the connection electrode. The light emitting display apparatus further includes a second outer coating layer disposed on the sacrificial layer and including an opening exposing a portion of the first electrode. The light emitting display apparatus further includes a dummy first electrode disposed on a top surface of the second outer coating layer and a side surface of the opening and separated from the first electrode. The light emitting display apparatus further includes a bank layer covering the dummy first electrode and a portion of the first electrode, and a light emitting layer and a second electrode disposed on the first electrode and the bank layer.

[0327] The connection electrode can be electrically connected with a drain electrode of a thin film transistor.

[0328] The second outer coating layer can have an undercut structure at a bottom end of the side surface by removing the sacrificial layer from the side surface of the second outer coating layer to the inside.

[0329] The first electrode can also be disposed inside the undercut structure.

[0330] The first electrode inside the undercut structure can have an uneven structure on a surface.

[0331] The second outer coating layer can expose an entire surface of the first electrode in addition to the uneven structure of the first electrode.

[0332] The side surface of the second outer coating layer exposing the first electrode is tapered at an angle of 30° to 60°.

[0333] The bank layer fills an inside of the undercut structure.

[0334] A distance from an end of the side surface of the second outer coating layer to an end of the sacrificial layer can be in a range of 0.8 μm to 1.3 μm.

[0335] A thickness of the first electrode can be 92.3% or less of a thickness of the sacrificial layer.

[0336] The sacrificial layer can have a positive taper at an edge thereof, and the sacrificial layer can be disposed on the first outer coating layer to cover an edge of the connection electrode.

[0337] The first electrode can be disposed in contact with a side surface of the sacrificial layer and on the connection electrode which can not be covered by the sacrificial layer and whose surface is exposed.

[0338] A bank layer can be disposed on the second outer coating layer to cover the entire dummy first electrode and a portion of the edge of the first electrode.

[0339] The light emitting layer can be disposed only on the first electrode inside the opening.

[0340] The light emitting display device can further include an encapsulation layer disposed on the second electrode; and a touch unit on the encapsulation layer.

[0341] The touch unit can include a first inorganic insulating layer on the encapsulation layer; a second inorganic insulating layer on the first inorganic insulating layer; and a touch wire and a touch electrode disposed on the first inorganic insulating layer or the second inorganic insulating layer.

[0342] According to another aspect of the disclosure, a method of manufacturing a light emitting display device includes preparing a first outer coating layer on a substrate on which a thin film transistor has been provided. The method further includes preparing a connection electrode on the first outer coating layer, and preparing an insulating layer on the entire surface of the substrate on which the connection electrode and the first outer coating layer have been provided. The method further includes preparing a second outer coating layer including an opening on the insulating layer. The method further includes making an undercut structure at the bottom of a side surface of the second outer coating layer by etching the insulating layer using the second outer coating layer as a mask. The method further includes preparing a first electrode on the connection electrode and inside the undercut structure, and simultaneously preparing a dummy first electrode on the top surface and the side surface of the second outer coating layer. The method further includes preparing a bank layer covering the dummy first electrode and a portion of the first electrode, and preparing a light emitting layer and a second electrode on the first electrode and the bank layer. The first electrode can be separated from the dummy first electrode by the undercut structure.

[0343] The first electrode and the dummy first electrode are prepared by deposition without performing a mask process.

[0344] The first electrode inside the undercut structure can have an uneven structure on the surface.

[0345] The thickness of the first electrode can be 92.3% or less of the thickness of the insulating layer.

[0346] The undercut structure can be made at the bottom of the side surface of the second outer coating layer by removing the insulating layer from the side surface to the inside of the second outer coating layer using wet etching using the second outer coating layer as a mask.

[0347] Although the exemplary embodiments of the present disclosure have been described with reference to the accompanying drawings, the present disclosure is not limited thereto and can be implemented in many different forms. It is only for illustrative purposes that the exemplary embodiments of the present disclosure are provided, and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above-described exemplary embodiments are illustrative in all aspects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the appended claims, and all technical concepts within the equivalent scope thereof should be interpreted as falling within the scope of the present disclosure.

Claims

1. A light emitting display apparatus, comprising: a substrate defined by a plurality of sub-pixels; a first overcoat layer disposed on the substrate on which a thin film transistor has been provided; a connection electrode and a sacrificial layer disposed on the first overcoat layer, wherein the sacrificial layer covers edges of the connection electrode; a first electrode disposed on the connection electrode, the first electrode being in contact with the connection electrode throughout an emission area of each of the plurality of sub-pixels; a second overcoat layer disposed on the sacrificial layer and including an opening exposing a portion of the first electrode; a dummy first electrode disposed on a top surface of the second overcoat layer and a side surface of the opening and separated from the first electrode, wherein the dummy first electrode includes a reflective layer; a bank layer covering a portion of the first electrode and the dummy first electrode; and a light emitting layer and a second electrode disposed on the first electrode; wherein the second overcoat layer has an undercut structure at a bottom end of the side surface by removing the sacrificial layer from the side surface of the second overcoat layer to an inside; an edge of the first electrode is disposed inside the undercut structure; the edge of the first electrode inside the undercut structure has an uneven structure on a surface; and the uneven structure completely covers a side surface of the sacrificial layer at an interface where the sacrificial layer is in contact with the edge of the first electrode. The connection electrode is electrically connected with a drain electrode of the thin film transistor.

2. The light-emitting display device according to claim 1, wherein The second overcoat layer exposes an entire surface of the first electrode except for the uneven structure of the first electrode.

3. The light-emitting display device according to claim 1, wherein The side surface of the second overcoat layer exposing the first electrode is tapered at an angle of 30° to 60°.

4. The light-emitting display device according to claim 1, wherein The bank layer fills an inside of the undercut structure.

5. The light-emitting display device according to claim 1, wherein A distance from an end of the side surface of the second overcoat layer to an end of the sacrificial layer is in a range of 0.8 µm to 1.3 µm.

6. The light-emitting display device according to claim 1, wherein A thickness of the first electrode is 92.3% or less of a thickness of the sacrificial layer.

7. The light-emitting display device according to claim 1, wherein The sacrificial layer has a positive taper at an edge thereof.

8. The light-emitting display device according to claim 1, wherein The bank layer is disposed on the second overcoat layer to cover an entire dummy first electrode and a portion of edges of the first electrode.

9. The light-emitting display device according to claim 1, wherein The light emitting layer is disposed only on the first electrode inside the opening.

10. The light-emitting display device according to claim 1, wherein 11.The light emitting display apparatus of claim 1, further comprising: an encapsulation layer disposed on the second electrode; and a touch unit on the encapsulation layer, wherein the touch unit includes: a first inorganic insulating layer on the encapsulation layer; a second inorganic insulating layer on the first inorganic insulating layer; and a touch line and a touch electrode disposed on the first inorganic insulating layer or the second inorganic insulating layer. 12.The light emitting display apparatus of claim 1, wherein the first electrode includes a reflective layer. 13.A method of manufacturing a light emitting display apparatus, comprising: preparing a first overcoat layer on a substrate on which a thin film transistor has been provided; preparing a connection electrode on the first overcoat layer; preparing an insulating layer on an entire surface of the substrate on which the connection electrode and the first overcoat layer have been provided; preparing a second overcoat layer including an opening on the insulating layer; ​ ​ a bottomed structure is made at a bottom of a side surface of the second overcoat layer by etching the insulating layer using the second overcoat layer as a mask, wherein the insulating layer covers an edge of the connecting electrode; a first electrode is prepared on the connecting electrode and inside the bottomed structure, and at the same time, a dummy first electrode is prepared on a top surface and a side surface of the second overcoat layer, the first electrode being in contact with the connecting electrode throughout a light emitting region of a sub-pixel, wherein an edge of the first electrode is disposed inside the bottomed structure, the edge of the first electrode inside the bottomed structure has an uneven structure on a surface, and the uneven structure completely covers a side surface of the insulating layer at an interface where the insulating layer is in contact with the edge of the first electrode; a bank layer covering a part of the first electrode and the dummy first electrode is prepared; and a light emitting layer and a second electrode are prepared on the first electrode, wherein the first electrode is separated from the dummy first electrode by the bottomed structure, and wherein the dummy first electrode includes a reflective layer.

14. The method of manufacturing the light-emitting display device according to claim 13, wherein, The first electrode and the dummy first electrode are prepared by deposition without performing a mask process.

15. The method of manufacturing the light-emitting display device according to claim 13, wherein, A thickness of the first electrode is 92.3% or less of a thickness of the insulating layer.

16. The method of fabricating the light-emitting display device according to claim 13, wherein, The bottomed structure is made at a bottom of a side surface of the second overcoat layer by removing the insulating layer from the side surface to the inside of the second overcoat layer through a wet etching using the second overcoat layer as a mask.

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