Non-blocking storage access for distributed ledgers

Abstract

The invention relates to non-blocking storage access for distributed ledgers. Method for running a network with a plurality of nodes, wherein the network is configured to implement a storage that is distributed over the network and / or replicated, and to implement execution of transactions using the content of the storage, wherein • for at least one sub-range of a first transaction, which starts with a read access to at least one storage bit of the storage and / or ends with a write access to at least one storage bit of the storage, a set of instructions and / or transactions is determined that can be executed in parallel, which can access the at least one storage bit as well and nevertheless can be executed simultaneously with the sub-range of the first transaction without influencing each other; and • at least one of the instructions and / or transactions that can be executed in parallel is executed in parallel to the sub-range of the first instruction, or the execution is scheduled.

Description

Technical Field

[0001] This invention relates to the coordination of parallel access to memory in a distributed ledger, with the aim of enabling all transactions using the distributed ledger to be completed more quickly. Background Technology

[0002] A distributed ledger is a decentralized data store that is distributed across multiple computer-implemented nodes in a network and replicated. These nodes reach a consensus according to a pre-defined procedure regarding transactions that, based on the contents of the data store, form a work result using the transaction, and through the transaction, establish the work result's registration in the memory. This consensus mechanism protects the stored content, particularly from subsequent forgery. Therefore, distributed ledgers are suitable, for example, for storing tamper-proof evidentiary data.

[0003] To execute the entire set of pending transactions as quickly as possible, it is desirable to execute as many transactions as possible in parallel. A limiting factor is that the memory area used by a single transaction cannot be modified by another transaction. Otherwise, the computational results will become incorrect and unreproducible.

[0004] In a vivid example, the first transaction should increase the value by 5, and the second transaction should increase the same value by 10. If both transactions are executed simultaneously starting from the value 20, the first transaction yields 25 (20+5) as a result, and the second transaction yields 30 (20+10) as a result, and the value obtained later in time is decisive. The result is therefore related to a possibly random order, with the two transactions being performed separately on the hardware in the stated order. Both possible results are incorrect; 35 (20+5+10) would be correct. Summary of the Invention

[0005] Within the scope of this invention, a method has been developed for operating a network having multiple computer-implemented nodes. The network is configured to implement distributed and / or replicated memories within the network, and to utilize the contents of these memories to execute transactions.

[0006] A “transaction” is specifically understood as a process with determinable boundaries, which begins with input from at least one item from memory, followed by processing said item (and optionally other information from any source) into a result, and ends by outputting said result for the purpose of being stored in memory. Here, “determinable boundaries” is particularly understood, for example, as transactions that have never been fully executed for any reason can be “re-run”, that is, the effect of incompletely executed transactions on memory can be eliminated without residue.

[0007] In this method, for at least one sub-range of a first transaction, a set of instructions and / or transactions that can be executed in parallel are determined, the at least one sub-range beginning with a read access to at least one memory bit and / or ending with a write access to at least one memory bit. The key feature of these parallel-executable instructions and / or transactions is that they all access at least one memory bit, and despite this, they can be executed simultaneously with the mentioned sub-range of the first transaction without mutual interference. At least one parallel-executable instruction and / or transaction is executed in parallel with a sub-range of the first instruction, or the execution is planned.

[0008] It has been recognized that while the parallel execution of instructions and / or transactions accessing the same memory location can indeed lead to mutual influence between the corresponding processes and the results obtained, such influence is not always absolutely necessary. Combinations of instructions and / or transactions that do not interfere with each other when jointly accessing the same memory location can be identified automatically. Alternatively, the programmer of the first transaction can design it from the outset so that parallel access to the memory location used by the first transaction in other ways does not cause mutual interference. The programmer can explicitly declare, particularly in the first transaction, that these memory locations are also available in other ways during the execution of the first transaction; and in this way, the programmer can assist in planning the parallel execution of as many transactions and instructions as possible.

[0009] Regardless of how the instructions and / or transactions that are commonly executed in parallel with the sub-range of the first transaction are identified, each such identification opens up additional possibilities for planning or actually carrying out such parallel execution. If a predetermined quota of transactions is thus all awaiting processing for execution, that quota can all be completed more quickly.

[0010] The more complex each individual transaction to be executed and the longer its execution lasts, the greater this effect becomes. In the early stages of distributed ledger technology, only one transaction could be scheduled for execution at any given time, and this transaction had exclusive access to the memory for its execution duration. Starting with the Ethereum network, the functionality of distributed ledger networks has been expanded to include the automated execution of "smart contracts," which, for example, check for the occurrence of previously defined contractually bound conditions and then automatically take action. However, the more powerful the functionality offered within the scope of "smart contracts," the longer these functions require to execute and the more difficult it becomes to schedule the execution duration. Significant time can be saved by executing multiple transactions in parallel.

[0011] In a particularly advantageous configuration, the instructions of a sub-range of the first transaction, for read access (or for write access), include the following description: this description characterizes instructions and / or transactions that can be executed in parallel. For this purpose, the command set available for programmable transactions can be extended with additional instructions for read access (or for write access), which, in addition to read or write access to the memory bit itself, also include the following description: what types of parallel accesses to the same memory bit do not alter the result of the processing performed in the sub-range mentioned in the first transaction. In this way, the first transaction is presented as "sozial" and resource-efficient, such that the first transaction does not require unnecessary exclusivity of access to specific memory bits.

[0012] For the programmer of the first transaction, this means additional overhead: they must then examine their program code to determine which concurrent accesses to the memory bits used within the scope of the first transaction are permitted. This is particularly relevant when the program code is subsequently improved in a targeted manner such that the initial exclusivity required for memory access is no longer necessary. In network operation, corresponding incentives can be provided for programmers to invest in this additional overhead.

[0013] For example, transactions that declare parallel executable instructions and / or transactions and relinquish exclusivity in this regard can be preferred in the following planning: the order in which pending transactions are executed. Thus, when distributing transactions to blocks (which are added incrementally to the blockchain), each nth block can initially only be loaded with transactions that have relinquished exclusivity, and only when no further such transactions can be placed will additional transactions be added to fill the remaining space. Furthermore, it is permissible, for example, to execute instructions belonging to a second transaction as parallel executable instructions other than the first transaction that has relinquished exclusivity, in connection with the fact that the second transaction also relinquishes exclusivity in the same manner.

[0014] In other particularly advantageous construction schemes, in the first transaction, one or more instructions are replaced by substitutes that provide the same result, forming a sub-scope of the first transaction where at least one instruction and / or transaction can be executed in parallel. The program code of the first transaction is thus automatically optimized as follows: there are multiple possibilities for the parallel execution of other instructions and / or transactions. Optimization can be performed, for example, during the compilation of the first transaction from the source text; for instance, optimization can be performed if the code for a "smart contract" to be executed on the Ethereum blockchain is translated into bytecode executable on the Ethereum Virtual Machine (EVM) using the programming language Solidity. However, optimization can also be performed, for example, during the execution of the program code. For example, a node implementing bytecode execution on the EVM can directly optimize to bytecode, thus completing the execution of the program code more quickly. In network operation, there can be incentives for such optimization by nodes. For example, nodes that complete execution more quickly in this way can be allocated a larger share of the fees paid for the transaction.

[0015] In a particularly advantageous configuration, the sub-range of the first transaction begins with a read access. The set of instructions and / or transactions that can be executed concurrently with this sub-range contains at least one read access. Thus, the read access that begins with this sub-range is a non-read-blocking read that does not block other concurrent reads. Provided that other instructions and / or transactions do not modify the data read using the read access via write access, then those other instructions and / or transactions can also read that data.

[0016] If a subrange of the first transaction performs a computation, it may be permissible, for example, to perform simultaneous reads via additional instructions and / or transactions, during which the value at the storage location is accessed multiple times in the process of the computation (Verlauf), and the result of the computation is stored at another storage location in memory.

[0017] In other particularly advantageous configurations, the first sub-range of a transaction begins with a read access. The program code of the sub-range now has the characteristic that if the data read changes at the storage location from which the data was read during the execution of the sub-range, it does not preclude the result of further processing of the read data within the sub-range. The set of instructions and / or transactions that can be executed in parallel with the sub-range then includes read and write accesses. The read access that the sub-range begins with is followed by interchangeable read accesses. Additional instructions and / or transactions allow the read data to be modified during the execution of the first sub-range.

[0018] For example, if a value read at the start of a subrange of the first transaction is not read again during the execution of that subrange, then both simultaneous reading and simultaneous writing are permitted. To ensure this, the value can, for example, be buffered in the context of the subrange after being read, at the cost of requiring corresponding working memory.

[0019] "Not hindering" the result of further processing of the read data within the sub-range can, in particular, mean, for example, that the result remains unchanged even if the read data is changed during this period. However, there are also applications where it is permissible to change values ​​read multiple times during the execution of changes within the sub-range, even between read accesses performed via other transactions and / or instructions. Thus, for example, the first transaction might include a computation lasting a considerable period, during which physical measurement data detected by sensors is accessed multiple times. If this physical measurement data is now updated in parallel with the execution of the first transaction via other transactions and / or instructions, the result last measured within the range of the first transaction changes. However, this is a change in a positive direction because the latest values ​​of these physical measurement data are used once they are available. Therefore, the result is not "hindered" in a negative sense.

[0020] In other particularly advantageous construction schemes, the subrange of the first transaction ends with a write access. The set of instructions and / or transactions that can be executed in parallel contains at least one write access that can be replaced by write accesses from the subrange without altering the final result obtained using both write accesses at the memory location. Thus, the subrange write scheme is a commutative write access scheme. This means that any change in the settings of the involved memory locations does not have to wait for a separate additional change.

[0021] An instance of commutative write access involves adding or multiplying the value stored at the memory location with a pre-defined value. It doesn't matter, for example, whether 5 and 10 are added to the stored value first, or 10 is added first and then 5. If these two changes don't have to wait for each other, a potential delay in one of these changes doesn't directly propagate to a delay in the overall orchestration of the transaction.

[0022] Here, the parallel executableness of at least one instruction or transaction with a sub-range of the first transaction can be, in particular, additionally, constrained by the temporal interrelationship between the execution of the sub-range of the first transaction (and / or the execution of other transactions). In this regard, it can be ensured in particular that only such write accesses are interchangeable, and that the write accesses belong to the same interchangeable group or to mutually compatible interchangeable groups.

[0023] If, for example, 5 is first added to the stored value 2 and then 10 is added to it, and the result 17 is then multiplied by 3, then while these two additions are allowed to be interchanged with each other, multiplication is not allowed to be used to substitute for addition. Therefore, substitution of write accesses is only allowed within the time interval during which the addition is still being performed.

[0024] Furthermore, the temporal interrelationships can, for example, include the completion of the execution of parallel-executable instructions and / or transactions before subsequent read or write accesses to memory bits modified by sub-ranges of the first transaction and parallel-executable instructions and / or transactions. Therefore, parallel and potentially interchangeable changes must be performed before the remaining portion of the first transaction after the first sub-range (and / or other transactions after the first transaction) requires another access to memory bits. Various measures can be employed to ensure compliance with such temporal conditions.

[0025] For example, the execution of other transactions can be delayed to enable the execution of parallelizable instructions and / or transactions in at least partial parallelism with a subrange of the first transaction. This delay obviously takes time initially, but can be overcompensated by ensuring that parallelizable transactions are not executed after the first transaction.

[0026] For example, the first transaction might be a complex computation requiring 100ms. A subrange of another transaction, which can be executed concurrently, begins 20ms later. If this other transaction starts at that exact moment and requires 90ms, it will only end at a time when the first transaction has already ended 10ms and the second transaction following it has already begun. If the second transaction is now related to a value in memory (a value that changes in an interchangeable manner, partly through the subrange of the first transaction and partly through the transactions executed concurrently with it), this change might occur while the second transaction is already running. Therefore, it's possible to further compute the second transaction using an incorrect value. This can be avoided by delaying the start of the second transaction by 10ms. This is always much faster than abandoning the concurrent execution of the other transaction and waiting 90ms for its result after the first transaction ends.

[0027] Here, in principle, it is possible to postpone the execution of a second transaction for an arbitrarily long time, in order to facilitate the execution of a constantly new, concurrently executable transaction and / or instruction. It is possible to intentionally incite such intervention in the program flow with the aim of deriving any advantage from postponing the second transaction, regardless of the circumstances.

[0028] To prevent such interference, in other particularly advantageous configurations, the execution of other delayed transactions is assigned higher priority as the delay increases. If this increased priority meets pre-defined criteria, the execution of the other delayed transactions is brought forward to the execution of new, parallel-executable instructions and / or transactions. For example, the priority of other delayed transactions can increase exponentially with delay.

[0029] Alternatively, or in combination, to selectively choose appropriate parallelizable instructions and / or transactions, the following boundary condition can be considered to delay other transactions: the parallelizable instructions and / or transactions should end until the next read or write access to the commonly modified memory bit. In the example above, where there is an 80ms period between the subrange that starts the first transaction after 20ms and ends the first transaction after 100ms, a sequence of two related transactions could be executed in parallel with the first subrange, where the first transaction lasts 50ms and the second transaction lasts 30ms. Executing parallelizable instructions for 70ms might not be optimal, as 10ms would be "wasted."

[0030] For example, based on the analysis of the instructions contained in a transaction, the duration necessary to execute a transaction that can be executed in parallel can be determined. If the transactions that can be executed in parallel consist, for example, instructions that are unconditionally arranged together (the execution durations of the instructions are known), then these times can be simply added together.

[0031] It is impossible to reliably predict the execution duration of any computer program written in a Turing-complete language. This problem is known in computer science as the "halting problem." However, when executing transactions in a blockchain network, planned security can be achieved by allocating a fixed resource budget to the transaction, which can be described, for example, in terms of computational overhead.

[0032] Thus, for example in the context of "smart contracts," on the Ethereum blockchain, each individual instruction in the set of instructions that make up a transaction has its own computation time requirement.

[0033] This mechanism ensures that for each transaction, it can be specified how long it can run at most, or more precisely, if the transaction's resource demands are related to the input it receives. The maximum execution duration can be used to plan the execution of transactions as parallel transactions, in addition to the first transaction.

[0034] Therefore, in other particularly advantageous configurations, the duration necessary for executing a parallel-executable transaction is determined based on the resource budget allocated to the transaction, after which the transaction is aborted and rerun.

[0035] In principle, any number of parallelizable transactions can be executed simultaneously, provided that sufficient hardware resources are available and their content does not interfere with each other. However, in reality, as the number of transactions increases, the following probability rises: the execution of one of the parallelizable transactions is delayed without planning, and ultimately, the time advantage expected from parallel execution is broken because other transactions after the first transaction are still waiting for the final result of parallel execution. This can be roughly compared to the following situation: in a bus tour group that separates at a scenic spot and agrees to meet at a bus stop at a fixed time to continue the journey, starting from a certain group size, there will always be at least one user who arrives at the meeting point much later, and the entire group must wait.

[0036] Therefore, in other particularly advantageous configuration schemes, the number of parallel executable instructions and / or transactions that are executed simultaneously with the subrange of the first transaction is limited to a pre-given value.

[0037] The conditions for the temporal interrelationships of exchangeable write accesses can be advantageously updated during the sub-range of execution of the first transaction. In this way, as many opportunities as possible can be used to execute additional instructions and / or transactions in parallel without (as previously explained) delays due to the delayed completion of additional instructions and / or transactions.

[0038] For example, the first transaction involving iterative processing can be predicted during the first phase. The first transaction will still run for at least a defined period of time (e.g., 1 second), during which its end cannot be predicted. This period can then be separately scheduled to execute parallel-executable instructions and / or transactions. If convergence of the iterative processing is observed, the predicted remaining run time of the first transaction can be significantly reduced (e.g., to 100 ms), so that only significantly shorter parallel-executable transactions and / or instructions are subsequently included in the planning.

[0039] Especially in transactions that utilize neural networks or other machine learning modules, termination may depend on content-based termination criteria, for example, to achieve a predetermined level of precision. Such termination criteria do not allow for sufficiently accurate prediction of the final execution duration, because the progress obtained through additional iterations can vary strongly non-linearly.

[0040] Transactions that take a long time to process can also store intermediate results, which can be used to execute instructions and / or transactions in parallel.

[0041] In other particularly advantageous construction schemes, the parallelizable instructions and / or transactions are characterized by at least one additional boundary condition for the contents of storage bits modified by a subrange of the first transaction and by parallelizable instructions and / or transactions. The boundary condition may, for example, further restrict the type, access method for storage bits shared with the first transaction, and / or resource budget, and the identified parallelizable instructions and / or transactions. Alternatively, or in combination with, the boundary condition may also expand the scope of parallelizable instructions and / or transactions. For example, the boundary condition may include a guarantee that the transaction and / or instruction are given by the state of the storage bits resulting from the transaction and / or instruction. In this way, for example, it can be ensured that the variable never leaves its allowed value range due to changes made by the first transaction and by transactions and / or instructions executed in parallel with it, and, for example, no integer overflow occurs.

[0042] This method can be implemented entirely or partially by a computer. Therefore, the invention also relates to a computer program having machine-readable instructions that, when executed on one or more computers, cause the computers to perform one of the described methods. In this sense, the embedded systems of vehicle control devices and technical equipment should also be considered as computers, and these embedded systems are also capable of executing machine-readable instructions.

[0043] Similarly, the present invention also relates to a machine-readable data carrier, and / or to a downloadable product having the aforementioned computer program. The downloadable product is a digital product that is transmissible (i.e., downloadable by a user of the data network) via a data network, which may, for example, be listed and sold in an online shop for immediate download.

[0044] In addition, the computer may be equipped with computer programs, machine-readable data carriers, or downloadable products. Attached Figure Description

[0045] In the following description, together with the preferred embodiments of the invention, other measures to improve the invention are shown in more detail with reference to the accompanying drawings.

[0046] in:

[0047] Figure 1 An embodiment of a method 100 for operating network 1 is shown;

[0048] Figure 2 An exemplary network 1 with node 2 and distributed memory 3 is shown;

[0049] Figure 3 This illustrates the selection of parallelizable transactions 43 with appropriate execution durations δ to satisfy the temporal interrelationship 120;

[0050] Figure 4 It is shown that although there is an execution duration δ, subsequent transactions 4' are delayed by a time interval △ to satisfy the temporal relationship 120. Detailed Implementation

[0051] Figure 1 An embodiment of a method 100 for operating a network 1 is shown, the network 1 having a plurality of computer-implemented nodes 2. Network 1 in Figure 2 The diagram shows in more detail the implementation of a distributed and / or replicated memory 3 within network 1, and the execution of transaction 4 using the contents of memory 3. Memory 3 is divided into storage bits 31.

[0052] In step 110, for at least one sub-range 41 of the first transaction 4, a set of instructions 42 and / or transactions 43 that can be executed in parallel are determined. These instructions 42 and / or transactions 43 are executed in parallel with sub-range 41 and have access to memory 31 in the same way as sub-range 41, without interfering with each other. This information can be used in step 140a to actually execute the instructions 42 or transactions 43 that can be executed in parallel with sub-range 41, and / or this information can be used in step 140b to plan precisely that execution.

[0053] Within box 110, an exemplary detail is shown on how to determine the parallel-executable instruction 42 or transaction 43 starting from a specific first transaction 4.

[0054] According to block 111, instruction 41' of subrange 41 for a read or write access to at least one storage bit 31 of memory 3 may include the following descriptions 42* and 43*: Descriptions 42* and 43* characterize instructions 42 or transactions 43 that can be executed in parallel. For this purpose, the command set for programming the first transaction 4 can be extended as follows: the command set includes instructions for read or write access to storage bit 31, which explicitly allow parallel access via additional instructions 42 or transactions 43.

[0055] According to block 112, a subrange 41 of instructions 42 or transactions 43 that can be executed in parallel can be formed by optimizing the program code of the first transaction 4 (for example, at compile time or at runtime), which initially requires exclusive access to the storage bit 31 used.

[0056] According to block 113, subrange 41 of the first transaction 4 can begin with a read access. According to block 114, this can be a read access that allows for parallel reading via another instruction 42 or transaction 43.

[0057] According to block 115, subrange 41 of the first transaction 4 can also begin with a read access. However, according to block 116, further processing of the read data within subrange 41 is resistant to subsequent modification of the data after the first read, for example, because the data is accessed only once or because the data is temporarily stored in the context of subrange 41. Therefore, according to block 117, during the execution of subrange 41, write access to the storage bit 31 used by the subrange is now also permitted as a parallel-executable instruction 42 or transaction 43.

[0058] According to block 118, subrange 41 can end with a write access. According to block 119, the write access can be replaced by a write access of instruction 42 or transaction 43, which can be executed in parallel, without changing the overall final result obtained at storage bit 31. This causes instruction 42 (or transaction 43) to be executed in parallel with subrange 41.

[0059] As previously explained, substitutability may be time-constrained, and parallel execution in this respect is constrained by the temporal interrelationship 120 with the execution of the subrange 41 of the first transaction 4 (and / or with the execution of other transactions 4'). Several possibilities are schematically indicated within box 120: where the required temporal interrelationship 120 may exist and how the stated boundary conditions may be addressed. Specific instances of the resulting orchestration of transactions are described in... Figure 3 and Figure 4 The outline is shown in the middle.

[0060] According to block 121, the temporal relationship 120 may include: the execution of the parallel-executable instruction 42 or transaction 43 ends before the subsequent read or write access, which is a read or write access to storage bit 31 that is used both as a subrange 41 and as instruction 42 or transaction 43. In other words, once any further processing of the contents of storage bit 31 allows the expectation that the contents will not change, then the contents are also allowed to remain unchanged.

[0061] According to block 122, based on the resource budget allocated to transaction 43, the duration δ necessary for executing the parallel-executable transaction 43 can be determined.

[0062] According to block 123, based on the analysis of the instructions contained in transaction 43, the duration δ necessary for executing the parallel-executable transaction 43 can be determined.

[0063] According to block 124, the number of instructions 42 and / or transactions 43 that can be executed simultaneously with the same subrange 41 can be limited in order to reduce the probability of unplanned delays.

[0064] This is particularly advantageous in relation to block 125, which delays the execution of other transactions 4' so that, despite this, instruction 42 or transaction 43 can still be executed, which would actually be completed too late for 120 due to the time relation.

[0065] Box 125 shows in more detail how, in this case, it is possible to prevent (possibly maliciously and intentionally) the arbitrary delay of the execution of other transactions 4'.

[0066] According to block 126, the execution of other transactions 4' can be assigned a higher priority as the latency Δ increases. Then, according to block 127, it can be continuously checked whether the increased priority meets a pre-given criterion. If so (probability value 1), then other transactions 4' are executed, instead of executing more parallel instructions 42 or transactions 43.

[0067] According to block 129, during the execution of subrange 41 of the first transaction (4), the conditions for the temporal interrelationship 120 can be updated. If subrange 41 performs, for example, a longer iterative computation, then subrange 41 can signal in this way that the computation has converged and that the parallel-executable instruction 42 or transaction 43 should be completed soon.

[0068] According to block 130, based on the boundary conditions regarding the contents of the shared storage bit 31, parallel-executable instructions 42 or transactions 43 can also be characterized. For example, transactions and instructions can mutually provide guarantees regarding their respective desired changes to the contents of storage bit 31.

[0069] Figure 2 A very simplified example of a network 1 with multiple nodes 2 is shown. The memory 3, divided into storage bits 31, is replicated to all nodes 2 and synchronized. Furthermore, several nodes in the node 2 also have processing units 8, which are specifically designed to execute transactions in a particular manner. Storage bits 31 can be, for example, micro-storage units of the memory 3.

[0070] Figure 3 An exemplary arrangement is shown, consisting of a first transaction 4, a transaction 43 that is executable in parallel with a subrange 41 of the first transaction 4, and a subsequent transaction 4'.

[0071] Subscope 41 begins with a read access R to storage bit 31 and ends with a write access W to the same storage bit 31. Descriptions 42* and 43* regarding the permitted parallel accesses to storage bit 31 in this manner are obtained from the corresponding instructions 41'. Specifically, in this invention, read access R allows both other parallel read accesses R and other parallel write accesses W. Furthermore, write accesses W performed within the framework of subscope 41 are also interchangeable. The parallel execution of transaction 43 is therefore permitted in principle: transaction 43 begins with a read access R to storage bit 31 and ends with a write access W to storage bit 31.

[0072] However, boundary condition 120 applies here: the parallel-executable transaction 43 must be completed before subsequent transaction 4' uses read access R to read storage bit 31. Figure 3 In the example shown, the execution duration δ of the parallelizable transaction 43 is precisely matched with the boundary condition 120, so that the subsequent transaction 4' can be executed immediately after the first transaction 4.

[0073] Figure 4 It shows in Figure 3 The examples shown in the diagram are variations of the original. Figure 3 Unlike in the parallel execution scenario, the execution duration δ of transaction 43 is significantly longer here, making it necessary to delay subsequent transaction 4' by a time interval Δ in order to accommodate transaction 43 and satisfy boundary condition 120. However, since the time interval Δ is substantially shorter than the execution duration δ of parallel execution transaction 43, the entire process is completed significantly faster than when transaction 43 would have to be executed between transactions 4 and 4' in a serial run. Figure 4 The layout is visible in the text.

Claims

1. A method (100) for operating a network (1) having multiple nodes (2), wherein the network (1) is configured to implement a distributed and / or replicated memory (3) within the network (1), and to utilize the contents of the memory (3) to execute a transaction (4), wherein, • For at least one subrange (41) of the first transaction (4), the at least one subrange (41) begins with a read access to at least one storage bit (31) of the memory (3) and / or ends with a write access to at least one storage bit (31) of the memory (3), determine (110) a set of instructions (42) and / or transactions (43) that can be executed in parallel, the instructions (42) and / or transactions (43) that can also access the at least one storage bit (31), and despite this, can be executed simultaneously with the subrange (41) of the first transaction (4) without mutual interference; and • At least one of the parallel executable instructions (42) and / or transactions (43) is executed in parallel with the subrange of the first instruction (140a), or the execution is planned (140b).

2. The method (100) according to claim 1, wherein, The instructions (41') of the sub-range (41) of the first transaction (4) contain (111) the following descriptions (42*, 43*) for the read access or for the write access: the descriptions (42*, 43*) characterize the parallel executable instructions (42) and / or transactions (43).

3. The method (100) according to claim 1, wherein, One or more instructions in the first transaction (4) are replaced by substitutes (112), which provide the same result but form a sub-range (41) of the first transaction (4), for which there is at least one instruction (42) and / or transaction (43) that can be executed in parallel.

4. The method (100) according to claim 1, wherein, The sub-range (41) of the first transaction (4) begins with a read access (113), and the set of instructions (42) and / or transactions (43) that can be executed in parallel includes (114) at least one read access.

5. The method (100) according to claim 1, wherein, • The sub-range (41) of the first transaction (4) begins with a read access (115). • If the data being read changes at the storage location (31) during the execution of the subrange (41), it does not preclude (116) the result of further processing of the data being read within the subrange (41), the data being read has been read from the storage location (31), and • The set of instructions (42) and / or transactions (43) that can be executed in parallel includes (117) read access and write access.

6. The method (100) according to claim 1, wherein, • The sub-range (41) of the first transaction (4) ends with a write access (118), and • The set of parallel executable instructions (42) and / or transactions (43) includes (119) at least one write access, which can be replaced by the write access of the subrange (41) without changing the final result obtained by using the two write accesses in total at the storage location (31).

7. The method (100) according to claim 6, wherein, The write access of the subrange (41) includes adding or multiplying the value stored at the storage bit (31) with a pre-given value.

8. The method (100) according to any one of claims 6 to 7, wherein, The parallel executableness of at least one instruction (42) or transaction (43) with the sub-range (41) of the first transaction (4) is additionally constrained by the temporal interrelationship (120) between the execution of the sub-range (41) of the first transaction (4) and / or the execution of other transactions (4').

9. The method (100) according to claim 8, wherein, The temporal interrelationship (120) includes the execution of the parallel executable instruction (42) and / or transaction (43) ending (121) before the next read access or write access, the next read access or write access being a read access or write access to the storage bit (31) changed by the subrange (41) of the first transaction (4) and the parallel executable instruction (42) and / or transaction (43).

10. The method (100) according to claim 8, wherein, Based on the resource budget allocated to the transaction (43), determine (122) the duration (δ) necessary for the execution of the parallel-executable transaction (43), and after the resource budget is consumed, suspend and rerun the transaction (43).

11. The method (100) according to claim 8, wherein, Based on the analysis of the instructions contained in the parallel-executable transaction (43), the duration (δ) necessary for the execution of the transaction (43) is determined (123).

12. The method (100) according to claim 8, wherein, The number of parallel-executable instructions (42) and / or transactions (43) that are executed simultaneously with the sub-range (41) of the first transaction (4) is limited (124) to a pre-given value.

13. The method (100) according to claim 8, wherein, The execution of other transactions (4') is delayed (125) so that the parallel executable instructions (42) and / or transactions (43) can be executed at least partially in parallel with the subrange (41) of the first transaction (4).

14. The method (100) according to claim 13, wherein, The execution of the other transaction (4') is given a higher priority (126) as the delay (Δ) increases, and if the increased priority meets a pre-given criterion (127), the execution of the other transaction (4') is pulled ahead of the execution of the new parallel-executable instruction (42) and / or transaction (43) (128).

15. The method (100) according to claim 8, wherein, During the execution of the sub-range (41) of the first transaction (4), the conditions for the temporal interrelationship (120) are updated (129).

16. The method (100) according to any one of claims 6 to 7, wherein, The parallel-executable instructions (42) and / or transactions (43) are characterized (130) based on at least one other boundary condition, which is a boundary condition for the content of the storage bit (31) changed by the subrange (41) of the first transaction and the parallel-executable instructions (42) and / or transactions (43).

17. A computer program product comprising a computer program having machine-readable instructions that, when executed on one or more computers, cause the one or more computers to perform the method according to any one of claims 1 to 16.

18. A machine-readable data carrier comprising a computer program having machine-readable instructions that, when executed on one or more computers, cause the one or more computers to perform the method according to any one of claims 1 to 16.

19. A computer equipped with a computer program product according to claim 17, and / or equipped with a machine-readable data carrier according to claim 18.

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