Adaptive algorithm operation method and device

Abstract

The present application relates to an algorithm adaptive device, an algorithm adaptive method, a computing engine, a data computing method, an adaptive algorithm computing device and an adaptive algorithm computing method, which can extract the algorithm's topological structure, time flow, control flow and data flow information through its algorithm analysis device, and process these information in detail, and then send the processing results to the computing engine to perform related operations to achieve the algorithm's related operations. The algorithm adaptive device can match reasonable resources for the algorithm to be processed, avoiding the problem of the algorithm execution being affected by the dynamic balance difference during the algorithm operation.

Description

Technical Field

[0001] The present application relates to the technical field of computer equipment, and in particular to an adaptive algorithm method and equipment. Background Art

[0002] When implementing algorithms using traditional computing devices, the processing flow is generally: load instructions, load data, complete calculations, output results, and store data.

[0003] However, in reality, algorithms usually have the characteristics of large data volume, irregular data structure, and large amount of calculation. Moreover, in actual operation, due to the limitations of the area, power consumption, packaging technology, etc. of the computing device, the internal storage unit, internal computing unit, and external storage unit of the computing device cannot completely match the corresponding algorithm one by one. This makes the traditional computing device have the problem of poor dynamic balance algorithm effect when processing algorithms, large data access volume, and insufficient computing power. Summary of the invention

[0004] Based on this, it is necessary to provide an algorithm adaptive device, algorithm adaptive method, calculation engine, data calculation method, adaptive algorithm calculation device and adaptive algorithm calculation method that can achieve high performance in response to the above technical problems.

[0005] An adaptive algorithm operation device comprises an algorithm adaptive device and an operation engine connected to each other, wherein:

[0006] The algorithm adaptive device is used to obtain an algorithm descriptor according to the algorithm, obtain an algorithm executor according to the algorithm descriptor, and send the algorithm executor to the computing engine so that the computing engine performs related operations according to the algorithm executor, wherein the algorithm descriptor includes topological structure information, data flow structure information and calculation flow structure information of the algorithm, and the algorithm executor includes execution state information and execution operation information;

[0007] The computing engine is used to parse the received algorithm execution sub-program, obtain current execution state information and current execution operation information, and perform related operations according to the execution state information and current execution operation information.

[0008] In one of the embodiments, the algorithm adaptation device is specifically used to obtain an algorithm scheduler based on the algorithm descriptor; obtain the number of algorithm executors, execution status information and execution operation information of each of the algorithm executors based on the scheduling status information and function information in the algorithm scheduler; and obtain at least one algorithm executor based on the number of algorithm executors, execution status information and execution operation information of each of the algorithm executors.

[0009] In one embodiment, it further comprises a result analyzer, wherein the result analyzer is connected to the computing engine and the adaptive device.

[0010] The result analyzer is used to analyze whether the calculation result output by the calculation engine is the final result of the algorithm scheduler. If the calculation result is not the final result of the algorithm scheduler, the calculation engine is controlled to execute the step of obtaining the number of algorithm executors, the execution status information and the execution operation information of each algorithm executor according to the scheduling status information and the function information in the algorithm scheduler; and obtaining at least one algorithm executor according to the number of the algorithm executors, the execution status information and the execution operation information of each algorithm executor.

[0011] In one embodiment, the result analyzer is also used to analyze whether the operation result is the final result of the algorithm scheduler if the operation result is the final result of the algorithm descriptor, and terminate the operation if the operation result is the final result of the algorithm descriptor.

[0012] In one of the embodiments, the result analyzer is further used to control the algorithm adaptive device to execute the step of obtaining the algorithm scheduler according to the algorithm descriptor if the operation result is not the final result of the algorithm descriptor.

[0013] In one of the embodiments, the algorithm descriptor also includes control flow structure information; the scheduling device is specifically used to determine the number of the algorithm schedulers according to the topological structure information of the algorithm descriptor, determine the scheduling status information of each of the algorithm schedulers according to the data flow information of the algorithm descriptor, determine the functional information of each of the algorithm schedulers according to the control flow structure information and the computational flow structure information of the algorithm descriptor, and obtain at least one algorithm scheduler according to the number of the algorithm schedulers, the scheduling status information and the functional information of each of the algorithm schedulers.

[0014] In one of the embodiments, the scheduling device is also used to assign scheduling type information to the algorithm scheduling sub-program, and determine the execution type information of the algorithm executor based on the scheduling type information assigned by the algorithm scheduling sub-program, wherein the execution type information is used to determine the hardware resources for the corresponding algorithm executor-related operations.

[0015] In one embodiment, the scheduling device includes an algorithm description sub-parsing component and an algorithm scheduling sub-generating component, wherein:

[0016] The algorithm descriptor parsing component is used to parse the algorithm descriptor, extract the topological structure information of the algorithm, and map the data space distribution of the algorithm to the spatial state table according to the topological structure information of the algorithm;

[0017] Extracting the data flow information of the algorithm, and mapping the data time distribution of the algorithm to the time state table according to the data flow information; extracting the control flow information of the algorithm, and mapping the control process of the algorithm to the control state table according to the control flow information; extracting the operation flow information of the algorithm, and mapping the operation process of the algorithm to the operation state table according to the operation flow information;

[0018] The algorithm scheduler generation component is used to determine the number of generated algorithm schedulers according to the spatial state table; obtain the scheduling state information of the algorithm scheduler according to the time state table; and obtain the functional information of the algorithm scheduler according to the control state table and the operation state table.

[0019] In one embodiment, the scheduling device further comprises an algorithm scheduling sub-analysis component and an algorithm execution sub-generation component, wherein the algorithm scheduling sub-analysis component is connected to the algorithm execution sub-generation component and the algorithm scheduling sub-generation component respectively, wherein:

[0020] The algorithm scheduling sub-analysis component is used to perform data dependency judgment according to the scheduling state and function information of the algorithm scheduling sub-, and add dependency mapping information to the corresponding algorithm scheduling sub- according to the result of the data dependency judgment;

[0021] The algorithm scheduler generating component is used to parse the algorithm scheduler with dependency mapping information added, obtain function information and dependency mapping information, and generate at least one algorithm executor according to the function information and dependency mapping information.

[0022] In one of the embodiments, the algorithm scheduling sub-analysis component is further used to send the algorithm scheduling sub-components without dependencies to different algorithm execution sub-generation components according to the result of data dependency judgment.

[0023] In one of the embodiments, the algorithm scheduler generating component is further used to update the information in the spatial state table, the temporal state table, the control state table and the operation state table after each algorithm scheduler is scheduled.

[0024] In one of the embodiments, the scheduling status information includes a waiting scheduling status, a scheduling cycle status or a scheduling end status, and the time status table contains the scheduling times of each of the algorithm schedulers; the algorithm scheduler generation component is used to update the scheduling status information of each of the algorithm schedulers according to the scheduling times of each of the algorithm schedulers in the time status table.

[0025] In one of the embodiments, the algorithm scheduler generating component is used to set the scheduling status information of a certain algorithm scheduler to waiting for scheduling if the algorithm scheduler is waiting for updating function information; to set the scheduling status information of a certain algorithm scheduler to scheduling cycle if the algorithm scheduler is in a scheduled state and the number of scheduling times in the scheduling status information does not reach a preset threshold; and to set the scheduling status information of the certain algorithm scheduler to scheduling end if the number of scheduling times in the scheduling status information of the certain algorithm scheduler reaches the preset threshold.

[0026] In one embodiment, the computing engine comprises an analyzing device, a control device and a computing device connected in sequence, wherein:

[0027] The parsing device is used to parse the received algorithm execution sub-program to obtain current execution state information and current execution operation information;

[0028] The control device is used to control the computing device to enter a start state, a cycle state or an end state according to the current execution state information, and then control the computing device to perform related operations according to the current execution operation information;

[0029] The computing device is used to perform the related computing in the entered state.

[0030] In one embodiment, the computing engine is also used to update the execution state information of the algorithm executor after completing the operations to be performed in the current state, and determine the next state entered by the computing device, wherein the next state is one of a start state, a loop state or an end state.

[0031] In one embodiment, the control device is further configured to control the computing device to output a computing result if all execution status information of the algorithm executors has been updated.

[0032] In one embodiment, the control device is specifically used for:

[0033] If the computing device is controlled to enter a start state according to the current execution state information, the computing device is controlled to perform an operation of the start state, wherein the operation of the start state includes initializing one or more of computing resources, I / O resources, or control resources;

[0034] If the computing device is controlled to enter a loop state according to the current execution state information, the computing device is controlled to execute operations in the loop state, wherein the operations in the loop state include executing one or more of the computing operations, I / O operations or control operations in the loop state in parallel;

[0035] If the computing device is controlled to enter an end state according to the current execution state information, the computing device is controlled to execute an operation of the end state, wherein the operation of the end state includes executing one or more of a computing operation, an I / O operation or a control operation in the end state in parallel.

[0036] In one of the embodiments, the operation of the end state further includes: releasing one or more of computing resources, I / O resources or control resources.

[0037] An adaptive algorithm operation method, comprising:

[0038] Obtain an algorithm descriptor according to the algorithm, and obtain an algorithm executor according to the algorithm descriptor, wherein the algorithm descriptor includes topological structure information, data flow structure information, and calculation flow structure information of the algorithm, and the algorithm executor includes execution state information and execution operation information;

[0039] The received algorithm execution sub-program is parsed to obtain current execution state information and current execution operation information, and related operations are performed according to the execution state information and the current execution operation information to obtain a calculation result.

[0040] In one embodiment, obtaining an algorithm descriptor according to the algorithm, and obtaining an algorithm executor according to the algorithm descriptor, comprises:

[0041] Obtaining an algorithm scheduler according to the algorithm descriptor;

[0042] According to the scheduling state information and function information in the algorithm scheduling sub-sub ...

[0043] At least one algorithm executor is obtained according to the number of the algorithm executors, the execution state information of each of the algorithm executors, and the execution operation information.

[0044] In one embodiment, the method further comprises:

[0045] Analyzing whether the operation result is the final result of the algorithm scheduler;

[0046] If the calculation result is not the final result of the algorithm scheduler, then return to execute the step of obtaining the number of algorithm executors, the execution status information and the execution operation information of each algorithm executor according to the scheduling status information and the function information in the algorithm scheduler; and obtaining the step of obtaining at least one algorithm executor according to the number of the algorithm executors, the execution status information and the execution operation information of each algorithm executor.

[0047] In one embodiment, the method further comprises:

[0048] If the operation result is the final result of the algorithm scheduler, then analyze whether the operation result is the final result of the algorithm descriptor; if the operation result is the final result of the algorithm descriptor, terminate the operation.

[0049] In one embodiment, the method further comprises:

[0050] If the operation result is not the final result of the algorithm descriptor, the algorithm adaptive device is controlled to execute the step of obtaining the algorithm scheduler according to the algorithm descriptor.

[0051] In one embodiment, the algorithm descriptor further includes control flow structure information, and obtaining the algorithm scheduler according to the algorithm descriptor includes:

[0052] Determine the number of the algorithm schedulers according to the topological structure information of the algorithm descriptor;

[0053] Determine the scheduling state information of each of the algorithm schedulers according to the data flow information of the algorithm descriptor;

[0054] Determine the function information of each of the algorithm schedulers according to the control flow structure information and the calculation flow structure information of the algorithm descriptor;

[0055] At least one algorithm scheduler is obtained according to the number of the algorithm schedulers, the scheduling state information and the function information of each of the algorithm schedulers.

[0056] In one embodiment, the method further comprises:

[0057] Scheduling type information is allocated to the algorithm scheduling sub-program, and execution type information of the algorithm executor is determined according to the scheduling type information allocated to the algorithm scheduling sub-program, wherein the execution type information is used to determine hardware resources for related operations of the corresponding algorithm executor.

[0058] In one embodiment, the algorithm descriptor also includes control flow structure information.

[0059] The determining the number of the algorithm schedulers according to the topological structure information of the algorithm descriptor includes:

[0060] Parsing the algorithm descriptor, extracting the algorithm's topological structure information from the parsing result, mapping the algorithm's data space distribution to a space state table according to the algorithm's topological structure information; determining the number of generated algorithm schedulers according to the space state table;

[0061] The determining the scheduling state information of each of the algorithm schedulers according to the data flow information of the algorithm descriptor includes:

[0062] Extracting data flow information of the algorithm from the analysis result, and mapping the data time distribution of the algorithm to a time state table according to the data flow information;

[0063] According to the time status table, obtaining the scheduling status information of the algorithm scheduler;

[0064] The determining the function information of each of the algorithm schedulers according to the control flow structure information and the calculation flow structure information of the algorithm descriptor includes:

[0065] Extracting control flow information of the algorithm from the analysis result, and mapping the control process of the algorithm to a control state table according to the control flow information;

[0066] Extracting the algorithm's operation flow information from the analysis result, and mapping the algorithm's operation process to an operation state table according to the operation flow information;

[0067] The function information of the algorithm scheduler is obtained according to the control state table and the operation state table.

[0068] In one embodiment, obtaining the number of algorithm executors, execution status information and execution operation information of each algorithm executor according to the scheduling status information and function information in the algorithm scheduler; obtaining at least one algorithm executor according to the number of algorithm executors, execution status information and execution operation information of each algorithm executor includes:

[0069] Performing data dependency judgment according to the scheduling state and function information of the algorithm scheduler, and adding dependency mapping information to the corresponding algorithm scheduler according to the result of the data dependency judgment;

[0070] The algorithm scheduler with dependency mapping information added thereto is parsed to obtain function information and dependency mapping information, and at least one algorithm executor is generated according to the function information and dependency mapping information.

[0071] In one of the embodiments, the algorithm scheduler generating component is further used to update the information in the spatial state table, the temporal state table, the control state table and the operation state table after each algorithm scheduler is scheduled.

[0072] In one of the embodiments, the scheduling status information includes a waiting scheduling status, a scheduling cycle status or a scheduling end status, and the time status table includes the scheduling times of each of the algorithm schedulers; the method also includes: updating the scheduling status information of each of the algorithm schedulers according to the scheduling times of each of the algorithm schedulers in the time status table.

[0073] In one embodiment, updating the scheduling status information of each of the algorithm schedulers according to the scheduling times of each of the algorithm schedulers in the time status table includes:

[0074] If a certain algorithm scheduler is waiting for updating function information, setting the scheduling state information of the certain algorithm scheduler to waiting for scheduling;

[0075] If a certain algorithm scheduler is in a scheduled state and the number of scheduling times in the scheduling state information does not reach a preset threshold, setting the scheduling state information of the certain algorithm scheduler to a scheduling cycle;

[0076] If the number of scheduling times in the scheduling state information of a certain algorithm scheduler reaches the preset threshold, the scheduling state information of the certain algorithm scheduler is set to be scheduling ended.

[0077] In one embodiment, performing related operations according to the execution state information and the currently executed operation information to obtain operation results includes:

[0078] Entering into one of the start state, loop state or end state is determined according to the current execution state information, and then, in the entered state, related operations are performed according to the current execution operation information.

[0079] In one embodiment, the method further comprises:

[0080] After completing the operations to be performed in the current state, the execution state information of the algorithm executor is updated, and the next state to be entered is determined, wherein the next state is one of a start state, a loop state or an end state.

[0081] In one embodiment, the method further comprises:

[0082] If all execution status information of the algorithm executors is updated, the operation result is output.

[0083] In one embodiment, the performing of related operations according to the currently executed operation information in the entered state includes:

[0084] If the computing device is controlled to enter the start state according to the current execution state information, the computing device is controlled to perform the operation of the start state, wherein the operation of the start state includes initializing one or more of computing resources, I / O resources or control resources;

[0085] If the computing device is controlled to enter a loop state according to the current execution state information, the computing device is controlled to execute operations in the loop state, wherein the operations in the loop state include executing one or more of the computing operations, I / O operations or control operations in the loop state in parallel;

[0086] If the computing device is controlled to enter an end state according to the current execution state information, the computing device is controlled to execute an operation of the end state, wherein the operation of the end state includes executing one or more of a computing operation, an I / O operation or a control operation in the end state in parallel.

[0087] In one of the embodiments, the operation of the end state further includes: releasing one or more of computing resources, I / O resources or control resources.

[0088] The algorithm adaptive device, algorithm adaptive method, computing engine, data computing method, adaptive algorithm computing device and adaptive algorithm computing method can extract the algorithm's topological structure, time flow, control flow and data flow information through its algorithm analysis device, and then obtain the algorithm executor based on the extracted information, which can be executed after being sent to the computing engine to implement the relevant operations of the algorithm. The algorithm adaptive device can match reasonable resources for the algorithm to be processed, avoiding the problem of dynamic balance difference affecting the algorithm execution during the algorithm operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0089] Figure 1 A schematic diagram of the structure of an algorithm self-adaptation device in an embodiment;

[0090] Figure 2 A schematic diagram of the structure of an algorithm adaptive device in another embodiment;

[0091] Figure 3 A schematic diagram of the structure of a computing engine in another embodiment;

[0092] Figure 4 A schematic diagram of the structure of an adaptive algorithm operation device in another embodiment;

[0093] Figure 5 A schematic diagram of a flow chart of an algorithm adaptation method in one embodiment;

[0094] Figure 6 A schematic diagram of a flow chart of detailed steps of step S520 in an embodiment;

[0095] Figure 7 A schematic diagram of a flow chart of a data calculation method in one embodiment;

[0096] Figure 8A schematic diagram of a flow chart of an adaptive algorithm operation method in one embodiment;

[0097] Fig. 9 The figure is a flowchart of an adaptive algorithm operation method in one embodiment. DETAILED DESCRIPTION

[0098] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0099] like Figure 1 FIG. 1 is a schematic diagram of the structure of an algorithm adaptive device 100 proposed in one embodiment of the present application. The algorithm adaptive device 100 comprises: an algorithm analysis device 110 and a scheduling device 120 connected to each other, wherein:

[0100] The algorithm analysis device 110 is used to obtain an algorithm descriptor according to the algorithm, wherein the algorithm descriptor includes topological structure information, data flow structure information and calculation flow structure information of the algorithm. The topological structure information describes the macroscopic composition of the algorithm, which can be the spatial distribution of the data and operations of the algorithm. The data flow structure information describes the time distribution of the data involved in the algorithm calculation. Optionally, the data flow structure information includes but is not limited to the input data flow and the output data flow. Optionally, the calculation flow structure information describes the specific calculation process in which the data of the algorithm participates, which includes but is not limited to addition, subtraction, multiplication, division, etc.

[0101] The scheduling device 120 is used to obtain an algorithm executor according to the algorithm description sub-sub ...

[0102] The algorithm adaptive device in the embodiment of the present application can extract the algorithm's topological structure, time flow, control flow and data flow information through its algorithm analysis device, and then obtain the algorithm executor based on the extracted information, which can be executed after being sent to the computing engine to implement the relevant operations of the algorithm. The algorithm adaptive device can match reasonable resources for the algorithm to be processed to avoid the problem of dynamic balance difference affecting the algorithm execution during the algorithm operation.

[0103] Specifically, the scheduling device 120 is used to determine the number of the algorithm executors according to the topological structure information of the algorithm descriptor; determine the execution status information of each of the algorithm executors according to the data flow structure information in the algorithm descriptor; determine the execution operation information of each of the algorithm executors according to the computational flow structure information in the algorithm descriptor; and obtain at least one algorithm executor according to the number of the algorithm executors, the execution status information of each of the algorithm executors, and the execution operation information.

[0104] Furthermore, the scheduling device 120 is further used to allocate execution type information to the algorithm executor. The execution type of the algorithm executor may be cluster, union or core, and the execution type information is used to determine the information of resources required for the operation of the algorithm executor.

[0105] In one of the optional embodiments, the scheduling device 120 can also be used to obtain an algorithm scheduler according to the algorithm description sub-sub ...

[0106] Furthermore, when the number of scheduling is used as the state parameter for updating the algorithm scheduler, for an algorithm scheduler, the scheduling type of the algorithm scheduler will not change for each scheduling, but the function information of the algorithm scheduler may change. The life cycle of a scheduler may be as follows:

[0107] Waiting for scheduling status--->Scheduling cycle status (update scheduling times, update function information)--->Scheduling end status--->...some subsequent processing...--->Update the scheduler (the previous step before exiting)--->Waiting for scheduling status--->Scheduling cycle status (update scheduling times, update function information)--->Scheduling end status--->.......--->Waiting for scheduling status--->Scheduling cycle status (the scheduling times reach the threshold, and its function information will be reset)--->Scheduling end.

[0108] In one of the optional embodiments, the algorithm descriptor may also include control flow structure information. At this time, the scheduling device 120 may be used to determine the number of the algorithm schedulers according to the topological structure information of the algorithm descriptor, determine the scheduling state information of each of the algorithm schedulers according to the data flow information of the algorithm descriptor, determine the functional information of each of the algorithm schedulers according to the control flow structure information and the calculation flow structure information of the algorithm descriptor, and obtain at least one algorithm scheduler according to the number of the algorithm schedulers, the scheduling state information and the functional information of each of the algorithm schedulers. Among them, the control flow structure information describes the control process of the algorithm, which includes but is not limited to the algorithm's loop, jump, pause and other processes. The functional information of the algorithm scheduler includes the data address (input / output), data shape, I / O information (such as: data transfer in the storage space), operation information (such as: addition, subtraction or a combination of multiple operations), and control information (such as: describing the relationship between these I / O and operation information, that is, the order of related operations).

[0109] Furthermore, the scheduling device 120 is also used to assign scheduling type information to the algorithm scheduling sub-program, and determine the execution type information of the algorithm executor based on the scheduling type information assigned by the algorithm scheduling sub-program, wherein the execution type information is used to determine the hardware resources of the corresponding algorithm executor-related operations.

[0110] like Figure 2 As shown, the scheduling device 120 may include an algorithm description sub-analysis component 121 and an algorithm scheduling sub-generation component 122.

[0111] The algorithm description sub-analysis component 121 is used to parse the algorithm description sub-description, extract the algorithm's topological structure information, and map the algorithm's data space distribution to a spatial state table based on the algorithm's topological structure information. The spatial state table contains the algorithm's spatial distribution information. The algorithm's data flow information is extracted, and the algorithm's data time distribution is mapped to a time state table based on the data flow information. The time state table contains the algorithm's time information. The algorithm's control flow information is extracted, and the algorithm's control process is mapped to a control state table based on the control flow information. The control state table contains the algorithm's control information. The algorithm's operation flow information is extracted, and the algorithm's operation process is mapped to an operation state table based on the operation flow information. The operation state table contains the algorithm's operation information.

[0112] The algorithm scheduler generation component 122 is used to determine the number of generated algorithm schedulers according to the spatial state table; obtain the scheduling state information of the algorithm scheduler according to the time state table; and obtain the functional information of the algorithm scheduler according to the control state table and the operation state table.

[0113] The scheduling device in this embodiment maps different categories of information in the algorithm descriptor to the table entries of the corresponding state table, so that the information describing the algorithm can be processed finely to obtain excellent scheduling results, thereby improving the processing efficiency of the algorithm.

[0114] Further, see Figure 2 The scheduling device 120 also includes an algorithm scheduling sub-analysis component 123 and an algorithm execution sub-generation component 124, and the algorithm scheduling sub-analysis component 123 is respectively connected to the algorithm execution sub-generation component 124 and the algorithm scheduling sub-generation component 122. Among them, the algorithm scheduling sub-analysis component 123 is used to perform data dependency judgment according to the scheduling status and function information of the algorithm scheduling sub, and add dependency mapping information to the corresponding algorithm scheduling sub according to the result of the data dependency judgment. Specifically, the scheduling sub-analysis component 123 performs data dependency judgment according to the scheduling status and function information of the algorithm scheduling sub, updates the dependency lookup table of the algorithm scheduling sub according to the result of the data dependency judgment, and then adds dependency mapping information to each algorithm scheduling sub according to the dependency lookup table.

[0115] The algorithm scheduler generating component 124 is used to parse the algorithm scheduler with dependency mapping information added, obtain function information and dependency mapping information, and generate at least one algorithm executor according to the function information and dependency mapping information.

[0116] Optionally, the algorithm scheduling sub-analysis component 123 is also used to send the algorithm scheduling sub-without dependency to different algorithm execution sub-generation components according to the result of the data dependency judgment. In this way, the algorithm execution sub-generation component can process information with relatively simple data dependency when generating the algorithm execution sub-, thereby reducing the amount of data processing required to ensure the correctness of the algorithm logic and improving the processing efficiency.

[0117] In one of the embodiments, in order to more reasonably utilize resources, when assigning a scheduling type to each algorithm scheduler, the algorithm scheduler analysis component 123 is also used to parse the algorithm scheduler to obtain the scheduling type of the algorithm scheduler, and cache the algorithm scheduler to different queues according to the scheduling type.

[0118] In one of the optional embodiments, the algorithm scheduling sub-generating component 122 is further used to send the algorithm scheduling sub-to the corresponding algorithm scheduling sub-parsing component according to a specific flag bit in the function information of the algorithm scheduling sub-.

[0119] In one of the optional embodiments, since the algorithm information has a timing characteristic when the algorithm is processed by the algorithm adaptive device of the present application, it needs to be processed in sequence. After the algorithm scheduler is obtained, especially the algorithm scheduler containing the scheduling cycle state will be repeatedly scheduled. At different times, the information in the scheduler will change with time. Therefore, the algorithm scheduler generation component 122 of the present application is also used to update the information in the spatial state table, the time state table, the control state table and the operation state table after each algorithm scheduler is scheduled. This embodiment dynamically processes each information according to the algorithm processing progress and effectively utilizes the resource space.

[0120] Optionally, when the time status table contains the scheduling times of each of the algorithm schedulers, the algorithm scheduler generation component 122 can update the scheduling status information of each of the algorithm schedulers according to the scheduling times of each of the algorithm schedulers in the time status table. Specifically, the algorithm scheduler generation component 122 is used to set the scheduling status information of a certain algorithm scheduler to waiting for scheduling if a certain algorithm scheduler is waiting for update function information; set the scheduling status information of a certain algorithm scheduler to scheduling cycle if a certain algorithm scheduler is in a scheduled state and the scheduling times in the scheduling status information does not reach a preset threshold; set the scheduling status information of a certain algorithm scheduler to scheduling end if the scheduling times in the scheduling status information of a certain algorithm scheduler reaches the preset threshold.

[0121] Based on the same inventive concept, Figure 3As shown, the present application also proposes a computing engine 200, which includes a parsing device 210, a control device 220 and a computing device 230 connected in sequence.

[0122] The parsing device 210 is used to parse the received algorithm execution subroutine to obtain current execution state information and current execution operation information.

[0123] The control device 220 is used to control the computing device to enter a start state, a loop state or an end state according to the current execution state information, and then control the computing device to perform related operations according to the current execution operation information. Specifically, if the computing device is controlled to enter a start state according to the current execution state information, the computing device is controlled to perform the operation of the start state, wherein the operation of the start state includes initialization calculation or parallel calculation. If the computing device is controlled to enter a loop state according to the current execution state information, the computing device is controlled to perform the operation of the loop state, wherein the operation of the loop state includes parallel calculation. If the computing device is controlled to enter an end state according to the current execution state information, the computing device is controlled to perform the operation of the end state, wherein the operation of the end state includes parallel calculation.

[0124] The computing device 230 is used to perform the related computing in the computing state.

[0125] Optionally, the control device 220 is also used to update the execution state information of the algorithm executor after completing the operations to be performed in the current state, and determine the next state entered by the computing device, wherein the next state is one of a start state, a loop state or an end state.

[0126] Furthermore, the control device is also used to control the computing device to output a computing result if the execution status information of the algorithm executor is updated.

[0127] The computing engine in this embodiment enters a state according to the algorithm execution subselection. For example, when it is necessary to iteratively execute an operation in the algorithm, it enters a loop state and repeatedly calls resources to perform corresponding operations until all operations in the loop state are completed. This can reduce the data exchange between chips during the algorithm processing process, saving bandwidth resources and improving data processing efficiency.

[0128] Based on the same inventive concept, Figure 4 As shown, the present application also proposes an adaptive algorithm operation device 10, characterized in that it includes an algorithm adaptive device 100 and an operation engine 200 connected to each other. The algorithm adaptive device 100 is used to obtain an algorithm execution sub-program according to the algorithm. The operation engine 200 is used to perform related operations according to the algorithm execution sub-program.

[0129] The structures and uses of the algorithm adaptive device 100 and the operation engine 200 have been described in detail in the above embodiments. Please refer to the relevant embodiments of the algorithm operation engine 200 and the algorithm adaptive device 100 for details, and will not be repeated here.

[0130] Optionally, continue to see Figure 4 , the adaptive algorithm operation device 10 also includes a result analyzer 300, which is connected to the operation engine 200 and the adaptive device 100. The result analyzer 300 is used to analyze whether the operation result is the final result of the algorithm scheduler. If the operation result is not the final result of the algorithm scheduler, the control operation engine 200 executes the steps of obtaining the number of algorithm execution sub-sub ...

[0131] Further, the result analyzer 300 is further configured to analyze whether the operation result is the final result of the algorithm descriptor if the operation result is the final result of the algorithm scheduler, and terminate the operation if the operation result is the final result of the algorithm descriptor. Optionally, the result analyzer 300 may determine whether the operation result is the final result of the algorithm descriptor according to a preset condition or a preset threshold.

[0132] Furthermore, the result analyzer 300 is also used to control the algorithm adaptive device to execute the step of obtaining the algorithm scheduler according to the algorithm descriptor if the operation result is not the final result of the algorithm descriptor.

[0133] The adaptive algorithm operation device in this embodiment can perform adaptive processing on the algorithm in a precise manner and obtain the algorithm operation result efficiently and accurately.

[0134] Based on the same inventive concept, in one embodiment, as Figure 5 As shown, an algorithm adaptation method is also proposed, which is executed by the algorithm adaptation device 100 to perform adaptive processing on the algorithm. The method includes:

[0135] Step S510, obtaining at least one algorithm descriptor according to the algorithm, wherein the algorithm descriptor includes topological structure information, control flow structure information, data flow structure information and computation flow structure information of the algorithm.

[0136] Step S520, obtaining an algorithm executor according to the algorithm descriptor, and sending the algorithm executor to a computing engine, so that the computing engine performs related operations according to the algorithm executor, wherein the algorithm executor includes execution type information, execution status information, and execution operation information.

[0137] The algorithm adaptive method in this embodiment can extract the algorithm's topological structure, time flow, control flow and data flow information through its algorithm analysis device, and then obtain the algorithm executor based on the extracted information, which can be executed after being sent to the computing engine to implement the relevant operations of the algorithm. The algorithm adaptive device can match reasonable resources for the algorithm to be processed to avoid the problem of dynamic balance difference affecting the algorithm execution during the algorithm operation.

[0138] In one of the optional embodiments, the above step S520 may include: determining the number of the algorithm executors according to the topological structure information of the algorithm descriptor; determining the execution state information of each of the algorithm executors according to the data flow structure information in the algorithm descriptor; determining the execution operation information of each of the algorithm executors according to the computational flow structure information in the algorithm descriptor; obtaining at least one algorithm executor according to the number of the algorithm executors, the execution state information of each of the algorithm executors, and the execution operation information. Specifically, performing data dependency judgment according to the scheduling state and functional information of the algorithm scheduler, and adding dependency mapping information to the corresponding algorithm scheduler according to the result of the data dependency judgment; parsing the algorithm scheduler with the added dependency mapping information to obtain functional information and dependency mapping information, and generating at least one algorithm executor according to the functional information and dependency mapping information. Further, the dependency lookup table of the algorithm scheduler may be updated first according to the result of the data dependency judgment, and then the dependency mapping information may be added to each of the algorithm schedulers according to the dependency lookup table. Optionally, the dependency lookup table may record the result of the data dependency judgment.

[0139] Furthermore, the algorithm adaptation method may further include: allocating execution type information to the algorithm executor, wherein the execution type information is used to determine hardware resources for related operations of the corresponding algorithm executor.

[0140] In another alternative embodiment, Figure 6As shown, the above-mentioned step S520 may include: step S521, obtaining an algorithm scheduler according to the algorithm descriptor; step S522, obtaining the number of algorithm executors, execution status information and execution operation information of each of the algorithm executors according to the scheduling status information and function information in the algorithm scheduler; step S523, obtaining at least one algorithm executor according to the number of the algorithm executors, execution status information and execution operation information of each of the algorithm executors.

[0141] Optionally, the algorithm descriptor also includes control flow structure information, in which case step S520 may include: determining the number of the algorithm schedulers based on the topological structure information of the algorithm descriptor; determining the scheduling status information of each of the algorithm schedulers based on the data flow information of the algorithm descriptor; determining the functional information of each of the algorithm schedulers based on the control flow structure information and computational flow structure information of the algorithm descriptor; and obtaining at least one algorithm scheduler based on the number of the algorithm schedulers, the scheduling status information and the functional information of each of the algorithm schedulers.

[0142] In one of the optional embodiments, the above-mentioned algorithm adaptation method may also include: allocating scheduling type information to the algorithm scheduling sub-program, and determining the execution type information of the algorithm executor based on the scheduling type information allocated by the algorithm scheduling sub-program, wherein the execution type information is used to determine the hardware resources for the corresponding algorithm executor-related operations.

[0143] In one of the optional embodiments, the algorithm descriptor also includes control flow structure information, and step S520 may include: parsing the algorithm descriptor; extracting the topological structure information of the algorithm, and mapping the data space distribution of the algorithm to the spatial state table according to the topological structure information of the algorithm; extracting the data flow information of the algorithm, and mapping the data time distribution of the algorithm to the time state table according to the data flow information; extracting the control flow information of the algorithm, and mapping the control process of the algorithm to the control state table according to the control flow information; extracting the operation flow information of the algorithm, and mapping the operation process of the algorithm to the operation state table according to the operation flow information; the algorithm scheduler generation component is used to determine the number of algorithm schedulers to be generated according to the spatial state table; obtain the scheduling state information of the algorithm scheduler according to the time state table; obtain the functional information of the algorithm scheduler according to the control state table and the operation state table.

[0144] In one embodiment, after parsing the algorithm scheduler, the algorithm adaptation method may further include: obtaining the scheduling type of the algorithm scheduler according to the parsing result of the algorithm scheduler; and caching the algorithm scheduler into different queues according to the scheduling type. Since different scheduling types correspond to different resource requirements, caching the algorithm schedulers of different scheduling types into queues is conducive to the reasonable allocation of resources.

[0145] In one of the embodiments, the algorithm adaptation method may further include: sending the algorithm scheduler to the corresponding algorithm scheduler parsing component according to a specific flag bit in the function information of the algorithm scheduler.

[0146] In one of the embodiments, the algorithm adaptation method may further include: updating information in the spatial state table, the temporal state table, the control state table and the operation state table after each algorithm scheduler is scheduled.

[0147] In one of the embodiments, when the time status table includes the scheduling times of each of the algorithm schedulers, the algorithm adaptation method may further include: updating the scheduling status information of each of the algorithm schedulers according to the scheduling times of each of the algorithm schedulers in the time status table.

[0148] Specifically, if a certain algorithm scheduler is waiting for updating function information, the scheduling status information of the certain algorithm scheduler is waiting for scheduling; if a certain algorithm scheduler is in a scheduled state and the number of scheduling times in the scheduling status information does not reach a preset threshold, the scheduling status information of the certain algorithm scheduler is set to a scheduling cycle; if the number of scheduling times in the scheduling status information of a certain algorithm scheduler reaches the preset threshold, the scheduling status information of the certain algorithm scheduler is set to scheduling end.

[0149] For the specific execution components of each step of the algorithm adaptation method, please refer to the definition of the algorithm adaptation device 100 above, which will not be repeated here.

[0150] Based on the same inventive concept, Figure 7 As shown, the present application also proposes a data operation method in one embodiment, and the data operation method is executed by the operation engine 200, including:

[0151] Step S610: Parse the received algorithm execution unit to obtain the current execution status information and the current execution operation information. Among them, the algorithm execution unit includes the execution status information and the execution operation information. Optionally, the algorithm execution unit may further include execution type information. The algorithm execution unit can be obtained through the algorithm adaptation method in any of the above embodiments. The specific acquisition process can refer to the specific descriptions of the algorithm adaptation device 100 and the algorithm adaptation method in the foregoing text, and will not be elaborated herein.

[0152] Step S620: Determine to enter the start state, loop state, or end state according to the current execution status information; then, perform relevant operations according to the current execution operation information.

[0153] In the data operation method of this embodiment, according to the state selected by the algorithm execution unit to enter, for example, when it is necessary to iteratively execute the operations in the algorithm, enter the loop state, repeatedly call resources to execute the corresponding operations until all operations in the loop state are completed. This can reduce the inter-chip data exchange in the algorithm processing process, saving both bandwidth resources and improving data processing efficiency.

[0154] Optionally, the above data operation method may further include: after completing the operations to be executed in the current state, update the execution status information of the algorithm execution unit, and determine the next state entered by the operation device, where the next state is one of the start state, loop state, or end state.

[0155] Optionally, the above data operation method may further include: if the update of the execution status information of the algorithm execution unit is completed, control the operation device to output the operation result.

[0156] In one of the optional embodiments, step S620 includes: if it is determined to enter the start state according to the current execution status information, control the operation device to execute the operations in the start state, where the operations in the start state include initialization calculation or parallel calculation. If it is determined to enter the loop state according to the current execution status information, control the operation device to execute the operations in the loop state, where the operations in the loop state include parallel calculation. If it is determined to enter the end state according to the current execution status information, control the operation device to execute the operations in the end state, where the operations in the end state include parallel calculation.

[0157] For the specific execution components of each step of the data operation method, reference can be made to the definition of the operation engine 200 in the foregoing text, and will not be elaborated herein.

[0158] Based on the same inventive concept, as Figure 8 shown, in one embodiment of the present application, an adaptive algorithm operation method is further proposed. This method can be executed by the adaptive algorithm operation device 10 and includes:

[0159] Step S500, obtaining the algorithm execution sub-program.

[0160] Specifically, the algorithm adaptive device 100 processes the algorithm to be processed and obtains the algorithm executor. More specifically, at least one algorithm descriptor is obtained according to the algorithm, wherein the algorithm descriptor contains the topological structure information, data flow structure information and calculation flow structure information of the algorithm; the algorithm executor is obtained according to the algorithm descriptor. Specifically, the algorithm adaptive device 100 obtains the algorithm scheduler according to the algorithm descriptor; obtains the number of algorithm executors, the execution state information and the execution operation information of each of the algorithm executors according to the scheduling state information and function information in the algorithm scheduler; obtains at least one algorithm executor according to the number of the algorithm executors, the execution state information and the execution operation information of each of the algorithm executors. Furthermore, the algorithm adaptation device 100 can execute the following steps to obtain the algorithm scheduler: parse the algorithm descriptor; extract the topological structure information of the algorithm, and map the data space distribution of the algorithm to the spatial state table according to the topological structure information of the algorithm; extract the data flow information of the algorithm, and map the data time distribution of the algorithm to the time state table according to the data flow information; extract the control flow information of the algorithm, and map the control process of the algorithm to the control state table according to the control flow information; extract the operation flow information of the algorithm, and map the operation process of the algorithm to the operation state table according to the operation flow information; the algorithm scheduler generation component is used to determine the number of algorithm schedulers to be generated according to the spatial state table; obtain the scheduling state information of the algorithm scheduler according to the time state table; obtain the functional information of the algorithm scheduler according to the control state table and the operation state table.

[0161] The device for acquiring the algorithm executor and the acquisition process have been described in detail in the above embodiments. For details, please refer to the relevant embodiments of the algorithm adaptation device 100 and the algorithm adaptation method, which will not be repeated here.

[0162] Step S600, processing the algorithm execution sub-process to obtain a calculation result.

[0163] Specifically, the calculation engine processes the algorithm executor to obtain the calculation result. More specifically, the received algorithm executor is parsed to obtain the current execution state information and the current execution operation information; the calculation device is controlled to enter the start state, loop state or end state according to the current execution state information, and then the calculation device is controlled to perform related operations according to the current execution operation information to obtain the calculation result. Further, after completing the operation to be performed in the current state, the calculation engine will update the execution state information of the algorithm executor and determine the next state to enter, wherein the next state is one of the start state, loop state or end state. Furthermore, the calculation engine will output the calculation result after the execution state information of the algorithm executor is updated.

[0164] The process of performing data operations based on the algorithm executor has been described in detail in the above embodiments. For details, please refer to the relevant embodiments of the algorithm operation engine 200 and the data operation method, which will not be repeated here.

[0165] For the specific execution components of each step of the adaptive algorithm operation method, please refer to the above definition of the adaptive algorithm operation device 10, which will not be repeated here.

[0166] The adaptive algorithm operation method in this embodiment can accurately and precisely perform adaptive processing on the algorithm and obtain the algorithm operation result efficiently and accurately.

[0167] In one embodiment, if Fig. 9 As shown, the above-mentioned adaptive algorithm operation method may also include:

[0168] Step S710, analyzing whether the operation result is the final result of the algorithm scheduler.

[0169] If the calculation result is not the final result of the algorithm scheduler, return to execution step S522, and obtain the number of algorithm executors, the execution status information and the execution operation information of each of the algorithm executors according to the scheduling status information and the function information in the algorithm scheduler; and obtain at least one algorithm executor according to the number of the algorithm executors, the execution status information and the execution operation information of each of the algorithm executors.

[0170] Please continue to see Figure 8 In one embodiment, the adaptive algorithm operation method may further include: if the operation result is the final result of the algorithm scheduler, executing step S720 to analyze whether the operation result is the final result of the algorithm descriptor. If the operation result is the final result of the algorithm descriptor, executing step S730 to terminate the operation.

[0171] Please continue to see Figure 7In one embodiment, the above adaptive algorithm operation method may further include: if the operation result is not the final result of the algorithm descriptor, controlling the algorithm adaptive device to execute step S521, a step of obtaining an algorithm scheduler according to the algorithm descriptor. It should be understood that although Figure 5-9 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 5-9 At least part of the steps may include at least one sub-step or at least one stage. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0172] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0173] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0174] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. An adaptive algorithm operation method, It is characterized in that include: Obtaining an algorithm scheduler according to the algorithm descriptor, wherein the algorithm descriptor includes topological structure information, data flow structure information, calculation flow structure information, and control flow structure information of the algorithm, and the algorithm executor includes execution state information and execution operation information; Parsing the algorithm descriptor, extracting the algorithm's topological structure information from the parsing result, mapping the algorithm's data space distribution to a space state table according to the algorithm's topological structure information; determining the number of generated algorithm schedulers according to the space state table; The determining the scheduling state information of each of the algorithm schedulers according to the data flow information of the algorithm descriptor includes: Extracting data flow information of the algorithm from the analysis result, and mapping the data time distribution of the algorithm to a time state table according to the data flow information; According to the time status table, obtaining the scheduling status information of the algorithm scheduler; The determining the function information of each of the algorithm schedulers according to the control flow structure information and the calculation flow structure information of the algorithm descriptor includes: Extracting control flow information of the algorithm from the analysis result, and mapping the control process of the algorithm to a control state table according to the control flow information; Extracting the algorithm's operation flow information from the analysis result, and mapping the algorithm's operation process to an operation state table according to the operation flow information; According to the control state table and the operation state table, obtaining the function information of the algorithm scheduler; According to the scheduling state information and function information in the algorithm scheduling sub-sub, the number of the algorithm execution sub-subs, the execution state information and the execution operation information of each of the algorithm execution sub-subs are obtained; At least one algorithm executor is obtained according to the number of the algorithm executors, the execution status information of each of the algorithm executors, and the execution operation information; the received algorithm executors are parsed to obtain the current execution status information and the current execution operation information, and related operations are performed according to the execution status information and the current execution operation information to obtain the operation result.

2. The method according to claim 1, It is characterized in that The method further comprises: Analyzing whether the operation result is the final result of the algorithm scheduler; If the calculation result is not the final result of the algorithm scheduler, then return to execute the step of obtaining the number of algorithm executors, the execution status information and the execution operation information of each algorithm executor according to the scheduling status information and the function information in the algorithm scheduler; and obtaining the step of obtaining at least one algorithm executor according to the number of the algorithm executors, the execution status information and the execution operation information of each algorithm executor.

3. The method according to claim 2, It is characterized in that The method further comprises: If the operation result is the final result of the algorithm scheduler, then analyze whether the operation result is the final result of the algorithm descriptor; if the operation result is the final result of the algorithm descriptor, terminate the operation.

4. The method according to claim 3, It is characterized in that The method further comprises: If the operation result is not the final result of the algorithm descriptor, the control algorithm adaptive device executes the step of obtaining the algorithm scheduler according to the algorithm descriptor.

5. The method according to claim 1, It is characterized in that The method further comprises obtaining the number of algorithm executors, the execution state information and the execution operation information of each of the algorithm executors according to the scheduling state information and the function information in the algorithm scheduler; Obtaining at least one algorithm executor according to the number of the algorithm executors, the execution state information of each of the algorithm executors, and the execution operation information, including: Performing data dependency judgment according to the scheduling state and function information of the algorithm scheduler, and adding dependency mapping information to the corresponding algorithm scheduler according to the result of the data dependency judgment; The algorithm scheduler with dependency mapping information added thereto is parsed to obtain function information and dependency mapping information, and at least one algorithm executor is generated according to the function information and dependency mapping information.

6. The method according to claim 5, It is characterized in that The algorithm scheduling sub-generating component is further used to update the information in the spatial state table, the temporal state table, the control state table and the operation state table after each algorithm scheduling sub-is scheduled.

7. The method according to claim 6, It is characterized in that The scheduling status information includes a waiting scheduling status, a scheduling cycle status or a scheduling end status, and the time status table contains the scheduling times of each of the algorithm schedulers; the method also includes: updating the scheduling status information of each of the algorithm schedulers according to the scheduling times of each of the algorithm schedulers in the time status table.

8. The method according to claim 1, It is characterized in that The performing of related operations according to the execution state information and the current execution operation information to obtain operation results includes: Entering into one of the start state, loop state or end state is determined according to the current execution state information, and then, in the entered state, related operations are performed according to the current execution operation information.

9. A computer device, It is characterized in that The device comprises a processor and a memory, wherein the processor executes computer instructions stored in the memory, so that the computer device executes the method according to any one of claims 1 to 8.

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