Display Devices

Abstract

A display device is disclosed, comprising: a substrate; a pixel layer located on the substrate and comprising a plurality of display devices; a packaging component that encapsulates the pixel layer; a light modulation layer located on the packaging component; a functional layer located on the light modulation layer; and a bonding layer positioned between the light modulation layer and the functional layer to bond the light modulation layer and the functional layer, wherein the light modulation layer has openings corresponding to the plurality of display devices, and wherein the bonding layer fills the openings and has a refractive index greater than that of the light modulation layer.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0163976 filed on December 10, 2019, in the Korean Intellectual Property Office (KIPO), the entire contents of which are incorporated herein by reference. Technical Field

[0002] One or more embodiments relate to a display device. Background Art

[0003] As the demand for display devices has grown, the demand for display devices that can be used for various purposes has also increased. In line with this trend, display devices have become larger and thinner, and the demand for display devices that provide accurate and vivid colors while having a large size and a small thickness has also increased. Summary of the invention

[0004] An aspect of one or more embodiments is directed to a display apparatus having improved light extraction efficiency.

[0005] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the disclosed presented embodiments.

[0006] According to one or more embodiments, a display device includes: a substrate; a pixel layer located above the substrate and including a plurality of display devices; a packaging member that encapsulates the pixel layer; a light modulation layer located above the packaging member; a functional layer located above the light modulation layer; and a bonding layer positioned between the light modulation layer and the functional layer to bond the light modulation layer and the functional layer, wherein the light modulation layer has openings corresponding to the plurality of display devices, and wherein the bonding layer fills the openings and has a refractive index greater than that of the light modulation layer.

[0007] The bonding layer may include a bonding film and a plurality of high-refractive particles distributed in the bonding film, and wherein a refractive index of the bonding layer may be equal to or greater than about 1.6.

[0008] The bonding layer may include about 30 wt % to about 60 wt % of the plurality of high-refractive particles, and wherein a refractive index of the bonding layer may be about 1.6 to about 1.8.

[0009] The bonding layer may further include scattering particles distributed in the bonding film, and wherein an average particle diameter of the scattering particles may be larger than an average particle diameter of the plurality of high-refractive particles.

[0010] An inner wall of each of the openings may include an inclined surface, and wherein a thickness of the light modulation layer may be about 1.5 μm to about 2.5 μm.

[0011] The lower end of the inner wall may have a concave shape.

[0012] The display device may further include an input sensing layer located between the encapsulation member and the light modulation layer and including a sensing electrode.

[0013] The sensing electrode may include grid lines forming a grid structure, and wherein the grid lines may be positioned to overlap with the light modulation layer.

[0014] Each of the multiple display devices may include a pixel electrode, an intermediate layer including an emission layer located on the pixel electrode, and a counter electrode located on the intermediate layer, wherein a portion of the light emitted from the emission layer may be totally internally reflected from an interface between an inner wall of a corresponding opening in the opening and a bonding layer.

[0015] The functional layer may include a polarizing layer.

[0016] According to one or more embodiments, a display device includes: a display device for emitting light; a light modulation layer located on the display device and having an opening corresponding to the display device; a bonding layer filling the opening and positioned above the light modulation layer; and a functional layer positioned above the bonding layer and bonded to the light modulation layer via the bonding layer, wherein the light modulation layer has a first refractive index and the bonding layer has a second refractive index greater than the first refractive index, and wherein a portion of the light emitted from the display device can be totally internally reflected from an interface between an inner wall of the opening and the bonding layer.

[0017] The display device may include a pixel electrode, an intermediate layer including an emission layer disposed on the pixel electrode, and a counter electrode on the intermediate layer, and the light modulation layer may be on an insulating layer covering an edge of the pixel electrode.

[0018] The display apparatus may further include an encapsulation member between the display device and the light modulation layer.

[0019] The display device may further include an input sensing layer located between the encapsulation member and the light modulation layer and including a sensing electrode.

[0020] The bonding layer may include a bonding film and a plurality of high-refractive particles distributed in the bonding film.

[0021] The bonding layer may include about 30 wt % to about 60 wt % of the plurality of high-refractive particles.

[0022] The second refractive index of the bonding layer may be about 1.6 to about 1.8.

[0023] The bonding layer may further include scattering particles distributed in the bonding film, and wherein an average particle diameter of the scattering particles may be larger than an average particle diameter of the plurality of high-refractive particles.

[0024] An inner wall of the opening may include an inclined surface, and a thickness of the light modulation layer is about 1.5 μm to about 2.5 μm.

[0025] The lower end of the inner wall may have a concave shape. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other aspects, features and advantages of the disclosed example embodiments will become more apparent through the following description in conjunction with the accompanying drawings, in which:

[0027] Figure 1 is a schematic perspective view of a display device according to an embodiment;

[0028] Figure 2 It is along Figure 1 An example of a schematic cross-sectional view taken along line II' of FIG.

[0029] Figure 3 yes Figure 1 A schematic plan view of a portion of a display device;

[0030] Figure 4A and Figure 4B Each shows Figure 1 A circuit diagram of an example of a pixel of a display device;

[0031] Figure 5 It is schematically shown Figure 1 A partial plan view of an example of a pixel arrangement of a display device;

[0032] Figure 6 It is along Figure 5 An example of a schematic cross-sectional view taken along line II-II';

[0033] Figure 7 It is schematically shown Figure 1 A partial plan view of an example of a light modulation layer of a display device;

[0034] Figure 8 It is along Figure 7 An example of a schematic cross-sectional view taken along line III-III';

[0035] Fig. 9 yes Figure 8 a schematic cross-sectional view of a portion of;

[0036] Fig.10 yes Fig. 9 An enlarged schematic diagram of region A;

[0037] Fig.11 It is along Figure 1 Another example of a schematic cross-sectional view taken along line II' of FIG.

[0038] Fig.12 yes Fig.11 A schematic plan view of an example of an input sensing layer;

[0039] Fig.13 It is along Fig.12 An example of a schematic cross-sectional view taken along line IV-IV' of FIG.

[0040] Fig.14A yes Fig.13 A plan view of the first conductive layer, Fig. 14B yes Fig.13 A plan view of a second conductive layer; and

[0041] Fig.15 It is along Fig. 14B An example of a schematic cross-sectional view taken along line V-V'. DETAILED DESCRIPTION

[0042] Now will refer to embodiment in more detail, the example of embodiment is shown in the accompanying drawings, wherein the same reference numerals represent the same elements from time to time. In this respect, the present embodiment can have different forms, and should not be construed as being limited to the description set forth herein. Therefore, the following description of the embodiment by reference to the accompanying drawings is only used to explain the aspects of this specification. As used herein, the term "and / or" includes any combination and all combinations of one or more of the relevant listed items. Throughout the disclosure, the statement "at least one (kind / person) of a, b and c" refers to only a, only b, only c, both a and b, both a and c, both b and c, all of a, b and c or their variations.

[0043] It will be understood that although the terms "first", "second", etc. may be used herein to describe various components, these components should not be limited by these terms. These terms are only used to distinguish one component from another component.

[0044] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0045] It will also be understood that the terms “comprises,” “including,” and / or variations thereof, when used in this specification, indicate the presence of stated features, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and / or groups thereof.

[0046] Furthermore, when describing embodiments of the present disclosure, the use of “may” means “one or more embodiments of the present disclosure.”

[0047] As used herein, phrases such as "plan view" may refer to a view from the top or from a direction normal to a display area of ​​a display device.

[0048] It will also be understood that the terms “comprises,” “comprising,” and / or variations thereof as used herein specify the presence of stated features or components, but do not preclude the presence or addition of one or more other features or components.

[0049] For ease of description, spatially relative terms such as "under," "beneath," "down," "above," "up," "bottom," "top," etc. may be used herein to describe the relationship of one element or feature to another (or other) elements or features as shown in the accompanying drawings. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation other than the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, an element described as "under" or "beneath" other elements or features will subsequently be positioned as "above" or "on" the other elements or features. Thus, the term "under" may encompass both above and below orientations. The device may be otherwise positioned (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0050] As used herein, the terms "substantially," "about," and similar terms are used as terms of approximation rather than terms of degree, and are intended to account for the inherent variations in measurements or calculations that those of ordinary skill in the art would recognize.

[0051] Any numerical range listed here is intended to include all sub-ranges of the same numerical precision contained in the listed range. For example, the range "1.0 to 10.0" is intended to include all sub-ranges between the listed minimum value 1.0 and the listed maximum value 10.0 (and including the listed minimum value 1.0 and the listed maximum value 10.0), that is, having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as 2.4 to 7.6. Any maximum numerical limit listed here is intended to include all lower numerical limits contained therein, and any minimum numerical limit listed in this specification is intended to include all higher numerical limits contained therein. Therefore, the applicant reserves the right to modify this specification (including claims) to explicitly list any sub-ranges contained in the range explicitly listed here.

[0052] It will be understood that when a layer, region or component is referred to as being “formed on” another layer, region or component, the layer, region or component may be directly or indirectly formed on the other layer, region or component. That is, intervening layers, regions or components may be present.

[0053] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an idealized or overly formal sense, unless explicitly defined as such herein.

[0054] For the convenience of explanation, the size of the elements in the drawings may be exaggerated. In other words, since the size and thickness of the components in the drawings are arbitrarily shown for the convenience of explanation, the following embodiments are not limited thereto.

[0055] Hereinafter, the disclosed embodiments are described in more detail with reference to the accompanying drawings, and elements that are the same or correspond to each other are denoted by using the same reference numerals in the drawings.

[0056] Figure 1 is a schematic perspective view of a display device 1 according to an embodiment, Figure 2 It is along Figure 1 A schematic cross-sectional view of an example of a portion taken along line II'.

[0057] Reference Figure 1 , the display device 1 according to one or more embodiments may include a display area DA and a peripheral area PA. The peripheral area PA may be arranged outside the display area DA to surround the display area DA. Various wirings and drive circuit parts for transmitting electrical signals to be applied to the display area DA may be arranged in the peripheral area PA. The display device 1 may provide a certain image or a set image by using light emitted from a plurality of pixels arranged in the display area DA. In one or more embodiments, the display device 1 may be bent by including a bending area in the area of ​​the peripheral area PA.

[0058] The display device 1 may include a display such as an organic light emitting display, an inorganic light emitting display (inorganic electroluminescent display) and / or a quantum dot light emitting display. In the following, an organic light emitting display is used as an example for description. The display device 1 may be implemented as various electronic devices such as a mobile phone, a notebook computer, a smart watch, etc.

[0059] like Figure 2 As shown in the figure, the display device 1 may include a substrate 100 stacked sequentially in a thickness direction (z direction), a pixel layer PXL above the substrate 100, a packaging component 300 that encapsulates the pixel layer PXL, a light modulation layer 350 on the packaging component 300, a bonding layer 410 on the light modulation layer 350, and a functional layer 420 on the bonding layer 410.

[0060] The substrate 100 may include a glass material and / or a polymer resin. For example, the substrate 100 may include a 2 The substrate 100 may be made of a glass material and / or various materials having flexible or bendable characteristics such as resin and reinforced plastic. In one or more embodiments, the substrate 100 may be bent by including a bending area in the area of ​​the peripheral area PA.

[0061] The pixel layer PXL may be arranged above the substrate 100. The pixel layer PXL may include a display device layer DPL and a pixel circuit layer PCL, the display device layer DPL including a display device arranged for each pixel, and the pixel circuit layer PCL including a pixel circuit and an insulating layer arranged for each pixel. The display device layer DPL may be arranged on an upper layer of the pixel circuit layer PCL, and a plurality of insulating layers may be arranged between the pixel circuit and the display device. Some wiring and insulating layers of the pixel circuit layer PCL may extend onto or into the peripheral area PA.

[0062] The encapsulation member 300 may include a thin film encapsulation layer. The thin film encapsulation layer may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. When the display device 1 includes the substrate 100 including a polymer resin and the encapsulation member 300 including a thin film encapsulation layer (the thin film encapsulation layer includes an inorganic encapsulation layer and an organic encapsulation layer), the display device 1 may have improved flexibility.

[0063] The light modulation layer 350 can modulate the path of light emitted from the display device of the display device layer DPL, and can improve the light extraction efficiency of the display device 1. As described below, the light modulation layer 350 can change the optical path of light emitted from the display device together with the bonding layer 410, thereby improving the light extraction efficiency of the display device 1.

[0064] The bonding layer 410 may bond the functional layer 420 above the encapsulation member 300 with a layer (e.g., the light modulation layer 350) below the functional layer 420. In one or more embodiments, the bonding layer 410 may have a higher refractive index than that of the light modulation layer 350, and thus, the light extraction efficiency of the display device 1 may be improved.

[0065] The functional layer 420 may include a polarizing layer. The polarizing layer may transmit only light that vibrates in the same direction as the direction of the polarization axis among the light emitted from the display device of the display device layer DPL, and may absorb or reflect light that vibrates in other directions (i.e., in a direction different from the direction of the polarization axis). In one or more embodiments, the functional layer 420 may further include an optical film, a window, etc. for reducing reflection of external light.

[0066] Figure 3 yes Figure 1 A schematic plan view of a portion of a display device 1, Figure 4A and Figure 4B Each shows Figure 1 1 is a circuit diagram of an example of a pixel PX of the display device 1.

[0067] Reference Figure 3 , the substrate 100 may include a display area DA and a peripheral area PA. The peripheral area PA may be disposed outside the display area DA and may surround the display area DA.

[0068] A plurality of pixels PX arranged in a predetermined or set pattern in a first direction (x direction, row direction) and a second direction (y direction, column direction) may be provided in the display area DA over the substrate 100 (eg, over the substrate 100 in a thickness direction or z direction).

[0069] The scan driver 1100 supplies a scan signal to each pixel PX, the data driver 1200 supplies a data signal to each pixel PX, and the first voltage ELVDD (see FIG. Figure 4A and Figure 4B ) and the second voltage ELVSS (see Figure 4A and Figure 4B ) may be arranged in the peripheral area PA over the substrate 100. The first voltage ELVDD may be a driving voltage, and the second voltage ELVSS may be a common voltage. A pad portion 140 in which a plurality of signal pads (or "pads") SP connected to the data lines DL are arranged may be positioned in the peripheral area PA over the substrate 100 (e.g., over the substrate 100 in the thickness direction or the z direction).

[0070] The scan driver 1100 may include an oxide semiconductor thin film transistor gate driver circuit (OSG) or an amorphous silicon thin film transistor gate driver circuit (ASG). Figure 3 An example is shown in which the scan driver 1100 is arranged adjacent to one side of the substrate 100. However, according to one or more embodiments, the scan driver 1100 may be arranged adjacent to two opposite sides of the substrate 100 (e.g., two drivers arranged adjacent to two sides facing away from each other in the x direction, respectively).

[0071] Figure 3A chip on film (COF) method is shown, in which the data driver 1200 is arranged on a film 1300 connected (e.g., electrically connected) to a signal pad SP arranged above the substrate 100 (e.g., arranged above the substrate 100 in the thickness direction or the z direction). However, the disclosure is not limited thereto. According to another embodiment, the data driver 1200 may be arranged above the substrate 100 (e.g., directly arranged above the substrate 100) by using a chip on glass (COG) method or a chip on plastic (COP) method. The data driver 1200 may be connected (e.g., electrically connected) to a flexible printed circuit board (FPCB).

[0072] Reference Figure 4A , the pixel PX may include a pixel circuit PC connected to a scan line SL, a data line DL, and a voltage line PL, and a display device (e.g., an organic light emitting diode OLED) connected (e.g., electrically connected) to the pixel circuit PC. The pixel circuit PC may include a transistor (e.g., a first transistor T1 or a second transistor T2) and a capacitor (e.g., a capacitor Cst), and the display device may include an organic light emitting diode OLED.

[0073] The pixel circuit PC may include a first transistor T1, a second transistor T2, and a capacitor Cst. Each pixel PX may emit light (eg, red light, green light, blue light, or white light) through an organic light emitting diode OLED. The first transistor T1 and / or the second transistor T2 may be a thin film transistor.

[0074] The second transistor T2 may be a switching transistor and may be connected to a scan line SL and a data line DL. In response to a scan signal input from the scan line SL, the second transistor T2 may transmit a data signal input from the data line DL to the first transistor T1 (e.g., a gate electrode of the first transistor T1) and the capacitor Cst. The capacitor Cst may be connected to the second transistor T2 and the voltage line PL, and may store a voltage corresponding to a difference between a voltage corresponding to a data signal transmitted from the second transistor T2 according to a switching operation of the second transistor T2 and a first voltage ELVDD supplied to the voltage line PL. In other words, the capacitor Cst may include a first electrode connected to the second transistor T2 and a second electrode connected to the voltage line PL. The second electrode of the capacitor Cst may be connected to the first transistor T1.

[0075] The first transistor T1 may be a driving transistor and may be connected to the voltage line PL and the capacitor Cst. The first transistor T1 may control a driving current I flowing from the voltage line PL to the organic light emitting diode OLED corresponding to a voltage stored in the capacitor Cst. OLED .

[0076] The organic light emitting diode OLED can be based on the driving current IOLED The organic light emitting diode OLED may include a pixel electrode, an opposing electrode, and an emission layer between the pixel electrode and the opposing electrode. The opposing electrode of the organic light emitting diode OLED may receive a second voltage ELVSS.

[0077] exist Figure 4A In the embodiment, it is described that the pixel circuit PC includes two transistors (eg, a first transistor T1 and a second transistor T2) and one capacitor (eg, a capacitor Cst). However, the disclosure is not limited thereto. The number of transistors and the number of capacitors may vary according to the design of the pixel circuit PC.

[0078] As another example, refer to Figure 4B , one pixel PX may include a pixel circuit PC and an organic light emitting diode OLED connected (eg, electrically connected) to the pixel circuit PC, and the pixel circuit PC is connected to signal lines SL, SL-1, SL+1, EL, and DL and a voltage line PL.

[0079] like Figure 4B As shown in FIG. 1 , the pixel circuit PC may include a plurality of transistors T1 to T7 (a driving transistor T1, a switching transistor T2, a compensation transistor T3, a first initialization transistor T4, an operation control transistor T5, an emission control transistor T6, and a second initialization transistor T7) and a storage capacitor Cst. The transistors T1 to T7 and the storage capacitor Cst may be connected to the signal lines SL, SL-1, SL+1, EL, and DL, the first initialization voltage line VL1, the second initialization voltage line VL2, and the voltage line PL.

[0080] The signal lines SL, SL-1, SL+1, EL and DL may include a scan line SL, a previous scan line SL-1, a subsequent scan line SL+1, an emission control line EL and a data line DL, the scan line SL transmits (provides) a scan signal Sn, the previous scan line SL-1 transmits the previous scan signal Sn-1 to the first initialization transistor T4 (for example, the first initialization gate electrode G4 of the first initialization transistor T4), the subsequent scan line SL+1 transmits the scan signal Sn to the second initialization transistor T7 (for example, the second initialization gate electrode G7 of the second initialization transistor T7), the emission control line EL transmits the emission control signal En to the operation control transistor T5 (for example, the operation control gate electrode G5 of the operation control transistor T5) and the emission control transistor T6 (for example, the emission control gate electrode G6 of the emission control transistor T6), and the data line DL crosses the scan line SL and transmits the data signal Dm. The voltage line PL may transmit the first voltage ELVDD to the driving transistor T1 , the first initialization voltage line VL1 may transmit the initialization voltage Vint to the first initialization transistor T4 , and the second initialization voltage line VL2 may transmit the initialization voltage Vint to the second initialization transistor T7 .

[0081] The driving gate electrode G1 of the driving transistor T1 can be connected to the lower electrode CE1 of the storage capacitor Cst, the driving source electrode S1 of the driving transistor T1 can be connected to the voltage line PL through the operation control transistor T5, and the driving drain electrode D1 of the driving transistor T1 can be connected (e.g., electrically connected) to the pixel electrode of the organic light emitting diode OLED through the emission control transistor T6. The driving transistor T1 can receive the data signal Dm according to the switching operation of the switching transistor T2, and drive the driving current I OLED Supply to the organic light emitting diode OLED.

[0082] The switching gate electrode G2 of the switching transistor T2 may be connected to the scan line SL, the switching source electrode S2 of the switching transistor T2 may be connected to the data line DL, the switching drain electrode D2 of the switching transistor T2 may be connected to the driving source electrode S1 of the driving transistor T1, and connected to the voltage line PL through the operation control transistor T5. The switching transistor T2 may be turned on in response to the scan signal Sn transmitted through the scan line SL, and may perform a switching operation of transmitting the data signal Dm transmitted through the data line DL to the driving source electrode S1 of the driving transistor T1.

[0083] The compensation gate electrode G3 of the compensation transistor T3 may be connected to the scan line SL, the compensation source electrode S3 of the compensation transistor T3 may be connected to the driving drain electrode D1 of the driving transistor T1, and connected to the pixel electrode of the organic light emitting diode OLED through the emission control transistor T6, and the compensation drain electrode D3 of the compensation transistor T3 may be connected to the lower electrode CE1 of the storage capacitor Cst, the first initialization drain electrode D4 of the first initialization transistor T4, and the driving gate electrode G1 of the driving transistor T1. The compensation transistor T3 may be turned on in response to the scan signal Sn transmitted through the scan line SL, and may connect (e.g., electrically connect) the driving gate electrode G1 of the driving transistor T1 with the driving drain electrode D1 of the driving transistor T1, thereby making the driving transistor T1 diode-connected.

[0084] The first initialization gate electrode G4 of the first initialization transistor T4 may be connected to the previous scan line SL-1, the first initialization source electrode S4 of the first initialization transistor T4 may be connected to the first initialization voltage line VL1, and the first initialization drain electrode D4 of the first initialization transistor T4 may be connected to the lower electrode CE1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation transistor T3, and the driving gate electrode G1 of the driving transistor T1. The first initialization transistor T4 may be turned on in response to the previous scan signal Sn-1 transmitted through the previous scan line SL-1, and may perform an initialization operation of initializing the voltage of the driving gate electrode G1 of the driving transistor T1 by transmitting the initialization voltage Vint to the driving gate electrode G1 of the driving transistor T1.

[0085] The operation control gate electrode G5 of the operation control transistor T5 can be connected to the emission control line EL, the operation control source electrode S5 of the operation control transistor T5 can be connected to the voltage line PL, and the operation control drain electrode D5 of the operation control transistor T5 can be connected to the driving source electrode S1 of the driving transistor T1 and the switching drain electrode D2 of the switching transistor T2.

[0086] The emission control gate electrode G6 of the emission control transistor T6 can be connected to the emission control line EL, the emission control source electrode S6 of the emission control transistor T6 can be connected to the driving drain electrode D1 of the driving transistor T1 and the compensation source electrode S3 of the compensation transistor T3, and the emission control drain electrode D6 of the emission control transistor T6 can be connected (e.g., electrically connected) to the second initialization source electrode S7 of the second initialization transistor T7 and the pixel electrode of the organic light emitting diode OLED.

[0087] The operation control transistor T5 and the emission control transistor T6 may be synchronously (eg, simultaneously) turned on in response to the emission control signal En transmitted through the emission control line EL to transmit the first voltage ELVDD to the organic light emitting diode OLED.OLED It can flow through an organic light emitting diode OLED.

[0088] The second initialization gate electrode G7 of the second initialization transistor T7 can be connected to the subsequent scan line SL+1, the second initialization source electrode S7 of the second initialization transistor T7 can be connected to the emission control drain electrode D6 of the emission control transistor T6 and the pixel electrode of the organic light emitting diode OLED, and the second initialization drain electrode D7 of the second initialization transistor T7 can be connected to the second initialization voltage line VL2.

[0089] The scan line SL and the subsequent scan line SL+1 are connected to each other (e.g., electrically connected), and thus the same scan signal Sn may be applied to the scan line SL and the subsequent scan line SL+1. Therefore, the second initialization transistor T7 may be turned on in response to the scan signal Sn transmitted through the subsequent scan line SL+1, and may perform an operation of initializing the pixel electrode of the organic light emitting diode OLED.

[0090] The upper electrode CE2 of the storage capacitor Cst may be connected to the voltage line PL, and the common electrode of the organic light emitting diode OLED may be connected to the second voltage ELVSS. Therefore, the organic light emitting diode OLED may receive the driving current I from the driving transistor T1. OLED And can emit light to display images.

[0091] Figure 4B It is shown that the compensation transistor T3 and the first initialization transistor T4 have dual gate electrodes. However, the compensation transistor T3 and the first initialization transistor T4 may have one gate electrode (ie, a single gate electrode).

[0092] Figure 4B The structure of one pixel circuit PC is described. However, a plurality of pixels PX having (e.g., each having) the same pixel circuit PC may be arranged to form a plurality of rows, in which case the first initialization voltage line VL1, the previous scan line SL-1, the second initialization voltage line VL2, and the next scan line SL+1 may be shared by adjacent pixels PX (e.g., adjacent pixels PX among the plurality of pixels PX).

[0093] For example, the first initialization voltage line VL1 and the previous scan line SL-1 can be connected (e.g., electrically connected) to the second initialization transistor of another pixel circuit PC arranged in the second direction (or y direction). Therefore, the previous scan signal applied to the previous scan line SL-1 can be transmitted to the second initialization transistor of the other pixel circuit PC as the subsequent scan signal. Similarly, the second initialization voltage line VL2 and the subsequent scan line SL+1 can be connected (e.g., electrically connected) to the first initialization transistor of the pixel circuit PC arranged in the second direction (or y direction). Figure 3The first initialization transistor of another pixel circuit PC adjacent in the second direction (or y direction) as shown in the figure is used to transmit the previous scanning signal and the initialization voltage.

[0094] Figure 5 yes Figure 1 A schematic partial plan view of an example of a pixel arrangement of the display device 1, Figure 6 It is along Figure 5 A schematic cross-sectional view of an example of a portion taken along line II-II'.

[0095] The plurality of pixels may include a first pixel PX1, a second pixel PX2, and a third pixel PX3. The first pixel PX1, the second pixel PX2, and the third pixel PX3 may be repeatedly arranged in a predetermined or set pattern in the column direction and the row direction. In one or more embodiments, the first pixel PX1 and the third pixel PX3 may be alternately arranged or arranged with each other in the column direction and the row direction, and the second pixel PX2 may be repeatedly arranged or arranged in the column direction and the row direction. Each of the first pixel PX1, the second pixel PX2, and the third pixel PX3 may include a pixel circuit and an organic light emitting diode 200 connected (e.g., electrically connected) to the pixel circuit. The organic light emitting diode 200 of each pixel may be arranged above the pixel circuit (e.g., directly arranged above the pixel circuit) to overlap with the pixel circuit (e.g., overlap with the pixel circuit in the thickness direction or the z direction), or may be offset relative to the pixel circuit and arranged to overlap with the pixel circuit of the pixel in the adjacent row or column (e.g., overlap with the pixel circuit in the thickness direction or the z direction). The pixel arrangement may be an arrangement of the organic light emitting diode 200 included in each of the first to third pixels PX1 to PX3 (first pixel PX1 , second pixel PX2 , and third pixel PX3 ) or an arrangement of the pixel electrode 211 included in the organic light emitting diode 200 .

[0096] In each row R1, R2, etc., the pixel electrode 211 of the first pixel PX1, the pixel electrode 211 of the second pixel PX2, the pixel electrode 211 of the third pixel PX3, and the pixel electrode 211 of the second pixel PX2 may be alternately arranged in a zigzag form to be separated from each other. The pixel electrode 211 of the first pixel PX1 and the pixel electrode 211 of the third pixel PX3 may be arranged to be separated from each other, and may be alternately arranged on a first virtual straight line IL1 along a first direction (or x direction). The pixel electrode 211 of the second pixel PX2 may be offset relative to the pixel electrode 211 of the first pixel PX1 and the pixel electrode 211 of the third pixel PX3 in a direction between the first direction (or x direction) and the second direction (or y direction), and may be repeatedly arranged on a second virtual straight line IL2 along the first direction (or x direction).

[0097] In the first column C1, the pixel electrode 211 of the first pixel PX1 and the pixel electrode 211 of the third pixel PX3 may be alternately arranged on the third virtual straight line IL3 along the second direction (or y direction) to be separated from each other. In the second column C2 adjacent to the first column C1, the pixel electrode 211 of the second pixel PX2 may be repeatedly arranged on the fourth virtual straight line IL4 along the second direction (or y direction) to be separated from each other. In the third column C3 adjacent to the second column C2, the pixel electrode 211 of the third pixel PX3 and the pixel electrode 211 of the first pixel PX1 may be arranged to be separated from each other, and may be alternately arranged on the fifth virtual straight line IL5 along the second direction (or y direction). In one or more embodiments, the pixel electrode 211 of the third pixel PX3 and the pixel electrode 211 of the first pixel PX1 in the third column C3 may be arranged to be opposite to the pixel electrode 211 of the first pixel PX1 and the pixel electrode 211 of the third pixel PX3 in the first column C1. In one or more embodiments, the pixel electrode 211 of the third pixel PX3 in the third column C3 is aligned with the pixel electrode 211 of the first pixel PX1 in the first column C1 along the first virtual straight line IL1, and the pixel electrode 211 of the first pixel PX1 in the third column C3 is aligned with the pixel electrode 211 of the third pixel PX3 in the first column C1 along the sixth virtual straight line IL6.

[0098] The pixel electrode 211 of the first pixel PX1, the pixel electrode 211 of the second pixel PX2, and the pixel electrode 211 of the third pixel PX3 may have different areas (e.g., areas of different sizes). According to one or more embodiments, the pixel electrode 211 of the third pixel PX3 may have an area wider or larger than the area of ​​the pixel electrode 211 of the first pixel PX1 adjacent to the third pixel PX3. In one or more embodiments, the pixel electrode 211 of the third pixel PX3 may have an area wider or larger than the area of ​​the pixel electrode 211 of the second pixel PX2 adjacent to the third pixel PX3. The pixel electrode 211 of the first pixel PX1 may have an area wider or larger than the area of ​​the pixel electrode 211 of the second pixel PX2 adjacent to the first pixel PX1. However, the disclosure is not limited thereto. According to another embodiment, the pixel electrode 211 of the third pixel PX3 may have an area that is the same or substantially the same as the area of ​​the pixel electrode 211 of the first pixel PX1. The pixel electrode 211 may have a polygonal shape (eg, a square shape, an octagonal shape, etc.), a circular shape, an elliptical shape, etc., and the polygon may include a shape having rounded vertices, corners, or sides.

[0099] According to one or more embodiments, the first pixel PX1 may include a red pixel emitting red light, the second pixel PX2 may include a blue pixel emitting blue light, and the third pixel PX3 may include a green pixel emitting green light. However, the disclosure is not limited thereto. According to another embodiment, the first pixel PX1 may include a red pixel, the second pixel PX2 may include a green pixel, and the third pixel PX3 may include a blue pixel.

[0100] The display area DA of the substrate 100 may include a first area A1 and a second area A2 adjacent to the first area A1. The first area A1 may be an area in which the organic light emitting diode 200 of each of the first pixel PX1, the second pixel PX2, and the third pixel PX3 is positioned. The pixel electrode 211 may be arranged in the first area A1, and the area of ​​the first area A1 may be smaller than the area of ​​the pixel electrode 211. Each of the first pixel PX1, the second pixel PX2, and the third pixel PX3 may be positioned in a separate first area A1 among the plurality of first areas A1. The second area A2 may surround the first area A1 and may be an area positioned between the plurality of first areas A1. The third insulating layer 117 may be arranged in the second area A2. The first area A1 may correspond to an area of ​​the pixel electrode 211, which is exposed through the first opening OP1 of the third insulating layer 117, and the second area A2 may correspond to an area between the pixel electrodes 211 in which the third insulating layer 117 is arranged. Therefore, the first area A1 and the second area A2 of the substrate 100 may be understood as the first area A1 and the second area A2 of the pixel PX. As used herein, the first area A1 is defined as an area corresponding to the lower surface of the first opening OP1. Figure 5 When viewed in the plan view shown in FIG. Figure 5 The outline of the lower surface of the first opening OP1 is shown as a solid line and the outline of the pixel electrode 211 is shown as a dotted line.

[0101] Reference Figure 6 , a buffer layer 111 may be disposed over the substrate 100 to prevent or substantially prevent impurities from penetrating into the semiconductor layer 132 of the thin film transistor TFT.

[0102] The substrate 100 may include various materials such as glass materials, metal materials and / or plastic materials. According to one or more embodiments, the substrate 100 may include a flexible substrate. For example, the substrate 100 may include a polymer resin such as polyethersulfone (PES), polyacrylate (PA), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate (PAR), polyimide (PI), polycarbonate (PC) and / or cellulose acetate propionate (CAP).

[0103] The buffer layer 111 may include an inorganic insulating material such as silicon nitride or silicon oxide, and may include a single layer or a multi-layer.

[0104] The thin film transistor TFT, the capacitor Cst, and the organic light emitting diode 200 connected (e.g., electrically connected) to the thin film transistor TFT may be arranged above the substrate 100. The organic light emitting diode 200 connected (e.g., electrically connected) to the thin film transistor TFT may be understood as the thin film transistor TFT being connected (e.g., electrically connected) to the pixel electrode 211. The thin film transistor TFT may include Figure 4A and Figure 4B The first transistor T1.

[0105] The thin film transistor TFT may include a semiconductor layer 132, a gate electrode 134, a source electrode 136S and a drain electrode 136D. The semiconductor layer 132 may include an oxide semiconductor material. The semiconductor layer 132 may include amorphous silicon, polycrystalline silicon and / or an organic semiconductor material. Based on the adhesion to the adjacent layer, the surface smoothness of the layer on which the gate electrode 134 is stacked, the processability, etc., the gate electrode 134 may be formed as a single layer or a multilayer by including, for example, at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W and Cu.

[0106] A gate insulating layer 112 including an inorganic material (such as silicon oxide, silicon nitride, and / or silicon oxynitride) may be disposed between the semiconductor layer 132 and the gate electrode 134. A first interlayer insulating layer 113 and a second interlayer insulating layer 114 including an inorganic material (such as silicon oxide, silicon nitride, and / or silicon oxynitride) may be disposed between the gate electrode 134 and the source electrode 136S and the drain electrode 136D. Each of the source electrode 136S and the drain electrode 136D may be connected (e.g., electrically connected) to the semiconductor layer 132 through contact holes formed in the gate insulating layer 112, the first interlayer insulating layer 113, and the second interlayer insulating layer 114.

[0107] The source electrode 136S and the drain electrode 136D may include a single layer or a multilayer including at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, and Cu.

[0108] The capacitor Cst may include a lower electrode CE1 and an upper electrode CE2 stacked on each other, and a first interlayer insulating layer 113 is located between the lower electrode CE1 and the upper electrode CE2. The capacitor Cst may be stacked with the thin film transistor TFT. However, the disclosure is not limited thereto. According to another embodiment, the capacitor Cst may not be stacked with the thin film transistor TFT. Figure 6It is shown that the gate electrode 134 of the thin film transistor TFT is the lower electrode CE1 of the capacitor Cst. The capacitor Cst may be covered by the second interlayer insulating layer 114.

[0109] The pixel circuit including the thin film transistor TFT and the capacitor Cst may be covered by the first insulating layer 115 and the second insulating layer 116. The first insulating layer 115 and the second insulating layer 116 may be planarized organic insulating layers. The first insulating layer 115 and the second insulating layer 116 may include organic insulating materials such as general polymers (such as polymethyl methacrylate (PMMA) or polystyrene (PS)), polymer derivatives with phenolic groups, acryl polymers, imide polymers, aromatic ether polymers, amide polymers, fluorine polymers, paraxylene polymers, vinyl alcohol polymers and / or blends thereof. According to one or more embodiments, the first insulating layer 115 and the second insulating layer 116 may include PI.

[0110] A display device (eg, an organic light emitting diode 200) may be disposed over the second insulating layer 116. The organic light emitting diode 200 may include a pixel electrode 211, an intermediate layer 231, and an opposing electrode 251.

[0111] The pixel electrode 211 may be disposed on the second insulating layer 116 and may be connected to the thin film transistor TFT through the connection electrode 181 on the first insulating layer 115. Wiring 183 such as a data line DL, a voltage line PL, etc. may be disposed on the first insulating layer 115.

[0112] The pixel electrode 211 may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO) and / or aluminum zinc oxide (AZO). According to another embodiment, the pixel electrode 211 may include a reflective layer, and the reflective layer includes Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr and / or a mixture thereof. According to another embodiment, the pixel electrode 211 may also include a conductive oxide including ITO, IZO, ZnO and / or In above / below the above-mentioned reflective layer. 2 O 3 layer.

[0113] The third insulating layer 117 may be disposed on the second insulating layer 116. The third insulating layer 117 may be a pixel defining layer for defining a pixel by covering an edge of the pixel electrode 211 and having a first opening OP1 to expose a portion of the pixel electrode 211. The first opening OP1 may correspond to the first area A1. The third insulating layer 117 may increase the distance between the edge of the pixel electrode 211 and the counter electrode 251, thereby preventing or substantially preventing an arc (spark) or the like from occurring at the edge of the pixel electrode 211. In other words, a portion of the third insulating layer 117 may be between the edge of the pixel electrode 211 and the counter electrode 251 in the thickness direction (or z direction). The third insulating layer 117 may include an organic material such as PI or hexamethyldisiloxane (HMDSO).

[0114] The intermediate layer 231 may include an emission layer. The emission layer may include a high molecular weight or low molecular weight organic material that emits light of a predetermined or set color. According to one or more embodiments, the intermediate layer 231 may include a first functional layer arranged below the emission layer and / or a second functional layer arranged above the emission layer. The first functional layer and / or the second functional layer may include an integral layer that runs through the plurality of pixel electrodes 211, or may include a layer patterned to correspond to each of the plurality of pixel electrodes 211.

[0115] The first functional layer may include a single layer or multiple layers. For example, when the first functional layer includes a high molecular weight material, the first functional layer may include a hole transport layer (HTL) having a single layer structure, and may include poly-(3,4)-ethylene-dioxythiophene (PEDOT) or polyaniline (PANI). When the first functional layer includes a low molecular weight material, the first functional layer may include a hole injection layer (HIL) and the HTL.

[0116] The second functional layer may not always be provided. For example, when the first functional layer and the emission layer include a high molecular weight material, it is desirable to form the second functional layer so that the organic light emitting diode 200 has excellent characteristics. The second functional layer may include a single layer or multiple layers. The second functional layer may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0117] The counter electrode 251 may be arranged to face the pixel electrode 211, and the intermediate layer 231 is located between the counter electrode 251 and the pixel electrode 211. The counter electrode 251 may include a conductive material having a low work function. For example, the counter electrode 251 may include a (semi) transparent layer containing Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca or an alloy thereof. Optionally, the counter electrode 251 may also include a (semi) transparent layer such as ITO, IZO, ZnO or In above the (semi) transparent layer containing the above materials. 2 O 3 layer.

[0118] The opposing electrode 251 may be disposed over the intermediate layer 231 and the third insulating layer 117. The opposing electrode 251 may be integrally formed to face the plurality of pixel electrodes 211 across the plurality of organic light emitting diodes 200 in the display area DA.

[0119] Figure 7 yes Figure 1 A schematic partial plan view of an example of a light modulation layer 350 of the display device 1, Figure 8 It is along Figure 7 A schematic cross-sectional view of an example of a portion taken along line III-III', Fig. 9 yes Figure 8 A schematic cross-sectional view of a portion of Fig.10 yes Fig. 9 Schematic enlarged view of area A.

[0120] First, refer to Figure 7 and Figure 8 , the thin film encapsulation layer may be arranged above the counter electrode 251 as an encapsulation member 300. The thin film encapsulation layer may protect or substantially protect the organic light emitting diode 200 from external moisture or oxygen. The thin film encapsulation layer may have a multilayer structure. The thin film encapsulation layer may include a first inorganic layer 310, an organic layer 320, and a second inorganic layer 330. When the thin film encapsulation layer includes a multilayer structure, cracks occurring in the thin film encapsulation layer will not be connected between the first inorganic layer 310 and the organic layer 320 and / or between the organic layer 320 and the second inorganic layer 330. Therefore, the path through which external moisture or oxygen penetrates into the display area DA can be prevented, substantially prevented, or minimized. According to another embodiment, the number of organic layers and the number of inorganic layers may be any suitable number, and the organic layers and the inorganic layers may be different in the order in which they are stacked.

[0121] The first inorganic layer 310 may cover the counter electrode 251 and may include at least one inorganic insulating material among aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The first inorganic layer 310 may be formed across or along the structure below it (e.g., the counter electrode 251), and therefore, the upper surface of the first inorganic layer 310 may not be flat.

[0122] The organic layer 320 may cover the first inorganic layer 310 and may have a sufficient thickness (e.g., a sufficient thickness for covering the first inorganic layer 310). The upper surface of the organic layer 320 may be substantially flat throughout the display area DA. The organic layer 320 may include PET, PEN, PC, PI, polyethylene sulfonate, polyoxymethylene, polyarylate, HMDSO, an acryl resin (e.g., polymethyl methacrylate, polyacrylic acid, etc.), or some combination thereof.

[0123] The second inorganic layer 330 may cover the organic layer 320 and may include at least one inorganic insulating material among aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The second inorganic layer 330 may extend to the outside of the organic layer 320 to contact the first inorganic layer 310 in the peripheral area PA so that the organic layer 320 may not be exposed to the outside.

[0124] In the process of forming the thin film encapsulation layer, the structure below the thin film encapsulation layer may be damaged. For example, when forming the first inorganic layer 310, the layer directly below the first inorganic layer 310 may be damaged. Therefore, in order to prevent or substantially prevent the structure below the thin film encapsulation layer from being damaged in the process of forming the thin film encapsulation layer, at least one capping layer and / or at least one protective layer may be arranged between the counter electrode 251 and the thin film encapsulation layer. The protective layer may include an inorganic material.

[0125] The light modulation layer 350 and a functional layer 420 such as a polarization layer may be disposed above the organic light emitting diode 200 (eg, above the encapsulation member 300 ). The functional layer 420 and the light modulation layer 350 may be bonded to each other via a bonding layer 410 .

[0126] The light modulation layer 350 may modulate the path of light emitted from the emission layer of the organic light emitting diode 200. The light modulation layer 350 may change the path of light traveling in a lateral direction (e.g., a direction other than the third direction (or z direction)) from the light emitted from the emission layer of the organic light emitting diode 200, and allow the light to travel in a third direction (or z direction) substantially forward (e.g., vertically or orthogonally to the display area of ​​the display device).

[0127] The light modulation layer 350 may be arranged to correspond to the second area A2 of the substrate 100, and may include a second opening OP2 exposing the uppermost surface of the encapsulation member 300 corresponding to the first area A1 of the substrate 100. Figure 7 As shown in FIG. 1 , the light modulation layer 350 may be formed to have a grid structure by including a plurality of second openings OP2. Figure 7 , the outline of the lower surface of the second opening OP2 is shown as a solid line, and the outline of the lower surface of the first opening OP is shown as a dotted line.

[0128] The second opening OP2 of the light modulation layer 350 may surround the first opening OP1 of the third insulating layer 117 and may overlap the first opening OP1 of the third insulating layer 117. The size of the second opening OP2 of the light modulation layer 350 may be larger than the size of the first opening OP1 of the third insulating layer 117. Figure 7 In the embodiment, the shape of the second opening OP2 is a square. However, the disclosure is not limited thereto. According to another embodiment, the second opening OP2 may have a circular shape, an elliptical shape, or a polygonal shape (such as a triangular shape), etc. The polygon may include rounded edges or curved edges.

[0129] The light modulation layer 350 may have a first refractive index (e.g., a refractive index of about 1.4 to about 1.5). The light modulation layer 350 may include an inorganic material or an organic material having a low refractive index. For example, the inorganic material may include silicon oxide and / or magnesium fluoride, etc. The organic material may include a material selected from acrylic, PI, polyamide, and tris(8-hydroxyquinoline)aluminum (Alq 3 ) is selected from the group consisting of at least one.

[0130] The bonding layer 410 may be positioned between the light modulation layer 350 and the functional layer 420 to bond the light modulation layer 350 and the functional layer 420, and may fill the second opening OP2 of the light modulation layer 350. In one or more embodiments, the bonding layer 410 may be formed as a film at a lower surface of the functional layer 420 before being bonded to the light modulation layer 350 by laminating the substrate 100 having the light modulation layer 350 formed thereon with the functional layer 420.

[0131] The bonding layer 410 may include a bonding film 412 and high refractive particles (i.e., high refractive index particles) 414 distributed in the bonding film 412. The bonding film 412 may include a light-transmitting resin such as acrylic, PI, PC, etc. The high refractive particles 414 may include inorganic particles and / or organic particles. For example, the inorganic particles may include TiO 2 、Al 2 O 3 、SiO 2 、Al 2 TiO 5 and ZrO 2 The organic particles may include at least one of PMMA, PBMA, MS, PS, and LPS. The average size of the high-refractive particles 414 may be equal to or less than several tens of nm (eg, equal to or less than 50 nm).

[0132] The bonding layer 410 may include high-refractive particles 414 and, therefore, may have a second refractive index greater than the first refractive index of the light modulation layer 350. The second refractive index of the bonding layer 410 may be equal to or greater than about 1.6. For example, the second refractive index of the bonding layer 410 may be about 1.6 to about 1.8. According to one or more embodiments, the light modulation layer 350 and the bonding layer 410 may have a refractive index difference of about 0.1 to about 0.3. As described above, because the bonding layer 410 filling the second opening OP2 of the light modulation layer 350 has a refractive index greater than that of the light modulation layer 350, total internal reflection occurs at the interface between the light modulation layer 350 and the bonding layer 410, and therefore, the display device 1 (for example, Figure 1 1 ). The light extraction efficiency of the display device 1 is shown in FIG.

[0133] When the content of the high-refractive particles 414 is less than 30 wt %, the increase in the refractive index of the bonding layer 410 may not be large enough, and thus, it is difficult to improve the display device 1 (eg, Figure 1 1). In contrast, when the content of the high-refractive particles 414 is greater than 60 wt%, the adhesion of the bonding layer 410 is reduced and the modulus of the bonding layer 410 is increased. In particular, when the modulus of the bonding layer 410 is increased, the rigidity of the bonding layer 410 formed in the form of a film below the functional layer 420 is improved, and therefore, when the light modulation layer 350 and the bonding layer 410 are bonded to each other via lamination, the bonding layer 410 is bonded to the lower end C of the light modulation layer 350 (for example, Fig.10 A hole is generated between the lower end C) of the inner wall of the second opening OP2 shown in FIG. 4 and the bonding layer 410. Therefore, the bonding layer 410 may include about 30 wt % to about 60 wt % of the high-refractive particles 414.

[0134] In the following, reference is made to Fig. 9 A display device 1 (eg, Figure 1 Principle of light extraction efficiency of the display device 1) is shown in FIG.

[0135] Reference Fig. 9 , the organic light emitting diode 200 may be disposed above the insulating surface. The insulating surface may be an upper surface of at least one insulating layer above the substrate 100. For example, the insulating surface may be an upper surface of the second insulating layer 116.

[0136] The second width W2 of the lower surface of the second opening OP2 may be greater than the first width W1 of the lower surface of the first opening OP1. Here, the width may be the maximum width of the lower surface. The difference ΔW between the second width W2 and the first width W1 may be different for each pixel. For example, in the third pixel PX3 (e.g., Figure 5In the third pixel PX3 shown in FIG. 1 , the difference ΔW between the second width W2 and the first width W1 may be greater than that of the first pixel PX1 (eg, Figure 5 The difference ΔW between the second width W2 and the first width W1 in the first pixel PX1 shown in FIG. 1 is larger than that in the second pixel PX2 (eg, Figure 5 The difference ΔW between the second width W2 and the first width W1 in the second pixel PX2 shown in FIG. 1 is small. Fig. 9 It is shown that the second width W2 of the second opening OP2 is the same as the width of the pixel electrode 211 . However, the disclosure is not limited thereto. According to another embodiment, the second width W2 of the second opening OP2 may be smaller than the width of the pixel electrode 211 .

[0137] The light emitted from the organic light emitting diode 200 may include light L1 obliquely incident toward the side surface of the light modulation layer 350 and light L3 penetrating the bonding layer 410 and extracted substantially in the third direction (or z direction) without changing the direction.

[0138] Among the light L1 and the light L3, the light L1 incident on the inclined side surface of the light modulation layer 350 may be totally internally reflected by the interface between the bonding layer 410 and the light modulation layer 350, and may have a changed path (e.g., a path in the thickness direction, the third direction, or the z direction indicated by the total internal reflection light L2), and the total internal reflection light L2 may be extracted approximately in the third direction (or the z direction). Therefore, the area of ​​the emission pattern of the pixel, which is generated in the virtual front side, may be increased. That is, due to the total internal reflection at the interface between the light modulation layer 350 having a first refractive index and the bonding layer 410 having a second refractive index greater than the first refractive index, the light extraction efficiency of the front side may be improved. Therefore, the visibility of the front side may be improved. That is, according to one or more disclosed embodiments, because the bonding layer 410 for bonding the functional layer 420 has a second refractive index, an additional high refractive index layer for filling the second opening OP2 of the light modulation layer 350 may not be used, and a coating process, a curing process, etc. for forming the high refractive index layer may be omitted. Therefore, the display device 1 (for example, Figure 1 The structure and manufacturing process of the display device 1) shown in FIG.

[0139] In order for the light L1 incident into the optical modulation layer 350 to be totally internally reflected by the interface between the bonding layer 410 and the optical modulation layer 350, the incident angle of the light L1 incident into the optical modulation layer 350 must be greater than the critical angle. To this end, the side surface of the optical modulation layer 350 may have an inclination θ of about 70°. The optical modulation layer 350 may be formed by patterning a material to form the optical modulation layer 350 over the encapsulation member 300 by using a photolithography process. In order to form the inner wall of the second opening OP2 to have an inclination θ of about 70° after the photolithography process, the optical modulation layer 350 may have a thickness H1 of about 1.5 μm to about 2.5 μm.

[0140] In one or more embodiments, in a state in which the bonding layer 410 is first formed as a film at the lower surface of the functional layer 420, and then the functional layer 420 and the light modulation layer 350 can be bonded to each other by using a lamination process, the bonding layer 410 may be positioned between the functional layer 420 and the light modulation layer 350. In this process, in order for the side surface of the light modulation layer 350 to be generally attached to the bonding layer 410, the lower end C of the inner wall of the second opening OP2 may be rounded to have a shape such as Fig.10 When the point where the side surface of the light modulation layer 350 meets the upper surface of the second inorganic layer 330 has a shape bent at a predetermined or set angle, an empty space may be formed between the light modulation layer 350 and the bonding layer 410 at the lower end C of the inner wall of the second opening OP2. The empty space may be filled with air having a refractive index of 1, and thus, the improvement in light extraction efficiency due to total internal reflection as described above may be deteriorated or reduced.

[0141] Reference Fig. 9 The binding layer 410 may further include scattering particles 416 distributed in the binding film 412 .

[0142] When the organic light emitting diode 200 emits white light, the white properties observed at the front side and the white properties observed at the side surface may be different from each other. In other words, the white observed from the front side may appear to have a hue (e.g., a different color hue) and / or brightness (e.g., a different brightness) at the side surface. White angle dependence (WAD) can be used to evaluate changes in white properties based on the observation angle. The level of change can be evaluated by measuring the amount of change in brightness and the amount of change in color coordinates according to the observation angle of the front side perpendicular to the screen. Light L4 from the light emitted from the organic light emitting diode 200 may be refracted and / or scattered by the scattering particles 416 distributed in the binding film 412, and thus, the display device 1 (e.g., Figure 1 By reducing the viewing angle of the display device 1) shown in FIG. 1 , the difference between the white property observed at the front side and the white property observed at the side surface can be reduced.

[0143] The scattering particles 416 may have a particle size larger than that of the high-refractive particles 414. For example, the average particle diameter of the scattering particles 416 may be about 50 nm to about 1000 nm.

[0144] The scattering particles 416 may include inorganic particles and / or organic particles. The inorganic particles may include silicon dioxide, ZrO 2 、TiO 2 、Al 2 O 3 、In 2 O 3 、ZnO、SnO 2 , Sb 2 O 3 The organic particles may include polystyrene, PMMA, acrylic-styrene copolymer, melamine, PC, etc.

[0145] Fig.11 It is along Figure 1 A schematic cross-sectional view of another example of a portion taken along line II'. Fig.12 yes Fig.11 Schematic plan view of an example of an input sensing layer 500 . Fig.13 It is along Fig.12 A schematic cross-sectional view of an example of a portion taken along line IV-IV'. Fig.14A yes Fig.13 A plan view of the first conductive layer CML1, Fig. 14B yes Fig.13 FIG. 1 is a plan view of the second conductive layer CML2. Fig.15 It is along Fig. 14B Hereinafter, description of components identical to those described above will not be repeated.

[0146] Reference Fig.11 , the display device 1 may include a substrate 100, a pixel layer PXL above the substrate 100, an encapsulation member 300 encapsulating the pixel layer PXL, an input sensing layer 500 on the encapsulation member 300, a light modulation layer 350 on the input sensing layer 500, a bonding layer 410 on the light modulation layer 350, and a functional layer 420 on the bonding layer 410, which are sequentially stacked in a thickness direction (or z direction). That is, Figure 1 compared to, Fig.11 An input sensing layer 500 is also included.

[0147] Reference Fig.12, the input sensing layer 500 may include a base layer BL, the base layer BL including a display area DA and a peripheral area PA. The base layer BL may correspond to the shape of the substrate 100 and may be provided in a shape substantially the same as that of the substrate 100. According to one or more embodiments, the base layer BL may be a second inorganic layer 330 (e.g., as shown in FIG. 1 ) disposed on a portion of the encapsulation member 300 (e.g., the uppermost layer of the encapsulation member 300). Fig.15 According to another embodiment, the base layer BL may be separated from the encapsulation member 300 and include an insulating substrate or an insulating film including an insulating material such as glass, a polymer resin, etc.

[0148] A plurality of sensing electrodes TSE may be arranged in the display area DA. Sensing signal lines connected to the sensing electrodes TSE may be arranged in the peripheral area PA. The sensing electrodes TSE may include a first sensing electrode 510 and a second sensing electrode 520. The sensing signal lines may include a first sensing signal line 550A and a second sensing signal line 550B. That is, the input sensing layer 500 may include a first sensing electrode 510, a first sensing signal line 550A connected to the first sensing electrode 510, a second sensing electrode 520, and a second sensing signal line 550B connected to the second sensing electrode 520. The input sensing layer 500 may sense external inputs by using a mutual capacitance method and / or a self-capacitance method.

[0149] The input sensing layer 500 may include a plurality of conductive layers. Fig.13 The input sensing layer 500 may include a first conductive layer CML1 and a second conductive layer CML2. The first insulating layer 501 may be disposed as a base layer BL between the first conductive layer CML1 and the package member 300, and the second insulating layer 503 (eg, a portion of the second insulating layer 503) may be disposed between the first conductive layer CML1 and the second conductive layer CML2.

[0150] According to one or more embodiments, the first insulating layer 501 and the second insulating layer 503 may include an inorganic insulating layer including, for example, silicon nitride. According to another embodiment, the first insulating layer 501 may be omitted, and the first conductive layer CML1 may be directly positioned above the encapsulation member 300. According to another embodiment, the first insulating layer 501 and the second insulating layer 503 may include an organic insulating layer.

[0151] The first conductive layer CML1 may include Fig.14A The bridge electrode 511 shown in FIG. Fig. 14BAs shown in FIG. 1 , the second conductive layer CML2 may include a first sensing electrode 510, a second sensing electrode 520, and a connecting electrode 521. The first conductive layer CML1 and the second conductive layer CML2 may include a metal. For example, the first conductive layer CML1 and the second conductive layer CML2 may include Mo, Al, Cu, Ti, etc., and may be formed as a multilayer or a single layer including the above materials. According to one or more embodiments, the first conductive layer CML1 and the second conductive layer CML2 may include a multilayer of Ti / Al / Ti.

[0152] The first sensing electrodes 510 may be connected to each other via a bridge electrode 511 formed at a level different from that of the first sensing electrodes 510. In one or more embodiments, the bridge electrode 511 is formed at a level below that of the first sensing electrodes 510. The bridge electrode 511 connecting (e.g., electrically connecting) the first sensing electrodes 510 adjacent to each other may contact the adjacent first sensing electrodes 510 through a contact hole CNT formed in the second insulating layer 503 or formed through the second insulating layer 503. Fig. 14B As shown in FIG. 1 , the second sensing electrodes 520 may be connected to each other via a connection electrode 521 formed on the same layer as the second sensing electrodes 520 .

[0153] Fig.13 , Fig.14A and Fig. 14B An example is shown in which the bridge electrode 511 is positioned below the first sensing electrode 510 and the second sensing electrode 520 . However, the disclosure is not limited thereto. The first conductive layer CML1 may include the first sensing electrode 510 and the second sensing electrode 520 , and the second conductive layer CML2 may include the bridge electrode 511 .

[0154] The first sensing electrodes 510 may be arranged in the second direction (or y direction), and the second sensing electrodes 520 may be arranged in the first direction (or x direction) intersecting the second direction (or y direction). The first sensing electrodes 510 may be connected to each other via the bridging electrodes 511 between the first sensing electrodes 510 adjacent to each other, and may form a first sensing line 510C. The second sensing electrodes 520 arranged in the first direction (or x direction) may be connected to each other via the connecting electrodes 521 between the second sensing electrodes 520 adjacent to each other, and may form a second sensing line 520R. The first sensing line 510C and the second sensing line 520R may cross each other. For example, the first sensing line 510C and the second sensing line 520R may be perpendicular or orthogonal to each other.

[0155] The first sensing lines 510C and the second sensing lines 520R may be arranged in the display area DA, and may be connected to the sensing signal pads TP of the pad part 540 through the first sensing signal lines 550A and the second sensing signal lines 550B formed in the peripheral area PA. The first sensing lines 510C may be connected to the first sensing signal lines 550A, respectively, and the second sensing lines 520R may be connected to the second sensing signal lines 550B, respectively.

[0156] Reference Fig. 14B , the first sensing electrode 510 and the second sensing electrode 520 may have (e.g., each have) a substantially diamond shape. The first sensing electrode 510 may include grid lines GL forming a grid structure, and the grid structure includes a plurality of holes 510H. The holes 510H may be arranged to overlap with the first area A1 of the pixel (e.g., overlap in the thickness direction or the z direction). Similarly, the second sensing electrode 520 may include grid lines GL forming a grid structure, and the grid structure includes a plurality of holes 520H. The holes 520H may be arranged to overlap with the first area A1 of the pixel (e.g., overlap in the thickness direction or the z direction). Each of the holes 510H and 520H may have a different area. The line width of each of the grid lines GL may be several microns.

[0157] Fig.15 A first insulating layer 501 and a second insulating layer 503 over the encapsulation member 300 and a grid line GL on the second insulating layer 503 are shown.

[0158] like Fig.15 As shown in FIG. 1 , the grid lines GL may be arranged to correspond to the second area A2 of the pixels.

[0159] The light modulation layer 350 may be arranged above the second insulating layer 503. The light modulation layer 350 may be arranged to correspond to the second area A2 of the pixel, and may include a second opening OP2 exposing an area corresponding to the first area A1 of the pixel. The light modulation layer 350 may be positioned to overlap the grid line GL. For example, the grid line GL may be positioned above the second insulating layer 503, and the light modulation layer 350 may cover the grid line GL.

[0160] The bonding layer 410 for bonding the light modulation layer 350 with the functional layer 420 (such as a polarization layer, etc.) may be positioned in the second opening OP2 of the light modulation layer 350. The bonding layer 410 may have a second refractive index greater than the first refractive index of the light modulation layer 350. Therefore, light traveling in the side direction of the light modulation layer 350 from the light emitted from the emission layer of the organic light emitting diode 200 may be totally internally reflected by the interface between the light modulation layer 350 and the bonding layer 410, and may have a change in the display device 1 (for example, Figure 1Therefore, the display device 1 (for example, Figure 1 1). The bonding layer 410 may include a bonding film 412 and high-refractive particles 414 distributed in the bonding film 412. Here, as described above, the high-refractive particles 414 may be included in the bonding layer 410 at about 30 wt % to about 60 wt %. In one or more embodiments, the bonding layer 410 may further include scattering particles 416 to reduce the color deviation between the light emitted to the front side of the display device 1 and the light emitted to the lateral side (e.g., the left side surface or the right side surface) of the display device 1.

[0161] According to one or more embodiments, light extraction efficiency of a display device may be improved, and a manufacturing process of the display device may be simplified.

[0162] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for the purpose of limitation. The description of features or aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope defined by the claims and their equivalents.

Claims

1. A display device, comprising: substrate; A pixel layer, located on the substrate, comprising a plurality of display devices and an insulating layer; A packaging component, packaging the pixel layer; A light modulation layer, located on the packaging component; A functional layer, located on the light modulation layer; as well as a bonding layer positioned between the light modulation layer and the functional layer to bond the light modulation layer and the functional layer, The insulating layer has first openings corresponding to the plurality of display devices. The light modulation layer has second openings corresponding to the plurality of display devices. The bonding layer fills the second opening and has a refractive index greater than that of the light modulation layer. wherein the lower end of the inner wall of each of the second openings has a concave shape where the side surface of the light modulation layer meets the upper surface of the packaging member, and The width of the lower surface of each of the second openings is greater than the width of the lower surface of each of the first openings.

2. The display device according to claim 1, wherein: The bonding layer includes a bonding film and a plurality of high refractive index particles distributed in the bonding film, and Wherein, the refractive index of the bonding layer is equal to or greater than 1.

6.

3. The display device according to claim 2, wherein: The bonding layer includes 30 wt % to 60 wt % of the plurality of high refractive index particles, and Wherein, the refractive index of the bonding layer is 1.6 to 1.

8.

4. The display device according to claim 2, wherein: The binding layer further includes scattering particles distributed in the binding film, and The average particle diameter of the scattering particles is larger than the average particle diameter of the plurality of high refractive index particles.

5. The display device according to claim 1, wherein: The inner wall of each of the second openings includes an inclined surface, and Wherein, the thickness of the light modulation layer is 1.5 μm to 2.5 μm. 6 . The display device according to claim 1 , further comprising an input sensing layer located between the encapsulation member and the light modulation layer and comprising a sensing electrode.

7. The display device according to claim 6, wherein: The sensing electrodes include grid lines forming a grid structure, and Wherein, the grid lines are overlapped with the light modulation layer.

8. The display device according to claim 1, wherein: Each of the plurality of display devices includes a pixel electrode, an intermediate layer including an emission layer located on the pixel electrode, and a counter electrode located on the intermediate layer, and Part of the light emitted from the emission layer is totally internally reflected by an interface between the bonding layer and the inner wall of a corresponding second opening among the second openings.

9. The display device according to claim 1, wherein: The functional layer includes a polarizing layer.

10. A display device, comprising: A display device for emitting light; An insulating layer having a first opening corresponding to the display device; A packaging component, packaging the display device; a light modulation layer, located on the packaging component and having a second opening corresponding to the display device; a bonding layer filling the second opening and positioned on the light modulation layer; as well as a functional layer positioned on the bonding layer and bonded to the light modulation layer via the bonding layer, The lower end of the inner wall of the second opening has a concave shape at the point where the side surface of the light modulation layer meets the upper surface of the packaging member. wherein the width of the lower surface of the second opening is greater than the width of the lower surface of the first opening, wherein the light modulation layer has a first refractive index, and the bonding layer has a second refractive index greater than the first refractive index, and Part of the light emitted from the display device is totally internally reflected by an interface between the inner wall of the second opening and the bonding layer.

11. The display device according to claim 10, wherein: The display device includes a pixel electrode, an intermediate layer including an emission layer located on the pixel electrode, and a counter electrode located on the intermediate layer, and Wherein, the light modulation layer is located on the insulating layer covering the edge of the pixel electrode. 12 . The display device according to claim 10 , further comprising an input sensing layer located between the encapsulation member and the light modulation layer and comprising a sensing electrode.

13. The display device according to claim 10, wherein: The bonding layer includes a bonding film and a plurality of high refractive index particles distributed in the bonding film.

14. The display device according to claim 13, wherein: The bonding layer includes 30 wt % to 60 wt % of the plurality of high refractive index particles.

15. The display device according to claim 13, wherein: The second refractive index of the bonding layer is 1.6 to 1.

8.

16. The display device according to claim 13, wherein: The binding layer further includes scattering particles distributed in the binding film, and The average particle diameter of the scattering particles is larger than the average particle diameter of the plurality of high refractive index particles.

17. The display device according to claim 10, wherein: The inner wall of the second opening includes an inclined surface, and Wherein, the thickness of the light modulation layer is 1.5 μm to 2.5 μm.

Images