Array substrate, display panel and display device

Abstract

The present application provides an array substrate, a display panel and a display device. The array substrate includes a substrate, an electrode layer located on the substrate, an insulating layer located on the electrode layer, and a common electrode layer located on the insulating layer. The electrode layer includes a plurality of pixel electrodes, a plurality of data lines and a plurality of auxiliary signal lines, and the auxiliary signal lines are connected to stable electrical signals. A data line or an auxiliary signal line is disposed between two adjacent pixel electrodes. Among the opposite sides of the same pixel electrode, one side is provided with a data line and the other side is provided with an auxiliary signal line. The distance between the pixel electrode and the adjacent data line is greater than the distance between the pixel electrode and the adjacent auxiliary signal line. The common electrode layer includes a plurality of strip electrodes arranged at intervals, and two or more strip electrodes are correspondingly arranged on each pixel electrode; the orthographic projection of the strip electrode on the substrate falls within the orthographic projection of the corresponding pixel electrode on the substrate.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to an array substrate, a display panel, and a display device. Background Art

[0002] ADS (Advanced Super Dimensional Switching) type liquid crystal display panels have advantages such as wide viewing angles and small color deviation, and are the mainstream display panels today.

[0003] The existing ADS type liquid crystal display panels have a relatively high probability of screen flickering, which affects the user experience. Summary of the Invention

[0004] In a first aspect of an embodiment of the present application, an array substrate is provided. The array substrate includes:

[0005] A substrate;

[0006] An electrode layer located on the substrate, the electrode layer including a plurality of pixel electrodes, a plurality of data lines, and a plurality of auxiliary signal lines, the auxiliary signal lines being connected to stable electrical signals; one of the data lines or one of the auxiliary signal lines is disposed between two adjacent pixel electrodes; on opposite sides of the same pixel electrode, one side is provided with the data line and the other side is provided with the auxiliary signal line; the distance between the pixel electrode and the adjacent data line is greater than the distance between the pixel electrode and the adjacent auxiliary signal line;

[0007] An insulating layer located on the electrode layer;

[0008] A common electrode layer located on the insulating layer, the common electrode layer including a plurality of strip electrodes arranged at intervals, and two or more of the strip electrodes are correspondingly disposed on each pixel electrode; the orthographic projection of the strip electrode on the substrate falls within the orthographic projection of the corresponding pixel electrode on the substrate.

[0009] In one embodiment, the common electrode layer further includes a plurality of shielding electrodes, one shielding electrode is correspondingly disposed above each data line, and one shielding electrode is correspondingly disposed above each auxiliary signal line; the edge of the orthographic projection of the data line on the substrate is located inside the edge of the orthographic projection of the shielding electrode corresponding to the data line on the substrate; the edge of the orthographic projection of the auxiliary signal line on the substrate is located inside the edge of the orthographic projection of the shielding electrode corresponding to the auxiliary signal line on the substrate;

[0010] The distance between the edge of the positive projection of the data line on the substrate and the same-side edge of the shielding electrode corresponding to the data line in the positive projection on the substrate is a first distance, and the distance between the edge of the positive projection of the auxiliary signal line on the substrate and the same-side edge of the shielding electrode corresponding to the auxiliary signal line in the positive projection on the substrate is a second distance, and the first distance is greater than the second distance.

[0011] In one embodiment, the first distance is greater than or equal to 3.0 μm.

[0012] In one embodiment, the auxiliary signal line is electrically connected to the common electrode layer.

[0013] In one embodiment, the distance between the pixel electrode and the adjacent data line ranges from 4.5 μm to 5 μm.

[0014] In one embodiment, the distance between the edge of the positive projection of the pixel electrode on the substrate and the edge of the strip electrode disposed above and corresponding to the edge on the same side in the positive projection on the substrate is ≥ 2.9 μm.

[0015] In one embodiment, the ratio of the width of the strip electrode to the distance between two adjacent strip electrodes located above the same pixel electrode ranges from 50% to 60%.

[0016] In one embodiment, the widths of the strip electrodes disposed above the same pixel electrode are the same.

[0017] In one embodiment, the width of the data line is greater than the width of the auxiliary signal line, and the width of the data line is equal to the minimum process size.

[0018] In one embodiment, each of the data lines extends in a first direction, and a plurality of the data lines are arranged in a second direction; the array substrate further includes a plurality of scan lines extending in the second direction and pixel circuits corresponding to the respective pixel electrodes, and the plurality of scan lines are arranged in the first direction; a plurality of pixel electrodes of the electrode layer are arranged in an array in the first direction and the second direction;

[0019] The pixel circuits corresponding to the pixel electrodes located on both sides of the data line and adjacent to the data line are connected to the data line;

[0020] A row of pixel electrodes arranged in the second direction corresponds to two of the scan lines. Among the pixel electrodes arranged in a row in the second direction, the odd-numbered pixel electrodes are connected to the same scan line, and the even-numbered pixel electrodes are connected to the same scan line.

[0021] In a second aspect of the embodiments of the present application, a display panel is provided. The display panel includes the above-described array substrate, a counter substrate located on the array substrate, and a liquid crystal layer located between the array substrate and the counter substrate.

[0022] In a third aspect of the embodiments of the present application, a display device is provided. The display device includes the above-described display panel.

[0023] The main technical effects achieved by the embodiments of the present application are as follows:

[0024] For the array substrate, display panel, and display device provided by the embodiments of the present application, if a stable electrical signal is connected to the auxiliary signal line, the auxiliary signal line has no pulling effect on the adjacent pixel electrodes. Therefore, the distance between the auxiliary signal line and the adjacent pixel electrodes can be set to be relatively small. Furthermore, the size of the pixel electrode in the extending direction perpendicular to the data line can be set to be relatively large. Thus, two or more strip electrodes can be provided above the pixel electrode to increase the capacitance between the pixel electrode and the corresponding strip electrode, reduce the voltage drop of the array substrate, and lower the risk of screen flickering in the display panel where the array substrate is located. When the electric field between the pixel electrode and the corresponding strip electrode increases, the transmittance of the display panel where the array substrate is located can also be increased. Since the distance between the pixel electrode and the adjacent data line is relatively large, the parasitic capacitance between the pixel electrode and the adjacent data line is relatively small, and the signal crosstalk received by the pixel electrode is relatively small, which can ensure the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a partial cross-sectional view of an array substrate provided by an exemplary embodiment of the present application;

[0026] Figure 2 is a partial structural schematic diagram of an array substrate provided by an exemplary embodiment of the present application;

[0027] Figure 3 is a partial structural schematic diagram of an array substrate provided by an exemplary embodiment of the present application;

[0028] Figure 4 is a partial cross-sectional view of a display panel provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0029] Exemplary embodiments will be described in detail herein, and examples thereof are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0030] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The singular forms "a", "the", and "said" used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0031] It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of this application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "when" or "while" or "in response to determining".

[0032] Embodiments of this application provide an array substrate, a display panel, and a display device. The array substrate, the display panel, and the display device in the embodiments of this application will be described in detail below with reference to the accompanying drawings. Without conflict, the features in the following embodiments may be supplemented or combined with each other.

[0033] Embodiments of this application provide an array substrate. Refer to Figures 1 to 3 wherein, the array substrate 100 includes a substrate 10, an electrode layer located on the substrate 10, an insulating layer 20 located on the electrode layer, and a common electrode layer 30 located on the insulating layer 20.

[0034] The electrode layer includes a plurality of pixel electrodes 40, a plurality of data lines 50, and a plurality of auxiliary signal lines 60, and the auxiliary signal lines 60 are connected to stable electrical signals. One of the data lines 50 or one of the auxiliary signal lines 60 is disposed between two adjacent pixel electrodes 40. On opposite sides of the same pixel electrode 40, one side is provided with the data line 50 and the other side is provided with the auxiliary signal line 60. The distance d1 between the pixel electrode 40 and the adjacent data line 50 is greater than the distance d2 between the pixel electrode 40 and the adjacent auxiliary signal line 60.

[0035] The common electrode layer 30 includes a plurality of strip electrodes 31 arranged at intervals, and two or more of the strip electrodes 31 are correspondingly disposed above each pixel electrode 40, and the orthographic projection of the strip electrode 31 on the substrate 10 falls within the orthographic projection of the corresponding pixel electrode 40 on the substrate 10. Figure 1In the illustrated embodiment, two strip electrodes 31 are correspondingly arranged above each pixel electrode 40. In other embodiments, three or more strip electrodes 31 may be correspondingly arranged above the pixel electrode.

[0036] The materials of the pixel electrode 40 and the common electrode layer 30 are both transparent conductive materials, such as indium tin oxide or indium zinc oxide, etc. The material of the insulating layer 20 is a material with a relatively high light transmittance. In the array substrate provided by the embodiment of the present application, when the auxiliary signal line 60 is connected to a stable electrical signal, the auxiliary signal line 60 has no pulling effect on the adjacent pixel electrodes 40. Therefore, the distance between the auxiliary signal line 60 and the adjacent pixel electrodes can be set to be relatively small. Furthermore, the size of the pixel electrode in the extending direction perpendicular to the data line can be set to be relatively large. Thus, two or more strip electrodes can be arranged above the pixel electrode, improving the capacitance between the pixel electrode and the corresponding strip electrode, reducing the voltage drop of the array substrate, and reducing the risk of screen flicker occurring in the display panel where the array substrate is located; the electric field between the pixel electrode and the corresponding strip electrode increases, which can also improve the light transmittance of the display panel where the array substrate is located; the distance between the pixel electrode and the adjacent data line is relatively large, so the parasitic capacitance between the pixel electrode and the adjacent data line is relatively small, and the signal crosstalk received by the pixel electrode is relatively small, ensuring the display effect of the display panel.

[0037] In one embodiment, the array substrate further includes a pixel circuit located on the substrate 10, and the pixel circuit and the pixel electrode 40 can correspond one by one. The pixel circuit is electrically connected to the corresponding pixel electrode.

[0038] The pixel circuit includes a gate electrode, a gate insulating layer located on the gate electrode, a source electrode and a drain electrode located on the gate insulating layer, and an active layer located on the source electrode and the drain electrode. The source electrode and the drain electrode are respectively overlapped with the active layer. The source electrode, the drain electrode, the data line, and the auxiliary signal line can be formed in a single patterning process. The insulating layer covers the source electrode, the drain electrode, the active layer, the data line, the auxiliary signal line, and the pixel electrode.

[0039] Figure 1 In the illustrated embodiment, two strip electrodes 31 are arranged above the same pixel electrode 40. Through experiments, compared with the display panel with one strip electrode 31 arranged above the same pixel electrode 40, when two strip electrodes 31 are arranged above the same pixel electrode 40, the light transmittance of the display panel can be increased by about 5%. It shows that when more strip electrodes are correspondingly arranged above the pixel electrode 40, the light transmittance of the display panel can be effectively improved.

[0040] In one embodiment, the common electrode layer 30 further includes a plurality of shielding electrodes 32. Above each data line 50, one shielding electrode 32 is correspondingly disposed, and above each auxiliary signal line 60, one shielding electrode 32 is correspondingly disposed. The edge of the orthographic projection of the data line 50 on the substrate 10 is located inside the edge of the orthographic projection of the shielding electrode 32 correspondingly disposed above the data line 50 on the substrate 10; the edge of the orthographic projection of the auxiliary signal line 60 on the substrate 10 is located inside the edge of the orthographic projection of the shielding electrode 32 correspondingly disposed above the auxiliary signal line 60 on the substrate 10. With such a setting, the shielding electrode 32 can shield the interference signals generated by the data line 50 and the auxiliary signal line 60, which is beneficial to improving the display effect of the display panel where the array substrate is located.

[0041] In one embodiment, the orthographic projections of the shielding electrodes 32 on the substrate 10 do not overlap with the orthographic projections of the pixel electrodes 40 on the substrate 10. Thus, signal crosstalk between the shielding electrode 32 and the pixel electrode 40 can be avoided.

[0042] In one embodiment, referring to Figure 2 , each data line 50 extends along a first direction, and a plurality of data lines 50 are arranged along a second direction; each auxiliary signal line 60 extends along the first direction, and a plurality of auxiliary signal lines 60 are arranged along the second direction; each strip electrode 31 and each shielding electrode can extend along the first direction.

[0043] In one embodiment, the pixel electrode 40 is an anode and the common electrode layer 30 is a cathode. The common electrode layer 30 may further include a connecting portion, and each strip electrode 31 and each shielding electrode 32 are electrically connected together through the connecting portion.

[0044] In one embodiment, referring again to Figure 1 , the distance d1 between the pixel electrode 40 and the adjacent data line 50 satisfies the following condition: 4.5 μm ≤ d1 ≤ 5 μm. With such a setting, it can be avoided that the distance between the pixel electrode 40 and the adjacent data line 50 is too small, resulting in a large parasitic capacitance between the pixel electrode 40 and the adjacent data line 50, resulting in a large difference in brightness between the sub-pixel where the pixel electrode 40 is located and the adjacent sub-pixel, and the problem of local brightness non-uniformity of the display panel; it can also be avoided that the distance between the pixel electrode 40 and the adjacent data line 50 is too large, resulting in a large distance between adjacent pixel electrodes, which is not conducive to improving the pixel density of the display panel. In some embodiments, the distance d1 between the pixel electrode 40 and the adjacent data line 50 may be 4.5 μm, 4.6 μm, 4.7 μm, 4.8 μm, 4.9 μm, 5 μm, etc.

[0045] In one embodiment, the distance d3 between the edge of the positive projection of the pixel electrode 40 on the substrate 10 and the edge of the positive projection of the strip electrode 31 disposed above and close to the edge on the substrate 10 on the same side is d3≥2.9 μm. With such a setting, it is possible to avoid the electric field between the pixel electrode 40 and the corresponding strip electrode 31 from being affected by adjacent wires or electrodes and changing, which affects the deflection angle of liquid crystal molecules, and further affects the light transmittance of the sub-pixel where the pixel electrode is located, resulting in the problem of uneven local brightness of the display panel where the array substrate is located.

[0046] Due to process limitations, the distance d2 between the pixel electrode 40 and the adjacent auxiliary signal line 60 is d2≥3.5 μm. Among the strip electrodes correspondingly arranged on the same pixel electrode, the distance d4 between two adjacent strip electrodes is d4≥3.4 μm. The widths of the auxiliary signal line 60 and the data line 50 are both greater than or equal to 2.8 μm, and the width of the strip electrode 31 is greater than 2.3 μm.

[0047] In the embodiment of the present application, the stable electrical signal connected to the auxiliary signal line 60 means that during the display of one frame of the picture, the electrical signal connected to the auxiliary signal line 60 is stable and unchanged. In this way, there is no parasitic capacitance between the auxiliary signal line 60 and the adjacent pixel electrode 40, and signal crosstalk to the pixel electrode will not occur.

[0048] In one embodiment, the auxiliary signal line 60 is electrically connected to the common electrode layer 30. During the display of one frame of the picture, the voltage signal received by the common electrode layer 30 is a stable electrical signal. Connecting the auxiliary signal line 60 to the common electrode layer 30 can ensure that the electrical signal connected to the auxiliary signal line 60 is stable. The auxiliary signal line 60 can be electrically connected to the common electrode layer 30 through a via hole provided on the insulating layer 20 in the edge region of the array substrate. In other embodiments, the auxiliary signal line 60 can be grounded.

[0049] In one embodiment, the width of the data line 50 is greater than the width of the auxiliary signal line 60, and the width of the data line 50 is equal to the minimum process dimension. The minimum process dimension refers to the minimum width of the data line 50 when ensuring that the formed data line 50 is continuous without break. The width of the auxiliary signal line 60 can be the limit process dimension, and the limit process dimension refers to the minimum dimension that the process can achieve, but it cannot ensure that the auxiliary signal line 60 is continuous without break. A smaller width of the auxiliary signal line 60 or a break in the auxiliary signal line 60 has basically no impact on the electric field between the strip electrode 31 and the pixel electrode 40. Therefore, the width of the auxiliary signal line 60 can be set to be less than the minimum process dimension. By setting the width of the data line 50 to be greater than the width of the auxiliary signal line 60 and the width of the data line 50 to be equal to the minimum process dimension, the size of the pixel electrode 40 in the second direction can be set to be the largest on the premise of ensuring that the data line 50 is uninterrupted and does not affect the display panel, which is beneficial to arranging more strip electrodes 31 on the pixel electrode 40.

[0050] In some embodiments, the minimum process dimension is 2.8 μm, and the limit process dimension is 2.6 μm.

[0051] In one embodiment, the ratio range of the width of the strip electrode 31 to the distance d5 between two adjacent strip electrodes 31 located above the same pixel electrode 40 is 50% - 60%. Through simulation, when the ratio of the width of the strip electrode 31 to the distance d4 between two adjacent strip electrodes 31 located above the same pixel electrode 40 is within this numerical range, the light transmittance of the display panel where the array substrate is located is relatively large.

[0052] In one embodiment, the distance between the edge of the orthographic projection of the data line 50 on the substrate 10 and the edge of the orthographic projection of the shielding electrode 32 corresponding to the data line 50 on the same side on the substrate 10 is the first distance d5, and the distance between the edge of the orthographic projection of the auxiliary signal line 60 on the substrate 10 and the edge of the orthographic projection of the shielding electrode 32 corresponding to the auxiliary signal line 60 on the same side on the substrate 10 is the second distance d6, and the first distance d5 is greater than the second distance d6. Since the auxiliary signal line 60 is connected to a stable electrical signal and the auxiliary signal line 60 will not exert a pulling effect on adjacent electrodes or wires, the second distance can be set to be smaller, so that the size of the pixel electrode 40 in the second direction can be set to be larger, which is more beneficial to arranging more strip electrodes 31 on the pixel electrode 40; when the first distance is set to be larger, the shielding effect of the shielding electrode 32 on the data line 50 is better, avoiding the formation of parasitic capacitance between the data line 50 and the adjacent pixel electrode 40.

[0053] In one embodiment, the first distance d5 is greater than or equal to 3.0 μm. With such a setting, it can ensure a good shielding effect of the shielding electrode 32 on the data line 50, avoid forming a parasitic capacitance between the data line 50 and the adjacent pixel electrode 40, and reduce the signal crosstalk of the sub-pixels.

[0054] In one embodiment, the second distance d6 is greater than or equal to 2.5 μm.

[0055] In one embodiment, the widths of two or more of the strip electrodes 31 correspondingly arranged above the same pixel electrode 40 are the same. When the process errors are the same during the preparation of the strip electrodes 31, the error ranges of the prepared strip electrodes 31 are the same, the electric field fluctuation degrees between each strip electrode 31 correspondingly arranged above the same pixel electrode 40 and the pixel electrode 40 are close, and the light efficiency degradation degrees are the same, which helps to improve the display effect of the display panel.

[0056] In one embodiment, the widths of the strip electrodes correspondingly arranged above each pixel electrode 40 are all the same. In this way, it can be ensured that the electric field fluctuation degrees between each strip electrode 31 and the corresponding pixel electrode are close, and the light efficiency degradation degrees are the same, which is more helpful to improve the display effect of the display panel.

[0057] Under the conditions that d1≥4.5 μm, d2≥2.9 μm, d3≥3.5 μm, d4≥3.4 μm, the widths of the auxiliary signal line 60 and the data line 50 are both greater than or equal to 2.8 μm, and the width of the strip electrode 31 is greater than 2.3 μm, when the pixel density of the display panel where the array substrate is located reaches more than 330, the size of the pixel electrode 40 in the second direction is less than or equal to 25.6 μm, only one strip electrode 31 can be correspondingly arranged above each pixel electrode 40, the capacitance between the pixel electrode 40 and the strip electrode 31 is too small, the voltage drop of the array substrate is large, and the risk of screen flicker of the display panel where the array substrate is located is large; at the same time, the light transmittance of the display panel where the array substrate is located is low.

[0058] The array substrate provided by the embodiment of the present application realizes arranging two or more strip electrodes above the pixel electrode by setting the distance d1 between the pixel electrode 40 and the adjacent data line 50 to be greater than the distance d2 between the pixel electrode 40 and the adjacent auxiliary signal line 60, and the first distance d5 to be greater than the second distance d6, so as to improve the display effect of the display panel.

[0059] In one embodiment, the distances d1, d2, d3, d4, the first distance d5, and the second distance d6 are all positively correlated with the size of the pixel electrode in the direction perpendicular to the extension direction of the data line. When the size of the pixel electrode in the direction perpendicular to the extension direction of the data line increases, the distances d1, d2, d3, d4, the first distance d5, and the second distance d5 increase accordingly. In one embodiment, the array substrate 100 further includes a plurality of scanning lines extending in the second direction, and the plurality of scanning lines are arranged in the first direction. The plurality of pixel electrodes 40 of the electrode layer are arranged in an array in the first direction and the second direction.

[0060] The pixel circuits corresponding to the pixel electrodes 40 located on both sides of the data line 50 and adjacent to the data line are connected to the data line 50. A plurality of pixel electrodes 40 arranged in the same row in the second direction correspond to two of the scanning lines. Among the plurality of pixel electrodes arranged in the same row in the second direction, the odd-numbered pixel electrodes 40 are connected to the same scanning line, and the even-numbered pixel electrodes 40 are connected to the same scanning line.

[0061] See Figure 2 and Figure 3 , each scanning line 70 of the array substrate 100 extends in the second direction, and the plurality of scanning lines 70 are arranged in the first direction. A row of pixel electrodes 40 arranged in the second direction corresponds to two of the scanning lines 70, and the two scanning lines 70 are located on opposite sides of the row of pixel electrodes. The pixel electrodes 40 are divided into a plurality of first pixel electrode groups 101, 102 arranged in the first direction, and the plurality of pixel electrodes 40 of each first pixel electrode group 101 are arranged in the second direction. The pixel electrodes 40 are also divided into a plurality of second pixel electrode groups 201, 202, 203, 204 arranged in the second direction, and the plurality of pixel electrodes 40 of each second pixel electrode group 102 are arranged in the first direction.

[0062] The first pixel electrode group 101 corresponds to two scanning lines 71, 72. Among them, the pixel circuits 80 corresponding to the odd-numbered pixel electrodes 40 are connected to the scanning line 71, and the pixel circuits 80 corresponding to the even-numbered pixel electrodes 40 are connected to the scanning line 72. The pixel circuits 80 corresponding to the pixel electrodes 40 of the second pixel electrode group 201 and the second pixel electrode group 202 are all connected to the data line 51, and the pixel circuits 80 corresponding to the pixel electrodes of the second pixel electrode group 203 and the second pixel electrode group 204 are all connected to the data line 52. It should be noted that Figure 2 only one thin film transistor is shown in the pixel circuit in the figure. In practice, the pixel circuit may include two or more thin film transistors, and the pixel circuit may also include a capacitor.

[0063] When a scan signal is provided to the scan line 72 and a data signal is provided to the data line 51, the sub-pixel where the pixel electrode 401 is located emits light, and other sub-pixels do not emit light; when a scan signal is provided to the scan line 71 and a data signal is provided to the data line 51, the sub-pixel where the pixel electrode 402 is located emits light, and other sub-pixels do not emit light.

[0064] It can be seen that although the number of data lines in the array substrate provided by the embodiments of the present application is half of the number of the second pixel electrode groups, each first pixel electrode group corresponds to two scan lines, and each pixel can still be individually controlled without affecting the display effect of the display panel.

[0065] In one embodiment, the first direction is the column direction and the second direction is the row direction. In other embodiments, the first direction can be the column direction and the second direction is the row direction.

[0066] The embodiments of the present application also provide a display panel. The display panel includes the array substrate described in any of the above embodiments and a liquid crystal layer located on the array substrate.

[0067] The display panel further includes a counter substrate, and the liquid crystal layer is located between the array substrate and the counter substrate.

[0068] See Figure 4 , in one embodiment, the display panel further includes a color filter layer 90. The color filter layer 90 is located on the counter substrate. The color filter layer 90 includes a patterned black matrix 91 and a color filter substrate 92 located on the black matrix 91. By providing the color filter layer 90, color display of the display panel can be achieved.

[0069] The display panel provided by the embodiments of the present application can be an ADS display panel.

[0070] The embodiments of the present application also provide a display device, and the display device includes the above display panel.

[0071] The display device may further include a housing, and the display panel is embedded in the housing.

[0072] The display device provided by the embodiments of the present application can be, for example, any device with a display function such as a mobile phone, a tablet computer, a television, a notebook computer, a vehicle-mounted device, etc.

[0073] For the method embodiments, since they basically correspond to the product embodiments, the relevant details and descriptions of the beneficial effects can be referred to the part description of the product embodiments, and will not be elaborated here.

[0074] It should be noted that in the accompanying drawings, the dimensions of layers and regions may be exaggerated for clarity of illustration. Also, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element, or intervening layers may be present. Additionally, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element, or more than one intervening layer or element may be present. Further, it will be understood that when a layer or element is referred to as being "between" two layers or two elements, it can be the only layer between the two layers or two elements, or more than one intervening layer or element may also be present. Like reference numerals throughout the specification indicate like elements.

[0075] Those skilled in the art will readily conceive of other embodiments of the present application upon considering the specification and practicing the disclosure herein. The present application is intended to cover any variations, uses, or adaptations of the present application, which follow the general principles of the present application and include known common general knowledge or conventional technical means in the technical field not disclosed herein. The specification and examples are only to be considered as exemplary, and the true scope and spirit of the present application are pointed out by the following claims.

[0076] It should be understood that the present application is not limited to the exact structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the present application is only limited by the appended claims.

Claims

1. An array substrate, characterized in that, The array substrate includes: a substrate; an electrode layer located on the substrate, the electrode layer including a plurality of pixel electrodes, a plurality of data lines, and a plurality of auxiliary signal lines, the auxiliary signal lines being connected to a stable electrical signal; one of the data lines or one of the auxiliary signal lines is disposed between two adjacent pixel electrodes; among the opposite sides of the same pixel electrode, one side is provided with the data line, and the other side is provided with the auxiliary signal line; the distance between the pixel electrode and the adjacent data line is greater than the distance between the pixel electrode and the adjacent auxiliary signal line; an insulating layer located on the electrode layer; a common electrode layer located on the insulating layer, the common electrode layer including a plurality of strip electrodes arranged at intervals, and two or more of the strip electrodes are correspondingly arranged on each pixel electrode; the orthographic projection of the strip electrode on the substrate falls within the orthographic projection of the corresponding pixel electrode on the substrate; the common electrode layer further includes a plurality of shielding electrodes, and one of the shielding electrodes is correspondingly arranged above each data line, and one of the shielding electrodes is correspondingly arranged above each auxiliary signal line; the edge of the orthographic projection of the data line on the substrate is located inside the edge of the orthographic projection of the shielding electrode corresponding to the data line on the substrate; the edge of the orthographic projection of the auxiliary signal line on the substrate is located inside the edge of the orthographic projection of the shielding electrode corresponding to the auxiliary signal line on the substrate; the distance between the edge of the orthographic projection of the data line on the substrate and the same-side edge of the orthographic projection of the shielding electrode corresponding to the data line on the substrate is a first distance, and the distance between the edge of the orthographic projection of the auxiliary signal line on the substrate and the same-side edge of the orthographic projection of the shielding electrode corresponding to the auxiliary signal line on the substrate is a second distance, and the first distance is greater than the second distance; the materials of the pixel electrode and the common electrode layer are both transparent conductive materials.

2. The array substrate according to claim 1, wherein The first distance is greater than or equal to 3.0 μm.

3. The array substrate according to claim 1, wherein The auxiliary signal line is electrically connected to the common electrode layer.

4. The array substrate according to claim 1, wherein The distance between the pixel electrode and the adjacent data line ranges from 4.5 μm to 5 μm.

5. The array substrate according to claim 1, characterized in that The distance between the edge of the orthographic projection of the pixel electrode on the substrate and the edge of the orthographic projection of the strip electrode corresponding to the edge above the pixel electrode on the substrate and located on the same side is ≥ 2.9 μm.

6. The array substrate according to any one of claims 1-5, characterized in that, The ratio of the width of the strip electrode to the distance between two adjacent strip electrodes located above the same pixel electrode ranges from 50% to 60%.

7. The array substrate according to any one of claims 1-5, characterized in that, The widths of the strip electrodes correspondingly arranged above the same pixel electrode are the same.

8. The array substrate according to any one of claims 1-5, characterized in that, The width of the data line is greater than the width of the auxiliary signal line, and the width of the data line is equal to the minimum process size.

9. The array substrate according to any one of claims 1-5, characterized in that, Each data line extends in a first direction, and a plurality of data lines are arranged in a second direction; the array substrate further includes a plurality of scan lines extending in the second direction and pixel circuits corresponding to the respective pixel electrodes, and the plurality of scan lines are arranged in the first direction; the plurality of pixel electrodes of the electrode layer are arranged in an array in the first direction and the second direction. Pixel circuits corresponding to pixel electrodes located on both sides of the data line and adjacent to the data line are connected to the data line; A row of pixel electrodes arranged along the second direction corresponds to two of the scanning lines. Among the row of pixel electrodes arranged along the second direction, the odd-numbered pixel electrodes are connected to the same scanning line, and the even-numbered pixel electrodes are connected to the same scanning line.

10. A display panel, characterized in that, The display panel includes the array substrate according to any one of claims 1 to 9, a counter substrate located on the array substrate, and a liquid crystal layer located between the array substrate and the array substrate.

11. A display device, characterized in that, The display device includes the display panel according to claim 10.

Images