Light-emitting components

Abstract

The present invention discloses a light-emitting element, comprising a semiconductor stack having a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer; a first insulating layer located on the semiconductor stack and comprising an opening to expose the second semiconductor layer; a reflective structure located on the second semiconductor layer and electrically connected to the second semiconductor layer; a second insulating layer located on the reflective structure and comprising a second insulating layer opening to expose the reflective structure; a first pad electrically connected to the first semiconductor layer; a second pad electrically connected to the second semiconductor layer; a first contact layer located between the second semiconductor layer and the first pad; and a second contact layer located between the second semiconductor layer and the second pad and formed in the second insulating layer opening to contact the reflective structure, wherein the second insulating layer comprises a central portion and an edge portion separated from the central portion by the second insulating layer opening, the second pad has a projected area on the semiconductor stack, and the central portion is located within the projected area.

Description

[0001] This application is a divisional application of the Chinese invention patent application (application number: 201710133334.X, application date: March 8, 2017, invention name: light-emitting element). Technical Field

[0002] The present invention relates to a light emitting element, and in particular to a light emitting element comprising a semiconductor stack and a bonding pad located on the semiconductor stack. Background Art

[0003] Light-Emitting Diode (LED) is a solid-state semiconductor light-emitting element with the advantages of low power consumption, low heat generation, long service life, shock resistance, small size, fast response speed and good photoelectric properties, such as stable light emission wavelength. Therefore, LEDs are widely used in household appliances, equipment indicator lights, and optoelectronic products. Summary of the invention

[0004] The light-emitting element includes a semiconductor stack having a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer; a first insulating layer is located on the semiconductor stack and includes an opening to expose the second semiconductor layer; a reflective structure is located on the second semiconductor layer and is electrically connected to the second semiconductor layer; a second insulating layer is located on the reflective structure and includes a second insulating layer opening to expose the reflective structure; a first pad is electrically connected to the first semiconductor layer; a second pad is electrically connected to the second semiconductor layer; a first contact layer is located between the second semiconductor layer and the first pad; and a second contact layer is located between the second semiconductor layer and the second pad and is formed in the second insulating layer opening to contact the reflective structure, wherein the second insulating layer includes a central portion and an edge portion separated from the central portion by the second insulating layer opening, the second pad has a projected area on the semiconductor stack, and the central portion is located within the projected area.

[0005] The light-emitting element includes a semiconductor stack having a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer; a reflective structure located on the second semiconductor layer and electrically connected to the second semiconductor layer; an insulating layer located on the semiconductor stack and the reflective structure and including an opening to expose the reflective structure; an electrode layer located on the insulating layer and electrically connected to the reflective structure via the opening; a metal layer located on the insulating layer and electrically insulated from the electrode layer, wherein in a top view of the light-emitting element, the metal layer and the electrode layer are separated by a distance, and the metal layer has a concave portion, and the electrode layer has a convex portion, and the convex portion extends into the concave portion. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figures 1 to 9B is a schematic diagram of a manufacturing method of a light-emitting element 1 and a structure of the light-emitting element 1 disclosed in an embodiment of the present invention;

[0007] Fig. 10A It is a top view of a light emitting element 2 disclosed in an embodiment of the present invention;

[0008] Fig. 10B is a cross-sectional view of a light emitting element 2 disclosed in an embodiment of the present invention;

[0009] Fig.11 It is a structural schematic diagram of a light emitting device 3 according to an embodiment of the present invention;

[0010] Fig.12 FIG. 4 is a schematic structural diagram of a light emitting device 4 according to an embodiment of the present invention.

[0011] Explanation of symbols

[0012] 1, 2 Light-emitting element

[0013] 3,4 Light-emitting device

[0014] 11a base plate

[0015] 10a Semiconductor stack

[0016] 101a First semiconductor layer

[0017] 102a Second semiconductor layer

[0018] 103a Active layer

[0019] 100a Hole

[0020] 102s Surface

[0021] 1011a First surface

[0022] 1012a Second surface

[0023] 111a Surrounding part

[0024] 20a First insulating layer

[0025] 200a First insulating layer surrounding area

[0026] 201a First insulating layer covering area

[0027] 202a first insulating layer opening

[0028] 203a First insulation layer opening

[0029] 30a Transparent conductive layer

[0030] 301a Outer edge of transparent conductive layer

[0031] 40a Reflection layer

[0032] 401a Outer edge of reflective layer

[0033] 41a Barrier layer

[0034] 411a Barrier layer outer edge

[0035] 50a Second insulation layer

[0036] 501a, 502a second insulating layer opening

[0037] 60a Contact layer

[0038] 600a Ejector area

[0039] 601a First contact layer

[0040] 602a Second contact layer

[0041] 70a Third insulation layer

[0042] 701a, 702a third insulating layer opening

[0043] 80a, 80b first pad

[0044] 90a, 90b Second welding pad

[0045] 801a, 902a side

[0046] 811b first convex part

[0047] 812b first recess

[0048] 911b first recess

[0049] 7000a Connection part

[0050] 7011a Part 1

[0051] 7022a Part 2

[0052] 70001, 70002 Edge

[0053] 70111 First Side

[0054] 70222 Second side

[0055] 912b Second recess

[0056] 1000a Semiconductor structure

[0057] 1001a Second outer side wall

[0058] 1002a Inner wall

[0059] 1003a First outer side wall

[0060] 51 Package substrate

[0061] 511 First Gasket

[0062] 512 Second gasket

[0063] 53 Insulation

[0064] 54 Reflection Structure

[0065] 602 Lampshade

[0066] 604 Reflector

[0067] 606 bearing part

[0068] 608 Lighting Unit

[0069] 610 Light emitting module

[0070] 612 Lamp Holder

[0071] 614 Heat sink

[0072] 616 Connection

[0073] 618 Electrical connection components DETAILED DESCRIPTION

[0074] In order to make the description of the present invention more detailed and complete, please refer to the description of the following embodiments and the relevant illustrations. However, the embodiments shown below are used to illustrate the light-emitting elements of the present invention, and the present invention is not limited to the following embodiments. In addition, the dimensions, materials, shapes, relative configurations, etc. of the constituent parts recorded in the embodiments of this specification are not limited to this, but are simply illustrated. The size or positional relationship of the components shown in each figure may be exaggerated for the purpose of clear description. Moreover, in the following description, in order to appropriately omit detailed description, the same or similar components are displayed with the same name or symbol.

[0075] Figures 1 to 9B It is a manufacturing method and structure of a light emitting element 1 disclosed in an embodiment of the present invention.

[0076] like Figure 1 As shown, the manufacturing method of the light-emitting element 1 includes the steps of forming a semiconductor stack 10a, which includes providing a substrate 11a; and forming the semiconductor stack 10a on the substrate 11a, wherein the semiconductor stack 10a includes a first semiconductor layer 101a, a second semiconductor layer 102a, and an active layer 103a located between the first semiconductor layer 101a and the second semiconductor layer 102a.

[0077] In one embodiment of the present invention, the substrate 11a is a growth substrate, including a gallium arsenide (GaAs) wafer for growing aluminum gallium indium phosphide (AlGaInP), or a sapphire (Al2O3) wafer, gallium nitride (GaN) wafer or silicon carbide (SiC) wafer for growing indium gallium nitride (InGaN).

[0078] In one embodiment of the present invention, a semiconductor stack 10a having optoelectronic properties, such as a light-emitting stack, is formed on a substrate 11a by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE), physical vapor deposition (PVD) or ion plating, wherein the physical vapor deposition method includes sputtering or evaporation. The first semiconductor layer 101a and the second semiconductor layer 102a may be a cladding layer or a confinement layer, and both have different conductivity types, electrical properties, polarities, or provide electrons or holes according to doped elements, for example, the first semiconductor layer 101a is an n-type electrical semiconductor, and the second semiconductor layer 102a is a p-type electrical semiconductor. The active layer 103a is formed between the first semiconductor layer 101a and the second semiconductor layer 102a. Electrons and holes recombine in the active layer 103a under a current drive, converting electrical energy into light energy to emit a light. The wavelength of the light emitted by the light emitting element 1 can be adjusted by changing the physical and chemical composition of one or more layers in the semiconductor stack 10a. The material of the semiconductor stack 10a includes III-V semiconductor materials, such as Al x In y Ga (1-x-y) N or Al x In y Ga (1-x-y)P, where 0≤x, y≤1; (x+y)≤1. According to the material of the active layer 103a, when the material of the semiconductor stack 10a is AlInGaP series material, red light with a wavelength between 610nm and 650nm, green light with a wavelength between 530nm and 570nm can be emitted, when the material of the semiconductor stack 10a is InGaN series material, blue light with a wavelength between 450nm and 490nm can be emitted, or when the material of the semiconductor stack 10a is AlGaN series or AlInGaN series material, ultraviolet light with a wavelength between 400nm and 250nm can be emitted. The active layer 103a can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MQW). The material of the active layer 103a can be a neutral, p-type or n-type electrical semiconductor.

[0079] In one embodiment of the present invention, PVD aluminum nitride (AlN) can be used as a buffer layer, formed between the semiconductor stack 10a and the substrate 11a, to improve the epitaxial quality of the semiconductor stack 10a. In one embodiment, the target material used to form PVD aluminum nitride (AlN) is composed of aluminum nitride. In another embodiment, a target material composed of aluminum is used to react with an aluminum target material in a nitrogen source environment to form aluminum nitride.

[0080] like Figure 2A The top view and Figure 2B Along Figure 2A As shown in the cross-sectional view of line segment AA', after the semiconductor stack 10a is formed on the substrate 11a, the manufacturing method of the light emitting element 1 includes a platform forming step. The semiconductor stack 10a is patterned by photolithography and etching, and a portion of the second semiconductor layer 102a and the active layer 103a is removed to form one or more semiconductor structures 1000a, a surrounding portion 111a around the one or more semiconductor structures 1000a to expose a first surface 1011a of the first semiconductor layer 101a, and one or more hole portions 100a to expose a second surface 1012a of the first semiconductor layer 101a.

[0081] In one embodiment of the present invention, a plurality of semiconductor structures 1000a may be separated from each other to expose a surface 11s of the substrate 11a or connected to each other through the first semiconductor layer 101a. One or more semiconductor structures 1000a each include a first outer sidewall 1003a, a second outer sidewall 1001a, and one or more inner sidewalls 1002a, wherein the first outer sidewall 1003a is a sidewall of the first semiconductor layer 101a, the second outer sidewall 1001a is a sidewall of the active layer 103a and / or the second semiconductor layer 102a, one end of the second outer sidewall 1001a is connected to a surface 102s of the second semiconductor layer 102a, and the other end of the second outer sidewall 1001a is connected to the first surface 1011a of the first semiconductor layer 101a; one end of the inner sidewall 1002a is connected to the surface 102s of the second semiconductor layer 102a, and the other end of the inner sidewall 1002a is connected to the second surface 1012a of the first semiconductor layer 101a. Figure 2B As shown, there is an obtuse angle or a right angle between the inner sidewall 1002a of the semiconductor structure 1000a and the second surface 1012a of the first semiconductor layer 101a, there is an obtuse angle or a right angle between the first outer sidewall 1003a of the semiconductor structure 1000a and the surface 11s of the substrate 11a, and there is an obtuse angle or a right angle between the second outer sidewall 1001a of the semiconductor structure 1000a and the first surface 1011a of the first semiconductor layer 101a.

[0082] In one embodiment of the present invention, the surrounding portion 111a is composed of Figure 2A The light emitting element 1 shown in the top view is a rectangular or polygonal ring.

[0083] In one embodiment of the present invention, the opening shape of the hole portion 100a includes a circle, an ellipse, a rectangle, a polygon, or any other shape. The plurality of holes 100a can be arranged in a plurality of rows, and the holes 100a in any two adjacent rows or in each two adjacent rows can be aligned or staggered with each other.

[0084] In one embodiment of the present invention, the plurality of holes 100a can be arranged into a first row and a second row, a first shortest distance is included between two adjacent holes 100a in the same row, a second shortest distance is included between the hole 100a in the first row and the hole 100a in the second row, wherein the first shortest distance is greater than or less than the second shortest distance. When an external current is injected into the light emitting element 1, the light field distribution of the light emitting element 1 can be uniformed by the dispersed configuration of the plurality of holes 100a, and the forward voltage of the light emitting element 1 can be reduced.

[0085] In one embodiment of the present invention, the plurality of holes 100a can be arranged into a first row, a second row and a third row, and a first shortest distance is included between the hole 100a located in the first row and the hole 100a located in the second row, and a second shortest distance is included between the hole 100a located in the second row and the hole 100a located in the third row, wherein the first shortest distance is smaller than the second shortest distance. When an external current is injected into the light emitting element 1, the light field distribution of the light emitting element 1 can be uniformed by the dispersed configuration of the plurality of holes 100a, and the forward voltage of the light emitting element 1 can be reduced.

[0086] In one embodiment of the present invention, when the light emitting element 1 has a side length greater than 30 mil, the light emitting element 1 includes a surrounding portion 111a and one or more hole portions 100a. A first shortest distance is included between two adjacent hole portions 100a, and a second shortest distance is included between any hole portion 100a and the first outer side wall 1003a of the first semiconductor layer 101a, wherein the first shortest distance is smaller than the second shortest distance. When an external current is injected into the light emitting element 1, the light field distribution of the light emitting element 1 can be uniformed by the dispersed configuration of the surrounding portion 111a and the one or more hole portions 100a, and the forward voltage of the light emitting element 1 can be reduced.

[0087] In one embodiment of the present invention, when the light emitting element 1 has a side length less than 30 mil, the light emitting element 1 includes a surrounding portion 111a but does not include a hole portion 100a to increase the area of ​​the active layer that can emit light. When an external current is injected into the light emitting element 1, the surrounding portion 111a surrounds the semiconductor structure 1000a, so that the light field distribution of the light emitting element 1 can be uniformed, and the forward voltage of the light emitting element 1 can be reduced.

[0088] The subsequent platform formation steps, such as Figure 3A The top view and Figure 3B Along Figure 3AAs shown in the cross-sectional view of line segment AA', the manufacturing method of the light-emitting element 1 includes a first insulating layer forming step. A first insulating layer 20a is formed on the semiconductor structure 1000a by physical vapor deposition or chemical vapor deposition, and then the first insulating layer 20a is patterned by photolithography and etching to form a first insulating layer surrounding area 200a to cover a portion of the first surface 1011a of the surrounding portion 111a and the second outer sidewall 1001a of the semiconductor structure 1000a, to form a group of first insulating layer covering areas 201a to cover the second surfaces 1012a of the plurality of hole portions 100a and the inner sidewall 1002a of the semiconductor structure 1000a, and to form a first insulating layer opening 202a to expose the surface 102s of the second semiconductor layer 102a. The first insulating layer covering areas 201a of the group are separated from each other and correspond to the plurality of hole portions 100a respectively. The first insulating layer 20a can be a single layer or a stacked layer structure. When the first insulating layer 20a is a single-layer structure, the first insulating layer 20a can protect the sidewalls of the semiconductor structure 1000a to prevent the active layer 103a from being damaged by subsequent manufacturing processes. When the first insulating layer 20a is a stacked structure, in addition to protecting the semiconductor structure 1000a, the first insulating layer 20a can also form a Bragg reflector (DBR) structure by alternately stacking two or more materials with different refractive indices to selectively reflect light of a specific wavelength. The first insulating layer 20a is formed of a non-conductive material, including an organic material, such as Su8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin, acrylic resin, cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide, fluorocarbon polymer, or an inorganic material, such as silicone, glass, or a dielectric material, such as aluminum oxide (Al2O3), silicon nitride (SiN x ), silicon oxide (SiO x ), titanium oxide (TiO x ), or magnesium fluoride (MgF x ).

[0089] In one embodiment of the present invention, following the first insulating layer forming step, as Figure 4A The top view and Figure 4B Along Figure 4AAs shown in the cross-sectional view of line segment AA', the manufacturing method of the light-emitting element 1 includes a transparent conductive layer forming step. A transparent conductive layer 30a is formed in the first insulating layer opening 202a by physical vapor deposition or chemical vapor deposition, wherein the outer edge 301a of the transparent conductive layer 30a is separated from the first insulating layer 20a by a distance to expose a portion of the surface 102s of the second semiconductor layer 102a. Since the transparent conductive layer 30a is formed on substantially the entire surface of the second semiconductor layer 102a and is in contact with the second semiconductor layer 102a, the current passes through the transparent conductive layer 30a to be uniformly diffused throughout the entire second semiconductor layer 102a. The material of the transparent conductive layer 30a includes a material that is transparent to the light emitted by the active layer 103a, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0090] In another embodiment of the present invention, after the platform forming step, the transparent conductive layer forming step may be performed first, and then the first insulating layer forming step may be performed.

[0091] In another embodiment of the present invention, after the platform forming step, the first insulating layer forming step may be omitted, and the transparent conductive layer forming step may be directly performed.

[0092] In one embodiment of the present invention, following the transparent conductive layer forming step, such as Figure 5A The top view of Figure 5B A magnified view of area B. Figure 5C A magnified view of area C. Figure 5D Along Figure 5A a cross-sectional view of line segment A-A', and Figure 5E As shown in the partial enlarged view of area E of the light-emitting element 1, the manufacturing method of the light-emitting element 1 includes a reflective structure forming step. A reflective structure 400 is directly formed on the transparent conductive layer 30a by physical vapor deposition or chemical vapor deposition, wherein the reflective structure 400 includes a reflective layer 40a and / or a barrier layer 41a, and the reflective layer 40a is located between the transparent conductive layer 30a and the barrier layer 41a. In one embodiment of the present invention, the outer edge 401a of the reflective layer 40a can be disposed on the inner side, outer side of the outer edge 301a of the transparent conductive layer 30a, or arranged to coincide with the outer edge 301a of the transparent conductive layer 30a, and the outer edge 411a of the barrier layer 41a can be disposed on the inner side, outer side of the outer edge 401a of the reflective layer 40a, or arranged to coincide with the outer edge 401a of the reflective layer 40a. As shown Figure 5B , Figure 5C A partial enlargement of Figure 5E As shown in the partially enlarged view, the outer edge 401a of the reflective layer 40a does not overlap with the outer edge 301a of the transparent conductive layer 30a, and the outer edge 301a of the transparent conductive layer 30a is covered by the reflective layer 40a, so that the barrier layer 41a is not in contact with the transparent conductive layer 30a.

[0093] In another embodiment of the present invention, the step of forming the transparent conductive layer can be omitted, and the step of forming the reflective structure can be directly performed after the platform forming step or the first insulating layer forming step. For example, the reflective layer 40a and / or the barrier layer 41a are directly formed on the second semiconductor layer 102a, and the reflective layer 40a is located between the second semiconductor layer 102a and the barrier layer 41a.

[0094] The reflective layer 40a may be a single layer or a stacked layer structure, such as a Bragg reflection structure. The material of the reflective layer 40a includes a metal material with a high reflectivity, such as silver (Ag), aluminum (Al), or rhodium (Rh) or an alloy of the above materials. Here, the high reflectivity means that the reflectivity is greater than 80% for the wavelength of the light emitted by the light emitting element 1. In one embodiment of the present invention, the barrier layer 41a covers the reflective layer 40a to prevent the surface of the reflective layer 40a from being oxidized and causing the reflectivity of the reflective layer 40a to deteriorate. The material of the barrier layer 41a includes a metal material, such as titanium (Ti), tungsten (W), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt) or an alloy of the above materials. The barrier layer 41a may be a single layer or a stacked layer structure, such as titanium (Ti) / aluminum (Al), and / or titanium (Ti) / tungsten (W). In one embodiment of the present invention, the barrier layer 41a comprises a stacked structure of titanium (Ti) / tungsten (W) on a side close to the reflective layer 40a, and comprises a stacked structure of titanium (Ti) / aluminum (Al) on a side away from the reflective layer 40a. In one embodiment of the present invention, the material of the reflective layer 40a and the barrier layer 41a comprises a metal material other than gold (Au) or copper (Cu), so as to prevent the metal in the package solder, such as tin (Sn), from diffusing into the light emitting element 1 during the subsequent manufacturing process, and forming a co-metal with the metal material, such as gold (Au) or copper (Cu) inside the light emitting element 1, thereby causing the structure of the light emitting element 1 to be deformed.

[0095] In one embodiment of the present invention, following the step of forming the reflective structure, such as Fig. 6A The top view and Figure 6B Along Fig. 6AAs shown in the cross-sectional view of line segment AA', the manufacturing method of the light-emitting element 1 includes a second insulating layer forming step. A second insulating layer 50a is formed on the semiconductor structure 1000a by physical vapor deposition or chemical vapor deposition, and then the second insulating layer 50a is patterned by photolithography and etching to form one or a first group of second insulating layer openings 501a to expose the first semiconductor layer 101a, and one or a second group of second insulating layer openings 502a to expose the reflective layer 40a or the barrier layer 41a. In the process of patterning the second insulating layer 50a, the first insulating layer surrounding area 200a covering the surrounding portion 111a and the first group of first insulating layer covering areas 201a in the hole portion 100a in the aforementioned first insulating layer forming step are partially etched away to expose the first semiconductor layer 101a, and the first group of first insulating layer openings 203a are formed in the hole portion 100a to expose the first semiconductor layer 101a.

[0096] In this embodiment, if Fig. 6A The top view and Figure 6B As shown in the cross-sectional view of FIG. 1 , the first group of second insulating layer openings 501a includes a shape or number corresponding to the shape or number of the hole portion 100a. The second insulating layer openings 501a located on the first semiconductor layer 101a and the second insulating layer openings 502a located on the second semiconductor layer 102a have different shapes, widths, and numbers. The top view of the second insulating layer openings 501a, 502a has an annular opening.

[0097] In this embodiment, if Fig. 6AAs shown, the second insulating layer openings 501a located on the first semiconductor layer 101a are separated from each other and correspond to a plurality of hole portions 100a, respectively, and the second insulating layer openings 502a located on the second semiconductor layer 102a are close to one side of the substrate 11a, for example, the left or right side of the center line CC' of the substrate 11a. The second insulating layer 50a may be a single layer or a stacked structure. When the second insulating layer 50a is a single layer structure, the second insulating layer 50a may protect the side wall of the semiconductor structure 1000a to prevent the active layer 103a from being damaged by subsequent manufacturing processes. When the second insulating layer 50a is a stacked structure, the second insulating layer 50a may include two or more materials with different refractive indices alternately stacked to form a Bragg reflector (DBR) structure to selectively reflect light of a specific wavelength. The second insulating layer 50a is made of a non-conductive material, including an organic material, such as Su8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin, acrylic resin, cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide, fluorocarbon polymer, or an inorganic material, such as silicone, glass, or a dielectric material, such as aluminum oxide (Al2O3), silicon nitride (SiN x ), silicon oxide (SiO x ), titanium oxide (TiO x ), or magnesium fluoride (MgF x ).

[0098] Following the second insulating layer forming step, in one embodiment of the present invention, Fig. 7A The top view and Figure 7B Along Fig. 7A As shown in the cross-sectional view of line segment AA', the manufacturing method of the light-emitting element 1 includes a contact layer forming step. A contact layer 60a is formed on the semiconductor stack 10a by physical vapor deposition or chemical vapor deposition, and then the contact layer 60a is patterned by photolithography and etching to form a first contact layer 601a, a second contact layer 602a and a pin region 600a. The first contact layer 601a is filled in the hole 100a and covers the second insulating layer opening 501a to contact the first semiconductor layer 101a, and extends to cover the second insulating layer 50a and a part of the surface of the second semiconductor layer 102a, wherein the first contact layer 601a is insulated from the second semiconductor layer 102a by the second insulating layer 50a. The second contact layer 602a is formed in the annular opening 502a of the second insulating layer 50a to contact the partial reflective layer 40a and / or the barrier layer 41a.

[0099] In one embodiment of the present invention, the first contact layer 601a, the second contact layer 602a and the pin region 600a are separated from each other by a distance. The second contact layer 602a is partially extended to form in the annular opening 502a of the second insulating layer 50a, and the sidewall 6021a of the second contact layer 602a is separated from the sidewall 5021a of the annular opening 502a by a distance. The sidewall 6011a of the first contact layer 601a is separated from the sidewall 6021a of the second contact layer 602a by a distance, so that the first contact layer 601a is not in contact with the second contact layer 602a, and the first contact layer 601a and the second contact layer 602a are electrically isolated by a portion of the second insulating layer 50a. In the top view of the light emitting element 1, the first contact layer 601a covers the surrounding portion 111a of the semiconductor stack 10a, so that the first contact layer 601a surrounds multiple sidewalls of the second contact layer 602a.

[0100] In one embodiment of the present invention, the first contact layer 601a contacts the first semiconductor layer 101a through the surrounding portion 111a and the hole portion 100a. When an external current is injected into the light emitting element 1, part of the current is conducted to the first semiconductor layer 101a through the surrounding portion 111a, and another part of the current is conducted to the first semiconductor layer 101a through the plurality of hole portions 100a.

[0101] like Fig. 7A As shown, the second contact layer 602a is close to one side of the substrate 11a, such as the left or right side of the center line CC' of the substrate 11a. The pin region 600a is located at the geometric center of the semiconductor stack 10a. The pin region 600a is not connected to the first contact layer 601a and the second contact layer 602a, and is electrically isolated from the first contact layer 601a and the second contact layer 602a. The pin region 600a includes the same material as the first contact layer 601a and / or the second contact layer 602a. The pin region 600a serves as a structure to protect the epitaxial layer to prevent the epitaxial layer from being damaged by external forces, such as probes or pins, during the back-end manufacturing process, such as die separation, die testing, and packaging. The shape of the pin region 600a includes a rectangle, an ellipse, or a circle.

[0102] In one embodiment of the present invention, the pin region 600a is located at the geometric center of the semiconductor stack 10a and is connected to the first contact layer 601a or the second contact layer 602a. The pin region 600a comprises the same material as the first contact layer 601a and / or the second contact layer 602a.

[0103] In one embodiment of the present invention, the contact layer 60a may be a single layer or a stacked layer structure. In order to reduce the resistance of the contact with the first semiconductor layer 101a, the material of the contact layer 60a includes a metal material, such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt) and the like, or an alloy of the above materials. The material of the contact layer 60a includes a metal material other than gold (Au) and copper (Cu), so as to avoid the metal in the package solder, such as tin (Sn), from diffusing into the light-emitting element 1 in the subsequent manufacturing process, and forming a co-metal with the metal material inside the light-emitting element 1, such as gold (Au) and copper (Cu), causing the structure of the light-emitting element 1 to be deformed.

[0104] In one embodiment of the present invention, the material of the contact layer 60a includes a metal with high reflectivity, such as aluminum (Al) or platinum (Pt).

[0105] In one embodiment of the present invention, the side of the contact layer 60 a contacting the first semiconductor layer 101 a includes chromium (Cr) or titanium (Ti) to increase the bonding strength between the contact layer 60 a and the first semiconductor layer 101 a .

[0106] In one embodiment of the present invention, Fig. 7A and Figure 7B The manufacturing method of the light emitting element 1 includes a third insulating layer forming step, such as Fig. 8A The top view and Figure 8B Along Fig. 8A As shown in the cross-sectional view of line segment A-A', a third insulating layer 70a is formed on the semiconductor structure 1000a by physical vapor deposition or chemical vapor deposition, and then the third insulating layer 70a is patterned by photolithography and etching to form a third insulating layer opening 701a, 702a to expose the first contact layer 601a and the second contact layer 602a respectively; a first portion 7011a of the third insulating layer 70a is formed, and the first portion 7011a is surrounded by the third insulating layer opening 701a; a second portion 7022a of the third insulating layer 70a is formed, and the second portion 7022a is surrounded by the third insulating layer opening 702a; and a connecting portion 7000a of the third insulating layer 70a is formed between the third insulating layer opening 701a and the third insulating layer opening 702a. Fig. 8A As shown, the connecting portion 7000a of the third insulating layer 70a surrounds the first portion 7011a and the second portion 7022a of the third insulating layer 70a respectively. Figure 8BAs shown, the connecting portion 7000a of the third insulating layer 70a is located on both sides of the first portion 7011a of the third insulating layer 70a, and the connecting portion 7000a of the third insulating layer 70a is located on both sides of the second portion 7022a of the third insulating layer 70a. The third insulating layer opening 701a is formed by a first side 70111 of the first portion 7011a of the third insulating layer 70a and a side 70001 of the connecting portion 7000a of the third insulating layer 70a, and the third insulating layer opening 702a is formed by a second side 70222a of the second portion 7022a of the third insulating layer 70a and the other side 70002a of the connecting portion 7000a of the third insulating layer 70a.

[0107] In one embodiment of the present invention, the first contact layer 601a located on the second semiconductor layer 102a is sandwiched between the second insulating layer 50a and the third insulating layer 70a. The pin region 600a is surrounded and covered by the connecting portion 7000a of the third insulating layer 70a.

[0108] In one embodiment of the present invention, Fig. 8A As shown, the third insulating layer openings 701a, 702a are staggered with the plurality of holes 100a and do not overlap each other. In other words, the third insulating layer opening 701a is staggered with the second insulating layer opening 501a and does not overlap each other. The third insulating layer opening 702a may be surrounded by the second insulating layer opening 502a. Fig. 8A In the top view, the third insulating layer openings 701a, 702a are located on both sides of the center line CC' of the substrate 11a, for example, the third insulating layer opening 701a is located on the right side of the center line CC' of the substrate 11a, and the third insulating layer opening 702a is located on the left side of the center line CC' of the substrate 11a.

[0109] In one embodiment of the present invention, the third insulating layer opening 701a includes a width smaller than the width of the second insulating layer opening 501a, and the third insulating layer opening 702a includes a width smaller than the width of the second insulating layer opening 502a.

[0110] In one embodiment of the present invention, the third insulating layer opening 701a includes a width greater than the width of the second insulating layer opening 501a, and the third insulating layer opening 702a includes a width greater than the width of the second insulating layer opening 502a.

[0111] The third insulating layer 70a may be a single layer or a stacked layer structure. When the third insulating layer 70a is a stacked layer structure, the third insulating layer 70a may include two or more materials with different refractive indices alternately stacked to form a Bragg reflector (DBR) structure to selectively reflect light of a specific wavelength. The third insulating layer 70a is formed of a non-conductive material, including an organic material, such as Su8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin, acrylic resin, cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide, fluorocarbon polymer, or an inorganic material, such as silicone, glass, or a dielectric material, such as aluminum oxide (Al2O3), silicon nitride (SiN x ), silicon oxide (SiO x ), titanium oxide (TiO x ), or magnesium fluoride (MgF x ).

[0112] Following the third insulating layer forming step, the method for manufacturing the light emitting element 1 includes a pad forming step. Fig.9A The top view and Fig. 9B Along Fig.9A As shown in the cross-sectional view of line segment AA', a first bonding pad 80a and a second bonding pad 90a are formed on one or more semiconductor structures 1000a by electroplating, physical vapor deposition or chemical vapor deposition. Fig.9A In the top view, the first pad 80a is close to one side of the substrate 11a, for example, the right side of the center line CC' of the substrate 11a, and the second pad 90a is close to the other side of the substrate 11a, for example, the left side of the center line CC' of the substrate 11a. The first pad 80a covers the opening 701a of the third insulating layer to contact the first contact layer 601a, and forms an electrical connection with the first semiconductor layer 101a through the first contact layer 601a and the hole 100a. The second pad 90a covers the opening 702a of the third insulating layer, contacts the second contact layer 602a, and forms an electrical connection with the second semiconductor layer 102a through the second contact layer 602a, the reflective layer 40a or the barrier layer 41a. Fig.9A As shown, the first pad 80a and the second pad 90a do not cover any hole portion 100a, and the hole portion 100a is formed in a region other than the first pad 80a and the second pad 90a.

[0113] In one embodiment of the present invention, the first bonding pad 80a includes a size that is the same as or different from a size of the second bonding pad 90a. The size may be a width or an area.

[0114] In one embodiment of the present invention, Fig. 9B As shown, the first pad 80a includes a side edge 801a, and the side edge 801a of the first pad 80a is separated from the first side 70111 of the first portion 7011a of the third insulating layer 70a or the side 70001 of the connecting portion 7000a of the third insulating layer 70a by a distance, and the distance is preferably less than 100μm, more preferably less than 50μm, and most preferably less than 20μm. The second pad 90a includes a side edge 902a, and the side edge 902a of the second pad 90a is separated from the second side 70222a of the second portion 7022a of the third insulating layer 70a or the other side 70002a of the connecting portion 7000a of the third insulating layer 70a by a distance, and the distance is preferably less than 100μm, more preferably less than 50μm, and most preferably less than 20μm.

[0115] In one embodiment of the present invention, in the top view of the light-emitting element 1, the side 801a of the first pad 80a is arranged along the side 70001, 70111 of the third insulating layer opening 701a, and the side 902a of the second pad 90a is arranged along the side 70002a, 70222a of the third insulating layer opening 702a.

[0116] Fig.9A is a top view of the light emitting element 1, Fig. 9B 1 is a cross-sectional view of a light emitting device 1. The light emitting device 1 disclosed in this embodiment is a flip-chip light emitting diode device. The light emitting device 1 includes a substrate 11a; one or more semiconductor structures 1000a are located on the substrate 11a; a surrounding portion 111a surrounds the one or more semiconductor structures 1000a; and a first pad 80a and a second pad 90a are located on a semiconductor stack 10a. The one or more semiconductor structures 1000a each include a semiconductor stack 10a, and the semiconductor stack 10a includes a first semiconductor layer 101a, a second semiconductor layer 102a, and an active layer 103a is located between the first semiconductor layer 101a and the second semiconductor layer 102a.

[0117] like Fig.9A and Fig. 9B As shown, one or more semiconductor structures 1000a are surrounded by a surrounding portion 111a. In one embodiment of the present invention, the plurality of semiconductor structures 1000a may be connected to each other through the first semiconductor layer 101a, and the surrounding portion 111a includes a first surface 1011a of the first semiconductor layer 101a to surround the plurality of semiconductor structures 1000a. In another embodiment of the present invention, the plurality of semiconductor structures 1000a may be separated from each other and spaced a distance apart to expose a surface 11s of the substrate 11a.

[0118] The light emitting element 1 further includes one or more holes 100a penetrating the second semiconductor layer 102a and the active layer 103a to expose one or more second surfaces 1012a of the first semiconductor layer 101a.

[0119] The light emitting device 1 further comprises a first contact layer 601a formed on the first surface 1011a of the first semiconductor layer 101a to surround the semiconductor structure 1000a and contact the first semiconductor layer 101a to form an electrical connection, and formed on one or more second surfaces 1012a of the first semiconductor layer 101a to cover one or more hole portions 100a and contact the first semiconductor layer 101a to form an electrical connection; and a second contact layer 602a formed on the surface 102s of the second semiconductor layer 102a. In one embodiment of the present invention, in the top view of the light emitting device 1 as shown in FIG. Fig. 7A On the surface, the first contact layer 601a surrounds a plurality of sidewalls of the second contact layer 602a.

[0120] In one embodiment of the present invention, the first bonding pad 80 a and / or the second bonding pad 90 a covers a plurality of semiconductor structures 1000 a .

[0121] In one embodiment of the present invention, the first pad 80a and the second pad 90a are formed around the hole 100a so that the first pad 80a and the second pad 90a do not overlap with the hole 100a.

[0122] In one embodiment of the present invention, in the top view of the light emitting element 1, the shape of the first pad 80a is the same as the shape of the second pad 90a. For example, the shapes of the first pad 80a and the second pad 90a are rectangular. Fig.9A shown.

[0123] In one embodiment of the present invention, the size of the first pad 80a is different from the size of the second pad 90a, for example, the area of ​​the first pad 80a is larger or smaller than the area of ​​the second pad 90a. The materials of the first pad 80a and the second pad 90a include metal materials, such as metals such as chromium (Cr), titanium (Ti), tungsten (W), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), or alloys of the above materials. The first pad 80a and the second pad 90a can be a single layer or a stacked structure. When the first pad 80a and the second pad 90a are a stacked structure, the first pad 80a includes a first upper pad and a first lower pad, and the second pad 90a includes a second upper pad and a second lower pad. The upper pad and the lower pad have different functions.

[0124] In one embodiment of the present invention, the function of the upper pad is mainly used for welding and forming leads. Through the upper pad, the light emitting element 1 can be mounted on the package substrate in the form of a flip chip, using solder or by eutectic bonding of AuSn material, for example. The metal material of the upper pad includes a highly ductile material, such as tin (Sn), nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), copper (Cu), gold (Au), tungsten (W), zirconium (Zr), molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), osmium (Os) and other metals or alloys of the above materials. The upper pad can be a single layer or a laminated structure of the above materials. In one embodiment of the present invention, the material of the upper pad includes nickel (Ni) and / or gold (Au), and the upper pad is a single layer or a laminated structure.

[0125] In one embodiment of the present invention, the function of the lower pad is to form a stable interface with the contact layer 60a, the reflective layer 40a, or the barrier layer 41a, for example, to improve the interface bonding strength between the first lower pad and the first contact layer 601a, or to improve the interface bonding strength between the second lower pad and the reflective layer 40a or the barrier layer 41a. Another function of the lower pad is to prevent the tin (Sn) in the solder or AuSn eutectic from diffusing into the reflective structure and destroying the reflectivity of the reflective structure. Therefore, the lower pad includes a metal material other than gold (Au) and copper (Cu), such as nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), tungsten (W), zirconium (Zr), molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), osmium (Os) and the like or an alloy of the above materials, and the lower pad can be a single layer or a stacked structure of the above materials. In one embodiment of the present invention, the lower pad includes a stacked structure of titanium (Ti) / aluminum (Al), or a stacked structure of chromium (Cr) / aluminum (Al).

[0126] In one embodiment of the present invention, in order to prevent the tin (Sn) in the solder or AuSn eutectic from diffusing into the reflective structure and destroying the reflectivity of the reflective structure, the first contact layer 601a and the first pad 80a are connected at one side and include a metal material selected from the group consisting of titanium (Ti) and platinum (Pt). The second contact layer 602a and the second pad 90a are connected at one side and include a metal material selected from the group consisting of titanium (Ti) and platinum (Pt).

[0127] Fig. 10A FIG. 2 is a top view of a light emitting element 2 according to an embodiment of the present invention. Fig. 10BFIG. 2 is a cross-sectional view of the light emitting element 2. Compared with the light emitting element 1 in the above embodiment, the light emitting element 2 further includes a metal layer 900b surrounding the first pad 80b and / or the second pad 90b, and a first electrode bump 810b and a second electrode bump 910b are respectively located above the first pad 80b and the second pad 90b. In addition, the light emitting element 2 has substantially the same structure as the light emitting element 1. Fig. 10A , Fig. 10B The light emitting element 2 and FIG. 9A to FIG. 9B The light-emitting elements 1 have the same names and numbers, represent the same structure, have the same materials, or have the same functions, and the description thereof will be appropriately omitted or not repeated.

[0128] The light emitting device 2 disclosed in this embodiment is a flip-chip light emitting diode device. The light emitting device 2 includes a substrate 11a; one or more semiconductor structures 1000a are located on the substrate 11a; a surrounding portion 111a surrounds the one or more semiconductor structures 1000a; a first pad 80b and a second pad 90b are located on the semiconductor stack 10a; and a first electrode bump 810b and a second electrode bump 910b are respectively located above the first pad 80b and the second pad 90b. The one or more semiconductor structures 1000a each include a semiconductor stack 10a, and the semiconductor stack 10a includes a first semiconductor layer 101a, a second semiconductor layer 102a, and an active layer 103a is located between the first semiconductor layer 101a and the second semiconductor layer 102a.

[0129] like Fig. 10A and Fig. 10B As shown, one or more semiconductor structures 1000a are surrounded by a surrounding portion 111a. In one embodiment of the present invention, the plurality of semiconductor structures 1000a may be connected to each other through the first semiconductor layer 101a, and the surrounding portion 111a includes a first surface 1011a of the first semiconductor layer 101a to surround the plurality of semiconductor structures 1000a. In another embodiment of the present invention, the plurality of semiconductor structures 1000a may be separated from each other and spaced a distance apart to expose a surface 11s of the substrate 11a.

[0130] The light emitting element 2 further includes one or more holes 100a penetrating through the second semiconductor layer 102a and the active layer 103a to expose one or more second surfaces 1012a of the first semiconductor layer 101a.

[0131] The light emitting device 2 further comprises a first contact layer 601a formed on a first surface 1011a of the first semiconductor layer 101a to surround the periphery of the semiconductor structure 1000a and to contact the first semiconductor layer 101a to form an electrical connection, and formed on one or more second surfaces 1012a of the first semiconductor layer 101a to cover one or more hole portions 100a and to contact the first semiconductor layer 101a to form an electrical connection; and a second contact layer 602a formed on a surface 102s of the second semiconductor layer 102a and to form an electrical connection with the second semiconductor layer 102a. In one embodiment of the present invention, in a top view of the light emitting device 2, the first contact layer 601a surrounds a plurality of sidewalls of the second contact layer 602a, and the second contact layer 602a comprises a dimension, such as an area, smaller than a dimension of the first contact layer 601a.

[0132] In one embodiment of the present invention, the first pad 80b covers part or all of the hole 100a and / or the second pad 90b covers part or all of the hole 100a. Fig. 10A As shown, the first pad 80b covers a portion of the hole portion 100a, and the second pad 90b does not cover any hole portion 100a.

[0133] When the light-emitting element is mounted on the package substrate in the form of a flip chip, the insulating layer on the surface of the light-emitting element is easily damaged by the impact of external forces, so that the solder or eutectic bonding materials such as AuSn enter the interior of the light-emitting element through the cracks in the insulating layer, making the light-emitting element ineffective. In one embodiment of the present invention, the light-emitting element 2 includes a metal layer 900b located on the semiconductor stack 10a to protect the insulating layer below and prevent the insulating layer from being damaged by the impact of external forces. Fig. 10A As shown, the metal layer 900b surrounds the sidewalls of the second pad 90b, and the metal layer 900b is spaced apart from the second pad 90b. The metal layer 900b covers part of the hole 100a, and part of the first contact layer 601a is located under the metal layer 900b and is insulated from the metal layer 900b by the third insulating layer 70a.

[0134] In one embodiment of the present invention, the first bonding pad 80b, the second bonding pad 90b and the metal layer 900b are separated from each other by a distance and are not connected to each other.

[0135] In one embodiment of the present invention, the light-emitting element 2 includes a third insulating layer 70a, the third insulating layer 70a has one or more openings 701a, 702a to expose the first contact layer 601a and the second contact layer 602a respectively, wherein a spacing is located between the metal layer 900b and the second pad 90b to expose a portion of the surface of the third insulating layer 70a.

[0136] In one embodiment of the present invention, in the top view of the light emitting element 2, the shape of the first pad 80b is different from the shape of the second pad 90b. For example, the first pad 80b is rectangular and the second pad 90b is comb-shaped.

[0137] In one embodiment of the present invention, in the top view of the light emitting element 2 , the first bonding pad 80 b includes a size, such as an area, that is different from a size of the second bonding pad 90 b .

[0138] In one embodiment of the present invention, the sizes of the first welding pad 80b and the second welding pad 90b are different from the sizes of the first electrode bump 810b and the second electrode bump 910b, respectively. For example, the area of ​​the first welding pad 80b is larger than the area of ​​the first electrode bump 810b, and the area of ​​the second welding pad 90b is larger than the area of ​​the second electrode bump 910b.

[0139] In one embodiment of the present invention, a distance between the first bonding pad 80 b and the second bonding pad 90 b is smaller than a distance between the first electrode bump 810 b and the second electrode bump 910 b .

[0140] In one embodiment of the present invention, in the top view of the light emitting element 2, the shape of the first electrode bump 810b is similar to or the same as the shape of the second electrode bump 910b. For example, the shapes of the first electrode bump 810b and the second electrode bump 910b are comb-shaped. Fig. 10A As shown, the first electrode bump 810b has a plurality of first protrusions 811b and a plurality of first recesses 812b connected alternately with each other. The second electrode bump 910b has a plurality of second protrusions 911b and a plurality of second recesses 912b connected alternately with each other. The position of the first recess 812b of the first electrode bump 810b and the position of the second recess 912b of the second electrode bump 910b roughly correspond to the position of the hole 100a. In other words, the width of the first recess 812b of the first electrode bump 810b or the width of the second recess 912b of the second electrode bump 910b is greater than the diameter of any hole 100a, so that the first electrode bump 810b and the second electrode bump 910b do not cover any hole 100a, and the first recess 812b of the first electrode bump 810b and the second recess 912b of the second electrode bump 910b bypass the hole 100a and are formed around the hole 100a. In one embodiment of the present invention, the plurality of first recesses 812b are substantially aligned with the plurality of second recesses 912b in a top view. In another embodiment of the present invention, the plurality of first recesses 812b are offset from the plurality of second recesses 912b in a top view.

[0141] In one embodiment of the present invention, when the light-emitting element 2 is mounted on the packaging substrate in the form of a flip chip, since multiple insulating layers are included between the first solder pad 80b, the second solder pad 90b and the semiconductor stack 10a, the first solder pad 80b, the second solder pad 90b of the light-emitting element 2 are subjected to external forces, such as stress generated during eutectic bonding with solder or AuSn, which may cause cracks in the first solder pad 80b, the second solder pad 90b and the insulating layer. Therefore, the light-emitting element 2 includes a first electrode bump 810b and a second electrode bump 910b, which are respectively located above the first solder pad 80b and the second solder pad 90b, and are bonded to the outside world via the first electrode bump 810b and the second electrode bump 910b, wherein the formation positions of the first electrode bump 810b and the second electrode bump 910b bypass the formation position of the opening portion 100a to reduce the generation of stress between the solder pad and the insulating layer due to external forces.

[0142] In another embodiment of the present invention, compared with the first electrode bump 810b and the second electrode bump 910b, the first pad 80b and the second pad 90b have a larger area to release the pressure of the first electrode bump 810b and the second electrode bump 910b during die bonding. In the cross-sectional view of the light-emitting element 2, the first pad 80b includes a width that is 1.2 to 2.5 times, preferably 2 times, of a width of the first electrode bump 810b.

[0143] In another embodiment of the present invention, compared with the first electrode bump 810b and the second electrode bump 910b, the first pad 80b and the second pad 90b have a larger area to release the pressure of the first electrode bump 810b and the second electrode bump 910b during die bonding. In the cross-sectional view of the light-emitting element 2, the first pad 80b has an outward expansion distance of more than 1 times its own thickness, preferably more than 2 times its own thickness.

[0144] In another embodiment of the present invention, the first electrode bump 810b and the second electrode bump 910b have a thickness between 1 and 100 μm, preferably between 1.5 and 6 μm, and are mounted on the package substrate in a flip chip form via the first electrode bump 810b and the second electrode bump 910b. The first pad 80b and the second pad 90b have a thickness greater than 0.2 μm, preferably greater than 0.5 μm and less than 1 μm, so as to release the pressure of the first electrode bump 810b and the second electrode bump 910b during die bonding.

[0145] In another embodiment of the present invention, the first bonding pad 80b, the second bonding pad 90b and the metal layer 900b include the same metal material and / or have the same metal stack.

[0146] The first pad 80b, the second pad 90b and the metal layer 900b may be a single layer or a stacked layer structure. The first pad 80b and the second pad 90b function to form a stable interface with the first contact layer 601a, the reflective layer 40a, or the barrier layer 41a, for example, the first pad 80b contacts the first contact layer 601a, and the second pad 90b contacts the reflective layer 40a or the barrier layer 41a. The first pad 80b and the second pad 90b include metal materials other than gold (Au) and copper (Cu), such as chromium (Cr), nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), tungsten (W), zirconium (Zr), molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), osmium (Os) and other metals or alloys of the above materials to prevent tin (Sn) in the solder or AuSn eutectic from diffusing into the light-emitting element 2 and forming a eutectic with the metals contained in the first pad 80b and the second pad 90b, such as gold (Au) and copper (Cu). The metal layer 900b includes metal materials other than gold (Au) and copper (Cu), such as chromium (Cr), nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), tungsten (W), zirconium (Zr), molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), osmium (Os) and the like, or alloys of the above materials. The side of the metal layer 900b that contacts the third insulating layer 70a includes chromium (Cr), nickel (Ni), titanium (Ti), or platinum (Pt) to improve the interface bonding strength between the metal layer 900b and the third insulating layer 70a.

[0147] In another embodiment of the present invention, the first pad 80b and / or the second pad 90b are a laminated structure, wherein the laminated structure includes a high ductility layer and a low ductility layer to prevent stress generated when the pads 80b and 90b are eutectic bonded with solder or AuSn from causing cracks in the insulating layer between the pads 80b and 90b and the semiconductor laminate 10a. The high ductility layer and the low ductility layer include metals with different Young's modulus.

[0148] In another embodiment of the present invention, the high ductility layer of the first bonding pad 80b and / or the second bonding pad 90b includes a thickness greater than or equal to a thickness of the low ductility layer.

[0149] In another embodiment of the present invention, the first welding pad 80b and the second welding pad 90b are a stacked structure, the first electrode bump 810b and the second electrode bump 910b are a stacked structure, the side of the first welding pad 80b connected to the first electrode bump 810b contains the same metal material, and the side of the second welding pad 90b connected to the second electrode bump 910b contains the same metal material, such as chromium (Cr), nickel (Ni), titanium (Ti), or platinum (Pt), so as to improve the interface bonding strength between the welding pad and the buffer pad.

[0150] In another embodiment of the present invention, following the pad forming step, the manufacturing method of the light-emitting element 2 includes a fourth insulating layer forming step. A fourth insulating layer (not shown) is formed on the first pad 80b and the second pad 90b by physical vapor deposition or chemical vapor deposition, and the first electrode bump 810b and the second electrode bump 910b are formed on the first pad 80b and the second pad 90b, respectively, wherein the fourth insulating layer surrounds the sidewalls of the first pad 80b and the second pad 90b. The fourth insulating layer may be a single layer or a laminated structure. When the fourth insulating layer is a laminated structure, the fourth insulating layer may include two or more materials with different refractive indices alternately stacked to form a Bragg reflector (DBR) structure, which selectively reflects light of a specific wavelength. The fourth insulating layer is made of a non-conductive material, including an organic material, such as Su8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin, acrylic resin, cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide, fluorocarbon polymer, or an inorganic material, such as silicone, glass, or a dielectric material, such as aluminum oxide (Al2O3), silicon nitride (SiN x ), silicon oxide (SiO x ), titanium oxide (TiO x ), or magnesium fluoride (MgF x ).

[0151] In one embodiment of the present invention, the manufacturing process of the first electrode bump 810b and the second electrode bump 910b can be directly followed by the manufacturing process of the first pad 80b and the second pad 90b. In another embodiment of the present invention, after the manufacturing process of the first pad 80b and the second pad 90b, the fourth insulating layer is formed first, and then the manufacturing process of the first electrode bump 810b and the second electrode bump 910b is followed.

[0152] Fig.11Schematic diagram of a light emitting device 3 according to an embodiment of the present invention. The light emitting element 1 or the light emitting element 2 in the above-mentioned embodiment is mounted on the first pad 511 and the second pad 512 of the packaging substrate 51 in the form of a flip chip. The first pad 511 and the second pad 512 are electrically insulated by an insulating portion 53 containing an insulating material. Flip chip mounting is to set the side of the growth substrate opposite to the pad forming surface as the main light extraction surface. In order to increase the light extraction efficiency of the light emitting device, a reflective structure 54 can be set around the light emitting element 1 or the light emitting element 2.

[0153] Fig.12 Schematic diagram of a light emitting device 4 according to an embodiment of the present invention. The light emitting device 4 is a bulb lamp including a lampshade 602, a reflector 604, a light emitting module 610, a lamp holder 612, a heat sink 614, a connecting portion 616 and an electrical connecting element 618. The light emitting module 610 includes a carrier 606 and a plurality of light emitting units 608 located on the carrier 606, wherein the plurality of light emitting units 608 may be the light emitting element 1, the light emitting element 2, or the light emitting device 3 in the aforementioned embodiment.

[0154] The embodiments listed in the present invention are only used to illustrate the present invention, and are not used to limit the scope of the present invention. Any obvious modification or change made by anyone to the present invention does not deviate from the spirit and scope of the present invention.

Claims

1. A light emitting element, characterized in that: Include: A semiconductor stack having a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer; A first insulating layer, located on the semiconductor stack, comprising an opening to expose the second semiconductor layer; A reflective structure, located on the second semiconductor layer and electrically connected to the second semiconductor layer; A second insulating layer, located on the reflective structure, comprising a second insulating layer opening to expose the reflective structure; a first pad electrically connected to the first semiconductor layer; a second pad electrically connected to the second semiconductor layer; A first contact layer is located between the second semiconductor layer and the first pad; as well as A second contact layer is located between the second semiconductor layer and the second pad and is formed in the opening of the second insulating layer to contact the reflective structure, wherein the second insulating layer includes a central portion and an edge portion separated from the central portion by the opening of the second insulating layer, and the second pad has a projected area on the semiconductor stack, and the central portion is located within the projected area.

2. The light-emitting element as described in claim 1 comprises a plurality of holes passing through the second semiconductor layer and the active layer to expose the first semiconductor layer, the plurality of holes are arranged into a first row and a second row, wherein a first shortest distance is included between two adjacent holes located on the first row, a second shortest distance is included between a hole located on the first row and a hole located on the second row, and the first shortest distance is greater than the second shortest distance.

3. The light-emitting element as described in claim 1 comprises a plurality of holes passing through the second semiconductor layer and the active layer to expose the first semiconductor layer, the plurality of holes are arranged into a first row and a second row, wherein a first shortest distance is included between two adjacent holes located on the first row, a second shortest distance is included between a hole located on the first row and a hole located on the second row, and the first shortest distance is smaller than the second shortest distance.

4. The light-emitting element as described in claim 1 further comprises a plurality of holes passing through the second semiconductor layer and the active layer to expose the first semiconductor layer, wherein the first semiconductor layer has an outer wall, a first shortest distance is included between two adjacent holes, a second shortest distance is included between one of the plurality of holes and the outer wall, and the first shortest distance is smaller than the second shortest distance. The light emitting element as claimed in claim 1 , wherein the second pad is in a comb shape or a rectangular shape.

6. The light-emitting element as described in claim 1 further comprises one or more holes passing through the second semiconductor layer and the active layer to expose the first semiconductor layer, and in the top view of the light-emitting element, the one or more holes are formed in the area outside the first pad and the second pad.

7. The light-emitting element as described in claim 1 further includes one or more hole portions passing through the second semiconductor layer and the active layer to expose the first semiconductor layer, and in the top view of the light-emitting element, the one or more hole portions are covered by the first pad, wherein the second insulating layer further includes a first group of second insulating layer openings located on the first semiconductor layer and corresponding to the one or more hole portions respectively. The light emitting device as claimed in claim 1 , wherein the second contact layer covers the central portion. 9 . The light emitting device as claimed in claim 1 , wherein the second insulating layer opening comprises a ring-shaped opening having a ring-shaped top view.

10. The light-emitting element as claimed in claim 9, further comprising a third insulating layer located on the second insulating layer, the third insulating layer comprising a third insulating layer opening to expose the second contact layer, wherein in a top view of the light-emitting element, the third insulating layer opening is surrounded by the annular opening.

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