Interface components, chips and electronic devices

Abstract

An interface component (200), a chip and an electronic device, comprising: a USB host controller (201), a USB transceiver (202), a control circuit (204) and a first signal switching circuit (205-1), wherein the USB host controller (201) and the control circuit (204) are connected to the USB transceiver (202) via the first signal switching circuit (205-1); and the control circuit (204) is used to control the first signal switching circuit (205-1) to connect the control circuit (204) and the USB transceiver (202) when the USB transceiver (204) is not connected to an external device, so that the control circuit (204) controls the USB transceiver (202) to enter a low power consumption state. The interface component (200) in the above technical solution includes, in addition to the USB host controller (201), a control circuit (204), which can switch the source of the control signal of the USB transceiver (202) through the first signal switching circuit (205-1); when the signal source is the control circuit (204), the control circuit (204) can control the USB transceiver (202) to enter a low power consumption state, thereby reducing the power consumption of the USB interface.

Description

Technical Field

[0001] The present application relates to the field of electronic devices, and more specifically to interface components, chips and electronic devices. Background Art

[0002] Existing low-power solutions for universal serial bus (USB) interfaces are all aimed at scenarios where USB transceivers are connected to external devices. However, in actual use scenarios of personal computers (PCs), tablets, set-top boxes, TVs and other products, USB transceivers are often not connected to external devices.

[0003] If the USB transceiver is not connected to an external device, the USB interface is treated as being in an idle state. Taking a typical 28 nanometer (nm) process chip as an example, the power consumption of a USB interface will be more than 10 milliwatts (mW). In this scenario, the USB interface will generate a large amount of power consumption. Summary of the invention

[0004] The present application provides an interface component, a chip and an electronic device that can reduce the power consumption of a USB interface.

[0005] In a first aspect, the present application provides an interface component, comprising: a universal serial bus (USB) host controller, a USB transceiver, a control circuit and a first signal switching circuit, wherein the USB host controller and the control circuit are connected to the USB transceiver via the first signal switching circuit; the control circuit is used to control the first signal switching circuit to connect the connection between the control circuit and the USB transceiver when the USB transceiver is not connected to an external device, so that the control circuit controls the USB transceiver to enter a low power consumption state.

[0006] In addition to the USB host controller, the interface component in the above technical solution also adds a control circuit, which can switch the source of the USB transceiver control signal through the first signal switching circuit. That is to say, in some cases, the USB transceiver can be controlled by the USB host controller, and in other cases, the USB transceiver can be controlled by the control circuit. And specifically, when the USB transceiver is not connected to an external device, the control circuit can control the first signal switching circuit to connect the connection between the control circuit and the USB transceiver, so that the control circuit controls the USB transceiver to enter a low power consumption state, thereby reducing the power consumption of the USB interface.

[0007] Furthermore, the above technical solution does not change the USB-related protocols, thus avoiding the introduction of USB compatibility issues.

[0008] In one possible implementation, the control circuit is further used to control the USB transceiver to exit the low power state when the USB transceiver is connected to an external device; the control circuit is further used to control the first signal switching circuit to disconnect the connection between the control circuit and the USB transceiver and to connect the connection between the USB host controller and the USB transceiver after the USB transceiver exits the low power state.

[0009] In one possible implementation, the interface component also includes a second signal switching circuit, and the USB transceiver and the control circuit are connected to the USB host controller through the second signal switching circuit; the control circuit is also used to control the second signal switching circuit to connect the control circuit and the USB host controller when the USB transceiver is not connected to an external device.

[0010] In a possible implementation, the interface component also includes a detection circuit, which is connected to the control circuit and the USB transceiver; the detection circuit is used to detect whether an external device is connected to the USB transceiver and transmit the detection result to the control circuit; the control circuit is specifically used to control the USB transceiver to enter the low power consumption state when the detection result indicates that the USB transceiver is not connected to the external device.

[0011] In one possible implementation, the control circuit includes a control register, a status register, an interrupt circuit and a central processing unit CPU; the status register is used to store the detection result of the detection circuit and report the detection result to the CPU through the interrupt circuit; the CPU is used to perform at least one of the following operations when the detection result indicates that the USB transceiver is not connected to an external device: by configuring the first control signal in the control register, control the first signal switching circuit to connect the connection between the control circuit and the USB transceiver; by configuring the second control signal in the control register, control the USB transceiver to enter the low power consumption state; by configuring the third control signal in the control register, control the second signal switching circuit to connect the connection between the control circuit and the USB host controller.

[0012] In a possible implementation, the CPU is further used to perform at least one of the following operations when the detection result indicates that the USB transceiver is connected to an external device: controlling the USB transceiver to exit the low power state by configuring the second control signal in the control register; after the USB transceiver exits the low power state, controlling the first signal switching circuit to disconnect the connection between the control circuit and the USB transceiver and connect the connection between the USB host controller and the USB transceiver by configuring the first control signal in the control register.

[0013] The above technical solution uses software to control the signal switching unit, which is low in cost.

[0014] In one possible implementation, the control circuit includes a control register, a status register and a control logic circuit; the status register is used to store the detection result of the detection circuit; the control logic circuit is used to perform at least one of the following operations when the detection result indicates that the USB transceiver is not connected to an external device: control the first signal switching circuit to connect the connection between the control circuit and the USB transceiver; control the USB transceiver to enter the low power consumption state; control the second signal switching circuit to connect the connection between the control circuit and the USB host controller.

[0015] The above technical solution realizes the control of the signal switching circuit through a logic circuit, which can reduce the complexity of the software compared to the method of using software implementation.

[0016] In one possible implementation, the control logic circuit is further used to perform at least one of the following operations when the detection result indicates that an external device is connected to the USB transceiver: controlling the USB transceiver to exit the low power state; after the USB transceiver exits the low power state, controlling the first signal switching circuit to disconnect the connection between the control circuit and the USB transceiver, and to connect the connection between the USB host controller and the USB transceiver.

[0017] The above technical solution realizes the control of the signal switching circuit through a logic circuit, which can reduce the complexity of the software compared to the method of using software implementation.

[0018] In a possible implementation, the first signal switching circuit includes a first input end, a second input end, a first output end and a first control end, the first input end and the first control end are respectively connected to the control circuit, the second input end is connected to the USB host controller, and the first output end is connected to the USB transceiver; the second signal switching circuit includes a third input end, a fourth input end, a second output end and a second control end, the third input end and the second control end are respectively connected to the control circuit, the fourth input end is connected to the USB transceiver, and the second output end is connected to the USB host controller; the control circuit is specifically used to When the SB transceiver is not connected to an external device, the first control end is used to control the first signal switching circuit to connect the connection between the control circuit and the USB transceiver, and the second control end is used to control the second signal switching circuit to connect the connection between the control circuit and the USB host controller; when the USB transceiver is connected to an external device, the control circuit is also specifically used to control the first signal switching circuit to disconnect the connection between the control circuit and the USB transceiver through the first control end, and to connect the connection between the USB host controller and the USB transceiver through the first control end and the second control end.

[0019] In a possible implementation, the detection circuit includes a filter, which is connected to the control circuit and the USB transceiver and is used to detect whether an external device is connected to the USB transceiver.

[0020] In a possible implementation, when the USB transceiver is in the low power consumption state, a phase-locked loop (PLL) circuit of the USB transceiver is in a closed state.

[0021] Since the PLL circuit is a high-power device in the USB transceiver, the PLL circuit can be turned off. A system clock signal with lower power consumption (or no extra power consumption) can be used to ensure the normal operation of the USB host controller. This can reduce the power consumption of the USB interface.

[0022] In a second aspect, the present application provides a control method, which is applied to an interface component, wherein the interface component includes a universal serial bus USB host controller, a USB transceiver, a control circuit and a first signal switching circuit, wherein the USB host controller and the control circuit are connected to the USB transceiver through the first signal switching circuit, and the method includes: when the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the connection between the control circuit and the USB transceiver, so that the control circuit controls the USB transceiver to enter a low power consumption state.

[0023] In a possible implementation, the method further includes: when the USB transceiver is connected to an external device, the control circuit controls the USB transceiver to exit the low power state; after the USB transceiver exits the low power state, the control circuit controls the first signal switching circuit to disconnect the connection between the control circuit and the USB transceiver, and connect the connection between the USB host controller and the USB transceiver.

[0024] In one possible implementation, the interface component also includes a second signal switching circuit, and the USB transceiver and the control circuit are connected to the USB host controller through the second signal switching circuit. The method also includes: when the USB transceiver is not connected to an external device, the control circuit controls the second signal switching circuit to connect the control circuit and the USB host controller.

[0025] In a possible implementation, the interface component also includes a detection circuit, which is connected to the control circuit and the USB transceiver. The method also includes: the control circuit receives a detection result transmitted by the detection circuit, and the detection result is used to indicate whether an external device is connected to the USB transceiver; when the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the connection between the control circuit and the USB transceiver, so that the control circuit controls the USB transceiver to enter a low power consumption state, including: when the detection result indicates that the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the connection between the control circuit and the USB transceiver, and controls the USB transceiver to enter the low power consumption state.

[0026] In a possible implementation, the first signal switching circuit includes a first input end, a second input end, a first output end and a first control end, the first input end and the first control end are respectively connected to the control circuit, the second input end is connected to the USB host controller, and the first output end is connected to the USB transceiver; the second signal switching circuit includes a third input end, a fourth input end, a second output end and a second control end, the third input end and the second control end are respectively connected to the control circuit, the fourth input end is connected to the USB transceiver, and the second output end is connected to the USB host controller; when the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect to the external device. The connection between the control circuit and the USB transceiver includes: when the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit through the first control end to connect the connection between the control circuit and the USB transceiver, and controls the second signal switching circuit through the second control end to connect the connection between the control circuit and the USB host controller; when the USB transceiver is connected to an external device, the control circuit controls the first signal switching circuit through the first control end to disconnect the connection between the control circuit and the USB transceiver, and connect the connection between the USB host controller and the USB transceiver through the first control end and the second control end.

[0027] In a possible implementation, the detection circuit includes a filter, which is connected to the control circuit and the USB transceiver and is used to detect whether an external device is connected to the USB transceiver.

[0028] In a possible implementation, when the USB transceiver is in the low power consumption state, a phase-locked loop (PLL) circuit of the USB transceiver is in a closed state.

[0029] In a third aspect, the present application provides a chip, comprising a processor and an interface component as described in the first aspect or any possible implementation manner of the first aspect.

[0030] In a fourth aspect, the present application provides an electronic device, comprising a processor, a memory, and an interface component as described in the first aspect or any possible implementation of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a schematic structural diagram of a USB system to which the technical solution of the embodiment of the present application can be applied.

[0032] Figure 2 It is a schematic structural diagram of the interface component of an embodiment of the present application.

[0033] Figure 3 It is a schematic diagram of the signal flow of the interface component of an embodiment of the present application.

[0034] Figure 4 It is a schematic diagram of another signal flow of the interface component of an embodiment of the present application.

[0035] Figure 5 It is a schematic structural diagram of the control circuit of an embodiment of the present application.

[0036] Figure 6 It is a schematic structural diagram of another control circuit of an embodiment of the present application.

[0037] Figure 7 It is a schematic structural diagram of MUX.

[0038] Figure 8 It is a schematic structural diagram of an interface component provided in another embodiment of the present application.

[0039] Fig. 9 It is a schematic structural diagram of an interface component provided in yet another embodiment of the present application. DETAILED DESCRIPTION

[0040] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0041] The technical solution of the embodiment of the present application can be applied to various devices or products that need to reduce interface power consumption, as long as the device or product transmits data with an external device through a USB interface. For example, PC, tablet computer, set-top box, TV, etc. It can be understood that the technical solution of the embodiment of the present application can also be applied to other types of interface systems, such as high definition multimedia interface (HDMI), external serial advanced technology attachment (E-SATA) interface, video graphics array (VGA) interface, etc. This application takes the USB interface as an example to describe the technical solution of the present application.

[0042] The embodiment of the present application does not specifically limit the type of USB interface, for example, it can be Micro-USB, Mini-USB, Sub-USB, USB-type C, etc.

[0043] Figure 1is a schematic structural diagram of a USB system to which the technical solution of the embodiment of the present application can be applied. Figure 1 As shown, the USB host controller 101 is connected to a memory 114 (for example, a double data rate synchronous dynamic random access memory (DDR SDRAM), a central processing unit (CPU) 1041 and a USB transceiver 102 through a system bus 115. After receiving a task sent by the CPU 1041, the USB host controller 101 implements the reading or writing of data between the memory 104 and the external device 106 through the USB transceiver 102, wherein the external device 106 is connected to the USB transceiver 102.

[0044] The existing low-power consumption schemes of USB interfaces are all for the scenario where the USB transceiver is connected to a USB device. However, in the actual use scenarios of products such as personal computers (PCs), tablet computers, set-top boxes, and televisions, the USB transceiver is more often in a state where the USB device is not connected. For the case where the USB transceiver is not connected to a USB device, it is usually processed as if the USB host controller and the USB transceiver are in an idle state, rather than entering a suspended state. Taking a typical 28 nanometer (nm) process chip as an example, the power consumption of a USB interface will be more than 10 milliwatts (mW). In this scenario, the USB interface will generate a large power consumption. Therefore, the embodiment of the present application provides a low-power consumption scheme for the scenario where the USB transceiver is not connected to a USB device based on the interface component 200.

[0045] Figure 2 is a schematic structural diagram of the interface component of the embodiment of the present application. Figure 2 As shown, the interface component 200 includes a USB host controller 201, a USB transceiver 202, a control circuit 204 and a first signal switching circuit 205-1. The USB host controller 201 and the USB transceiver 202 can be respectively connected to Figure 1 The USB host controller 101 and the USB transceiver 102 correspond to each other.

[0046] The USB host controller 201 and the control circuit 204 are connected to the USB transceiver 202 via the first signal switching circuit 205-1. That is, the control circuit 204 and the first signal switching circuit 205-1 are added between the USB host controller 201 and the USB transceiver 202.

[0047] The embodiment of the present application does not specifically limit the type of the USB host controller 201, such as an enhanced host controller interface (EHCI) host controller, a universal host controller interface (UHCI) host controller, an open host controller interface (OHCI) host controller, etc.

[0048] The embodiment of the present application does not specifically limit the type of the USB transceiver 202, such as a USB 2.0 transceiver macrocell interface (USB 2.0 transceiver macrocell interface, UTMI) transceiver.

[0049] The control circuit 204 is used to control the first signal switching circuit 205-1 to connect the connection between the control circuit 204 and the USB transceiver 202 when the USB transceiver 202 is not connected to an external device, so that the control circuit 204 controls the USB transceiver 202 to enter a low power consumption state. The connection between the control circuit 204 and the USB transceiver 202 may be connected to signal transmission / reception between the two.

[0050] Specifically, when the first signal switching circuit 205-1 connects the connection between the control circuit 204 and the USB transceiver 202, the control signal sent by the control circuit 204 can reach the USB transceiver 202, thereby changing the state of the USB transceiver 202. Optionally, when the USB transceiver 202 is in a low-power state, at least part of the circuit is turned off to save power consumption, for example, the low-power state is a suspended state. Optionally, when the USB transceiver 202 is in a low-power state, the phase-locked loop PLL circuit of the USB transceiver 202 is turned off. Since, without changing the existing USB protocol, in the technical solution of the embodiment of the present application, the USB transceiver 202 is in a low-power state when no external device is connected, and the USB host controller 201 is in a non-low-power state, therefore, in order to make the USB host controller 201 work normally, when the USB transceiver 202 is in a low-power state, the USB host controller 201 can be connected to the system clock signal.

[0051] That is to say, when the USB transceiver 202 is connected to an external device, the USB transceiver 202 is controlled by the USB host controller 201 and is in a high power consumption state, waiting for data transmission; when the USB transceiver 202 is not connected to an external device, the USB transceiver 202 is controlled by the control circuit 204 to enter a lower power consumption state, such as a low power consumption state, thereby reducing the power consumption of the USB interface.

[0052] The first signal switching circuit 205-1 of the embodiment of the present application can be switched according to whether the USB transceiver 202 is connected to an external device. As an example, the first signal switching circuit 205-1 can be controlled by the control circuit 204. Specifically, when the USB transceiver 202 is connected to an external device, the control circuit 204 controls the first signal switching circuit 205-1 to connect the connection between the USB host controller 201 and the USB transceiver 202. When the USB transceiver 202 is not connected to an external device, the control circuit 204 controls the first signal switching circuit 205-1 to connect the connection between the control circuit 204 and the USB transceiver 202.

[0053] It can be understood that the interface component implemented in the present application can also have more control circuits, for example, two control circuits or more than two control circuits. Accordingly, the first signal switching circuit 205-1 in the embodiment of the present application can also switch more signals, for example, 3 or more than 3. Take the example that the interface component has two control circuits 204-1 and 204-2, and the first signal switching circuit 205-1 can switch between 3 signals. For example, when the first signal switching circuit 205-1 connects the connection between the USB host controller 201 and the USB transceiver, the USB transceiver is in an idle state; when the first signal switching circuit 205-1 connects the connection between the control circuit 204-1 and the USB transceiver 202, the USB transceiver is in a low power consumption state; when the first signal switching circuit 205-1 connects the connection between the control circuit 204-2 and the USB transceiver 202, the USB transceiver is in a state other than the idle state and the low power consumption state. For the convenience of description, the following description is made by taking an example that the interface component has a control circuit 204 and the first signal switching circuit 205-1 can switch between two signals.

[0054] Optionally, the control circuit 204 is further configured to control the USB transceiver 202 to exit the low power state when the USB transceiver 202 is connected to an external device. For example, the control circuit may control the USB transceiver 202 to exit the low power state when an external device is plugged into the USB transceiver 202.

[0055] Optionally, the control circuit 204 is further used to control the first signal switching circuit 205 - 1 to disconnect the connection between the control circuit 204 and the USB transceiver 202 , and connect the connection between the USB host controller 201 and the USB transceiver 202 after the USB transceiver 202 exits the low power consumption state.

[0056] That is to say, without changing the existing USB protocol, in the technical solution of the embodiment of the present application, when the USB transceiver 202 is not connected to an external device, the USB transceiver 202 is switched to a low power state, and the USB host controller 201 is in an idle state rather than a low power state. Therefore, when the USB transceiver 202 is connected to an external device, in order to avoid various problems caused by the inconsistency between the states of the USB transceiver 202 and the USB host controller 201, it is necessary to first restore the USB transceiver 202 to a normal state, for example, turning on a circuit that is turned off in a low power state, etc., so that the USB transceiver 202 is restored to a normal state, and then the signal connection between the USB host controller and the USB transceiver is turned on.

[0057] It can be understood that when the first signal switching circuit 205-1 connects the connection between the control circuit 204 and the USB transceiver 202, the signal sent by the USB host controller 201 to the USB transceiver 202 is disconnected; when the first signal switching circuit 205-1 connects the connection between the USB host controller 201 and the USB transceiver 202, the signal sent by the control circuit 204 to the USB transceiver 202 is disconnected. This can avoid interference between signals.

[0058] Optionally, the interface component 200 further includes a second signal switching circuit 205-2. The USB transceiver 202 and the control circuit 204 are connected to the USB host controller 201 via the second signal switching circuit 205-2. In other words, the signal source of the input signal of the USB host controller 201 can be changed by the second signal switching circuit 205-2. The control circuit 204 is also used to control the second signal switching circuit 205-2 to connect the connection between the control circuit 204 and the USB host controller 201 when the USB transceiver 202 is not connected to an external device.

[0059] It should be noted that the control signals of the first signal switching circuit 205 - 1 and the second signal switching circuit 205 - 2 may be the same control signal or different control signals.

[0060] That is to say, when the USB transceiver is connected to a USB device, the USB device is in a high power consumption state to prepare for data transmission, and when the USB transceiver is not connected to a USB device, the USB controller can be controlled by the control circuit to enter a lower power consumption state, such as a low power consumption state, thereby reducing the power consumption of the USB interface.

[0061] Optionally, the interface component 200 of the embodiment of the present application also includes a detection circuit 203, which is connected to the USB transceiver 202 and the control circuit 204, and is used to detect whether the USB transceiver 202 is connected to an external device, and send the detection result to the control circuit 204, so as to control the single circuit 204 to control the first signal switching circuit 205-1, the second signal switching circuit 205-2 and the USB transceiver 202 according to the detection result.

[0062] The detection result of the detection circuit can be represented by the state value of the bit or the high or low level of the output signal of the detection circuit. As an example, it is represented by two bits, one of which indicates whether an external device is connected, and one bit indicates whether the connection state has changed. For example, when the state value of the two bits is 00, it means that the USB transceiver 202 is always in a state where no external device is connected; when the state value of the two bits is 01, it means that no external device is connected and the state has changed, that is, the external device on the USB transceiver 202 is unplugged; when the state value of the two bits is 10, it means that an external device is connected and the state has not changed, that is, the USB transceiver 202 is always connected to the external device; when the state value of the two bits is 11, it means that an external device is connected and the state has changed, that is, the external device is inserted into the USB transceiver 202.

[0063] Combine the following Figure 3 and Figure 4 The signal flow of the interface component 200 is described.

[0064] For the case where the USB transceiver 202 is not connected to an external device, such as Figure 3As shown, the detection circuit 203 receives a first signal 310 from the USB transceiver 202, and generates a second signal 307 when the first signal 310 indicates that the USB transceiver 202 is not connected to an external device. The second signal 307 is used to indicate to the control circuit 204 that the USB transceiver 202 is not connected to an external device; after receiving the second signal 307, the control circuit 204 controls the first signal switching circuit 205-1 to disconnect the connection between the USB host controller 201 and the USB transceiver 202, and connect the connection between the control circuit 204 and the USB transceiver 202, so that the second control signal 311 sent by the control circuit 204 reaches the USB transceiver 202; and controls the second signal switching circuit 205-2 to disconnect the connection between the USB host controller 201 and the USB transceiver 202, and connect the connection between the control circuit 204 and the USB host controller 201; after receiving the second control signal 311, the USB transceiver 202 enters a low power consumption state.

[0065] For the case where the USB transceiver 202 is connected to an external device, such as Figure 4 As shown, when the first signal 310 indicates that the USB transceiver 202 is connected to an external device, the detection circuit 203 generates a third signal 412, and the third signal 412 is used to indicate to the control circuit 204 that the USB transceiver 202 is connected to the external device; after receiving the third signal 412, the control circuit 204 sends a fourth control signal 413 to the USB transceiver 202 when the signal between the control circuit 204 and the USB transceiver 202 is connected; after receiving the fourth control signal 413, the USB transceiver 202 exits the low power state; after the USB transceiver 202 exits the low power state, the control circuit 204 controls the first signal switching circuit 205-1 to disconnect the connection between the control circuit 204 and the USB transceiver, and connect the connection between the USB host controller 201 and the USB transceiver 202.

[0066] In addition, when the system is initialized, the USB host controller 201 and the USB transceiver 202 use the signal from the control circuit 204 by default. That is, if the USB transceiver 202 is not connected to an external device from beginning to end, the USB transceiver 202 can be in a low power consumption state. In this way, the power consumption of a USB interface that has never been used can also be reduced.

[0067] It should be understood that when the signal sources of the USB transceiver 202 and the USB host controller 201 are switched, the signal in the control circuit 204 for controlling the first signal switching circuit 205 - 1 and the second signal switching circuit 205 - 2 always remains connected.

[0068] The embodiment of the present application does not specifically limit the form of the control circuit 204 as long as it can achieve the functions described above.

[0069] As an example, Figure 5 As shown, the control circuit 204 includes a control register 204-4, a status register 204-1, an interrupt circuit 204-2 and a CPU 204-3. The status register 204-1 is used to store the detection result of the detection circuit 203, and report the detection result to the CPU 204-3 through the interrupt circuit 204-2. The CPU 204-3 is used to perform at least one of the following operations when the detection result indicates that the USB transceiver 202 is not connected to an external device:

[0070] By configuring the first control signal in the control register 204-4, the first signal switching circuit 205-1 is controlled to connect the connection between the control circuit 204 and the USB transceiver 202; by configuring the second control signal 311 in the control register 204-4, the USB transceiver 202 is controlled to enter a low power consumption state; by configuring the third control signal in the control register 204-4, the second signal switching circuit 205-2 is controlled to connect the connection between the control circuit 204 and the USB host controller 201.

[0071] The CPU 204-3 is further configured to, when the detection result indicates that the USB transceiver 202 is connected to an external device, perform at least one of the following operations:

[0072] The USB transceiver 202 is controlled to exit the low power state by configuring the second control signal 311 in the control register 204-4; after the USB transceiver 202 exits the low power state, the first signal switching circuit 205-1 is controlled by configuring the first control signal of the control register 204-4 to disconnect the connection between the control circuit 204 and the USB transceiver 202, and connect the connection between the USB host controller 201 and the USB transceiver 202.

[0073] Specifically, when the USB transceiver 202 is not connected to an external device, the status register 204-1 is used to report a first interrupt event to the CPU 204-3 through the interrupt circuit 204-2 after receiving the second signal 307 from the detection circuit 203. The first interrupt event is that the USB transceiver 202 is not connected to an external device (for example, when the external device is unplugged). The CPU 204-3 is used to configure the control register 204-4 according to the first interrupt event, so that the control register 204-4 controls the first signal switching circuit 205-1 to disconnect the connection between the USB host controller 201 and the USB transceiver 202, and connect the connection between the control circuit 204 and the USB transceiver 202, so that the second control signal 311 issued by the control circuit 204 reaches the USB transceiver 202; and controls the second signal switching circuit 205-2 to disconnect the connection between the USB host controller 201 and the USB transceiver 202, and connect the connection between the control circuit 204 and the USB host controller 201; after receiving the second control signal 311, the USB transceiver 202 enters a low power consumption state.

[0074] In the case where an external device is inserted into the USB transceiver 202, the status register 204-1 is used to report a second interrupt event to the CPU 204-3 through the interrupt circuit 204-2 after receiving the third signal 412 from the detection circuit 203. The first interrupt event is that the USB transceiver 202 is connected to the external device (for example, when the external device is inserted). The CPU 204-3 is used to configure the control register 204-4 according to the second interrupt event so as to send a fourth control signal 413 to the USB transceiver 202 when the signal between the control circuit 204 and the USB transceiver 202 is connected; the USB transceiver 202 exits the low power state after receiving the fourth control signal 413; after the USB transceiver 202 exits the low power state, the control circuit 204 controls the first signal switching circuit 205-1 to disconnect the connection between the control circuit 204 and the USB transceiver, and connect the connection between the USB host controller 201 and the USB transceiver 202.

[0075] As another example, Figure 6 As shown, the control circuit 204 includes a control register 204-6, a status register 204-5 and a control logic circuit 204-7. The status register 204-5 is used to store the detection result of the detection circuit 203; the control logic circuit 204-7 is used to perform at least one of the following operations when the detection result indicates that the USB transceiver 202 is not connected to an external device:

[0076] The first signal switching circuit 205 - 1 is controlled to connect the control circuit 204 to the USB transceiver 202 ; the USB transceiver 202 is controlled to enter a low power consumption state; and the second signal switching circuit 205 - 2 is controlled to connect the control circuit 204 to the USB host controller 201 .

[0077] The control logic circuit 204-7 is further configured to, when the detection result indicates that an external device is connected to the USB transceiver 202, perform at least one of the following operations:

[0078] Control the USB transceiver 202 to exit the low power state; after the USB transceiver 202 exits the low power state, control the first signal switching circuit 205-1 to disconnect the connection between the control circuit 204 and the USB transceiver 202, and connect the connection between the USB host controller 201 and the USB transceiver 202.

[0079] Specifically, for the case where the USB transceiver 202 is not connected to an external device, the status register 204-5 is used to generate a fourth signal after receiving the second signal 307 from the detection circuit 203, and the control logic circuit 204-7 is used to control the first signal switching circuit 205-1 to connect the connection between the control logic circuit 204-7 and the USB transceiver 202, and the connection between the control register 204-6 and the USB transceiver 202 after receiving the fourth signal, and control the second signal switching circuit 205-2 to connect the connection between the control register 204-6 and the USB host controller 201, so as to control the USB transceiver 202 to enter a low power consumption state.

[0080] When an external device is inserted into the USB transceiver 202, the status register 204-5 is used to generate a fifth signal after receiving the third signal 412 from the detection circuit, and the control logic circuit 204-7 is used to control the USB transceiver 202 to exit the low power state after receiving the fifth signal. After the USB transceiver 202 exits the low power state, the first signal switching circuit 205-1 is controlled to connect the connection between the USB host controller 201 and the USB transceiver 202, and the second signal switching circuit 205-2 is controlled to connect the connection between the USB transceiver 202 and the USB host controller 201.

[0081] It is understandable that the control circuit 204 may be implemented entirely by software programming, or entirely by hardware, or by a combination of software and hardware, and this embodiment of the present application does not specifically limit this.

[0082] The present application does not specifically limit the form of the first signal switching circuit 205-1. As an example, the first signal switching circuit 205-1 can be implemented by one or more multiplexers (multiplexers, MUX). Optionally, the first signal switching circuit 205-1 includes a first input terminal, a second input terminal, a first output terminal and a first control terminal, the first input terminal and the first control terminal are respectively connected to the control circuit 204, the second input terminal is connected to the USB transceiver 202, and the first output terminal is connected to the USB host controller 201. When the USB transceiver is not connected to an external device, the control circuit 204 controls the first signal switching circuit 205-1 to connect the connection between the control circuit 204 and the USB transceiver 202 through the first control terminal; when the USB transceiver 202 is connected to an external device, the first signal switching circuit 205-1 is controlled to disconnect the connection between the control circuit 204 and the USB transceiver 202 through the first control terminal, and connect the signal sent from the USB host controller 201 to the USB transceiver 202.

[0083] Similarly, the second signal switching circuit 205-2 can be implemented by one or more MUXs. Optionally, the second signal switching circuit 205-2 includes a third input terminal, a fourth input terminal, a second output terminal and a second control terminal, the third input terminal and the second control terminal are respectively connected to the control circuit 204, the fourth input terminal is connected to the USB host controller 201, and the second output terminal is connected to the USB transceiver 202. When the USB transceiver is not connected to an external device, the control circuit 204 can control the second signal switching circuit 205-2 to connect the connection between the control circuit 204 and the USB host controller 201 by controlling the second control terminal; when the USB transceiver 202 is connected to an external device, the second signal switching circuit 205-2 is controlled to disconnect the connection between the control circuit 204 and the USB host controller 201 through the second control terminal, and connect the signal sent from the USB transceiver 202 to the USB host controller 201.

[0084] Figure 7 This is a schematic diagram of the MUX structure. Figure 7 As shown, the MUX has two input terminals A and B, an output terminal D, and a control terminal C. The input terminals A and B may correspond to the first input terminal, the second input terminal, or the third input terminal, the fourth input terminal, respectively, the output terminal D may correspond to the first output terminal or the second output terminal, and the control terminal C may correspond to the first control terminal or the second control terminal. The control circuit 204 may realize the output terminal D = input terminal A or the output terminal D = input terminal B through the control terminal C, thereby realizing signal switching.

[0085] It should be understood that the implementation method of MUX in the embodiment of the present application is not specifically limited. For example, it can be implemented using software programming, or it can be implemented through hardware, or it can be implemented through a combination of software and hardware.

[0086] The embodiment of the present application does not specifically limit the form of the detection circuit 203, as long as it can detect whether the USB transceiver 202 is connected to an external device. For example, the detection circuit 203 can be a filter. The present application does not specifically limit the implementation method of the detection circuit, for example, it can be implemented by software programming, or by hardware, or by a combination of software and hardware.

[0087] The technical solution of the embodiment of the present application is described in detail below with reference to specific examples.

[0088] Figure 8 It is a schematic structural diagram of an interface component provided in another embodiment of the present application. Figure 8 The USB host controller 801 in the figure can correspond to the host controller 201 mentioned above, the USB2.0 transceiver macro unit interface physical layer (UTMI physical layer, UTMI PHY) 802 can correspond to the USB transceiver 202 mentioned above, the control circuit 804 (including the interrupt circuit 8042, the CSR 8041 and the CPU 8043) can correspond to the control circuit 204 mentioned above, the 10 MUXs can correspond to the signal switching circuit 205 mentioned above, and the filter 803 can correspond to the detection circuit 203 mentioned above.

[0089] Taking the EHCI host controller and UTMI PHY as an example, the interface standard between the EHCI host controller (i.e., the logical layer) and the UTMI PHY (i.e., the physical layer) is UTMI. The signal description between the EHCI host controller and UTMI PHY is as follows:

[0090] utmi_linestate: corresponds to 1 and 11, and is a signal used to feedback the connection status of the USB bus. According to the UTMI interface protocol, when UTMI PHY 802 enters the suspend state, the phase-locked loop (PLL) clock source inside UTMI PHY 802 is turned off, but the utmi_linestate signal can be directly reflected by the combinational logic circuit. That is to say, after UTMI PHY 802 enters the low-power state, the utmi_linestate signal can still transmit the connection status of the external device.

[0091] utmi_hostdisconnect: corresponds to 2 and 12, and is used to provide feedback on whether the UTMI PHY 802 is disconnected.

[0092] utmi_suspendm: corresponds to 3 and 13, a signal used to control whether UTMI PHY 802 is in standby (i.e., suspended state), and low level is valid;

[0093] utmi_xcvselect[1:0]: corresponds to 4 and 14, and is used to control whether UTMI PHY 802 selects the high-speed channel signal;

[0094] utmi_termselect: corresponds to 5 and 15, and is used to control whether the UTMI PHY 802 is connected to a high-speed resistor;

[0095] utmi_opmode[1:0]: corresponds to 6 and 16, and is a signal used to control whether UTMI PHY 802 works in normal coding mode;

[0096] utmi_rx: corresponds to 7 and 17, used for UTMI PHY 802 to send data received from an external device to USB host controller 801;

[0097] utmi_tx: corresponds to 8 and 18, used for UTMI PHY 802 to send data received from USB host controller 801 to external devices;

[0098] clk_utmi: corresponds to 9 and 19, the working clock signal of UTMI PHY 802, connected from UTMI PHY 802 to USB host controller 801 via clock gating 816, 60MHz, stopped in suspend state;

[0099] clk_free: corresponds to 10 and 20, the working clock signal of UTMI PHY 802, connected from UTMI PHY 802 to USB host controller 801 via clock gating 817, 60MHz, and does not stop in suspend state.

[0100] like Figure 8As shown, the embodiment of the present application makes some incremental circuit designs between the EHCI host controller and the UTMI PHY to implement the above-mentioned solution. Specifically, MUX 805-1, 805-2 and 805-7 are respectively set between utmi_linestate, utmi_hostdisconnect, and utmi_rx, MUX 805-3, 805-4, 805-5 and 805-6 are respectively set between utmi_suspendm, utmi_rcvselect[1:0], utmi_termselect, utmi_opmode[1:0], and utmi_tx, and MUX 805-9 and 805-10 are respectively set between clk_utmi and clk_free, wherein the output ends of MUX 805-1, 805-2 and 805-7 are connected to the USB host controller 801, the control end is connected to the control register 804-4, and the two input ends are respectively connected to the control register 804-4 and the UTMI PHY 802, and MUX The output ends of 805-3, 805-4, 805-5 and 805-6 are connected to the USB transceiver 802, the control end is connected to the control register 804-4, and the two input ends are respectively connected to the control register 804-4 and the USB host controller 801. The output ends of MUX 805-9 and 805-10 are connected to the USB host controller 801, the control end is connected to the control register 804-4, and the two input ends are respectively connected to the system clock signal 818 and the UTMI PHY 802. In addition to being the input of MUX 805-1, the utmi_linestate signal from UTMIPHY 802 is also used as the input of filter 803, so that when UTMI PHY 802 is controlled by control circuit 804, the status register 804-1 can know whether UTMI PHY 802 is connected to an external device, wherein filter 803 is a connection status detection filter for preventing false detection of the connection status. The interrupt circuit 804-2 can be a level-triggered interrupt signal line, and the signal can maintain a high level to trigger an interrupt.

[0101] It should be noted that Figure 8 The control terminal (ie, the select signal) of each MUX in the circuit is not shown. In fact, the control terminal of each MUX is connected to the control register 804-4.

[0102] The initial settings of the interface component 800 are default values, and the specific configuration is as follows Figure 8As shown, for example, the utmi_termselect input is 1, and the clk_free / clk_utmi and other inputs are the system clock signal (clk_from_crg) 818, that is, in the initial state, the control circuit 804 controls the connection state between the USB host controller 801 and the UTMI PHY 802. When no external device is plugged into the UTMI PHY 802, the control circuit 804 (or software) controls the disconnection between the USB host controller 801 and the UTMI PHY 802 through the MUX. When an external device is plugged into the UTMI PHY 802, the control circuit 804 controls the UTMI PHY 802 and the USB host controller 801 to be connected, for example, the utmi_terselect of the USB host controller 801 is connected to the utmi_terselect of the UTMI PHY 802, the clk_free / clk_utmi of the USB host controller 801 is connected to the clk_free / clk_utmi of the UTMI PHY 802, etc., and the interface component 800 is restored to the normal mode.

[0103] The interface component 800 detects whether the UTMI PHY 802 is connected to an external device through the filter 803. Specifically, the filter 803 is configured to detect whether the UTMI PHY 802 is connected to an external device using the utmi_linestate signal. More specifically, when the current state of the UTMI PHY 802 is that the external device is not connected, if the filter 803 detects that utmi_linestate[1:0] is equal to 2'b00 and the duration is greater than x milliseconds, it indicates that the external device is unplugged from the UTMI PHY 802; when the current state of the UTMI PHY 802 is that the external device is connected, if the filter 803 detects that utmi_linestate[1:0] is not equal to 2'b00 and the duration is greater than y milliseconds (ms), it indicates that the external device is plugged into the UTMI PHY 802.

[0104] It should be understood that for the selection of x, it should be ensured that when an external device is plugged into UTMI PHY 802, according to the USB protocol, utmi_linestate should last at least 3ms to ensure that the external device is stably connected, so x is at least greater than 3ms. Further considering that if x is selected too large, the detection time will be very long. Therefore, preferably, the default value of x can be 10ms, and x can be configured by a register. Similarly, for the selection of y, it should be ensured that when no external device is plugged into UTMI PHY802, the USB bus will not have a situation where utmi_linestate is not equal to 2'b00 for a duration greater than y milliseconds. According to the USB2.0 protocol, y is at least 0.25ms. If the value of y is too small, it is easily disturbed by external glitches, and if the value of y becomes larger, the detection time will become longer. Therefore, preferably, the default value of y can be 10ms, and y can be configured by a register. In this way, the solution of the embodiment of the present application can ensure the reliability of plug-in detection and reduce false detection.

[0105] The main working process of the interface component 800 is described below.

[0106] 1. Initialization

[0107] When the system is initialized, the connection state between the USB host controller 801 and the UTMI PHY 802 is the default value, which is in a non-connected state. For example, the control circuit 804 controls clk_free / clk_utmi to clk_from_crg, utmi_suspendm to 0, etc., and the UTMI PHY 802 enters a standby state (or a low power consumption state). If no external device is plugged into the UTMI PHY 802, the UTMI PHY 802 will always be in a low power consumption state.

[0108] 2. Device insertion

[0109] When an external device is inserted into UTMI PHY 802, filter 803 detects the insertion of the external device, status register 804-1 stores the connection status, and reports the interrupt event of the external device insertion to CPU 804-3 through interrupt circuit 804-2. At this time, the software receives the interrupt event, sets utmi_suspendm to 1 through control register 804-4, and makes UTMI PHY802 exit the standby state. After UTMI PHY 802 exits the standby state, the signal connection between USB host controller 801 and UTMI PHY802 is set. When connecting the signal between USB host controller 801 and UTMI PHY 802, first control the clk_free / clk_utmi between USB host controller 801 and UTMI PHY 802 to connect, and then control other signals to connect. After completion, USB host controller 801 and UTMI PHY 802 enter the normal connection state, and the normal working process thereafter is the same as the prior art.

[0110] 3. Unplug the device

[0111] When an external device is unplugged from UTMI PHY 802, filter 803 detects that the external device is unplugged, status register 804-1 stores the connection status, and reports the interrupt event of the external device being unplugged to CPU 804-3 through interrupt circuit 804-2. At this time, the software receives the interrupt event, first controls the signal (for example, clk_free, clk_utmi, etc.) between USB host controller 801 and UTMI PHY802 to be disconnected through control register 804-4, and then sets utmi_suspend to 0, so that UTMIPHY 802 enters standby mode, that is, returns to a low power consumption state.

[0112] Fig. 9 It is a schematic structural diagram of an interface component provided in another embodiment of the present application. Fig. 9 The control circuit 904 includes a control register 904-6, a state register 904-5, and a control logic circuit 904-7, wherein the control logic circuit 904-7 includes a state machine. Fig. 9 As shown, the control end of each MUX is connected to the control logic circuit 904-7.

[0113] The difference between the interface component 800 and the interface component 900 is that the interface component 800 has an interrupt design, and software needs to cooperate with logic to implement the above processing flow. For example, after receiving an interrupt event, the CPU 804-3 controls the UTMIPHY 802 to enter or exit a low power state according to a specific event, while in the interface component 900, these operations are completed by the control logic circuit 904-7. The interface component 900 slightly increases the complexity of the logic circuit, but the benefit is that it does not require software participation, avoiding increased software maintenance costs.

[0114] Optionally, the control logic circuit 904 - 7 may adopt an existing basic functional module.

[0115] The structures and functions of other parts of the interface component 900 (eg, USB host controller 901, UTMI PHY 902, filter 903, etc.), as well as the workflow of the interface component 900 can be found in Figure 8 The relevant description will not be repeated here.

[0116] The technical solution of the embodiment of the present application makes up for the lack of consideration of the low-power consumption scenario of the USB2.0 protocol. When the interface component is not connected to an external device, the UTMI PHY is configured to a suspended state, which can significantly reduce the overall power consumption of the USB interface component. Taking a typical 28 nanometer (nm) process chip as an example, the area of ​​​​the UTMI PHY is about 10 times that of the USB host controller. Reducing the power consumption of the PHY can significantly reduce the overall power consumption of the USB. For the scenario where the USB interface component is not connected to an external device, the measured data of the 28nm process is as follows: If the UTMI PHY does not enter the low-power state, the power consumption of the USB interface component is about 15 milliwatts (mW); if the UTMI PHY enters the low-power state, the power consumption of the USB interface component is about 0.5mW, saving more than 96% of power consumption.

[0117] The embodiment of the present application also provides a control method. The method is applied to an interface component, the interface component includes a universal serial bus USB host controller, a USB transceiver, a control circuit and a first signal switching circuit, wherein the USB host controller and the control circuit are connected to the USB transceiver through the first signal switching circuit, and the method includes: when the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the connection between the control circuit and the USB transceiver, so that the control circuit controls the USB transceiver to enter a low power consumption state.

[0118] Optionally, the method also includes: when the USB transceiver is connected to an external device, the control circuit controls the USB transceiver to exit the low power state; after the USB transceiver exits the low power state, the control circuit controls the first signal switching circuit to disconnect the connection between the control circuit and the USB transceiver, and connect the connection between the USB host controller and the USB transceiver.

[0119] Optionally, the interface component also includes a second signal switching circuit, and the USB transceiver and the control circuit are connected to the USB host controller through the second signal switching circuit. The method also includes: when the USB transceiver is not connected to an external device, the control circuit controls the second signal switching circuit to connect the control circuit and the USB host controller.

[0120] Optionally, the interface component also includes a detection circuit, which is connected to the control circuit and the USB transceiver. The method also includes: the control circuit receives a detection result transmitted by the detection circuit, and the detection result is used to indicate whether an external device is connected to the USB transceiver; when the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the connection between the control circuit and the USB transceiver, so that the control circuit controls the USB transceiver to enter a low power consumption state, including: when the detection result indicates that the USB transceiver is not connected to an external device, controlling the first signal switching circuit to connect the connection between the control circuit and the USB transceiver, and controlling the USB transceiver to enter the low power consumption state.

[0121] Optionally, the first signal switching circuit includes a first input terminal, a second input terminal, a first output terminal and a first control terminal, the first input terminal and the first control terminal are respectively connected to the control circuit, the second input terminal is connected to the USB host controller, and the first output terminal is connected to the USB transceiver; the second signal switching circuit includes a third input terminal, a fourth input terminal, a second output terminal and a second control terminal, the third input terminal and the second control terminal are respectively connected to the control circuit, the fourth input terminal is connected to the USB transceiver, and the second output terminal is connected to the USB host controller; when the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect to the control circuit The method comprises the steps of controlling the first signal switching circuit to connect the control circuit with the USB transceiver through the first control terminal when the USB transceiver is not connected to an external device, and controlling the second signal switching circuit to connect the control circuit with the USB host controller through the second control terminal; and controlling the first signal switching circuit to disconnect the control circuit from the USB transceiver through the first control terminal when the USB transceiver is connected to an external device, and connecting the USB host controller with the USB transceiver through the first control terminal and the second control terminal.

[0122] Optionally, the detection circuit includes a filter, which is connected to the control circuit and the USB transceiver and is used to detect whether an external device is connected to the USB transceiver.

[0123] Optionally, when the USB transceiver is in the low power consumption state, a phase-locked loop (PLL) circuit of the USB transceiver is in a closed state.

[0124] It should be noted that, in the embodiments of the present application, “at least one of…” means one of the listed items or any combination thereof. For example, “at least one of A, B, and C” means: A exists alone, B exists alone, C exists alone, A and B exist at the same time, A and C exist at the same time, B and C exist at the same time, and A, B, and C exist at the same time.

[0125] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0126] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0127] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0128] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0129] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0130] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks or optical disks.

[0131] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. An interface component, characterized in that: include: A universal serial bus USB host controller, a USB transceiver, a control circuit and a first signal switching circuit, wherein the USB host controller and the control circuit are connected to the USB transceiver through the first signal switching circuit; The control circuit is used to control the first signal switching circuit to connect the connection between the control circuit and the USB transceiver when the USB transceiver is not connected to an external device, so that the control circuit controls the USB transceiver to enter a low power consumption state; The control circuit is further used to control the USB transceiver to exit the low power consumption state when the USB transceiver is connected to an external device; The control circuit is further used to control the first signal switching circuit to disconnect the connection between the control circuit and the USB transceiver and connect the connection between the USB host controller and the USB transceiver after the USB transceiver exits the low power consumption state.

2. The interface assembly according to claim 1, characterized in that: The interface component further comprises a second signal switching circuit, and the USB transceiver and the control circuit are connected to the USB host controller via the second signal switching circuit; The control circuit is further used to control the second signal switching circuit to connect the control circuit to the USB host controller when the USB transceiver is not connected to an external device.

3. The interface assembly according to claim 2, characterized in that: The interface component also includes a detection circuit, which is connected to the control circuit and the USB transceiver; The detection circuit is used to detect whether the USB transceiver is connected to an external device and transmit the detection result to the control circuit; The control circuit is specifically used to control the USB transceiver to enter the low power consumption state when the detection result indicates that the USB transceiver is not connected to an external device.

4. The interface assembly according to claim 3, characterized in that: The control circuit includes a control register, a status register, an interrupt circuit and a central processing unit CPU; The status register is used to store the detection result of the detection circuit and report the detection result to the CPU through the interrupt circuit; The CPU is configured to, when the detection result indicates that the USB transceiver is not connected to an external device, perform at least one of the following operations: By configuring a first control signal in the control register, controlling the first signal switching circuit to connect the control circuit with the USB transceiver; Controlling the USB transceiver to enter the low power consumption state by configuring a second control signal in the control register; The second signal switching circuit is controlled to connect the connection between the control circuit and the USB host controller by configuring the third control signal in the control register.

5. The interface assembly according to claim 4, characterized in that: The CPU is further configured to, when the detection result indicates that the USB transceiver is connected to an external device, perform at least one of the following operations: Controlling the USB transceiver to exit the low power consumption state by configuring the second control signal in the control register; After the USB transceiver exits the low power state, the first signal switching circuit is controlled by configuring the first control signal of the control register to disconnect the connection between the control circuit and the USB transceiver, and to connect the connection between the USB host controller and the USB transceiver.

6. The interface assembly according to claim 3, characterized in that: The control circuit includes a control register, a status register and a control logic circuit; The status register is used to store the detection result of the detection circuit; The control logic circuit is configured to, when the detection result indicates that the USB transceiver is not connected to an external device, perform at least one of the following operations: Controlling the first signal switching circuit to connect the control circuit to the USB transceiver; Controlling the USB transceiver to enter the low power consumption state; The second signal switching circuit is controlled to connect the control circuit to the USB host controller.

7. The interface assembly according to claim 6, characterized in that: The control logic circuit is further configured to, when the detection result indicates that an external device is connected to the USB transceiver, perform at least one of the following operations: Controlling the USB transceiver to exit the low power consumption state; After the USB transceiver exits the low power consumption state, the first signal switching circuit is controlled to disconnect the connection between the control circuit and the USB transceiver, and to connect the connection between the USB host controller and the USB transceiver.

8. The interface assembly according to any one of claims 2 to 7, characterized in that: The first signal switching circuit includes a first input end, a second input end, a first output end and a first control end, the first input end and the first control end are respectively connected to the control circuit, the second input end is connected to the USB host controller, and the first output end is connected to the USB transceiver; The second signal switching circuit comprises a third input terminal, a fourth input terminal, a second output terminal and a second control terminal, the third input terminal and the second control terminal are respectively connected to the control circuit, the fourth input terminal is connected to the USB transceiver, and the second output terminal is connected to the USB host controller; The control circuit is specifically used to control the first signal switching circuit to connect the control circuit with the USB transceiver through the first control terminal, and to control the second signal switching circuit to connect the control circuit with the USB host controller through the second control terminal when the USB transceiver is not connected to an external device; The control circuit is specifically used to control the first signal switching circuit to disconnect the connection between the control circuit and the USB transceiver through the first control end when an external device is connected to the USB transceiver, and to connect the connection between the USB host controller and the USB transceiver through the first control end and the second control end.

9. The interface assembly according to any one of claims 3 to 7, characterized in that: The detection circuit comprises a filter, which is connected to the control circuit and the USB transceiver and is used to detect whether an external device is connected to the USB transceiver.

10. The interface assembly according to any one of claims 1 to 7, characterized in that: When the USB transceiver is in the low power consumption state, the phase-locked loop (PLL) circuit of the USB transceiver is in a closed state.

11. A chip, characterized in that: The invention comprises a processor and an interface component as claimed in any one of claims 1 to 10.

12. An electronic device, characterized in that: The invention comprises a processor, a memory and an interface component as claimed in any one of claims 1 to 10.

13. A control method, characterized in that: Applied in an interface component, the interface component includes a universal serial bus USB host controller, a USB transceiver, a control circuit and a first signal switching circuit, wherein the USB host controller and the control circuit are connected to the USB transceiver through the first signal switching circuit, and the method includes: When the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the control circuit to the USB transceiver, so that the control circuit controls the USB transceiver to enter a low power consumption state; The method further comprises: When the USB transceiver is connected to an external device, the control circuit controls the USB transceiver to exit the low power consumption state; After the USB transceiver exits the low power consumption state, the control circuit controls the first signal switching circuit to disconnect the connection between the control circuit and the USB transceiver, and connect the connection between the USB host controller and the USB transceiver.

14. The method according to claim 13, characterized in that The interface component further includes a second signal switching circuit, the USB transceiver and the control circuit are connected to the USB host controller via the second signal switching circuit, and the method further includes: When the USB transceiver is not connected to an external device, the control circuit controls the second signal switching circuit to connect the control circuit to the USB host controller.

15. The method according to claim 14, characterized in that The interface component further includes a detection circuit, wherein the detection circuit is connected to the control circuit and the USB transceiver, and the method further includes: The control circuit receives a detection result transmitted by the detection circuit, wherein the detection result is used to indicate whether an external device is connected to the USB transceiver; When the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the control circuit and the USB transceiver, so that the control circuit controls the USB transceiver to enter a low power consumption state, including: When the detection result indicates that the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the control circuit and the USB transceiver, and controls the USB transceiver to enter the low power consumption state.

16. The method according to claim 14 or 15, characterized in that The first signal switching circuit includes a first input end, a second input end, a first output end and a first control end, the first input end and the first control end are respectively connected to the control circuit, the second input end is connected to the USB host controller, and the first output end is connected to the USB transceiver; The second signal switching circuit comprises a third input terminal, a fourth input terminal, a second output terminal and a second control terminal, the third input terminal and the second control terminal are respectively connected to the control circuit, the fourth input terminal is connected to the USB transceiver, and the second output terminal is connected to the USB host controller; When the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the control circuit to the USB transceiver, including: When the USB transceiver is not connected to an external device, the control circuit controls the first signal switching circuit to connect the control circuit with the USB transceiver through the first control terminal, and controls the second signal switching circuit to connect the control circuit with the USB host controller through the second control terminal; When an external device is connected to the USB transceiver, the control circuit controls the first signal switching circuit through the first control end to disconnect the connection between the control circuit and the USB transceiver, and connects the connection between the USB host controller and the USB transceiver through the first control end and the second control end.

17. The method according to claim 15 or 16, characterized in that The detection circuit comprises a filter, which is connected to the control circuit and the USB transceiver and is used to detect whether an external device is connected to the USB transceiver.

18. The method according to any one of claims 13 to 17, characterized in that When the USB transceiver is in the low power consumption state, the phase-locked loop (PLL) circuit of the USB transceiver is in a closed state.

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