Display device and driving method thereof

Abstract

Disclosed are a display device and a driving method thereof. The display device may include: a display panel including a plurality of pixels; a timing control unit generating image data to be displayed in each pixel based on input image data; a data driving unit determining first data voltages corresponding to data lines connected to each pixel based on the image data and supplying second data voltages to each data line, wherein each second data voltage is generated by adding a compensation voltage to each determined first data voltage; and a crosstalk compensation unit comparing the first data voltages corresponding to pixels arranged on three or more adjacent horizontal lines, on a horizontal line-by-horizontal basis, to calculate the compensation voltage.

Description

Technical Field

[0001] The present invention relates to a display device, and more particularly to a display device and a driving method thereof. Background Art

[0002] With the advancement of information technology, the importance of display devices as a medium connecting users and information has become increasingly prominent. In response, the use of display devices such as liquid crystal display devices (LCDs), organic light emitting display devices (OLEDs), and plasma display devices (PDPs) is increasing.

[0003] Each pixel of the display device can emit light at a brightness corresponding to a data voltage supplied through the data line, and the display device can display an image frame by combining the light emission of each pixel.

[0004] At this time, depending on the pattern of the image frame, line crosstalk or horizontal crosstalk may occur, which may reduce the display quality. If line crosstalk occurs, unexpected bright lines or dark lines will be displayed, and the user may perceive the display as an error. Summary of the Invention

[0005] An object of the present invention is to provide a display device that adds a compensation voltage for eliminating horizontal crosstalk to a data voltage to be supplied to each pixel and supplies the resulting voltage to each pixel in order to eliminate horizontal crosstalk that may occur between pixels arranged in units of horizontal lines.

[0006] Another object of the present invention is to provide a driving method of the display device.

[0007] However, the purpose of the present invention is not limited to the above-mentioned purpose, and various extensions can be made without departing from the scope of the idea and field of the present invention.

[0008] One aspect of the present invention to achieve the above-mentioned objective provides a display device.

[0009] The display device includes: a display panel including a plurality of pixels; a timing control unit generating image data to be displayed in each of the pixels based on input image data; a data driving unit determining first data voltages corresponding to data lines connected to each of the pixels based on the image data, and supplying second data voltages to each of the data lines, wherein each second data voltage is generated by adding a compensation voltage to each of the determined first data voltages; and a crosstalk compensation unit comparing the first data voltages corresponding to each of the pixels arranged on three or more adjacent horizontal lines among the pixels with each other in units of adjacent horizontal lines, thereby calculating the compensation voltage.

[0010] It may be that the crosstalk compensation unit includes: a first data compensation unit, which compares the first data voltages corresponding to the pixels arranged on the i-th (i is a natural number greater than 3) horizontal line and the first data voltages corresponding to the pixels arranged on the i-1th horizontal line, thereby outputting a first compensation voltage; and a second data compensation unit, which compares the first data voltages corresponding to the pixels arranged on the i-1th to ikth (k is a natural number greater than 1 and less than i) horizontal lines in units of adjacent horizontal lines, thereby outputting a second compensation voltage.

[0011] Alternatively, the crosstalk compensation unit further includes a first adding unit configured to linearly combine the first compensation voltage and the second compensation voltage to calculate the compensation voltage.

[0012] It may be that the first data compensation unit includes: an average voltage calculation unit, which outputs a first average value of each of the first data voltages corresponding to each of the pixels arranged on the i-th horizontal line; a first delay unit, which delays the output of the average voltage calculation unit by a predetermined time, thereby outputting a second average value of each of the first data voltages corresponding to each of the pixels arranged on the i-1-th horizontal line; a differential calculation unit, which differentiates the first average value and the second average value from each other to output a first differential voltage; and a first compensation gain application unit, which applies a first compensation gain to the first differential voltage to output the first compensation voltage.

[0013] The first compensation gain may be predetermined so that horizontal crosstalk between the pixels arranged on the i-th horizontal line and the pixels arranged on the (i-1)-th horizontal line is canceled out.

[0014] The predetermined time may be a horizontal period.

[0015] It may be that the second data compensation unit includes: a second delay unit, which delays the output of the differential calculation unit by a predetermined time, thereby outputting at least one differential voltage corresponding to each of the pixels arranged on the i-1th horizontal line to the ikth horizontal line; a second compensation gain application unit, which applies a second independent compensation gain to the at least one differential voltage; and a second addition unit, which adds the output values ​​of the second compensation gain application unit to output the second compensation voltage.

[0016] The second compensation gain may be predetermined so that horizontal crosstalk between the pixels arranged on the (i-1)th horizontal line to the (ik)th horizontal line is canceled out.

[0017] It may be that the at least one differential voltage includes: a second differential voltage, which is a voltage between the average value of each of the first data voltages corresponding to each of the pixels arranged on the (i-1) horizontal line and the average value of each of the first data voltages corresponding to each of the pixels arranged on the (i-2) horizontal line; and a third differential voltage, which is a voltage between the average value of each of the first data voltages corresponding to each of the pixels arranged on the (i-2) horizontal line and the average value of each of the first data voltages corresponding to each of the pixels arranged on the (i-3) horizontal line.

[0018] It may be that the second data compensation unit includes: a second adding unit, which adds the first differential voltage and the output of the second compensation gain application unit to output the result; a second delay unit, which delays the output of the second adding unit by a predetermined time to output the second compensation voltage; and a second compensation gain application unit, which applies a second compensation gain to the output of the second delay unit to feed back the result to the second adding unit.

[0019] Alternatively, the display device further includes a memory configured to store the first data voltages in units of horizontal lines.

[0020] The data driving unit may read the first data voltages corresponding to the pixels arranged on the i-th horizontal line from the memory, and add the compensation voltage to the read first data voltages to generate the second data voltages.

[0021] Another aspect of the present invention to achieve the aforementioned objectives provides a method for driving a display device.

[0022] The driving method of the display device may include: a step of determining each first data voltage corresponding to each data line connected to each pixel based on image data; a step of comparing each first data voltage corresponding to each pixel arranged on three or more horizontal lines adjacent to each other in units of adjacent horizontal lines, thereby calculating a compensation voltage; a step of adding the compensation voltage to each first data voltage to generate each second data voltage; and a step of supplying each second data voltage to each data line.

[0023] It may be that the step of calculating the compensation voltage includes: comparing the first data voltages corresponding to the pixels arranged on the i-th (i is a natural number greater than 3) horizontal line and the first data voltages corresponding to the pixels arranged on the i-1th horizontal line, thereby calculating the first compensation voltage; and comparing the first data voltages corresponding to the pixels arranged on the i-1th to ikth (k is a natural number greater than 1 and less than i) horizontal lines in units of adjacent horizontal lines, thereby calculating the second compensation voltage.

[0024] Alternatively, the step of calculating the compensation voltage includes the step of linearly combining the first compensation voltage and the second compensation voltage to calculate the compensation voltage.

[0025] It may be that the step of calculating the first compensation voltage includes: the step of calculating the first differential voltage by differentiating the first average value of each of the first data voltages corresponding to each of the pixels arranged on the i-th horizontal line and the second average value of each of the first data voltages corresponding to each of the pixels arranged on the i-1-th horizontal line; and the step of applying a first compensation gain to the first differential voltage to calculate the first compensation voltage.

[0026] The first compensation gain may be predetermined so that horizontal crosstalk between the pixels arranged on the i-th horizontal line and the pixels arranged on the (i-1)-th horizontal line is canceled out.

[0027] It may be that the step of calculating the second compensation voltage includes: a step of calculating an average value in units of horizontal lines for each of the first data voltages corresponding to each of the pixels arranged on the i-1th horizontal line to the ikth horizontal line; a step of calculating at least one differential voltage by differentiating the average values ​​corresponding to adjacent horizontal lines among the average values; a step of applying a second compensation gain to the at least one differential voltage; and a step of calculating the second compensation voltage by adding the at least one differential voltage to which the second compensation gain is applied.

[0028] It may be that the second compensation gain is applied to the at least one differential voltage at a certain attenuation ratio.

[0029] The step of generating the second data voltages may include adding the compensation voltage to the first data voltages corresponding to the pixels arranged on the i-th horizontal line to generate the second data voltages.

[0030] (Effects of the Invention)

[0031] The display device and driving method thereof according to the present invention can prevent not only horizontal crosstalk or line crosstalk that may occur between two adjacent horizontal lines, but also horizontal crosstalk or line crosstalk that may occur between three or more horizontal lines. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A diagram for explaining a display device according to an embodiment of the present invention.

[0033] Figure 2 This is a circuit diagram exemplarily showing a pixel according to an embodiment of the present invention.

[0034] Figure 3 This is a conceptual diagram for explaining horizontal crosstalk that is to be improved in a display device according to an embodiment of the present invention.

[0035] Figure 4 Yes Figure 1 An illustrative diagram of the configuration of the crosstalk compensation unit.

[0036] Figure 5 This is a block diagram showing a first embodiment of a crosstalk compensation unit according to an embodiment of the present invention.

[0037] Figure 6 This is a block diagram showing a second embodiment of a crosstalk compensation unit according to one embodiment of the present invention.

[0038] Figure 7 This is a flowchart showing a method for driving a display device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0039] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. The present invention can be implemented in various ways and is not limited to the embodiments described herein.

[0040] In order to clearly illustrate the present invention, parts not related to the description are omitted, and the same or similar components are given the same reference numerals throughout the specification. Therefore, the reference numerals previously described may be used in other drawings.

[0041] In addition, the size and thickness of each component shown in the drawings are arbitrarily shown for the sake of convenience of explanation, and the present invention is not necessarily limited to the illustrated cases. In the drawings, the thickness is exaggerated to clearly illustrate each layer and region.

[0042] Figure 1 A diagram for explaining a display device according to an embodiment of the present invention.

[0043] Reference Figure 1 The display device DD may include a display panel 100 , a timing control unit 200 , a scan driving unit 300 , a light emitting driving unit 400 , a data driving unit 500 , a crosstalk compensation unit 510 , a memory 520 , and a power management unit 600 .

[0044] The display panel 100 may include a plurality of pixels PX[i, j]. The plurality of pixels PX[i, j] may be composed of p rows (p is a natural number) and q columns (q is a natural number). Each pixel PX[i, j] arranged in the same row (hereinafter, it is possible to mix and match horizontal lines to refer to) may be connected to the same scan line and the same light-emitting line. In addition, each pixel PX[i, j] arranged in the same column (hereinafter, it is possible to mix and match vertical lines to refer to) may be connected to the same data line. For example, the pixel PX[i, j] arranged in the i-th (i is a natural number less than p) row and the j-th (j is a natural number less than q) column may be connected to the i-th scan line SL[i] and the i-th light-emitting line EL[i], and to the j-th data line DL[j].

[0045] The timing control unit 200 can generate a scan drive control signal SCS, a data drive control signal DCS, and a light emission control signal ECS in response to an externally supplied synchronization signal. The scan drive control signal SCS can be supplied to the scan drive unit 300, the data drive control signal DCS can be supplied to the data drive unit 500, and the light emission control signal ECS can be supplied to the light emission drive unit 400. Furthermore, the timing control unit 200 can generate image data RGB based on externally supplied input image data (not shown) and supply the generated image data RGB to the data drive unit 500. For example, the timing control unit 200 can determine a digital voltage corresponding to the grayscale value constituting the input image data (not shown) and generate image data RGB indicating the determined digital voltage.

[0046] The scan drive control signal SCS may include a scan start signal and a clock signal. The scan start signal may be a signal for controlling the first timing of the scan signal. The clock signal may be used to shift the scan start signal.

[0047] The light emission control signal ECS may include a light emission start signal and a clock signal. The light emission start signal may control the first moment of the light emission signal. The clock signal may be used to shift the light emission start signal.

[0048] The data drive control signal DCS may include a source start pulse and a clock signal. The source start pulse may control the start time of data sampling. The clock signal may be used to control the sampling operation.

[0049] The scan driver 300 may receive a scan driver control signal SCS from the timing controller 200 and sequentially supply scan signals to the scan lines SL[1], SL[2], ..., SL[p] based on the scan driver control signal SCS. By sequentially supplying scan signals, each pixel PX[i, j] is selected in units of horizontal lines (or pixel rows), and a data signal may be supplied to the selected pixel PX[i, j].

[0050] The scan driver 300 may include a scan driver stage configured as a shift register and may generate a scan signal by sequentially transmitting a scan start signal in the form of an on-level pulse to the next scan driver stage under the control of a clock signal.

[0051] The light-emitting driver 400 receives a light-emitting control signal ECS from the timing control unit 200 and sequentially supplies light-emitting signals to the light-emitting control lines EL[1], EL[2], ..., EL[p] based on the light-emitting control signal ECS. The light-emitting signals can be used to control the light-emitting duration of each pixel PX[i, j]. To this end, the light-emitting signals can be set to have a width wider than the scanning signal.

[0052] The data driving unit 500 may receive a data driving control signal DCS and image data RGB from the timing control unit 200. The data driving unit 500 may determine first data voltages to be supplied to the data lines DL[1], DL[2], ..., DL[q] based on the image data RGB, and supply second data voltages to the data lines DL[1], DL[2], ..., DL[q]. The second data voltages are generated by adding a compensation voltage for compensating for horizontal crosstalk to the determined first data voltages.

[0053] The data driving unit 500 may supply each second data voltage to each data line DL[1], DL[2], ..., DL[q] in response to the data driving control signal DCS. Each second data voltage may be supplied to each pixel PX[i, j] arranged on a horizontal line selected according to the scan signal. To this end, the data driving unit 500 may supply each second data voltage to each data line DL[1], DL[2], ..., DL[q] in synchronization with the scan signal.

[0054] For example, the data driving unit 500 can determine the first data voltages DV[1], DV[2], ..., DV[q] (hereinafter referred to as LDV[i]) to be supplied to each pixel PX[i, j] arranged on the i-th horizontal line selected according to the scanning signal, and store the determined first data voltages LDV[i] in the memory 520 in units of horizontal lines (or every horizontal period).

[0055] In addition, the data driving unit 500 may transmit the first data voltages DV[1], DV[2], ..., DV[q] (hereinafter collectively referred to as LDV[i]) to be supplied to the pixels PX[i, j] arranged on the i-th horizontal line to the crosstalk compensation unit 510, and may receive the compensation voltage CDV[i] for compensating the first data voltages DV[1], DV[2], ..., DV[q] from the crosstalk compensation unit 510. The data driving unit 500 may add the received compensation voltage CDV[i] to the first data voltages DV[1], DV[2], ..., DV[q] read from the memory 520, thereby generating the second data voltages.

[0056] The crosstalk compensation unit 510 may compare the first data voltages (e.g., LDV[i-2], LDV[i-1], and LDV[i]) corresponding to the pixels on three or more adjacent horizontal lines (e.g., the i-2, i-1, and i-th horizontal lines) among the pixels PX[i,j], on a per-adjacent horizontal line basis, thereby calculating a compensation voltage CDV[i] and transmitting the calculated compensation voltage CDV[i] to the data driving unit 500. Specifically, for example, the crosstalk compensation unit 510 may compare the first data voltages LDV[i] corresponding to the pixels on the i-th horizontal line with the first data voltages LDV[i-1] corresponding to the pixels on the i-1th horizontal line. The crosstalk compensation unit 510 may also compare the first data voltages LDV[i-1] corresponding to the pixels on the i-1th horizontal line with the first data voltages LDV[i-2] corresponding to the pixels on the i-2nd horizontal line. The crosstalk compensation unit 510 may compare the first data voltages LDV[i-2] corresponding to the pixels arranged on the i-2nd horizontal line with the first data voltages LDV[i-3] corresponding to the pixels arranged on the i-3rd horizontal line. The calculated compensation voltage CDV[i] may be added to the first data voltages LDV[i] corresponding to the pixels arranged on the i-th horizontal line.

[0057] That is, in order to compensate for the first data voltages LDV[i] corresponding to the pixels arranged on the i-th horizontal line, the crosstalk compensation unit 510 involved in one embodiment of the present invention not only considers the first data voltages LDV[i-1] corresponding to the pixels arranged on the i-1th horizontal line, but also considers the first data voltages LDV[i-2] and LDV[i-3] corresponding to the pixels arranged on the i-2nd horizontal line and the i-3rd horizontal line. Therefore, the horizontal crosstalk generated by more than two horizontal lines can be eliminated.

[0058] The power management unit 600 can supply the display panel 100 with a voltage of a first power supply VDD, a voltage of a second power supply VSS, and a voltage of an initialization power supply Vint. The first power supply VDD and the second power supply VSS can generate a voltage for driving the light-emitting element included in each pixel PX[i, j] of the display panel 100. In one embodiment, the voltage of the second power supply VSS can be lower than the voltage of the first power supply VDD. For example, the voltage of the first power supply VDD can be a positive voltage, and the voltage of the second power supply VSS can be a negative voltage. The voltage of the initialization power supply Vint can initialize the driving transistor and / or light-emitting element included in the pixel PX[i, j].

[0059] exist Figure 1The crosstalk compensation part 510 and the memory 520 are shown separately from the data driving part 500 , but the present invention is not necessarily limited thereto. The crosstalk compensation part 510 and the memory 520 may be integrated with the data driving part 500 .

[0060] Figure 2 This is a circuit diagram exemplarily showing a pixel according to an embodiment of the present invention.

[0061] exist Figure 2 In FIG. 1 , for convenience of explanation, the pixel PX[i, j] arranged in the i-th row (or horizontal line) and the j-th column is shown, but the same circuit can also be applied to other pixels.

[0062] Reference Figure 2 The pixel PX[i,j] may include a light emitting element EL, first to seventh transistors T1 to T7 and a storage capacitor Cst.

[0063] The light emitting element EL may include a first electrode electrically connected to the second electrode (eg, drain electrode) of the first transistor T1 and a second electrode connected to the second power supply VSS. Specifically, the first electrode of the light emitting element EL may be electrically connected to the second electrode of the first transistor T1 through the sixth transistor T6.

[0064] The light-emitting element EL can generate light of a predetermined brightness corresponding to the amount of current (driving current) supplied from the first transistor T1. In one embodiment, the light-emitting element EL can be an organic light-emitting diode including an organic light-emitting layer. In this case, the first electrode of the light-emitting element EL can be an anode, and the second electrode can be a cathode. Conversely, the first electrode of the light-emitting element EL can be a cathode, and the second electrode can be an anode.

[0065] In other embodiments, the light emitting element EL may be an inorganic light emitting element formed of an inorganic substance. Alternatively, the light emitting element EL may include a plurality of inorganic light emitting elements connected in parallel and / or in series between the second power supply VSS and the second electrode of the first transistor T1.

[0066] The first transistor T1 may include a first electrode electrically connected to a first power supply VDD, a second electrode electrically connected to a first electrode of the light-emitting element EL, and a gate electrode connected to a first node N1. Specifically, the first electrode of the first transistor T1 may be connected to the first power supply VDD via a fifth transistor T5. The second electrode of the first transistor T1 may be connected to the light-emitting element EL via a sixth transistor T6. The first transistor T1 may supply a driving current to the light-emitting element EL. The first transistor T1 may be referred to as a driving transistor. That is, the first transistor T1 may control the amount of current flowing from the first power supply VDD to the second power supply VSS via the light-emitting element EL in response to the voltage applied to the first node N1.

[0067] The energy storage capacitor Cst may be connected between the first power supply VDD and the first node N1. For example, the energy storage capacitor Cst may include a first electrode connected to the first power supply VDD and a second electrode connected to the first node N1. The energy storage capacitor Cst may be charged by the differential voltage between the first power supply VDD and the first node N1.

[0068] The second transistor T2 may be connected between the data line DL[j] and the third node N3. The second transistor T2 may include a gate electrode connected to the i-th scan line SL[i]. The second transistor T2 may be turned on when a scan signal (which may be a low level) is supplied to the i-th scan line SL[i], thereby electrically connecting the data line DL[j] and the third node N3. Therefore, the data voltage (or data signal) supplied to the data line DL[j] may be transferred to the third node N3.

[0069] Furthermore, when the second transistor T2 is turned on in response to the scan signal supplied to the i-th scan line SL[i], the data voltage supplied through the data line DL[j] can be recorded in the pixel PX[i,j]. For example, the energy storage capacitor Cst can be charged by the differential voltage between the voltage of the first power supply VDD and the data voltage.

[0070] The third transistor T3 may be connected between the first node N1 and the second node N2. The third transistor T3 may include a gate electrode connected to the i-th scan line SL[i]. The third transistor T3 may be turned on when a scan signal (which may be a low level) is supplied to the i-th scan line SL[i], thereby electrically connecting the first node N1 and the second node N2. If the first node N1 and the second node N2 are electrically connected to each other, the first transistor T1 may become a diode-equivalent structure. When the first transistor T1 has a diode-equivalent structure, the threshold voltage of the first transistor T1 may be compensated by the charge charged to the first electrode of the first transistor T1.

[0071] The fourth transistor T4 may be connected between the first node N1 and the initialization power supply Vint and may include a gate electrode connected to the previous scan line (or the i-1th scan line SL[i-1]). The fourth transistor T4 may be turned on when a previous scan signal is supplied through the previous scan line, thereby initializing the gate electrode of the first transistor T1 and the second electrode of the storage capacitor Cst using the voltage of the initialization power supply Vint.

[0072] The fifth transistor T5 may be connected between the first power supply VDD and the third node N3. The fifth transistor T5 may include a gate electrode connected to the i-th light emitting control line EL[i]. The fifth transistor T5 may be turned on when a light emitting control signal is supplied via the i-th light emitting control line EL[i], thereby electrically connecting the first electrode of the first transistor T1 and the first power supply VDD.

[0073] The sixth transistor T6 may be connected between the second node N2 and the first electrode of the light-emitting element EL. The sixth transistor T6 may include a gate electrode connected to the i-th light-emitting control line EL[i]. For example, the sixth transistor T6 is turned on by a light-emitting control signal supplied via the i-th light-emitting control line EL[i], thereby electrically connecting the second node N2 and the first electrode of the light-emitting element EL.

[0074] The seventh transistor T7 may be connected between the first electrode of the light-emitting element EL and the initialization power supply Vint. The seventh transistor T7 may include a gate electrode connected to the i-th scan line SL[i]. Therefore, the seventh transistor T7 may be turned on when a scan signal is supplied to the i-th scan line SL[i], thereby initializing the voltage of the first electrode of the light-emitting element EL using the voltage of the initialization power supply Vint.

[0075] In one embodiment, Figure 2 The transistors T1, T2, T3, T4, T5, T6, and T7 shown in the figure may be p-type transistors (P-channel metal oxide semiconductor, PMOS). Figure 2 The transistors T1, T2, T3, T4, T5, T6, and T7 shown in the figure may be LTPS (Low-Temperature Poly-Silicon) thin film transistors. However, this is not necessarily limited to LTPS, and the transistors T1, T2, T3, T4, T5, T6, and T7 may also be n-channel metal oxide semiconductors (NMOS).

[0076] The display device DD according to an embodiment of the present invention is not limited to Figure 2 The explanation of the pixels involved may also be applicable to pixels of various forms applicable to those skilled in the art.

[0077] On the other hand, Figure 2In the pixel PX[i, j] shown, capacitive coupling Cde may be generated between the wiring to which the first power supply VDD is applied and the data line DL[j]. In addition, capacitive coupling Cdi may also be generated between the data line DL[j] and the wiring to which the initialization power supply Vint is applied. In addition, capacitive coupling Cgi may also be generated between the wiring to which the initialization power supply Vint is applied and the gate electrode of the first transistor T1. Such capacitive couplings Cde, Cdi, and Cgi (also referred to as parasitic capacitance) may cause initialization to be performed at a voltage different from that of the initialization power supply Vint when performing initialization based on the initialization power supply Vint, and may also affect the voltage stored in the energy storage capacitor Cst. In addition, when the first power supply VDD is supplied, impulse noise may also be included, which may be the reason for the slower response speed of the voltage supplied to the initialization power supply Vint. In particular, due to such capacitive coupling, horizontal crosstalk (horizontal crosstalk) may occur between adjacent horizontal lines, resulting in afterimages. Horizontal crosstalk can be used interchangeably with line crosstalk to refer to them.

[0078] Figure 3 This is a conceptual diagram for explaining horizontal crosstalk that is to be improved in a display device according to an embodiment of the present invention.

[0079] Reference Figure 3 , the scan lines SL[1], ..., SL[r-1], SL[r], SL[r+1], SL[r+2], SL[r+3], SL[r+4], ..., SL[s-1], SL[s], SL[s+1], SL[s+2], SL[s+3], SL[s+4], ..., SL[p] can be alternately arranged along the first direction DR1 on one side of the display panel 100, and each horizontal line configured with pixels can be connected to a scan line.

[0080] The data lines DL[1], ..., DL[u], DL[u+1], ..., DL[v], DL[v+1], ..., DL[q] can be alternately arranged along the second direction DR2 on one side of the display panel 100, and each vertical line configured with pixels can be connected to one data line.

[0081] Reference Figure 3, each pixel connected to the first scan line SL[1] to the r-1th (r is a natural number greater than 0 and less than p) scan line SL[r-1] can receive a data voltage corresponding to 128 grayscales (128 gray). During the next scan period, each pixel connected to the rth scan line SL[r] to the r+4th scan line SL[r+4] and a portion of each pixel connected to the s-1th scan line SL[s-1] can receive a data voltage corresponding to 128 grayscales (128 gray), and the rest can receive a data voltage corresponding to 0 grayscale (0 gray). In addition, each pixel connected to the sth scan line SL[s] to the last scan line SL[p] (not shown) can receive a data voltage corresponding to 128 grayscales (128 gray).

[0082] Ideally, the pixel PX[r,u] connected to the rth scan line SL[r] and the uth (u is a natural number greater than 0 and less than q) data line DL[u] and the pixel PX[r,u+1] connected to the rth scan line SL[r] and the u+1th data line DL[u+1] can emit light at 128 gray levels.

[0083] However, due to Figure 2 Due to the capacitive coupling described in the above, the pixel PX[r,u] connected to the r-th scan line SL[r] and the u-th (u is a natural number greater than 0 and less than q) data line DL[u], and the pixel PX[r,u+1] connected to the r-th scan line SL[r] and the u+1-th data line DL[u+1] may emit light at a grayscale higher than 128. Therefore, a bright line may appear in which the pixels connected to the r-th scan line SL[r] appear brighter than the pixels connected to the r-1-th scan line SL[r-1].

[0084] Ideally, the pixel PX[s,u] connected to the s scan line SL[s] and the u data line DL[u] and the pixel PX[s,u+1] connected to the s scan line SL[s] and the u+1 data line DL[u+1] can emit light at 128 gray levels.

[0085] However, because Figure 2 Due to the capacitive coupling described in , the pixel PX[s,u] connected to the s-th scan line SL[s] and the u-th data line DL[u] and the pixel PX[s,u+1] connected to the s-th scan line SL[s] and the u+1-th data line DL[u+1] may emit light at a grayscale lower than 128. Therefore, dark lines may appear in which the pixels connected to the s-th scan line SL[s] appear darker than the pixels connected to the s-1-th scan line SL[s-1].

[0086] The bright lines or dark lines mentioned above are not necessarily generated only between horizontal lines where the data voltage changes sharply. Figure 2 The voltage based on the initialization power supply may have a lower response speed until a plurality of horizontal periods, so that bright lines or dark lines may appear step by step on a plurality of horizontal lines.

[0087] For example, although the pixels connected to the (r+1)th scan line SL[r+1] are darker than the pixels connected to the rth scan line SL[r], they may still emit bright lines at a grayscale higher than 128. Although the pixels connected to the (r+2)th scan line SL[r+2] are darker than the pixels connected to the (r+1)th scan line SL[r+1], they may still emit bright lines at a grayscale higher than 128.

[0088] Similarly, although each pixel connected to the (s+1)th scan line SL[s+1] is brighter than each pixel connected to the (s)th scan line SL[s], a dark line may appear, emitting light at a grayscale lower than 128. Although each pixel connected to the (s+2)th scan line SL[s+2] is brighter than each pixel connected to the (s+1)th scan line SL[s+1], a dark line may appear, emitting light at a grayscale lower than 128.

[0089] As described above, horizontal crosstalk in which bright lines or dark lines appear may occur through a plurality of horizontal lines, and thus a data voltage input to one horizontal line needs to be compensated based on respective data voltages input to a plurality of horizontal lines.

[0090] The configuration and operation of the crosstalk compensation unit 510 for improving horizontal crosstalk will be described in detail below, taking pixels arranged on the i-th (i is a natural number greater than or equal to 3) horizontal line as a reference (ie, taking pixels arranged on at least three horizontal lines as a reference).

[0091] Figure 4 Yes Figure 1 An illustrative diagram of the configuration of the crosstalk compensation unit.

[0092] Reference Figure 4 The crosstalk compensation section 510 may include a first data compensation section 511 , a second data compensation section 512 , and a first addition section 513 .

[0093] The first data compensation unit 511 may sequentially receive inputs of the first data voltages supplied to the pixels arranged on a horizontal line from the data driving unit 500. For example, the first data compensation unit 511 may sequentially receive inputs of the first data voltages DV[1], DV[2], ..., DV[q], or LDV[i] corresponding to the pixels arranged on the i-th horizontal line. Furthermore, the first data compensation unit 511 may compare the first data voltages LDV[i] corresponding to the pixels arranged on the i-th horizontal line (i is a natural number greater than or equal to 3) with the first data voltages LDV[i-1] corresponding to the pixels arranged on the i-1-th horizontal line, thereby outputting a first compensation voltage XT1.

[0094] The second data compensating unit 512 can compare the first data voltages LDV[i-2], LDV[i-3], ..., LDV[ik] corresponding to the pixels arranged on the i-1th horizontal line to the ikth horizontal line (k is a natural number greater than 1 and less than i) in units of adjacent horizontal lines, thereby outputting the second compensation voltage XT2. To this end, the second data compensating unit 512 can receive the first differential voltage dSV[i] (refer to Figures 5 and 6 ), but is not necessarily limited thereto. For example, the second data compensation unit 512 may also be implemented as follows: similarly to the first data compensation unit 511, the second data compensation unit 512 may directly and sequentially receive inputs of the first data voltages DV[1], DV[2], ..., DV[q], or LDV[i] supplied to the pixels arranged on the ikth horizontal line from the data driving unit 500, and output the second compensation voltage XT2.

[0095] The first adding unit 513 may linearly combine the first compensation voltage XT1 and the second compensation voltage XT2 to calculate the compensation voltage CDV[i]. For example, the first adding unit 513 may add the first compensation voltage XT1 and the second compensation voltage XT2 to calculate the compensation voltage CDV[i]. The calculated compensation voltage CDV[i] may be added to each first data voltage LDV[i] corresponding to each pixel arranged on the i-th horizontal line by the data driving unit 500.

[0096] Figure 5 This is a block diagram showing a first embodiment of a crosstalk compensation unit according to an embodiment of the present invention.

[0097] Reference Figure 5 The first data compensation part 511 may include an average voltage calculation part AVGR, a first delay part DR1, a difference calculation part DFC, and a first compensation gain application part GXT1.

[0098] The average voltage calculation unit AVGR may output a first average value AVG[i] of the first data voltages LDV[i] corresponding to the pixels arranged on the i-th horizontal line. For example, the average voltage calculation unit AVGR may add the first data voltages LDV[i] corresponding to the pixels arranged on the i-th horizontal line to calculate a first average value of the added first data voltages.

[0099] The first delay unit DR1 can delay the output of the average voltage calculator AVGR by a predetermined time, thereby outputting a second average value AVG[i-1] of each first data voltage corresponding to each pixel arranged on the i-1th horizontal line. Here, the predetermined time can be one horizontal period. That is, the first delay unit DR1 delays the output of the average voltage calculator AVGR by one horizontal period before outputting it. Therefore, at the time when the average voltage calculator AVGR outputs the first average value AVG[i] of each first data voltage LDV[i] corresponding to each pixel arranged on the i-th horizontal line, the first delay unit DR1 outputs the second average value AVG[i-1] of each first data voltage LDV[i-1] corresponding to each pixel arranged on the i-1th horizontal line. The first delay unit DR1 can be implemented by a delay register.

[0100] The difference calculation unit DFC may output a first differential voltage dSV[i] by differentiating the first average value AVG[i] from the second average value AVG[i-1]. The first differential voltage dSV[i] may correspond to the average data voltage difference between pixels arranged on the i-th horizontal line and pixels arranged on the i-1-th horizontal line.

[0101] The first compensation gain application unit GXT1 may apply a first compensation gain to the first differential voltage dSV[i] and output the first compensation voltage XT1 to the first addition unit 513. For example, the first compensation gain application unit GXT1 may be implemented by an amplifier circuit having various gains.

[0102] The first compensation gain may be predetermined so that the horizontal crosstalk between the pixels arranged on the i-th horizontal line and the pixels arranged on the i-1-th horizontal line is offset. Figure 3 As shown, input image data in which the data voltage supplied to each pixel changes sharply based on a specific horizontal line can be input to the display device DD, and a first compensation gain for removing bright lines or dark lines appearing in each pixel arranged on the i-th horizontal line and the i-1-th horizontal line adjacent to each other can be experimentally determined.

[0103] The second data compensating part 512 a may include a second delaying part DR2 , a second compensation gain applying part GXT2 , and a second adding part ADR2 .

[0104] The second delay unit DR2 can delay the output of the difference calculator DFC by a predetermined time, thereby outputting at least one differential voltage corresponding to each pixel arranged on the i-1th to ikth horizontal lines (k is a natural number greater than 1 and less than i). For example, the second delay unit DR2 can delay the output of the difference calculator DFC by one horizontal period to output a second differential voltage dSV[i-1], delay the output of the difference calculator DFC by two horizontal periods to output a third differential voltage dSV[i-2], delay the output of the difference calculator DFC by three horizontal periods to output a fourth differential voltage dSV[i-3], and delay the output of the difference calculator DFC by four horizontal periods to output a fifth differential voltage dSV[i-4].

[0105] The second differential voltage dSV[i-1] may be a differential voltage between an average value of the first data voltages corresponding to the pixels arranged on the i-1th horizontal line and an average value of the first data voltages corresponding to the pixels arranged on the i-2th horizontal line. The third differential voltage dSV[i-2] may be a differential voltage between an average value of the first data voltages corresponding to the pixels arranged on the i-2th horizontal line and an average value of the first data voltages corresponding to the pixels arranged on the i-3th horizontal line. The fourth differential voltage dSV[i-3] may be a differential voltage between an average value of the first data voltages corresponding to the pixels arranged on the i-3th horizontal line and an average value of the first data voltages corresponding to the pixels arranged on the i-4th horizontal line. The fifth differential voltage dSV[i-4] may be a differential voltage between an average value of the first data voltages corresponding to the pixels arranged on the i-4th horizontal line and an average value of the first data voltages corresponding to the pixels arranged on the i-5th horizontal line.

[0106] exist Figure 5 The figure shows a case where four delay registers DR are connected in series to output the second differential voltage dSV[i-1] to the fifth differential voltage dSV[i-4], but this is an example, and the number of delay registers DR and the number of differential voltages output by the second delay unit DR2 can be modified in various ways.

[0107] The second compensation gain application unit GXT2 can apply independent second compensation gains f1, f2, f3, and f4 to at least one differential voltage output from the second delay unit DR2. For example, the second compensation gain f1 can be applied to the second differential voltage dSV[i-1], the second compensation gain f2 can be applied to the third differential voltage dSV[i-2], the second compensation gain f3 can be applied to the fourth differential voltage dSV[i-3], and the second compensation gain f4 can be applied to the fifth differential voltage dSV[i-4] (f1, f2, f3, and f4 are arbitrary constants). The second compensation gain application unit GTX2 can be implemented by multiple amplifier circuits GC that respectively receive the outputs of the delay registers DR included in the second delay unit DR2.

[0108] The second compensation gains f1, f2, f3, and f4 can be predetermined so that the horizontal crosstalk between two or more pixels arranged on the ikth horizontal line (k is a natural number greater than 2) is offset. For example, the second compensation gain f1 can be experimentally determined so that the horizontal crosstalk between each pixel arranged on the i-1th horizontal line and each pixel arranged on the i-2th horizontal line is offset. The second compensation gain f2 can be experimentally determined so that the horizontal crosstalk between each pixel arranged on the i-2th horizontal line and each pixel arranged on the i-3th horizontal line is offset. The second compensation gain f3 can be experimentally determined so that the horizontal crosstalk between each pixel arranged on the i-3th horizontal line and each pixel arranged on the i-4th horizontal line is offset. The second compensation gain f4 can be predetermined so that the horizontal crosstalk between each pixel arranged on the i-4th horizontal line and each pixel arranged on the i-5th horizontal line is offset.

[0109] The second adding section ADR2 may add the output values ​​of the second compensation gain applying section GXT2 to output the second compensation voltage XT2 to the first adding section 513. The first adding section 513 may add the first compensation voltage XT1 and the second compensation voltage XT2 to calculate the compensation voltage CDV[i].

[0110] Figure 6 This is a block diagram showing a second embodiment of a crosstalk compensation unit according to one embodiment of the present invention.

[0111] Figure 6 Indicates that Figure 5 The second data compensation portion 512a is modified in accordance with the embodiment of the present invention. Figure 5 The following description will focus on the second data compensating portion 512 b , which has differences.

[0112] like Figure 5 When the second data compensation unit 512 a is implemented as shown, a plurality of independent amplifier circuits GC are required, which may increase the circuit area.

[0113] In most cases, horizontal crosstalk tends to gradually attenuate at a certain rate between adjacent horizontal lines. Therefore, the second data compensation unit 512 b may be implemented in the form of a loop filter.

[0114] For example, the second data compensation unit 512b may include: a second adding unit ADR2, which adds the first differential voltage dSV[i] and the output of the second compensation gain applying unit GXT2 to each other and outputs the result; a second delay unit DR2, which delays the output of the second adding unit ADR2 by a predetermined time and outputs the second compensation voltage XT2; and the second compensation gain applying unit GXT2, which applies a second compensation gain to the output of the second delay unit DR2 and feeds the result back to the second adding unit ADR2.

[0115] When the second data compensating unit 512b has a loop filter form, Figure 6 The second compensation voltage XT2 = dSV[i-1] + f1 × dSV[i-2] + f1 2 ×dSV[i-3]+...), the second differential voltage dSV[i-1] may not be able to apply the compensation gain. To solve this problem, Figure 6 Although not shown in the figure, the second data compensating unit 512b may further include a third compensation gain applying unit for applying a third compensation gain to the second compensation voltage XT2.

[0116] like Figure 6 As shown, when the second data compensation unit 512b is implemented in the form of a loop filter, the second compensation gain application unit GXT2 and the second delay unit DR2 can be implemented by a single amplifier circuit and a delay register, respectively, thereby reducing the circuit area.

[0117] Figure 7 This is a flowchart showing a method for driving a display device according to an embodiment of the present invention.

[0118] Reference Figure 7 The driving method of the display device may include: a step S100 of determining, based on image data, first data voltages to be supplied to data lines connected to pixels; a step S110 of comparing, in units of adjacent horizontal lines, first data voltages corresponding to pixels arranged on three or more adjacent horizontal lines among pixels to calculate compensation voltages for compensating for horizontal crosstalk; a step S120 of adding the compensation voltage to the first data voltages to generate second data voltages; and a step S130 of supplying the second data voltages to the data lines.

[0119] The step S110 of calculating the compensation voltage may include: a step of calculating the first compensation voltage by comparing the first data voltages corresponding to the pixels arranged on the i-th (i is a natural number greater than 3) horizontal line and the first data voltages corresponding to the pixels arranged on the i-1th horizontal line; and a step of calculating the second compensation voltage by comparing the first data voltages corresponding to the pixels arranged on the i-1th horizontal line to the ikth (k is a natural number greater than 1 and less than i) horizontal line in units of adjacent horizontal lines.

[0120] The step of calculating the compensation voltage S110 may include the step of linearly combining the first compensation voltage and the second compensation voltage to calculate the compensation voltage.

[0121] The step of calculating the first compensation voltage may include: the step of calculating the first differential voltage by differentiating a first average value of the first data voltages corresponding to the pixels arranged on the i-th horizontal line and a second average value of the first data voltages corresponding to the pixels arranged on the i-1-th horizontal line; and the step of applying a first compensation gain to the first differential voltage to calculate the first compensation voltage.

[0122] The first compensation gain may be predetermined so that horizontal crosstalk between pixels arranged on the i-th horizontal line and pixels arranged on the (i-1)-th horizontal line is canceled out.

[0123] The step of calculating the second compensation voltage may include: calculating each average value of each first data voltage corresponding to each pixel arranged on the i-1th horizontal line to the ikth horizontal line in units of horizontal lines; the step of differentiating each average value corresponding to adjacent horizontal lines among the average values ​​to calculate at least one differential voltage; the step of applying a second compensation gain to at least one differential voltage; and the step of adding at least one differential voltage to which the second compensation gain is applied to calculate the second compensation voltage.

[0124] The second compensation gain may be applied to at least one differential voltage at a certain attenuation ratio.

[0125] The step S120 of generating the second data voltages may generate the second data voltages by adding a compensation voltage to each of the first data voltages corresponding to each of the pixels arranged on the i-th horizontal line.

[0126] exist Figures 1 to 6 The display device DD described in the embodiment can execute the driving method of the display device. Therefore, it should be interpreted that in addition to the above steps, the following steps can also be applied: Figures 1 to 6 The operating method of the display device DD described in .

[0127] The drawings and detailed description of the invention referred to so far are merely illustrative of the present invention and are intended solely for the purpose of illustrating the present invention. They are not intended to limit the meaning or the scope of the invention as described in the claims. Therefore, those skilled in the art will appreciate that various modifications and equivalent embodiments are possible. Therefore, the true technical scope of the present invention should be determined by the technical principles of the claims.

Claims

1. A display device, comprising: a display panel comprising a plurality of pixels; a timing control unit that generates image data to be displayed in each of the pixels based on input image data; a data driving unit that determines first data voltages corresponding to data lines connected to the pixels based on the image data, and supplies second data voltages to the data lines, wherein the second data voltages are generated by adding a compensation voltage to the determined first data voltages; as well as The crosstalk compensation unit compares the first data voltages corresponding to the pixels arranged on three or more adjacent horizontal lines among the pixels, thereby calculating the compensation voltage. The crosstalk compensation part compares first data voltages of pixels arranged on a horizontal line with first data voltages of pixels arranged on a horizontal line adjacent to the horizontal line, and outputs the compensation voltage.

2. The display device according to claim 1, wherein The crosstalk compensation unit includes: a first data compensation unit that compares the first data voltages corresponding to the pixels arranged on an i-th horizontal line with the first data voltages corresponding to the pixels arranged on an (i-1)-th horizontal line, thereby outputting a first compensation voltage; and The second data compensation unit compares the first data voltages corresponding to the pixels arranged on the i-1th to ikth horizontal lines in units of adjacent horizontal lines, thereby outputting a second compensation voltage, where k is a natural number greater than 1 and less than i.

3. The display device according to claim 2, wherein: The crosstalk compensation unit further includes a first adding unit that linearly combines the first compensation voltage and the second compensation voltage to calculate the compensation voltage.

4. The display device according to claim 2, wherein The first data compensation unit includes: an average voltage calculation unit configured to output a first average value of the first data voltages corresponding to the pixels arranged on the i-th horizontal line; a first delay unit delaying the output of the average voltage calculation unit by a predetermined time, thereby outputting a second average value of the first data voltages corresponding to the pixels arranged on the (i-1)th horizontal line; a difference calculation unit that performs a difference calculation between the first average value and the second average value to output a first differential voltage; and The first compensation gain application unit applies a first compensation gain to the first differential voltage to output the first compensation voltage.

5. The display device according to claim 4, wherein The first compensation gain is predetermined so that horizontal crosstalk between the pixels arranged on the i-th horizontal line and the pixels arranged on the (i-1)-th horizontal line is offset. The display device according to claim 4 , wherein: The predetermined time is a horizontal period.

7. The display device according to claim 4, wherein The second data compensation unit includes: a second delay unit delaying the output of the difference calculation unit by a predetermined time, thereby outputting at least one differential voltage corresponding to each of the pixels arranged on the (i-1)th horizontal line to the (ik)th horizontal line; a second compensation gain application unit for applying a second independent compensation gain to the at least one differential voltage; and The second adding section adds the output values ​​of the second compensation gain applying section to output the second compensation voltage.

8. The display device according to claim 7, wherein: The second compensation gain is predetermined so that horizontal crosstalk between the pixels arranged on the (i-1)th horizontal line to the (ik)th horizontal line is canceled out.

9. The display device according to claim 7, wherein: The at least one differential voltage comprises: a second differential voltage which is a voltage between an average value of the first data voltages corresponding to the pixels arranged on the (i-1)th horizontal line and an average value of the first data voltages corresponding to the pixels arranged on the (i-2)th horizontal line; and The third differential voltage is a voltage between an average value of the first data voltages corresponding to the pixels arranged on the (i-2)th horizontal line and an average value of the first data voltages corresponding to the pixels arranged on the (i-3)th horizontal line.

10. The display device according to claim 4, wherein The second data compensation unit includes: a second adding section that adds the first differential voltage and an output of the second compensation gain applying section and outputs the added voltage; a second delay unit, delaying the output of the second adder by a predetermined time to output the second compensation voltage; and The second compensation gain application section applies a second compensation gain to the output of the second delay section and feeds the resultant output to the second addition section.

11. The display device according to claim 2, further comprising: The memory stores the first data voltages in units of horizontal lines.

12. The display device according to claim 11, wherein The data driving unit reads the first data voltages corresponding to the pixels arranged on the i-th horizontal line from the memory, and adds the compensation voltage to the read first data voltages to generate the second data voltages.

13. A method for driving a display device, comprising: determining first data voltages corresponding to data lines connected to pixels based on image data; a step of comparing the first data voltages corresponding to the pixels arranged on three or more adjacent horizontal lines among the pixels with each other in units of adjacent horizontal lines, thereby calculating a compensation voltage; adding the compensation voltage to each of the first data voltages to generate each of the second data voltages; as well as supplying the second data voltage to each of the data lines; In the step of calculating the compensation voltage, first data voltages of pixels arranged on a horizontal line are compared with first data voltages of pixels arranged on a horizontal line adjacent to the horizontal line, and the compensation voltage is output.

14. The method for driving a display device according to claim 13, wherein: The step of calculating the compensation voltage includes: a step of comparing the first data voltages corresponding to the pixels arranged on the i-th horizontal line with the first data voltages corresponding to the pixels arranged on the (i-1)-th horizontal line to calculate a first compensation voltage, wherein i is a natural number greater than or equal to 3; and The step of comparing the first data voltages corresponding to the pixels arranged on the i-1th to ikth horizontal lines in units of adjacent horizontal lines to calculate the second compensation voltage, wherein k is a natural number greater than 1 and less than i.

15. The method for driving a display device according to claim 14, wherein: The step of calculating the compensation voltage includes the step of linearly combining the first compensation voltage and the second compensation voltage to calculate the compensation voltage.

16. The method for driving a display device according to claim 14, wherein: The step of calculating the first compensation voltage includes: a step of calculating a first differential voltage by differentiating a first average value of the first data voltages corresponding to the pixels arranged on the i-th horizontal line and a second average value of the first data voltages corresponding to the pixels arranged on the (i-1)th horizontal line; and The step of applying a first compensation gain to the first differential voltage to calculate the first compensation voltage.

17. The method for driving a display device according to claim 16, wherein: The first compensation gain is predetermined so that horizontal crosstalk between the pixels arranged on the i-th horizontal line and the pixels arranged on the (i-1)-th horizontal line is offset.

18. The method for driving a display device according to claim 14, wherein: The step of calculating the second compensation voltage includes: For each of the first data voltages corresponding to the pixels arranged on the (i-1)th horizontal line to the (ik)th horizontal line, an average value is calculated in units of horizontal lines; a step of calculating at least one differential voltage by differentiating the average values ​​corresponding to adjacent horizontal lines among the average values; the step of applying a second compensation gain to the at least one differential voltage; and The step of calculating the second compensation voltage by adding the at least one differential voltage to which the second compensation gain is applied.

19. The method for driving a display device according to claim 18, wherein: The second compensation gain is applied to the at least one differential voltage at a certain attenuation ratio.

20. The method for driving a display device according to claim 14, wherein: The step of generating the second data voltages adds the compensation voltage to the first data voltages corresponding to the pixels arranged on the i-th horizontal line to generate the second data voltages.

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