Control circuit and distance measuring system

Abstract

A control circuit according to the present disclosure includes a passive circuit (10) and an active circuit (20). The passive circuit (10) is configured to be able to supply current to a single-photon avalanche diode (SPAD) element (6a) from one supply path (Rp), and output a first pulse signal (P1) corresponding to a signal generated by the SPAD element (6a). The active circuit (20) is configured to be able to selectively supply current to the SPAD element (6a) from a plurality of supply paths, and output a second pulse signal (P2) corresponding to a signal generated by the SPAD element (6a).

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a control circuit and a distance measurement system. BACKGROUND

[0002] A distance measurement technique called a direct time-of-flight (ToF) method is known as one of distance measurement methods that utilize light to measure a distance to an object to be measured. In the above-described direct ToF method, a light receiving element receives reflected light of light emitted from a light source, which is reflected from an object to be measured, so as to measure a distance to the target based on a time interval from emission of the light to reception of the reflected light (for example, refer to Patent Literature 1).

[0003] LIST OF CITATIONS

[0004] PATENT LITERATURE

[0005] Patent Literature 1: JP 2014-081254 A SUMMARY

[0006] PROBLEMS TO BE SOLVED BY THE INVENTION

[0007] However, in the above-described conventional technique, when a single-photon avalanche diode (SPAD) element receives reflected light again at an interval shorter than a dead time of the SPAD element used as a light receiving element, it is difficult to detect the above-described subsequent reflected light.

[0008] Further, in the above-described conventional technique, a dynamic range of the distance measurement system is rate-controlled by the dead time of the SPAD element. Therefore, unless the dead time of the SPAD element is shortened, it is difficult to expand the dynamic range of the distance measurement system.

[0009] Therefore, in the present disclosure, a control circuit and a distance measurement system capable of expanding a dynamic range are proposed.

[0010] SOLUTION TO PROBLEM

[0011] According to the present disclosure, a control circuit is provided. The control circuit includes a passive circuit and an active circuit. The passive circuit is configured to supply a current to a single-photon avalanche diode (SPAD) element from a single supply path and to output a first pulse signal in accordance with a signal generated in the SPAD element. The active circuit is configured to selectively supply the current to the SPAD element from a plurality of supply paths and to output a second pulse signal in accordance with the signal generated in the SPAD element.

[0012] ADVANTAGEOUS EFFECT OF THE INVENTION

[0013] According to this disclosure, the dynamic range can be expanded. It should be noted that the above effects are not necessarily limited, and any effect described in this specification or other effects that can be understood from this specification can be demonstrated together with or in place of the above effects. Attached Figure Description

[0014] Figure 1 This is a schematic diagram illustrating distance measurement using a direct ToF method applied according to an embodiment of the present disclosure.

[0015] Figure 2 This is a histogram illustrating an example of the time points at which a light receiving unit receives light according to an embodiment of the present disclosure.

[0016] Figure 3 This is a block diagram illustrating an example configuration of a distance measuring device according to an embodiment of the present disclosure.

[0017] Figure 4 This is a schematic diagram illustrating the configuration of an apparatus applied to an optical receiving unit according to an embodiment of the present disclosure.

[0018] Figure 5 This is a circuit diagram illustrating an example configuration of a pulse output unit according to an embodiment of the present disclosure.

[0019] Figure 6 This is a timing diagram illustrating the operation of the passive circuitry in the pulse output unit according to an embodiment of the present disclosure.

[0020] Figure 7 This is a timing diagram illustrating the operation of the active circuit in the pulse output unit according to an embodiment of the present disclosure.

[0021] Figure 8 This is a graph illustrating the relationship between the amount of incident light per frame and the number of counts per frame for passive and active circuits according to embodiments of the present disclosure.

[0022] Figure 9 This is a circuit diagram illustrating an example configuration of an inverter in a delay circuit according to an embodiment of the present disclosure.

[0023] Figure 10 This is a circuit diagram illustrating a configuration example of a modified pulse output unit according to an embodiment of the present disclosure. Detailed Implementation

[0024] Hereinafter, embodiments according to the present disclosure will be explained in detail with reference to the accompanying drawings. In the following embodiments, the same parts are given the same reference numerals to avoid repeated explanations.

[0025] As one of the distance measurement methods that uses light to measure the distance to an object to be measured, a distance measurement technique known as the direct Time-of-Flight (ToF) method is known. In the direct ToF method, a light receiving element receives reflected light emitted from a light source and reflected by the object to be measured, and the distance to the target is measured based on the time interval from the emission of the light to the reception of the reflected light.

[0026] However, in the conventional techniques described above, it is difficult to detect the subsequent reflected light when the single-photon avalanche diode (SPAD) element receives the reflected light again at an interval shorter than the dead time of the SPAD element used as a light receiving element.

[0027] Furthermore, in the aforementioned conventional techniques, the dynamic range of the distance measurement system is rate-controlled by the dead time of the SPAD element. Therefore, unless the dead time of the SPAD element is shortened, it is difficult to extend the dynamic range of the distance measurement system.

[0028] The dead time of the SPAD element is determined by the value of the current supplied to the SPAD element, and the dead time of the SPAD element can be shortened when the value of the supplied current increases.

[0029] On the other hand, when the current supplied to the SPAD element is too large, a negative impact may occur: when the SPAD element receives light, the avalanche amplification that has already occurred in the SPAD element will not stop.

[0030] Therefore, it is desirable to develop control circuits and distance measurement systems that can overcome the above problems and expand the dynamic range.

[0031] [Distance Measurement Methods]

[0032] This disclosure relates to a technique for measuring distance using light. For ease of explanation of embodiments according to this disclosure, reference is made to... Figure 1 and Figure 2 The distance measurement method applied to the embodiments will be described.

[0033] Figure 1 This is a schematic diagram illustrating distance measurement using a direct Time-of-Flight (ToF) method applied according to an embodiment of the present disclosure. In this embodiment, the direct ToF method is employed as the distance measurement method.

[0034] In the direct ToF method described above, the light receiving unit 3 receives the reflected light L2 of the emitted light L1 emitted from the light source unit 2. The reflected light L2 is reflected from the object 100 to be measured, thereby measuring the distance based on the time interval difference between the light emission timing and the light reception timing.

[0035] The distance measuring device 1 includes a light source unit 2 and a light receiving unit 3. The distance measuring device 1 is an example of a distance measuring system. The light source unit 2 includes a light source 4 such as a laser diode (refer to Figure 3 ), and is driven to emit laser light in the form of pulses.

[0036] The emitted light L1 emitted from the light source unit 2 is reflected from the object 100 to be measured and received by the light receiving unit 3 as reflected light L2. The light receiving unit 3 includes a pixel array unit 6 (refer to Figure 3 ), and the pixel array unit 6 converts light into an electrical signal by photoelectric conversion, and outputs a signal according to the received light.

[0037] The time point (light emission timing) is defined as the time point t0 when the light source unit 2 emits light, and the time point (light reception timing) is defined as the time point t1 when the light receiving unit 3 receives the reflected light L2 of the emitted light L1 emitted from the light source unit 2, and the reflected light L2 is reflected from the object 100 to be measured.

[0038] When a constant c is defined as the speed of light (2.9979×10 ,

[0043] , m [m / sec]), the distance D between the distance measuring device 1 and the object 100 to be measured is calculated by the following formula (1).

[0039] D = (c / 2) × (t1 - t0) …(1)

[0040] The distance measuring device 1 can repeatedly execute the above process multiple times. The light receiving unit 3 may include a plurality of SPAD elements 6a (refer to Figure 4 ), and the distance D can be separately calculated based on the light reception timing of each SPAD element 6a receiving the reflected light L2.

[0041] The distance measuring device 1 classifies the time interval t m (hereinafter, may be referred to as “light reception time interval t m ”) from the time point t0 of the light emission timing to the light reception timing when the light receiving unit 3 receives light, to generate a histogram.

[0042] Figure 2 is a histogram showing an example based on the time point when the light receiving unit 3 receives light according to an embodiment of the present disclosure. In Figure 2 , the horizontal axis represents bins, and the vertical axis represents the frequency of each bin. The bins are obtained by classifying the light reception time interval t​​​​​​​m <2×d, bin#2 satisfies 2×d≤t m <3×d,…,bin#(N-2) satisfy(N-2)×d≤t m <(N-1)×d. When the exposure time interval of the light receiving unit 3 is defined as time interval t ep When t is satisfied ep =N×d.

[0044] Distance measuring device 1 is based on the light receiving time interval t of bin m The number of acquisitions is counted, and the frequency of each bin is 200 to generate a histogram. Here, the light receiving unit 3 receives light other than the reflected light L2, which is the reflected light from the emitted light L1 emitted from the light source unit 2.

[0045] For example, as an example of light other than the reflected light L2 that is to be the target, there is ambient light around the distance measuring device 1. The ambient light is light that is randomly incident on the light receiving unit 3, and the ambient light component 201 in the histogram becomes noise of the reflected light L2 that is to be the target due to the ambient light.

[0046] On the other hand, the reflected light L2 that becomes the target is light received at a specific distance and appears as an active light component 202 in the histogram. The bin corresponding to the frequency of the peak in the active light component 202 is the bin corresponding to the distance D of the object 100 to be measured.

[0047] The distance measuring device 1 obtains a representative time point (e.g., the time point at the center of the bin) of the bin that can be used to calculate the distance D to the object 100 to be measured, according to the above formula (1), as the aforementioned time point t1. As described above, by using multiple light receiving results, appropriate distance measurement can be performed despite random noise.

[0048] [Configuration of Distance Measurement Device]

[0049] Next, we will refer to Figure 3 and Figure 4 Explain the configuration of the distance measuring device 1 according to the embodiment. Figure 3 This is a block diagram illustrating an example configuration of a distance measuring device 1 according to an embodiment of the present disclosure. As described above, the distance measuring device 1 includes a light source unit 2 and a light receiving unit 3.

[0050] The light source unit 2 includes a light source 4 and a light source driving unit 5. The light source 4 is composed of laser diodes, such as those in a vertical cavity surface-emitting laser (VCSEL). The light source 4 is not limited to a VCSEL; an array of laser diodes arranged in a line can also be used.

[0051] The light source driving unit 5 drives the light source 4. The light source driving unit 5 drives the light source 4, for example, based on the light emission control signal sent from the control unit 8 of the light receiving unit 3, so that the emitted light L1 with a predetermined timing and a predetermined pulse width is emitted from the light source 4.

[0052] The light source driving unit 5 can drive the light source 4, so that scanning is performed, for example, in a direction perpendicular to the line, by using laser emitted from the light source 4, which includes laser diodes arranged in a line.

[0053] The light receiving unit 3 includes a pixel array unit 6, a pulse output unit 7, and a control unit 8.

[0054] Pixel array unit 6 includes multiple SPAD elements 6a arranged in a two-dimensional grid (see reference). Figure 4 The aforementioned SPAD element 6a applies a large reverse bias voltage to the cathode generated by avalanche multiplication, wherein avalanche multiplication occurs due to electrons generated in response to the incident single photon.

[0055] In other words, the SPAD element 6a has the characteristic of allowing a large current to flow through it in response to the incidence of a single photon. By using the above characteristic, the SPAD element 6a can detect the incidence of single photons included in the reflected light L2 with high sensitivity.

[0056] The operation of the multiple SPAD elements 6a in the pixel array unit 6 is controlled by the control unit 8. For example, for each block comprising n×m SPAD elements 6a consisting of n pixels in the row direction multiplied by m pixels in the column direction, the control unit 8 is able to control the readout signal from each SPAD element 6a.

[0057] For each block as a unit, the control unit 8 scans the SPAD element 6a in the row direction and further performs a scan in the column direction for each row in order to be able to read signals from the SPAD element 6a.

[0058] Note that in this embodiment, the control unit 8 can read the signal individually from each SPAD element 6a. The signal generated in the SPAD element 6a in the pixel array unit 6 is supplied to the pulse output unit 7.

[0059] In response to the signal generated in SPAD element 6a, pulse output unit 7 outputs a predetermined pulse signal as a digital signal to control unit 8. Details about the pulse output unit 7 will be mentioned later.

[0060] The control unit 8 controls the entire operation of the distance measuring device 1, for example, according to a pre-implemented program. The control unit 8 controls the light source driving unit 5, thereby controlling, for example, the light emission timing of the light source 4.

[0061] Control unit 8 generates based on the pulse signal output from pulse output unit 7 Figure 2 The histogram is shown. The control unit 8 performs predetermined operational processing based on the data on the generated histogram in order to calculate the distance D to the object 100 to be measured.

[0062] Figure 4 This is a schematic diagram illustrating the configuration of an apparatus applied to an optical receiving unit 3 according to an embodiment of the present disclosure. Figure 4 In this structure, the optical receiving unit 3 consists of stacked optical receiving ends 3a and logic ends 3b, each of which is composed of a semiconductor chip. Figure 4 In the diagram, for ease of explanation, the optical receiver 3a and the logic terminal 3b are shown in a separated state.

[0063] In the light receiver 3a, SPAD elements 6a are arranged in a two-dimensional grid in the region of the pixel array unit 6. The logic terminal 3b is equipped with a pulse output unit 7 and a control unit 8. Note that the configuration of the light receiver 3a and the logic terminal 3b is not limited to... Figure 4 The example shown.

[0064] [Configuration and Operation of the Pulse Output Unit]

[0065] Next, we will refer to Figure 5 to Figure 9 The configuration and operation of the pulse output unit 7 according to the embodiment will be explained. Figure 5 This is a circuit diagram illustrating an example configuration of the pulse output unit 7 according to an embodiment of the present disclosure.

[0066] like Figure 5 As shown, the pulse output unit 7 includes a passive circuit 10 and an active circuit 20. One of the passive circuit 10 and the active circuit 20, selected by the control unit 8, operates according to a control signal sent from the control unit 8.

[0067] Therefore, the configuration and operation of the passive circuit 10 will be described first. The passive circuit 10 includes a P-type transistor 11, a P-type transistor 12, and an inverter 13.

[0068] The source of P-type transistor 11 is connected to the power supply voltage Vdd, and the drain of P-type transistor 11 is connected to node 14. The source of P-type transistor 12 is connected to node 14, and the drain of P-type transistor 12 is connected to signal line 15.

[0069] The aforementioned signal line 15 is connected between the cathode of the SPAD element 6a and the input terminal of the inverter 13 via connector 6b of the pixel array unit 6. The anode of the SPAD element 6a is grounded, and the output terminal of the inverter 13 is connected to the control unit 8 (see reference 8) via node 16. Figure 3 ).

[0070] When passive circuit 10 is selected instead of active circuit 20, control unit 8 will apply a predetermined first reference voltage V. REF1 The input is given to the gate of P-type transistor 11, and the low-level selection signal Sa is further given to the gate of P-type transistor 12.

[0071] Therefore, from the first reference voltage V REF1 A predetermined current is supplied to the cathode of the SPAD element 6a via a supply path Rp including P-type transistors 11 and 12. Using this predetermined current, the control unit 8 is able to operate the SPAD element 6a.

[0072] When the passive circuit 10 is selected, the control unit 8 inputs a high-level selection signal Sb to the gate of the P-type transistor 22 in the active circuit 20 (which will be mentioned later), and further inputs a high-level selection signal Sc to the gate of the P-type transistor 23.

[0073] The control unit 8 inputs a low-level selection signal Sd to the input terminal of the NAND circuit 24. Therefore, no current other than the predetermined current is supplied to the cathode of the SPAD element 6a.

[0074] Next, besides Figure 5 External References Figure 6 The operation of passive circuit 10 will be explained. Figure 6 This is a timing diagram illustrating the operation of the passive circuit 10 in the pulse output unit 7 according to an embodiment of the present disclosure.

[0075] A reverse bias voltage Va is applied to SPAD element 6a until SPAD element 6a enters a state just before avalanche amplification, which is called Geiger mode. In other words, in the initial state, the signal S1 output from the cathode of SPAD element 6a is the aforementioned voltage Va. A voltage Va equal to or greater than the threshold voltage Vth is input as signal S1 to inverter 13, so inverter 13 outputs a low-level signal S2.

[0076] When a single photon is incident on SPAD element 6a with applied voltage Va at time point T1, SPAD element 6a breaks down and current flows into the supply path Rp. Therefore, signal S1 decreases rapidly from voltage Va. When signal S1 becomes less than the threshold voltage Vth at time point T2, inverter 13 outputs a high-level signal S2.

[0077] The avalanche amplification in SPAD element 6a stops at time T3, so the signal S1 stops decreasing at voltage Vb. Furthermore, SPAD element 6a is recharged via supply path Rp, and therefore the signal S1 rises (i.e., quenching operation).

[0078] At time point T4, when signal S1 becomes equal to or greater than the threshold voltage Vth, inverter 13 outputs a low-level signal S2. Finally, SPAD element 6a returns to its initial voltage Va at time point T5, and SPAD element 6a and passive circuit 10 return to their respective initial states.

[0079] As described above, the passive circuit 10 uses an inverter 13 to convert the signal S1 generated in the SPAD element 6a by the incidence of a single photon into a first pulse signal P1, thereby outputting the first pulse signal P1. The aforementioned first pulse signal P1 is... Figure 6 The example shown has a signal with a pulse width from time point T2 to time point T4.

[0080] like Figure 6 As shown, the pulse width of the first pulse signal P1 is defined by the recovery time interval (time point T1 to time point T5) of the SPAD element 6a. The recovery time interval of the SPAD element 6a is determined by the characteristics of the SPAD element 6a (e.g., the capacitance of the element) and the value of the current supplied from the supply path Rp.

[0081] When a new photon is incident during the aforementioned recovery time interval, the SPAD element 6a cannot detect the new photon. This is because when the new photon is incident, avalanche amplification occurs again in the SPAD element 6a, so even when a new photon is incident during the recovery time interval, the total number of pulses of the first pulse signal P1 becomes 1.

[0082] In other words, the recovery time interval of SPAD element 6a corresponds to the pulse width of the first pulse signal P1, and the pulse width of the first pulse signal P1 corresponds to the dead time of SPAD element 6a.

[0083] Here, when the value of the current supplied from the supply path Rp is larger, the recovery time interval of the SPAD element 6a is shorter; on the other hand, when the value of the supplied current is too large, the avalanche amplification in the SPAD element 6a stops.

[0084] Therefore, the value of the current supplied from the supply path Rp in the passive circuit 10 to the SPAD element 6a is not set to be equal to or greater than a predetermined value.

[0085] In other words, when current is supplied from the passive circuit 10 to the SPAD element 6a, it is difficult to set the recovery time interval of the SPAD element 6a (i.e., the pulse width of the first pulse signal P1) to be equal to or less than the time interval determined by the current value within the range in which the SPAD element 6a can operate normally.

[0086] Therefore, in this embodiment, to further shorten the recovery time interval of the SPAD element 6a, an active circuit 20 is added to the pulse output unit 7. (Back to...) Figure 5 The circuit configuration of the active circuit 20 described above will be explained.

[0087] The active circuit 20 includes a P-type transistor 11, an inverter 13, a P-type transistor 21, a P-type transistor 22, a P-type transistor 23, a NAND circuit 24, a delay circuit 25, and a P-type transistor 26. The delay circuit 25 includes four inverters 31 to 34.

[0088] The source of P-type transistor 21 is connected to the power supply voltage Vdd, the drain of P-type transistor 21 is connected to the source of P-type transistor 22, and the gate of P-type transistor 21 is connected to node 16. The drain of P-type transistor 22 is connected to signal line 15.

[0089] The source of P-type transistor 23 is connected to node 14, and the drain of P-type transistor 23 is connected to inverter 31 of delay circuit 25.

[0090] The two input terminals of NAND circuit 24 are connected to node 16 and the output terminal of inverter 34. The select signal Sd is input to the other input terminal of NAND circuit 24.

[0091] The output terminal of NAND circuit 24 is connected to the input terminal of inverter 31. The output terminal of inverter 31 is connected to the input terminal of inverter 32. The output terminal of inverter 32 is connected to the input terminal of inverter 33. The output terminal of inverter 33 is connected to the input terminal of inverter 34.

[0092] In other words, in the active circuit 20, the NAND circuit 24 and the four inverters 31 to 34 constitute a ring oscillator.

[0093] The source of P-type transistor 26 is connected to the power supply voltage Vdd, the drain of P-type transistor 21 is connected to signal line 15, and the gate of P-type transistor 21 is connected to the output terminal of inverter 34.

[0094] Here, when active circuit 20 is selected instead of passive circuit 10, control unit 8 inputs a low-level selection signal Sb to the gate of P-type transistor 22. Low-level signal S2 is initially input via node 16 to the gate of P-type transistor 21, which is serially connected to P-type transistor 22.

[0095] Therefore, in the initial state, a predetermined current is supplied to the cathode of the SPAD element 6a through the first supply path Ra1, which includes P-type transistor 21 and P-type transistor 22. The control unit 8 is able to operate the SPAD element 6a by using the predetermined current.

[0096] Control unit 8 will set the predetermined second reference voltage V REF2 The input is given to the gate of P-type transistor 11, and the high-level selection signal Sa is further given to the gate of P-type transistor 12.

[0097] Furthermore, the control unit 8 inputs a low-level selection signal Sc to the gate of the P-type transistor 23, and further inputs a high-level selection signal Sd to the input terminal of the NAND circuit 24. The high-level signal S3 is initially input to the gate of the P-type transistor 26.

[0098] Therefore, in the initial state, current is not supplied to the cathode of SPAD element 6a from any path other than the first supply path Ra1 mentioned above.

[0099] Next, besides Figure 5 External References Figure 7 The operation of the active circuit 20 will be explained. Figure 7 This is a timing diagram illustrating the operation of the active circuit 20 in the pulse output unit 7 according to an embodiment of the present disclosure.

[0100] Similar to the passive circuit 10, in the active circuit 20, a reverse bias voltage Va is applied to the SPAD element 6a until the SPAD element 6a enters the state just before avalanche amplification occurs. In other words, in the initial state, the signal S1 output from the cathode of the SPAD element 6a is the aforementioned voltage Va.

[0101] A voltage Va equal to or greater than the threshold voltage Vth is input as signal S1 to inverter 13, and therefore inverter 13 outputs a low-level signal S2. The low-level signal S2 is input from inverter 13 to NAND circuit 24, and therefore a high-level signal S3 is output from delay circuit 25.

[0102] At time point T1a when voltage Va is applied, when a single photon is incident on SPAD element 6a, SPAD element 6a breaks down, and current flows into the first supply path Ra1. Therefore, signal S1 decreases rapidly from voltage Va. When signal S1 becomes less than the threshold voltage Vth at time point T2a, inverter 13 outputs a high-level signal S2.

[0103] The avalanche amplification stops at time T3a, so the signal S1 stops decreasing at voltage Vb. On the other hand, in the active circuit 20, the signal S2, which goes high at time T2a, is input to the gate of the P-type transistor 21, so the first supply path Ra1 is cut off.

[0104] Therefore, the cathode of SPAD element 6a enters a floating state where it is cut off from the power supply voltage Vdd. Consequently, signal S1 is also fixed to voltage Vb after time point T3a.

[0105] Furthermore, signal S2, which goes high at time point T2a, is also input to NAND circuit 24. At the timing point T2a, high-level selection signal Sd and high-level signal S3 are input to NAND circuit 24, thus NAND circuit 24 outputs a low-level signal.

[0106] Based on the low-level signal sent from the NAND circuit 24, the delay circuit 25 outputs a low-level signal S3 at time point T4a after time point T2a by a predetermined delay time.

[0107] At the aforementioned time point T4a, the signal S3, which becomes low, is input to the gate of the P-type transistor 26. Therefore, the P-type transistor 26 becomes conductive, and thus the second supply path Ra2, including the P-type transistor 26, is disconnected in the active circuit 20.

[0108] Therefore, the SPAD element 6a is recharged via the second supply path Ra2, causing the signal S1 to rise.

[0109] In other words, in the active circuit 20 according to the embodiment, a first supply path Ra1 and a second supply path Ra2 are configured as supply paths for supplying current to the SPAD element 6a. The first supply path Ra1 includes P-type transistors 21 and 22 to supply current to the SPAD element 6a in the initial state and when avalanche amplification occurs in the SPAD element 6a.

[0110] The second supply path Ra2 includes a P-type transistor 26 to supply current to the SPAD element 6a after avalanche amplification in the SPAD element 6a has stopped.

[0111] In this embodiment, it is preferable to set the internal resistance of the P-type transistor 26 to be less than the internal resistance of the P-type transistor 21. In other words, in this embodiment, it is preferable to set the resistance value of the second supply path Ra2 to be less than the resistance value of the first supply path Ra1.

[0112] Therefore, a large current can be supplied to the SPAD element 6a from the second supply path Ra2, enabling the SPAD element 6a to be recharged faster than the passive circuit 10.

[0113] When avalanche amplification occurs in SPAD element 6a, the second supply path Ra2 does not supply current. Therefore, even when the internal resistance of P-type transistor 26 is set to be small, there is no negative impact, such as the cessation of avalanche amplification in SPAD element 6a.

[0114] Similar to the supply path Rp of the passive circuit 10, the first supply path Ra1 may have a resistance value that enables the supply of current within the range in which the SPAD element 6a can operate normally.

[0115] At time point T5a, when signal S1 becomes equal to or greater than the threshold voltage Vth, inverter 13 outputs a low-level signal S2. Furthermore, at time point T6a, SPAD element 6a returns to its initial voltage Va.

[0116] As described above, the active circuit 20 uses an inverter 13 to convert the signal S1 generated in the SPAD element 6a by the incident single photon into a second pulse signal P2, thereby outputting the second pulse signal P2. The aforementioned second pulse signal P2 is... Figure 7 The example shown has a signal with a pulse width from time point T2a to time point T5a.

[0117] The signal S2, which goes low at time T5a, is input to the gate of P-type transistor 21. Therefore, a predetermined current is supplied to the cathode of SPAD element 6a via P-type transistors 21 and 22.

[0118] Furthermore, the signal S2, which goes low at time point T5a, is also input to the NAND circuit 24. Therefore, the NAND circuit 24 outputs a high-level signal, and thus the delay circuit 25 outputs a high-level signal S3 at time point T7a, after time point T5a, after a predetermined delay time.

[0119] At time T7a, the signal S3, which goes high, is input to the gate of the P-type transistor 26. Therefore, the P-type transistor 26 becomes off, and the SPAD element 6a and the active circuit 20 return to their respective initial states.

[0120] As described above, the active circuit 20 according to the embodiment is provided with multiple supply paths (first supply path Ra1 and second supply path Ra2) for supplying current to the cathode of the SPAD element 6a so as to enable the SPAD element 6a to recover quickly.

[0121] Therefore, the recovery time interval of the SPAD element 6a can be shortened, thereby reducing the dead time of the SPAD element 6a. Thus, according to the embodiment, the dynamic range of the distance measuring device 1 can be expanded.

[0122] The switching process between the passive circuit 10 and the active circuit 20 can preferably be handled by the control unit 8 according to... Figure 8 The process shown is executed. Figure 8This is a graph showing the relationship between the amount of incident light per frame and the number of counts per frame for the passive circuit 10 and the active circuit 20 according to embodiments of the present disclosure.

[0123] like Figure 8 As shown, in a range where the amount of incident light per frame is relatively small relative to the pixel array unit 6, the number of counts per frame of the first pulse signal P1 output from the passive circuit 10 increases proportionally to the amount of incident light per frame.

[0124] Similarly, within a range where the amount of incident light per frame is relatively small relative to the pixel array unit 6, the number of counts per frame of the second pulse signal P2 output from the active circuit 20 increases proportionally to the amount of incident light per frame.

[0125] On the other hand, as the amount of incident light per frame relative to pixel array unit 6 gradually increases, the count of the first pulse signal P1 output from passive circuit 10 saturates earlier than the count of the second pulse signal P2 output from active circuit 20. This is because when passive circuit 10 is selected, the dead time of SPAD element 6a is longer than that of active circuit 20.

[0126] When the number of counts is less than the threshold count Cth just before the start of the above saturation, the control unit 8 selects the passive circuit 10, and when the number of counts is equal to or greater than the threshold count Cth, the control unit 8 selects the active circuit 20.

[0127] Therefore, even when the number of counts is equal to or greater than the threshold count Cth, a second pulse signal P2 with the number of counts can be output based on the amount of incident light. Thus, according to the embodiment, the dynamic range of the distance measuring device 1 can be expanded.

[0128] On the other hand, the passive circuit 10 has a simple circuit configuration, so its power consumption is lower than that of the active circuit 20. Therefore, when the number of counts is lower than the threshold count Cth, the passive circuit 10 is selected, thereby reducing the power consumption of the pulse output unit 7.

[0129] For example, when active circuit 20 is selected and the number of counts in a frame is less than the threshold number of counts Cth, control unit 8 can select passive circuit 10 from the next frame.

[0130] When passive circuit 10 is selected and the number of counts in a frame is equal to or greater than the number of counts Cth, control unit 8 can select active circuit 20 from the next frame.

[0131] In this embodiment, the pulse width of the second pulse signal P2 can be set to be shorter than the pulse width of the first pulse signal P1. Therefore, when the active circuit 20 is selected, the dead time of the SPAD element 6a can be shortened.

[0132] Therefore, according to the embodiment, the dynamic range of the distance measuring device 1 can be expanded.

[0133] Furthermore, in this embodiment, the pulse width of the second pulse signal P2 can be set based on the delay time of the delay circuit 25. Therefore, fluctuations in the pulse width of the second pulse signal P2 can be reduced.

[0134] Therefore, according to the embodiment, it is possible to avoid the control unit 8 erroneously failing to detect the second pulse signal P2 due to excessive reduction in the pulse width of the second pulse signal P2.

[0135] Furthermore, in the embodiments, such as Figure 9 As shown, current can be supplied to the inverter 31 of the delay circuit 25 by using the P-type transistor 11, which serves as a constant current source. Figure 9 This is a circuit diagram illustrating an example configuration of the inverter 31 in the delay circuit 25 according to an embodiment of the present disclosure.

[0136] like Figure 9 As shown, inverter 31 is configured as a CMOS circuit, which consists of a P-type transistor 31a on the upper channel and an N-type transistor 31b on the lower channel. The source of the aforementioned P-type transistor 31a on the upper channel is connected to a P-type transistor 11, which serves as a constant current source.

[0137] Therefore, the delay time from time point T5a to time point T7a can be greater than Figure 7 The delay time from time point T2a to time point T4a shown is shorter. In other words, the pulse width of signal S3 can be shorter than the pulse width of signal S2 (the second pulse signal P2). The reason will be described below.

[0138] When signal S2 goes high at time T2a, a low-level signal is input from NAND circuit 24 to inverter 31. Therefore, inverter 31 outputs the high-level signal from P-type transistor 11, which acts as a constant current source, to inverter 32 via P-type transistor 31a, which becomes conductive.

[0139] As described above, the second reference voltage V REF2 The input is given to the P-type transistor 11, when controlling the aforementioned second reference voltage V. REF2 At this time, it can limit the amount of current supplied to the P-type transistor 31a.

[0140] Therefore, in the embodiment, the delay time from the time when the low-level signal is input to the inverter 31 to the time when the inverter 31 outputs a high-level signal can be extended.

[0141] On the other hand, when signal S2 goes low at time T5a, a high-level signal is input from NAND circuit 24 to inverter 31. Therefore, inverter 31 outputs a low-level signal from ground to inverter 32 via N-type transistor 31b, which becomes conductive.

[0142] Furthermore, since the N-type transistor 31b is directly grounded, it enters the conducting state more quickly than the P-type transistor 31a. Therefore, in this embodiment, the time delay from the point when a high-level signal is input to the inverter 31 to the point when the inverter 31 outputs a low-level signal can be shortened.

[0143] As described above, the delay circuit 25 supplies a finite current to the inverter 31 at the first stage so that the pulse width of signal S3 is shorter than the pulse width of signal S2 (second pulse signal P2).

[0144] Therefore, in this embodiment, the phenomenon that the pulse width of the second pulse signal P2 is too short to be detected by the control unit 8 can be avoided, and the delay circuit 25 can be quickly returned to the initial state.

[0145] In this embodiment, the P-type transistor 11 shares the transistor that controls the current supplied to the SPAD element 6a in the passive circuit 10 and the transistor that controls the current supplied to the inverter 31 in the active circuit 20.

[0146] Therefore, the degradation of the mismatch characteristics between the passive circuit 10 and the active circuit 20 can be minimized, which becomes a problem limiting the layout of the pulse output unit 7. Thus, according to the embodiment, the expansion in the dynamic range of the distance measuring device 1 can be maximized.

[0147] In the embodiments, examples have been described in which a current with a finite value is supplied to inverter 31 at the first stage in delay circuit 25; however, a current with a finite value can be supplied to any inverter as long as the inverter (e.g., inverter 33 at the third stage) is at an odd stage.

[0148] In an embodiment, the resistance value of the second supply path Ra2 can be set to be equal to the resistance value of the first supply path Ra1, or it can be set to be greater than the resistance value of the first supply path Ra1.

[0149] [Revise]

[0150] Next, we will refer to Figure 10 The modifications to the embodiments will be explained below.Figure 10 This is a circuit diagram illustrating a configuration example of a modified pulse output unit 7 according to an embodiment of the present disclosure.

[0151] In this modification, the configuration of the transistors controlling the current supplied to the inverter 31 in the active circuit 20 differs from the configuration according to the embodiment.

[0152] Specifically, in this modification, a P-type transistor 27 is additionally provided as a transistor for controlling the current supplied to the inverter 31 in the active circuit 20.

[0153] The source of P-type transistor 27 is connected to the power supply voltage Vdd, and the drain of P-type transistor 27 is connected to the source of P-type transistor 23. A predetermined second reference voltage V... REF2 It is input to the gate of P-type transistor 27.

[0154] The transistor controlling the current supplied to the SPAD element 6a in the passive circuit 10 is a P-type transistor 11, as in the embodiment. A predetermined first reference voltage V REF1 It is input to the gate of the aforementioned P-type transistor 11.

[0155] Based on the above modifications and embodiments, when the active circuit 20 is selected, the recovery time interval of the SPAD element 6a can be shortened, thereby shortening the dead time of the SPAD element 6a. Therefore, according to this modification, the dynamic range of the distance measuring device 1 can be expanded.

[0156] First reference voltage V REF1 The value of the second reference voltage V REF2 The modification is effective when the difference between the values ​​is large, and therefore rapid changes in the gate voltage of the P-type transistor 11 are difficult.

[0157] [Effect]

[0158] The control circuit according to an embodiment includes a passive circuit 10 and an active circuit 20. The passive circuit 10 is configured to supply current to the SPAD element 6a from a single supply path Rp and output a first pulse signal P1 based on a signal generated in the SPAD element 6a. The active circuit 20 is configured to selectively supply current to the SPAD element 6a from a plurality of supply paths (a first supply path Ra1 and a second supply path Ra2) and output a second pulse signal P2 based on a signal generated in the SPAD element 6a.

[0159] Therefore, the dynamic range of the distance measuring device 1 can be expanded.

[0160] In the control circuit according to the embodiment, the pulse width of the second pulse signal P2 is shorter than the pulse width of the first pulse signal P1.

[0161] Therefore, when the active circuit 20 is selected, the dead time of the SPAD element 6a can be shortened.

[0162] In the control circuit according to the embodiment, the active circuit 20 includes a first supply path Ra1 and a second supply path Ra2. When avalanche amplification occurs in the SPAD element 6a, the first supply path Ra1 supplies current to the SPAD element 6a. After avalanche amplification in the SPAD element 6a stops, the second supply path Ra2 supplies current to the SPAD element 6a.

[0163] Therefore, the recovery time interval of SPAD element 6a can be shortened, thereby shortening the dead time of SPAD element 6a.

[0164] In the control circuit according to the embodiment, the resistance value of the second supply path Ra2 is less than the resistance value of the first supply path Ra1.

[0165] Therefore, a large current can be supplied to the SPAD element 6a from the second supply path Ra2, enabling the SPAD element 6a to be recharged faster than the passive circuit 10.

[0166] The control circuit according to the embodiment further includes a control unit 8 that controls the passive circuit 10 and the active circuit 20. The control unit 8 switches the circuit connected to the SPAD element 6a between the passive circuit 10 and the active circuit 20 based on the number of frames counted for the first pulse signal P1 or the second pulse signal P2 output from the passive circuit 10 or the active circuit 20.

[0167] Therefore, the dynamic range of the distance measuring device 1 can be expanded, and the power consumption of the pulse output unit 7 can be further reduced.

[0168] In the control circuit according to the embodiment, the active circuit 20 includes a delay circuit 25 to output a second pulse signal P2 having a pulse width based on the delay time of the delay circuit 25.

[0169] Therefore, it is possible to avoid the second pulse signal P2 being erroneously not detected by the control unit 8.

[0170] In the control circuit according to an embodiment, the delay circuit 25 includes an inverter 31 to set the delay time based on the value of the current supplied to the inverter 31.

[0171] Therefore, the phenomenon that the pulse width of the second pulse signal P2 is too short to be detected by the control unit 8 can be avoided, and the delay circuit 25 can be quickly returned to the initial state.

[0172] According to the embodiment, the control circuit shares a transistor that controls the current supplied to the SPAD element 6a in the passive circuit 10 and a transistor that controls the current supplied to the inverter 31 in the active circuit 20.

[0173] Therefore, it is possible to maximize the expansion within the dynamic range of the distance measuring device 1.

[0174] Although preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, the scope of the present disclosure is not limited thereto. It will be apparent to those skilled in the art that various variations or modifications within the scope of the technical concept described in the claims can be conceived, and it should be understood that such variations or modifications also reasonably fall within the scope of the present disclosure.

[0175] Furthermore, the effects described in this specification are merely illustrative or exemplary, and not restrictive. In other words, the technology according to this disclosure can, based on the description in this specification, perform other effects that are obvious to those skilled in the art, either in conjunction with or in lieu of the aforementioned effects.

[0176] The following configurations also fall within the scope of this disclosure. (1)

[0178] A control circuit, comprising:

[0179] The passive circuit is configured as follows:

[0180] Current is supplied to the single-photon avalanche diode (SPAD) element from a single supply path; and

[0181] The first pulse signal is output based on the signal generated by the SPAD element; and

[0182] The active circuit is configured as follows:

[0183] Current is selectively supplied to the SPAD element from multiple supply paths; and

[0184] The second pulse signal is output based on the signal generated in the SPAD element. (2)

[0186] According to the control circuit described in (1) above, wherein

[0187] The pulse width of the second pulse signal is shorter than the pulse width of the first pulse signal. (3)

[0189] According to the control circuit described in (1) or (2) above, wherein

[0190] Active circuits include:

[0191] A first supply path supplies current to the SPAD element when avalanche amplification occurs in the SPAD element; and

[0192] A second supply path supplies current to the SPAD element after avalanche amplification in the SPAD element has stopped. (4)

[0194] According to the control circuit described in (3) above, wherein

[0195] The resistance value of the second supply path is less than the resistance value of the first supply path. (5)

[0197] The control circuit according to any one of (1) to (4) above further includes:

[0198] The control unit controls both passive and active circuits, among which...

[0199] The control unit switches the circuit connected to the SPAD element between the passive circuit and the active circuit based on the number of times one of the first pulse signal and the second pulse signal output from the corresponding one of the passive circuit and the active circuit is counted per frame. (6)

[0201] According to any one of (1) to (5) above, the control circuit wherein

[0202] The active circuit includes a delay circuit to output a second pulse signal having a pulse width based on the delay time of the delay circuit. (7)

[0204] According to the control circuit described in (6) above, wherein

[0205] The delay circuit includes an inverter to set the delay time based on the value of the current supplied to the inverter. (8)

[0207] According to the control circuit described in (7) above, wherein

[0208] The control circuit shares the transistor that controls the current supplied to the SPAD element in the passive circuit and the transistor that controls the current supplied to the inverter in the active circuit. (9)

[0210] Distance measurement system, including:

[0211] A light source that emits light toward the object to be measured;

[0212] The SPAD element outputs a signal when it receives light reflected from the object to be measured; and

[0213] Control circuit, including:

[0214] The passive circuit is configured as follows:

[0215] Current is supplied to the SPAD element from a single supply path; and

[0216] The first pulse signal is output based on the signal generated by the SPAD element; and

[0217] The active circuit is configured as follows:

[0218] Current is selectively supplied to the SPAD element from multiple supply paths; and

[0219] The second pulse signal is output based on the signal generated in the SPAD element. (10)

[0221] According to the distance measurement system described in (9) above, wherein

[0222] The pulse width of the second pulse signal is shorter than the pulse width of the first pulse signal. (11)

[0224] According to the distance measurement system described in (9) or (10) above, wherein

[0225] Active circuits, including:

[0226] A first supply path supplies current to the SPAD element when avalanche amplification occurs in the SPAD element; and

[0227] A second supply path supplies current to the SPAD element after avalanche amplification in the SPAD element has stopped. (12)

[0229] According to the distance measurement system described in (11) above, wherein

[0230] The resistance value of the second supply path is less than the resistance value of the first supply path. (13)

[0232] The distance measurement system according to any one of (9) to (12) above further includes:

[0233] The control unit controls both passive and active circuits, among which...

[0234] The control unit switches the circuit connected to the SPAD element between the passive circuit and the active circuit based on the number of times one of the first pulse signal and the second pulse signal output from the corresponding one of the passive circuit and the active circuit is counted per frame. (14)

[0236] According to any one of (9) to (13) above, the distance measurement system wherein

[0237] The active circuit includes a delay circuit to output a second pulse signal having a pulse width based on the delay time of the delay circuit. (15)

[0239] According to the distance measurement system described in (14) above, wherein

[0240] The delay circuit includes an inverter to set the delay time based on the value of the current supplied to the inverter. (16)

[0242] According to the distance measurement system described in (15) above, wherein

[0243] The control circuit shares the transistor that controls the current supplied to the SPAD element in the passive circuit and the transistor that controls the current supplied to the inverter in the active circuit.

[0244] Reference Mark List

[0245] 1. Distance measuring device (an example of a distance measuring system)

[0246] 2 Light Source Units

[0247] 3 Optical receiving unit

[0248] 6a SPAD element

[0249] 7 Pulse Output Unit

[0250] 8 Control Unit

[0251] 10 Passive Circuits

[0252] 20 Active Circuits

[0253] 25 Delay Circuit

[0254] 31 Inverter

[0255] P1 First Pulse Signal

[0256] P2 Second Pulse Signal

[0257] Rp supply path

[0258] Ra1 First Supply Path

[0259] Ra2 Second Supply Path

Claims

1. Control circuit, including: The passive circuit is configured as follows: Supply current to a single-photon avalanche diode element from a single supply path; and The inverter outputs a first pulse signal based on the signal generated in the single-photon avalanche diode element; as well as The active circuit is configured as follows: Current is selectively supplied to the single-photon avalanche diode element from multiple supply paths; and The inverter outputs a second pulse signal based on the signal generated in the single-photon avalanche diode element. The active circuit includes: A first supply path supplies current to the single-photon avalanche diode element when avalanche amplification occurs in the single-photon avalanche diode element, wherein current is supplied to the single-photon avalanche diode element through the first supply path when the level signal output by the inverter is a low level signal, and the first supply path is cut off when the level signal output by the inverter is a high level signal. A second supply path supplies current to the single-photon avalanche diode element after avalanche amplification in the single-photon avalanche diode element has stopped, and the resistance value of the first supply path is greater than the resistance value of the second supply path. The control circuit further includes a control unit that controls the passive circuit and the active circuit. The control unit switches the circuit connected to the single-photon avalanche diode element between the passive circuit and the active circuit based on a count obtained by counting one of the first pulse signal and the second pulse signal output from a corresponding one of the passive circuit and the active circuit per frame. The control unit selects the passive circuit when the count is less than a threshold count, and selects the active circuit when the count is equal to or greater than the threshold count.

2. The control circuit according to claim 1, wherein... The pulse width of the second pulse signal is shorter than the pulse width of the first pulse signal.

3. The control circuit according to claim 1, wherein... The active circuit includes a delay circuit to output a second pulse signal having a pulse width based on the delay time of the delay circuit.

4. The control circuit according to claim 3, wherein The delay circuit includes the inverter to set the delay time based on the value of the current supplied to the inverter.

5. The control circuit according to claim 4, wherein... The control circuit collectively controls the transistors in the active circuit that supply current to the inverter.

6. A distance measurement system, including: A light source that emits light toward the object to be measured; A single-photon avalanche diode element outputs a signal when it receives light reflected from the object to be measured; as well as The control circuit according to claim 1.

Images