Display panel, display device, and method for manufacturing display panel

Abstract

The present invention provides a display panel, a display device and a method for manufacturing a display panel. The display panel includes a transparent substrate, wherein: the substrate includes a first setting area, a plurality of pixel structures are arranged on the first setting area, each pixel structure includes a driving unit and a light-emitting unit sequentially made on the substrate, and the light-emitting unit includes a first electrode, a light-emitting layer and a second electrode sequentially arranged; wherein the vertical distance between the first electrode and the substrate is smaller than the vertical distance between the second electrode and the substrate; the pixel structure also includes a first conductive layer, which is located between the driving unit and the light-emitting unit, and the first conductive layer is insulated from the first electrode and is opposite to at least a part of the first electrode of the light-emitting unit to form a storage capacitor. The display panel described in the embodiment of the present invention can achieve the effect of improving the light transmittance of the display panel by stacking the storage capacitor and the driving unit.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel, a display device and a method for manufacturing the display panel. Background Art

[0002] In the development process of medium and large-sized active-matrix organic light-emitting diode or active-matrix organic light-emitting diode (AMOLED) display panels, the top-emitting technology solution is the best solution to achieve transparent display, which can ensure a certain resolution and a certain display effect. However, this solution requires the medium and large-sized OLED cathode material to have as high a transmittance as possible, so it cannot be made too thick and its resistance is limited. In this way, an auxiliary cathode needs to be made to reduce the resistance of the overall cathode, otherwise a voltage drop IR Drop phenomenon will occur, resulting in display quality problems.

[0003] The simplest structural method is to manufacture the auxiliary cathode on the array substrate and connect it to the auxiliary cathode through the anode. However, this structure requires the separate manufacture of the auxiliary cathode and a specific overlapping structure, which will occupy the design area of ​​the array substrate. In addition, the overlapping structure is arranged in the transparent area, which will greatly affect the transparency, resulting in a decrease in the transmittance or resolution of the overall transparent display.

[0004] At the same time, on the display backplane of medium and large-sized active matrix organic light-emitting diode panels (AMOLED), the area occupied by the capacitor is the largest, resulting in a relatively large overall TFT area, which limits the area of ​​the transparent area. Therefore, the setting of the capacitor also affects the resolution of the transparent display, making it impossible to achieve high transmittance and higher PPI display panel production. Summary of the invention

[0005] The technical solution of the present invention aims to provide a display panel, a display device and a method for manufacturing a display panel, so as to solve the problem of low transmittance of display panels in the prior art.

[0006] An embodiment of the present invention provides a display panel, comprising a transparent substrate, wherein:

[0007] The base substrate comprises a first setting area, a plurality of pixel structures are arranged on the first setting area, each of the pixel structures comprises a driving unit and a light-emitting unit which are sequentially manufactured on the base substrate, the light-emitting unit comprises a first electrode, a light-emitting layer and a second electrode which are sequentially arranged; wherein a vertical distance between the first electrode and the base substrate is smaller than a vertical distance between the second electrode and the base substrate;

[0008] The pixel structure further includes a first conductive layer located between the driving unit and the light emitting unit. The first conductive layer is insulated from the first electrode and is opposite to at least a portion of the first electrode of the light emitting unit to form a storage capacitor.

[0009] Optionally, in the display panel, the base substrate further comprises a second setting area, a second electrically conductive layer and a third electrically conductive layer arranged in parallel with the second electrically conductive layer are arranged on the second setting area, wherein the second electrically conductive layer and the third electrically conductive layer are separated by a first insulating layer;

[0010] The second electrode extends to the second setting area and is connected to the second electrical conductive layer and the third electrical conductive layer respectively.

[0011] Optionally, in the display panel, a vertical distance between the second electrically conductive layer and the base substrate is smaller than a vertical distance between the third electrically conductive layer and the base substrate, and the first electrically conductive layer and the third electrically conductive layer are provided in the same layer and with the same material.

[0012] Optionally, in the display panel, the second electrically conductive layer further extends to the first setting area and is located between the base substrate and the plurality of pixel structures.

[0013] Optionally, in the display panel, the pixel structure includes a planar layer arranged on the driving unit, wherein the first electrically conductive layer is made on the planar layer, and the planar layer and the first insulating layer are arranged in the same layer and with the same material.

[0014] Optionally, in the display panel, the pixel structure further comprises a second insulating layer disposed on the first electrically conductive layer, the first electrode is disposed on the second insulating layer, and is electrically connected to the driving unit via a via hole penetrating the second insulating layer and the planar layer;

[0015] Wherein, in the second setting area, a third insulating layer is provided on the third electrically conductive layer, and the second electrode extending to the second setting area covers the third insulating layer and is connected to the second electrically conductive layer and the third electrically conductive layer;

[0016] The second insulating layer and the third insulating layer are formed in the same layer and made of the same material.

[0017] Optionally, in the display panel, each of the pixel structures comprises two driving units, and the two driving units respectively comprise an active layer, a gate layer and a source / drain layer; wherein in the two driving units, the active layer of the first driving unit and the active layer of the second driving unit, the gate layer of the first driving unit and the gate layer of the second driving unit, and the source / drain layer of the first driving unit and the source / drain layer of the second driving unit are arranged in the same layer and the same material;

[0018] The first electrode is electrically connected to the source / drain layer of the first driving unit, and the first electrical conductive layer is electrically connected to the source / drain layer of the second driving unit.

[0019] Optionally, in the display panel, in the second setting area, a cross-section of a film structure formed by a combination of the second electrically conductive layer, the first insulating layer and the third electrically conductive layer is in an I-shape.

[0020] Optionally, in the display panel, a plurality of the first setting areas and at least one second setting area distributed in an array are arranged on the base substrate, and the at least one second setting area is distributed between the plurality of the first setting areas at intervals.

[0021] An embodiment of the present invention further provides a display device, comprising a display panel as described in any one of the above items.

[0022] An embodiment of the present invention further provides a method for preparing a display panel as described in any one of the above items, wherein the method comprises:

[0023] providing a transparent substrate;

[0024] Manufacturing a plurality of driving units of pixel structures in a first setting area of ​​the base substrate;

[0025] Making a first electrical conductive layer in a first setting area of ​​the base substrate on which the driving unit is made;

[0026] A plurality of light-emitting units of pixel structures are manufactured in the first setting area of ​​the base substrate on which the first electrically conductive layer is manufactured. The first electrically conductive layer is insulated from the first electrode of the light-emitting unit and is opposite to at least a portion of the first electrode of the light-emitting unit to form a storage capacitor.

[0027] Optionally, in the preparation method, after providing the transparent substrate, the method further comprises:

[0028] Fabricating a second electrically conductive layer on the base substrate, wherein the second electrically conductive layer extends from the first arrangement area of ​​the base substrate to the second arrangement area;

[0029] Wherein, a driving unit of a plurality of pixel structures is manufactured in the first setting area of ​​the substrate, comprising:

[0030] Making a buffer layer on the entire base substrate on which the second electrical conductive layer is made;

[0031] Sequentially manufacturing the active layer and the gate layer of the driving unit in the first setting area of ​​the base substrate on which the buffer layer is manufactured;

[0032] Forming a gate insulating layer on the entire base substrate on which the active layer and the gate layer are formed;

[0033] Removing the buffer layer and the gate insulating layer in the second setting area by a first patterning process, so that the second electrical conductive layer is exposed in a portion located in the second setting area;

[0034] Forming a first via hole on the gate insulating layer in the first setting area through a second patterning process;

[0035] A source / drain electrode layer of the driving unit is formed in a first setting area of ​​the base substrate on which the gate insulating layer is formed, and the source / drain electrode layer is connected to the gate electrode through the first via hole.

[0036] Optionally, the manufacturing method, wherein the step of manufacturing a first electrical conduction layer on the base substrate on which the driving unit is manufactured, comprises:

[0037] Making a flat layer on the entire substrate on which the source / drain electrodes are made;

[0038] A flat layer of a preset shape is produced in the second setting area by a third patterning process to form a first insulating layer located on the second electrical conductive layer;

[0039] A first electrical conductive layer is formed on the planar layer in the first setting area through a fourth patterning process, and a third electrical conductive layer is formed on the first insulating layer in the second setting area.

[0040] Optionally, the preparation method further comprises:

[0041] While a flat layer of a preset shape is produced in the second setting area by a third patterning process, a second via hole and a third via hole are produced on the flat layer in the first setting area by the third patterning process;

[0042] Wherein, when a plurality of driving units of pixel structures are manufactured in the first setting area of ​​the base substrate, each of the pixel structures includes two driving units, and the two driving units respectively include an active layer, a gate layer and a source / drain layer;

[0043] The first electrical conductive layer formed on the planar layer of the first setting area is connected to the source / drain layer of the second driving unit of the two driving units through a second via hole;

[0044] After a plurality of light-emitting units of pixel structures are manufactured on the base substrate of the first conductive layer, the first electrode of the light-emitting unit is connected to the source / drain layer of the first driving unit of the two driving units through a third via hole.

[0045] At least one of the above technical solutions in the specific embodiment of the present invention has the following beneficial effects:

[0046] The display panel described in the embodiment of the present invention has a first conductive layer arranged above the driving unit, which is combined with the first electrode of the light-emitting unit to form a storage capacitor. The storage capacitor and the driving unit are stacked to save the layout space of the entire pixel structure on the plane, thereby achieving the effect of improving the light transmittance and resolution of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 It is a schematic diagram of the cross-sectional structure of a conventional display panel;

[0048] Figure 2 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention;

[0049] Figure 3 is a schematic diagram of a planar structure of a display panel according to an embodiment of the present invention;

[0050] Figures 4 to 12 is a schematic diagram of a cross-sectional structure of a display panel during the manufacturing process according to an embodiment of the present invention;

[0051] Fig.13 The figure is a schematic flow chart of a method for manufacturing a display panel according to an embodiment of the present invention. DETAILED DESCRIPTION

[0052] In order to make the technical problems, technical solutions and advantages to be solved by the present invention more clear, a detailed description will be given below with reference to the accompanying drawings and specific embodiments.

[0053] Figure 1It is a schematic diagram of the cross-sectional structure of a conventional technology display panel. Taking a top emission display panel as an example, in the display panel of conventional technology, a driving unit and a light-emitting unit are sequentially manufactured on a base substrate 1, and a buffer layer 2 is manufactured on the base substrate 1. The driving unit includes an active layer 3, a gate insulating layer 4, a gate layer 5, an interlayer insulating layer 6 and a source / drain layer 7 which are sequentially manufactured on the buffer layer 2. The light-emitting unit includes a first electrode 8, a light-emitting layer 9 and a second electrode 10 which are sequentially manufactured on the driving unit, wherein a flat layer 11 is manufactured on the source / drain layer 7, and the first electrode 8 is manufactured on the flat layer 11, and is electrically connected to the source / drain layer 7 of the driving unit through a via hole penetrating the flat layer 11.

[0054] In addition, the pixel defining layer 160 is disposed on the first electrode 8, and the light emitting layer 9 is disposed in the pixel defining layer 160. Optionally, the first electrode 8 is an anode, and the second electrode 10 is a cathode. The light emitting layer 9 includes a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer and an electron injection layer disposed in sequence.

[0055] Optionally, the first electrode 8 of the display panel is made of a reflective material, which can reflect the light emitted by the light-emitting layer 9 toward the second electrode 10 so as to pass through the second electrode 10. For example, the first electrode 8 is formed into a stacked structure including an ITO layer, an Al layer and an ITO layer.

[0056] In addition, based on the implementation structure, Figure 1 As shown, on one side of the driving unit, a capacitor plate 12 is made in the same layer as the active layer 3, and the capacitor plate 12 forms a first substrate for the storage capacitor of the pixel circuit, wherein the source or drain in the source / drain layer 7 forms a second substrate for the storage capacitor, and the two are combined to form a storage capacitor.

[0057] According to this implementation structure, in the display panel, the area of ​​the first substrate and the second substrate of the storage capacitor is relatively large, and the storage capacitor is arranged on one side of the driving unit, which leads to a relatively large area of ​​the entire driving unit, thereby limiting the area of ​​the transparent area of ​​the display panel and increasing the area of ​​the light-emitting area, making it impossible to achieve a display backplane with higher transmittance and higher PPI.

[0058] In order to solve the above technical problems, an embodiment of the present invention provides a display panel, in which a first conductive layer is arranged above the driving unit, and is combined with the first electrode of the light-emitting unit to form a storage capacitor, forming a structure in which the storage capacitor and the driving unit are stacked, so as to save the layout space of the entire pixel structure on the plane, thereby achieving the effect of improving the light transmittance and resolution of the display panel.

[0059] like Figure 2 FIG. 1 is a schematic cross-sectional view of one embodiment of a display panel according to an embodiment of the present invention. Figure 2As shown, the display panel of the embodiment of the present invention comprises: a transparent base substrate 100, wherein:

[0060] The base substrate 100 includes a first setting area 101, and a plurality of pixel structures are arranged on the first setting area 101. Each pixel structure includes a driving unit 110 and a light-emitting unit 120 which are sequentially manufactured on the base substrate 100. The light-emitting unit 120 includes a first electrode 121, a light-emitting layer 122, and a second electrode 123 which are sequentially arranged. The vertical distance between the first electrode 121 and the base substrate 100 is smaller than the vertical distance between the second electrode 123 and the base substrate 100.

[0061] The pixel structure further includes a first conductive layer 130 located between the driving unit 110 and the light emitting unit 120. The first conductive layer 130 is insulated from the first electrode 121 and is opposite to at least a portion of the first electrode 121 of the light emitting unit 120 to form a storage capacitor.

[0062] With this implementation structure, the first conductive layer 130 located between the driving unit 110 and the light emitting unit 120 is combined with the first electrode 121 to form a storage capacitor, so that the storage capacitor and the driving unit are stacked. Figure 1 As shown, compared with the prior art in which the storage capacitor is arranged on one side of the driving unit, the arrangement structure of the storage capacitor according to the embodiment of the present invention can greatly reduce the arrangement space of the entire pixel structure on the plane.

[0063] In the embodiment of the present invention, optionally, in combination with Figure 2 As shown, a buffer layer 104 is formed on the substrate 100, and the driving unit 110 includes an active layer 111, a gate insulating layer 112, a gate layer 113, an interlayer insulating layer 114 and a source / drain layer 115 which are sequentially formed on the buffer layer 104. Optionally, the buffer layer 104 is made of inorganic materials such as SiOx or SiNx; the active layer 111 is made of a metal oxide semiconductor layer, such as Indium Gallium Zinc Oxide (IGZO) material; the gate insulating layer 112 and the interlayer insulating layer 114 are made of inorganic materials, such as SiOx material; the gate layer 113 and the source / drain layer 115 are made of metal electrode materials, such as at least one of metal materials such as Mo, Al and Cu.

[0064] Furthermore, in the embodiment of the present invention, the pixel structure further includes a planar layer 140 disposed on the driving unit 110 , wherein the first electrical conductive layer 130 is fabricated on the planar layer 140 ; ​​and a second insulating layer 150 is disposed on the first electrical conductive layer 130 .

[0065] Optionally, the planar layer 140 may be made of a transparent organic silicon film, or a PI material with high transparency and high temperature resistance; the second insulating layer 150 may be made of an inorganic material such as SiOx or SiNx.

[0066] The light-emitting unit 120 includes a first electrode 121, a light-emitting layer 122 and a second electrode 123 which are sequentially fabricated on the second insulating layer 150. The first electrode 121 is electrically connected to the driving unit, that is, electrically connected to the source / drain layer 115 of the driving unit, through a via hole penetrating the second insulating layer 150 and the planar layer 140.

[0067] In addition, the pixel structure further includes a pixel defining layer 160 disposed on the first electrode 121 , and the light emitting layer 122 is disposed in the pixel defining layer 160 . Optionally, the pixel defining layer 160 is made of PI material.

[0068] Optionally, the first electrode 121 is an anode, and the second electrode 123 is a cathode. The light-emitting layer 122 includes a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, which are arranged in sequence.

[0069] In the embodiment of the present invention, optionally, the second electrode 123 of the display panel is made of a light-transmitting material, and the first electrode 121 is made of a reflective material, which can reflect the light emitted by the light-emitting layer 122 toward the second electrode 123 and transmit it through the second electrode 123, so that the display panel is formed as a top-emitting display panel. Optionally, the first electrode 121 is formed as a stacked structure including an ITO layer, an Al layer and an ITO layer.

[0070] The display panel of the embodiment of the present invention refers to Figure 2 As shown, optionally, the substrate 100 further includes a second setting area 102, on which a second electrical conductive layer 170 and a third electrical conductive layer 180 arranged in parallel with the second electrical conductive layer 170 are arranged, wherein the second electrical conductive layer 170 and the third electrical conductive layer 180 are separated by a first insulating layer 190;

[0071] The second electrode 123 extends to the second setting area 102 and is connected to the second electronically conductive layer 170 and the third electronically conductive layer 180 respectively.

[0072] In this embodiment, optionally, the second electrically conductive layer 170 , the first insulating layer 190 and the third electrically conductive layer 180 of the second setting area 102 are all made of light-transmitting materials, so that the second setting area 102 is formed as a light-transmitting area.

[0073] With this implementation structure, the second conductive layer 170 and the third conductive layer 180 connected to the second electrode 123 are provided in the second setting area 102, and the second conductive layer 170 and the third conductive layer 180 are formed as auxiliary electrodes of the second electrode 123. The second electrode 123 is a cathode, and the second conductive layer 170 and the third conductive layer 180 are formed as auxiliary cathodes. The auxiliary cathode is provided to reduce the resistance of the cathode, and avoid the problem of too small cathode thickness to meet the light transmittance of the cathode, resulting in cathode resistance, thereby causing the IR Drop phenomenon and resulting in display quality defects.

[0074] In an embodiment of the present invention, the auxiliary cathode is directly produced on the base substrate 100. Compared with the prior art arrangement in which the auxiliary cathode is produced on the pixel array layer, there is no need to separately produce an auxiliary cathode overlapping structure, and the design area of ​​the pixel structure will not be occupied, thereby ensuring the overall transparent display transmittance and resolution of the display panel.

[0075] See also Figure 2 As shown, in the embodiment of the present invention, the vertical distance between the second electrically conductive layer 170 and the base substrate 100 is smaller than the vertical distance between the third electrically conductive layer 180 and the base substrate 100, and the first electrically conductive layer 130 and the third electrically conductive layer 180 are provided in the same layer and with the same material.

[0076] In addition, in the embodiment of the present invention, Figure 2 As shown, in the first setting area 101, the first conductive layer 130 is made on the planar layer 140, and in the second setting area 102, the third conductive layer 180 is made on the first insulating layer 190, wherein the planar layer 140 and the first insulating layer 190 are arranged in the same layer and with the same material.

[0077] Furthermore, in this embodiment, in the first setting area 101, a second insulating layer 150 is arranged on the first electrically conductive layer 130, and in the second setting area 102, a third insulating layer 181 is arranged on the third electrically conductive layer 180, and the second electrode 123 extending to the second setting area 102 covers the third insulating layer 181 and is connected to the second electrically conductive layer 170 and the third electrically conductive layer 180; wherein, optionally, the second insulating layer 150 and the third insulating layer 181 are arranged in the same layer and with the same material.

[0078] Through the above-mentioned implementation structure, in the first setting area 101 and the second setting area 102, since the flat layer 140 and the first insulating layer 190 are arranged in the same layer and the same material, the first electrically conductive layer 130 and the third electrically conductive layer 180 are arranged in the same layer and the same material, and the second insulating layer 150 and the third insulating layer 181 are arranged in the same layer and the same material, it can be ensured that during the preparation of the display panel, the auxiliary cathode can be manufactured with the minimum process cost, thereby avoiding an increase in the manufacturing cost.

[0079] In the embodiment of the present invention, optionally, the second conductive layer 170 disposed on the base substrate 100 also extends to the first setting area 101 and is located between the base substrate 100 and the plurality of pixel structures, that is, between the base substrate 100 and the buffer layer 104 .

[0080] Additionally, optionally, Figure 2 As shown, in an embodiment of the present invention, on the first setting area 101, a light shielding layer 200 is also formed between the second electrically conductive layer 170 and the buffer layer 104. The light shielding layer 200 is arranged corresponding to the light emitting layer 122 to prevent the light emitted by the light emitting layer 122 from being transmitted through the base substrate 100 on the side away from the second electrode 123.

[0081] Optionally, the light shielding layer 200 is made of a light-shielding metal layer, such as an opaque high-conductivity material such as Al or Mo. The light shielding layer 200 is made on the second electrically conductive layer 170, and the second electrically conductive layer 170 is formed as a transparent conductive film layer, which can be made of ITO material. Specifically, when the second electrically conductive layer 170 is made on the base substrate 100, a halftone mask process can be used to make the second electrically conductive layer 170 in the first setting area 101 and the second setting area 102 to form a conductive layer that assists the cathode bottom contact. On the base substrate 100 where the second electrically conductive layer 170 is made, the light shielding layer 200 is made in the first setting area 101, and the light shielding layer 200 is set in the area corresponding to the pixel structure in the first setting area 101 to play a light shielding role. In addition, since the light shielding layer 200 is in contact with the second conductive layer 170 and is arranged corresponding to multiple pixel structures, an array distribution form is formed on the base substrate 100, which serves as a mesh metal of the auxiliary cathode of the entire display panel, thereby effectively reducing the cathode resistance.

[0082] Alternatively, if Figure 2 As shown, each pixel structure includes two driving units 110, and the two driving units 110 respectively include an active layer 111, a gate layer 113 and a source / drain layer 115; wherein in the two driving units, the active layer 111 of the first driving unit 1101 and the active layer 111 of the second driving unit 1102, the gate layer 113 of the first driving unit 1101 and the gate layer 113 of the second driving unit 1102, and the source / drain layer 115 of the first driving unit 1101 and the source / drain layer 115 of the second driving unit 1102 are arranged in the same layer and the same material;

[0083] The first electrode 121 is electrically connected to the source of the first driving unit 1101 , and the first electrical conductive layer 130 is electrically connected to the source of the second driving unit 1102 .

[0084] The first driving unit 1101 can be formed as a driving transistor of a pixel structure, and the second driving unit 1102 can be formed as a switch control transistor of the driving transistor. In this embodiment, the first electrode 121 and the first conductive layer 130 formed as two plates of the storage capacitor are electrically connected to the source electrodes of different driving units, respectively, to form a voltage difference between the two plates.

[0085] In the embodiment of the present invention, optionally, Figure 2 As shown, in the second setting area 102, the cross section of the film structure formed by the combination of the second electrically conductive layer 170, the first insulating layer 190 and the third electrically conductive layer 180 is in an I-shape. With this implementation structure, when the second electrode 123 is deposited, the second electrode 123 is filled between the second electrically conductive layer 170 and the third electrically conductive layer 180, and is in contact and connected with the second electrically conductive layer 170 and the third electrically conductive layer 180.

[0086] The display panel according to the embodiment of the present invention, in one implementation manner, is as follows Figure 3 As shown, a plurality of first arrangement areas 101 and at least one second arrangement area 102 distributed in an array are arranged on the base substrate 100 , and the at least one second arrangement area 102 is distributed between the plurality of first arrangement areas 101 at intervals.

[0087] like Figure 3 As shown, it should be noted that, in the embodiment of the present invention, a first setting area 101 may correspond to a setting area of ​​a pixel unit, or may be a setting area including a plurality of pixel units, and on the base substrate 100, a plurality of first setting areas 101 are distributed in an array. The second setting area 102 is also the setting area of ​​the auxiliary cathode, wherein at least one second setting area 102 is set between a plurality of first setting areas 101, for example, between a plurality of adjacent first setting areas 101, or at the edge of the entire base substrate 100. In the embodiment of the present invention, the setting position and distribution area of ​​the second setting area 102 are not limited, as long as the setting area and area of ​​the auxiliary cathode can be guaranteed to meet the effect required to reduce the cathode resistance.

[0088] The display panel described in the embodiment of the present invention can be an OLED display panel, and in particular, can be a large-sized AMOLED transparent display panel. An auxiliary cathode is directly manufactured on the base substrate of the transparent display area of ​​the display panel, and a storage capacitor is arranged between the first electrode and the driving unit by using a flat layer, so that the space above the driving unit is effectively utilized to arrange the storage capacitor, thereby saving the arrangement space of the pixel structure and increasing the area of ​​the light-transmitting region, thereby achieving the effect of improving the light transmittance and resolution of the display panel.

[0089] In addition, with this implementation structure, since each layer of the auxiliary cathode is made of the same layer and material as the corresponding layer on the pixel structure, it can ensure that the auxiliary cathode is made with the minimum process cost, avoiding an increase in production cost.

[0090] The following combination Figures 4 to 12 The specific implementation process of the method for manufacturing a display panel according to an embodiment of the present invention is described. The specific process of the method for manufacturing a display panel may include the following steps:

[0091] 1) Providing a transparent substrate 100;

[0092] 2) A second electrical conductive layer 170 and a light shielding layer 200 are sequentially formed on a transparent base substrate 100, such as Figure 4 As shown; Optionally, the second electric conductive layer 170 can be made on the base substrate 100 by using the Halftone Mask process, and the light shielding layer 200 can be made in a partial area above the second electric conductive layer 170 by using a patterning process; wherein the second electric conductive layer 170 can be made of ITO material, and the light shielding layer 200 can be made of an opaque high-conductive material such as Al or Mo. Using this manufacturing process, on the second electric conductive layer 170, the manufacturing area corresponding to the light shielding layer 200 is formed as the first setting area 101, and the area where the light shielding layer 200 is not manufactured is formed as the second setting area 102;

[0093] 3) Depositing a buffer layer 104 on the base substrate 100 on which the second electrical conductive layer 170 and the light shielding layer 200 are made, such as Figure 5 As shown, the buffer layer 104 is distributed in the first setting area 101 and the second setting area 102 at the same time; optionally, the buffer layer 104 is made of inorganic materials such as SiOx or SiNx;

[0094] 4) An active layer 111, a gate insulating layer 112, a gate layer 113 and an interlayer insulating layer 114 are sequentially formed on the buffer layer 104, as shown in FIG. Figure 6 As shown; Optionally, the active layer 111 is made of a metal oxide semiconductor layer, such as IGZO material; the gate insulating layer 112 and the interlayer insulating layer 114 are made of inorganic materials, such as SiOx material; the gate layer 113 is made of a metal electrode material, such as at least one of Mo, Al and Cu; Optionally, the gate layer 113 and the gate insulating layer 112 can be patterned in a self-aligned manner;

[0095] 5) If Figure 6As shown, after the interlayer insulating layer 114 is formed, the inorganic film of the second setting area 102 is etched by the first exposure process, that is, the buffer layer 104 and the interlayer insulating layer 114 are etched away to expose the second electrical conductive layer 170; then, a via hole connecting the source / drain layer 115 to the active layer 111 is formed on the interlayer insulating layer 114 by the second exposure process, as shown in FIG. Figure 7 As shown;

[0096] 6) A source / drain electrode layer 115 is formed on the interlayer insulating layer 114, and the source / drain electrode layer 115 is connected to the active layer 111 through a via hole on the interlayer insulating layer 114, such as Figure 8 As shown; Optionally, the source / drain layer 115 is made of a metal electrode material, such as at least one of Mo, Al and Cu;

[0097] 7) On the base substrate 100 on which the source / drain electrode layer 115 is fabricated, a flat layer 140 is fabricated corresponding to the first setting area 101 and the second setting area 102, and then a via hole is fabricated on the flat layer 140 in the first setting area 101 to connect the via hole to the source / drain electrode layer 115, as shown in FIG. Fig. 9 As shown; wherein the flat layer 140 can be made of a transparent organic material, or can be made of a transparent and high temperature resistant PI material;

[0098] 8) The first electrical conductive layer 130 of the first setting area 101 and the third electrical conductive layer 180 of the second setting area 102 are formed on the base substrate 100 with the flat layer 140 formed thereon by using the same patterning process, as shown in FIG. Fig.10 As shown, the first conductive layer 130 is connected to the source or drain of one of the driving units through one of the via holes in the planar layer 140, so as to realize the lower electrode signal access of the storage capacitor; optionally, the area size of the first conductive layer 130 can be determined according to the capacitance size required by the pixel circuit;

[0099] 9) An insulating layer is formed on the base substrate 100 on which the first electrically conductive layer 130 and the third electrically conductive layer 180 are formed, and vias connected to the source / drain layer 115 of another driving unit are formed on the insulating layer and the flat layer 140 in the first setting area 101, and then a part of the insulating layer in the second setting area 102 and the flat layer 140 above the second electrically conductive layer 170 are removed by an etching process, and the setting part of the insulating layer corresponding to the third electrically conductive layer 180 is retained, so that the insulating layer retained on the first setting area 101 is formed as the second insulating layer 150, and the insulating layer retained on the third electrically conductive layer 180 in the second setting area 102 is formed as the third insulating layer 181, and in the second setting area 102, the cross-section of the film structure formed by the combination of the second electrically conductive layer 170, the first insulating layer 190 and the third electrically conductive layer 180 is in an I-shape, as shown in FIG. Fig.11 As shown;

[0100] 10) In the first setting area 101 of the base substrate 100, a first electrode 121 and a pixel defining layer 160 are sequentially formed, wherein the pattern formed by the pixel defining layer 160 includes a plurality of pixel defining spaces, and the first electrode 121 is connected to the source or drain of the driving unit through a via hole penetrating the second insulating layer 150 and the planar layer 140, as shown in FIG. Fig.12 As shown; Optionally, the first electrode 121 is made of Al metal material, so that when the first electrode 121 is etched during the manufacturing process, the second conductive layer 170 and the third conductive layer 180 of the second setting area 102 will not be etched away, and the first electrode 121 has a reflection function for the light emitted by the light-emitting layer, so that the light emitted by the light-emitting layer is transmitted through the second electrode 123; In addition, the manufactured first electrode 121 is opposite to at least a part of the first conductive layer 130, that is, the first electrode 121 is an orthographic projection on the plane where the first conductive layer 130 is located, at least partially covering the first conductive layer 130, so that the first electrode 121 and the first conductive layer 130 are combined to form a storage capacitor; Optionally, the pixel defining layer 160 is made of conventional PI material;

[0101] 11) The light emitting layer 122 and the second electrode 123 are sequentially formed on the pixel defining layer 160, such as Figure 2 As shown, the light-emitting layer 122 is made in a plurality of pixel-defined spaces formed by a pixel-defining layer 160 on a first setting area 101, and the second electrode 123 is made in the entire first setting area 101 and the second setting area 102 of the base substrate 100, and is connected to both the second electrically conductive layer 170 and the third electrically conductive layer 180 in the second setting area 102.

[0102] According to the above, the display panel described in the embodiment of the present invention is used, the storage capacitor is stacked above the driving unit, and the first electrode is used to form a plate of the storage capacitor. The size of the required storage capacitor can be controlled by the size of the first conductive layer, and the effect of maximizing the light-emitting aperture ratio of the pattern of the first electrode will not be affected. In addition, after the source / drain layer is made, the first conductive layer is made using the flat layer to achieve high flatness above the first conductive layer, and the flatness of the light-emitting layer is also guaranteed on the first electrode. At the same time, the flat layer can avoid the influence of the upper storage capacitor on the lower driving unit through its thickness and its own low dielectric constant.

[0103] Furthermore, by directly manufacturing the auxiliary cathode on the base substrate in the second setting area, and each layer structure of the auxiliary cathode is manufactured with the same layer and material as the corresponding layer of the driving unit, no additional steps in the manufacturing process are added, thereby avoiding an increase in the manufacturing cost of the display panel.

[0104] Another aspect of the embodiments of the present invention further provides a display device, wherein the display device includes the display panel of any one of the above embodiments.

[0105] Combination Figures 2 to 12 , and referring to the above detailed description, those skilled in the art should be able to understand the specific implementation structure of the display device using the display panel described in the embodiment of the present invention, which will not be described in detail here.

[0106] Another embodiment of the present invention further provides a method for preparing a display panel as described in any of the above embodiments, Fig.13 As shown, the preparation method comprises:

[0107] S1301, providing a transparent substrate;

[0108] S1302, manufacturing a plurality of driving units of pixel structures in a first setting area of ​​the base substrate;

[0109] S1303, manufacturing a first electrical conductive layer in a first setting area of ​​the base substrate on which the driving unit is manufactured;

[0110] S1304, manufacturing a plurality of light-emitting units of pixel structures in the first setting area of ​​the base substrate on which the first electrically conductive layer is manufactured, wherein the first electrically conductive layer is insulated from the first electrode of the light-emitting unit and is opposite to at least a portion of the first electrode of the light-emitting unit to form a storage capacitor.

[0111] Optionally, in the preparation method, after providing a transparent substrate in step S1401, the method further comprises:

[0112] Fabricating a second electrically conductive layer on the base substrate, wherein the second electrically conductive layer extends from the first arrangement area of ​​the base substrate to the second arrangement area;

[0113] Wherein, a driving unit of a plurality of pixel structures is manufactured in the first setting area of ​​the substrate, comprising:

[0114] Making a buffer layer on the entire base substrate on which the second electrical conductive layer is made;

[0115] Sequentially manufacturing the active layer and the gate layer of the driving unit in the first setting area of ​​the base substrate on which the buffer layer is manufactured;

[0116] Forming a gate insulating layer on the entire base substrate on which the active layer and the gate layer are formed;

[0117] Removing the buffer layer and the gate insulating layer in the second setting area by a first patterning process, so that the second electrical conductive layer is exposed in a portion located in the second setting area;

[0118] Forming a first via hole on the gate insulating layer in the first setting area through a second patterning process;

[0119] A source / drain electrode layer of the driving unit is formed in a first setting area of ​​the base substrate on which the gate insulating layer is formed, and the source / drain electrode layer is connected to the gate electrode through the first via hole.

[0120] Specifically, the manufacturing process of the above-mentioned drive unit can be combined with Figures 4 to 8 , and refer to steps 2 to 6 in the above description, which will not be described in detail here.

[0121] Optionally, manufacturing a first electrical conduction layer on the base substrate on which the driving unit is manufactured includes:

[0122] Making a flat layer on the entire substrate on which the source / drain electrodes are made;

[0123] A flat layer of a preset shape is produced in the second setting area by a third patterning process to form a first insulating layer located on the second electrical conductive layer;

[0124] A first electrical conductive layer is formed on the planar layer in the first setting area through a fourth patterning process, and a third electrical conductive layer is formed on the first insulating layer in the second setting area.

[0125] Specifically, the specific manufacturing process of the first electrically conductive layer can be combined with Figures 9 to 10 , and refer to the above steps 7 and 8, which will not be described in detail here.

[0126] Optionally, the method further comprises:

[0127] While a flat layer of a preset shape is produced in the second setting area by a third patterning process, a second via hole and a third via hole are produced on the flat layer in the first setting area by the third patterning process;

[0128] Wherein, when a plurality of driving units of pixel structures are manufactured in the first setting area of ​​the base substrate, each of the pixel structures includes two driving units, and the two driving units respectively include an active layer, a gate layer and a source / drain layer;

[0129] The first electrical conductive layer formed on the planar layer of the first setting area is connected to the source / drain layer of the second driving unit of the two driving units through a second via hole;

[0130] After a plurality of light-emitting units of pixel structures are manufactured on the base substrate of the first conductive layer, the first electrode of the light-emitting unit is connected to the source / drain layer of the first driving unit of the two driving units through a third via hole.

[0131] Specifically, the manufacturing process of the above-mentioned light-emitting unit can be combined with 11 to Fig.12 , and refer to the detailed instructions in steps 8 to 11 above, which will not be explained here.

[0132] The method for manufacturing the display panel of the above-mentioned implementation structure in the embodiment of the present invention can save the layout space of the entire pixel structure on the plane, thereby achieving the effect of improving the light transmittance and resolution of the display panel without increasing the manufacturing cost of the display panel.

[0133] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary personnel in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A display panel comprising a transparent substrate, Features: The base substrate comprises a first setting area, a plurality of pixel structures are arranged on the first setting area, each of the pixel structures comprises a driving unit and a light-emitting unit which are sequentially manufactured on the base substrate, the light-emitting unit comprises a first electrode, a light-emitting layer and a second electrode which are sequentially arranged; wherein a vertical distance between the first electrode and the base substrate is smaller than a vertical distance between the second electrode and the base substrate; The pixel structure further includes a first conductive layer, which is located between the driving unit and the light-emitting unit, wherein the first conductive layer is insulated from the first electrode and is opposite to at least a portion of the first electrode of the light-emitting unit to form a storage capacitor; The substrate further comprises a second setting area, on which a second electrically conductive layer and a third electrically conductive layer arranged in parallel with the second electrically conductive layer are arranged, wherein the second electrically conductive layer and the third electrically conductive layer are separated by a first insulating layer; Wherein, the second electrode extends to the second setting area and is connected to the second electrical conductive layer and the third electrical conductive layer respectively; The second electrical conductive layer also extends to the first setting area and is located between the base substrate and the driving unit.

2. The display panel according to claim 1, It is characterized in that A vertical distance between the second electrically conductive layer and the base substrate is smaller than a vertical distance between the third electrically conductive layer and the base substrate, and the first electrically conductive layer and the third electrically conductive layer are provided in the same layer and with the same material.

3. The display panel according to claim 1, It is characterized in that The pixel structure includes a planar layer disposed on the driving unit, wherein the first electrical conductive layer is manufactured on the planar layer, and the planar layer and the first insulating layer are disposed in the same layer and with the same material.

4. The display panel according to claim 3, It is characterized in that The pixel structure further includes a second insulating layer disposed on the first electrical conductive layer, the first electrode is disposed on the second insulating layer, and is electrically connected to the driving unit via a via hole penetrating the second insulating layer and the planar layer; Wherein, in the second setting area, a third insulating layer is provided on the third electrically conductive layer, and the second electrode extending to the second setting area covers the third insulating layer and is connected to the second electrically conductive layer and the third electrically conductive layer; The second insulating layer and the third insulating layer are formed in the same layer and made of the same material.

5. The display panel according to claim 1, It is characterized in that Each of the pixel structures comprises two driving units, and the two driving units respectively comprise an active layer, a gate layer and a source / drain layer; wherein in the two driving units, the active layer of the first driving unit and the active layer of the second driving unit, the gate layer of the first driving unit and the gate layer of the second driving unit, and the source / drain layer of the first driving unit and the source / drain layer of the second driving unit are arranged in the same layer and the same material; The first electrode is electrically connected to the source / drain layer of the first driving unit, and the first electrical conductive layer is electrically connected to the source / drain layer of the second driving unit.

6. The display panel according to claim 1, It is characterized in that In the second setting area, a cross-section of a film structure formed by a combination of the second electrically conductive layer, the first insulating layer and the third electrically conductive layer is in an I-shape.

7. The display panel according to claim 1, It is characterized in that The base substrate is provided with a plurality of the first setting areas and at least one second setting area distributed in an array, and the at least one second setting area is distributed between the plurality of the first setting areas at intervals.

8. A display device, It is characterized in that A display panel comprising any one of claims 1 to 7.

9. A method for preparing the display panel according to any one of claims 1 to 7, It is characterized in that The method comprises: providing a transparent substrate; Manufacturing a plurality of driving units of pixel structures in a first setting area of ​​the base substrate; Making a first electrical conductive layer in a first setting area of ​​the base substrate on which the driving unit is made; A plurality of light-emitting units of pixel structures are manufactured in a first setting area of ​​the base substrate on which the first electrical conductive layer is manufactured, wherein the first electrical conductive layer is insulated from the first electrode of the light-emitting unit and is opposite to at least a part of the first electrode of the light-emitting unit to form a storage capacitor; Wherein, after providing a transparent substrate, the method further comprises: Fabricating a second electrically conductive layer on the base substrate, wherein the second electrically conductive layer extends from the first arrangement area of ​​the base substrate to the second arrangement area; Wherein, a driving unit of a plurality of pixel structures is manufactured in the first setting area of ​​the substrate, comprising: Making a buffer layer on the entire base substrate on which the second electrical conductive layer is made; Sequentially manufacturing the active layer and the gate layer of the driving unit in the first setting area of ​​the base substrate on which the buffer layer is manufactured; Forming a gate insulating layer on the entire base substrate on which the active layer and the gate layer are formed; Removing the buffer layer and the gate insulating layer in the second setting area by a first patterning process, so that the second electrical conductive layer is exposed in a portion located in the second setting area; Forming a first via hole on the gate insulating layer in the first setting area through a second patterning process; A source / drain electrode layer of the driving unit is formed in a first setting area of ​​the base substrate on which the gate insulating layer is formed, and the source / drain electrode layer is connected to the gate electrode through the first via hole.

10. The preparation method according to claim 9, It is characterized in that The first electrical conduction layer is formed on the base substrate on which the driving unit is formed, comprising: Making a flat layer on the entire substrate on which the source / drain electrodes are made; A flat layer of a preset shape is produced in the second setting area by a third patterning process to form a first insulating layer located on the second electrical conductive layer; A first electrical conductive layer is formed on the planar layer in the first setting area through a fourth patterning process, and a third electrical conductive layer is formed on the first insulating layer in the second setting area.

11. The preparation method according to claim 10, It is characterized in that The method further comprises: While a flat layer of a preset shape is produced in the second setting area by a third patterning process, a second via hole and a third via hole are produced on the flat layer in the first setting area by the third patterning process; Wherein, when a plurality of driving units of pixel structures are manufactured in the first setting area of ​​the base substrate, each of the pixel structures includes two driving units, and the two driving units respectively include an active layer, a gate layer and a source / drain layer; The first electrical conductive layer formed on the planar layer of the first setting area is connected to the source / drain layer of the second driving unit of the two driving units through a second via hole; After a plurality of light-emitting units of pixel structures are manufactured on the base substrate of the first conductive layer, the first electrode of the light-emitting unit is connected to the source / drain layer of the first driving unit of the two driving units through a third via hole.

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