Power-on status notification method

Abstract

A method for notifying a startup status is applicable to a computer. The method comprises: performing signal training on a dynamic random access memory based on startup parameters to start the computer, obtaining an operating value group of the dynamic random access memory when the computer performs the signal training, and calculating and outputting a startup stability level based on the operating value group.

Description

Technical Field

[0001] The present invention relates to a power-on status notification method, and in particular to a power-on status notification method capable of obtaining and outputting the power-on status. Background Art

[0002] In the existing technology, before the computer is started, a power-on test is performed on the devices on the mainboard, such as the dynamic random access memory, to ensure that the computer can run normally after being started, and the mainboard can be powered on when the test is completed.

[0003] Because a motherboard is equipped with numerous components, each component has a corresponding power-on status during the power-on test. However, existing technologies for displaying the power-on status are inaccurate. For example, an EZ Debug LED is used to display the test progress (e.g., which component, such as the processor, memory, or graphics card, is currently being tested). If an abnormal power-on status is detected for a component, the debug LED only uses a code to indicate which component has the abnormal power-on status.

[0004] That is, while simple and troubleshooting indicators can help users determine the progress and results of the power-on test, existing technology still cannot provide more accurate power-on test results. Users are still forced to rely on personal experience to determine whether to adjust the power-on parameters or the impact of the adjusted power-on parameters on the current power-on test. Therefore, for example, if a user wants to overclock the dynamic random access memory and adjusts the clock parameters of the power-on parameters to the overclocked clock parameters, the user cannot accurately determine the impact of the previous clock parameters on the power-on test and may set the clock parameters too high. This may not only cause the power-on test to fail, but also increase the risk of damage to the dynamic random access memory due to overheating. Summary of the Invention

[0005] In view of the above, the present invention provides a power-on status notification method to meet the above needs.

[0006] According to one embodiment of the present invention, a boot status notification method is applicable to a computer. The notification method includes: performing a signal training on a dynamic random access memory based on a boot parameter to start the computer; obtaining an operating value set of the dynamic random access memory when the computer performs the signal training; and calculating and outputting a boot stability level based on the operating value set.

[0007] In summary, according to the boot status notification method disclosed in one or more embodiments of the present invention, after performing a boot test on a device on a motherboard, not only can more accurate boot test results be provided, but the boot stability level disclosed in the present invention can also allow the user to determine whether to adjust the boot parameters. Furthermore, according to the boot status notification method disclosed in one or more embodiments of the present invention, the user can determine the impact of adjusted boot parameters on the boot test, thereby reducing the number and time required to adjust the boot parameters and then perform the test. Furthermore, when the boot parameters of a dynamic random access memory are adjusted to overclock the dynamic random access memory, the boot stability level disclosed in the present invention can be used to notify the user of the current overclocking status and stability. This not only prevents the user from adjusting the boot parameters to values that the dynamic random access memory cannot handle, but also reduces the risk of damage to the device components on the motherboard during the test due to inappropriate boot parameters.

[0008] The above description of the contents of the present disclosure and the following description of the embodiments are intended to demonstrate and explain the concept and principle of the present invention, and to provide further explanation of the scope of the patent application of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 FIG. 4 is a flow chart of a method for notifying a power-on status according to an embodiment of the present invention.

[0010] Figure 2 It shows Figure 1 Detailed flowchart of step S10.

[0011] Figure 3 It shows Figure 1 Detailed flowchart of step S30.

[0012] Figure 4 FIG. 1 is a diagram illustrating an example of performing signal training on a dynamic random access memory.

[0013] Figure 5 It shows Figure 1 Detailed flowchart of step S40.

[0014] Figure 6a 、 Figure 6b and Figure 6c It is a diagram showing the boot stability level.

[0015] The description of the accompanying drawings is as follows:

[0016] DRAM Dynamic Random Access Memory

[0017] IC1-IC8 memory chip

[0018] Si1 first training signal

[0019] Si2 Second training signal

[0020] Si3 third training signal

[0021] So1 First result signal

[0022] So2 Second result signal

[0023] So8 Eighth Result Signal

[0024] F1, F2 graphics

[0025] A1, A2 total area

[0026] Partial area of PA1 and PA2

[0027] R ratio value DETAILED DESCRIPTION

[0028] The following detailed description of the features and advantages of the present invention is provided in the following embodiments. The details are sufficient to enable anyone skilled in the relevant art to understand the technical content of the present invention and implement it accordingly. Furthermore, based on the disclosure of this specification, the claims, and the accompanying drawings, anyone skilled in the relevant art can readily understand the relevant objectives and advantages of the present invention. The following examples further illustrate the concepts of the present invention and are not intended to limit the scope of the present invention in any way.

[0029] Please refer to Figure 1 , Figure 1 The flowchart of the power-on status notification method according to one embodiment of the present invention is shown. The power-on status notification method shown in the present invention is applicable to a computer and is used to notify the power-on status of the computer when performing signal training.

[0030] Step S10: receiving a parameter adjustment instruction to adjust the startup parameters.

[0031] That is, while the computer is already powered on, it can first receive a parameter adjustment command input by the user to adjust the computer's default startup parameters to the startup parameters the next time the computer is powered on. The default startup parameters can be factory-set startup parameters or startup parameters previously adjusted according to the parameter adjustment command. The startup parameters may be, for example, parameters related to clock, voltage, slot configuration, etc. The present invention is not limited to the type of startup parameters.

[0032] It should be noted that step S10 can be selectively performed. That is, if the computer performs signal training with the preset startup parameters or the previously adjusted startup parameters in step S20, step S10 can be omitted and step S20 can be performed directly.

[0033] Step S20: performing signal training on the dynamic random access memory based on the boot parameters to start the computer.

[0034] When a power-on signal is received, the computer can perform signal training on a plurality of memory chip elements on its dynamic random access memory (DRAM) based on startup parameters, so as to start the computer after the training is completed.

[0035] Step S30: Obtaining the running value set of the dynamic random access memory when the computer performs signal training.

[0036] Specifically, the dynamic random access memory includes a plurality of memory chip particles. After the computer is started, the operating value group of the dynamic random access memory during the signal training period can be obtained. The operating value group includes a plurality of operating values associated with the memory chip particles. The method of obtaining the operating value group will be described later together with Figure 3 Further details.

[0037] Step S40: Calculate and output the startup stability level based on the operating value group.

[0038] After the computer is started, the operating values can be weightedly calculated corresponding to the multiple weight values of the memory particle chip to calculate and output the boot stability level, where the boot stability level can be output to the computer display, output to the speaker / headphones connected to the computer in the form of voice, output to the computer memory storage or output to other devices, etc. The present invention does not limit the output object of the boot stability level.

[0039] Please refer to Figure 2 , Figure 2 It shows Figure 1 Detailed flow chart of step S10 (receiving parameter adjustment instructions to adjust startup parameters), wherein step S10 may include sub-steps S101 to S103.

[0040] Step S101: Entering the basic input and output system interface.

[0041] That is, the computer can enter a Basic Input / Output System (BIOS) interface when it is in a booted state, and the BIOS interface is preferably presented by the computer's display.

[0042] Step S102: Receive a parameter adjustment instruction at a basic input / output system interface.

[0043] Step S103: adjusting the startup parameters according to the parameter adjustment instruction.

[0044] Referring to steps S102 and S103, the computer presents a basic input / output system interface to receive a parameter adjustment command, and can further adjust the boot parameters based on the parameter adjustment command. For example, the boot parameters may include a clock parameter between a processor and dynamic random access memory on the computer motherboard, and the clock parameter is used to adjust an operating frequency between the processor and the dynamic random access memory. Therefore, when a user wishes to overclock the dynamic random access memory, they can input a parameter adjustment command to adjust, for example, a preset clock parameter to the clock parameter, and then detect the operating frequency between the processor and the dynamic random access memory.

[0045] Please refer to Figure 3 and Figure 4 ,in Figure 3 It shows Figure 1 A detailed flow chart of step S30 (obtaining a running value set of the dynamic random access memory when the computer executes signal training); Figure 4 This diagram illustrates an example of signal training for a dynamic random access memory (DRAM), wherein step S30 may include sub-steps S301 through S305. In the following description, the i-th memory chip represents each memory chip, and the signal input to the i-th memory chip is the i-th training signal, while the signal output from the i-th memory chip is the i-th result signal.

[0046] Step S301: Input the i-th training signal to the i-th memory chip so that the i-th memory chip outputs the i-th result signal, where i is an integer greater than 0 and less than or equal to the total number of memory chips, and when i is greater than or equal to 2, the (i-1)-th result signal is used as the i-th training signal.

[0047] Step S302: determining whether the i-th memory chip outputs the corresponding i-th result signal based on the i-th training signal.

[0048] It should be noted that the i-th training signal is preferably a power-on signal corresponding to the power-on parameter. Figure 4 As shown, the dynamic random access memory DRAM includes multiple memory chip IC1~IC8, and the computer will perform signal training on each memory chip. Figure 4 In the example shown, i is an integer greater than 0 and less than or equal to 8, however Figure 4 The number of memory chip IC1 to IC8 shown is only an example, and the present invention does not limit the number of memory chip ICs.

[0049] Please refer to steps S301 and S302. Taking the memory particle chip IC1 as an example, the first training signal Si1 with i being 1 will be input to the first memory particle chip IC1 among the memory particle chips IC1 to IC8. If the first training signal Si1 is a signal that the memory particle chip IC1 can carry, the memory particle chip IC1 will output a corresponding first result signal So1 according to the first training signal Si1, and the first result signal So1 can be input to the memory particle chip IC2 as the second training signal Si2. If the second training signal Si2 is a signal that the memory particle chip IC2 can carry, the memory particle chip IC2 will output a corresponding second result signal So2 according to the second training signal Si2, and the second result signal So2 can be used as the third training signal Si3 input to the memory particle chip IC3. And so on, it can continue to be executed sequentially from the memory particle chip IC3 to the memory particle chip IC8 until the memory particle chip IC8 outputs the corresponding eighth result signal So8.

[0050] If one of the memory chips fails to output a corresponding result signal, it indicates that the memory chip is unable to carry the training signal associated with the startup parameters. Therefore, the process continues with step S303: power cycle. In other words, if the computer cannot operate normally according to the startup parameters, the computer can be restarted using the default startup parameters that are operational.

[0051] Please continue to refer to step S302. If it is determined that each of the memory chip IC1~IC8 outputs the corresponding i-th result signal (that is, the last memory chip IC8 outputs the corresponding eighth result signal So8), it means that the memory chip IC1~IC8 can carry the corresponding i-th training signal associated with the startup parameter, and step S304 can be continued.

[0052] Step S304: Obtaining a running value based on the variance between the training signal and the result signal.

[0053] That is, each i-th training signal input to the memory chip and its i-th result signal output have a variation value, such as a frequency difference, a time difference, a signal strength difference, or even a ratio of the i-th result signal to the i-th training signal (for example, a frequency ratio, a signal strength ratio, etc.). The computer will assign a corresponding operating value based on each variation value, and use the operating value to represent the operating status of the memory chip.

[0054] Step S305: forming an operating value group with the operating values.

[0055] In other words, each memory chip has a corresponding operating value to represent its operating status. The operating values can form an operating value group, and the operating value group is used to represent the operating status of the dynamic random access memory DRAM including the memory chip IC1~IC8.

[0056] Please refer to Figure 5 , Figure 5 It shows Figure 1 Detailed flow chart of step S40 (calculating and outputting the boot stability level based on the operating value group), wherein step S40 includes sub-steps S401 to S403.

[0057] Step S401 : multiply each running value by a corresponding weight value to obtain a plurality of weighted values corresponding to the memory chip.

[0058] That is, each memory chip can have a different weight value. Therefore, the performance value of each memory chip can be multiplied by the corresponding weight value to further highlight the importance of each memory chip and its performance status. For example, before performing the weighted calculation on the performance values, the computer can also first determine the weight value based on the read and write speed of each memory chip, with faster read and write speeds being assigned higher weight values. However, the read and write speeds described here are merely examples, and the present invention does not limit the method of determining and assigning weight values.

[0059] Step S402: summing up the weighted values, and using the sum of the weighted values as the startup stability level.

[0060] In other words, the computer multiplies each running value by its corresponding weight to obtain a weighted value for each memory chip. These weighted values are then added together, and the sum of these weighted values is used as the boot stability level. Alternatively, the computer can divide the sum of the weighted values by the sum of the weighted values to obtain a weighted average, and use this weighted average as the boot stability level. In other words, the boot stability level can be represented by a numerical value, a ratio, a percentage, or other numerical value.

[0061] Step S403: Outputting the boot stability level.

[0062] like Figure 1 As described in step S40, the boot stability level may be output to a computer monitor for display. When the boot stability level is displayed on the monitor, the boot stability level may be presented as follows: Figure 6a 、 Figure 6b and Figure 6c As shown, Figure 6a 、 Figure 6b and Figure 6c is a diagram showing the power-on stability level. Figure 6a to Figure 6c After the boot stability level is displayed, the boot stability level can be output to the computer monitor, so the monitor can show the following Figure 6a and 6b The patterns F1, F2 shown include partial areas PA1, PA2, or Figure 6c The display can also display the graphs F1, F2 and the ratio value R together to provide more detailed signal training information.

[0063] Specifically, the boot stability level may be presented as a graphic, and the boot stability level may be presented as a ratio of a portion of the graphic area to the entire graphic area. Figure 6a For example, the boot stability level graph F1 uses the cumulative number and length of lines to represent its partial area PA1, and the overall area A1 of the graph F1 is the area occupied by the dotted triangle frame.

[0064] In detail, the partial area PA1 can be used to represent the sum of the weighted values obtained based on the running value group after a certain signal training is performed, and the overall area A1 is the sum of the weighted values obtained based on the running value group in a completely ideal signal training, where the completely ideal signal training is, for example, that there is no variation value or only a negligible variation value between the training signal received by each memory particle chip and the output result signal.

[0065] Based on this, the power-on stability level can be presented through the ratio of the partial area PA1 to the overall area A1, which can present the difference between the result of the signal training and the result of the completely ideal signal training. And when the power-on stability level is higher (that is, the more stable the signal training process is), the area occupied by the partial area PA1 is also larger.

[0066] Similarly, see Figure 6b The boot stability level graph F2 is, for example, a bar graph as shown in the figure, and the boot stability level can be presented by the ratio of the partial area PA2 (ie, the gray area in the figure) to the overall area A2.

[0067] In addition, if Figure 6c As shown, the power-on stability level can also be presented as a numerical value, and preferably as a proportional value R. For example, after a certain execution of signal training, the sum of the weighted values obtained based on the running value group is, for example, "80"; and in a completely ideal signal training, since there is no variation between the training signal received by each memory chip and the output result signal, the sum of the weighted values obtained in the completely ideal signal training can be represented by the value "100". Accordingly, the power-on stability level can be as follows Figure 6cThe ratio value R shown is used to represent the relative difference between the signal training and the completely ideal signal training.

[0068] It should be noted that the presentation methods for the boot stability level shown in this disclosure are merely examples. The boot stability level can be represented by a pie chart, pyramid chart, or other graphic representation that displays a scale. When the boot stability level is presented via voice, it can be presented via voice volume, various sound effects, or voice content containing a scale value. This disclosure does not limit the presentation method for the boot stability level.

[0069] In summary, according to the boot status notification method disclosed in one or more embodiments of the present invention, after performing a boot test on a device on a motherboard, not only can more accurate boot test results be provided, but the boot stability level disclosed in the present invention can also allow the user to determine whether to adjust the boot parameters. Furthermore, according to the boot status notification method disclosed in one or more embodiments of the present invention, the user can determine the impact of adjusted boot parameters on the boot test, thereby reducing the number and time required to adjust the boot parameters and perform retests. Furthermore, when the boot parameters of a dynamic random access memory are adjusted to overclock the dynamic random access memory, the boot stability level disclosed in the present invention can be used to notify the user of the current overclocking status and stability. This not only prevents the user from adjusting the boot parameters to values (boot parameters) that the dynamic random access memory cannot handle, but also reduces the risk of overheating or damage to the motherboard device components during the test due to inappropriate boot parameters.

[0070] Although the present invention is disclosed above with reference to the aforementioned embodiments, they are not intended to limit the present invention. Any changes and modifications that do not depart from the spirit and scope of the present invention are within the scope of patent protection of the present invention. Please refer to the claims for the scope of protection defined by the present invention.

Claims

1. A method for notifying a computer of a power-on status, applicable to a computer, comprising: Performing a signal training on a dynamic random access memory based on a startup parameter to start the computer, wherein the signal training is performed using a training signal generated by the computer when receiving a power-on signal, and the training signal corresponds to the startup parameter; Obtaining a running value set of the dynamic random access memory when the computer executes the signal training; and Calculate and output a startup stability level based on the operating value group, The dynamic random access memory includes a plurality of memory chiplets, the operating value group includes a plurality of operating values respectively associated with the memory chiplets, and the plurality of operating values are used to represent operating conditions of the memory chiplets, and calculating and outputting the boot stability level based on the operating value group includes: The operating values are weightedly calculated based on a plurality of weight values corresponding to the memory particle chips to calculate the power-on stability level, and the power-on stability level is output.

2. The notification method according to claim 1 , wherein performing a weighted operation on the operating values based on the weight values corresponding to the memory chip to calculate the boot stability level comprises: Multiplying each of the running values by each of the corresponding weight values to obtain a plurality of weighted values corresponding to the memory particle chips; and The weighted values are summed up, and the sum of the weighted values is used as the startup stability level.

3. The notification method according to claim 1 , wherein before performing weighted calculation on the running value based on the weight value, the notification method further comprises: The weight value is obtained based on the read and write speed of each of the memory particle chips.

4. The notification method of claim 1 , wherein outputting the boot stability level comprises: Presenting the boot stability level as a ratio of a portion of an area of a graphic to an entire area of the graphic; and The boot stability level represented by the graphic is output to a display of the computer, so that the display displays the graphic including at least the partial area.

5. The notification method as claimed in claim 1 , wherein outputting the boot stability level comprises: presenting the boot stability level as a proportional value; and The boot stability level represented by the proportional value is output to a display of the computer so that the display displays the proportional value.

6. The notification method as claimed in claim 1, wherein the boot parameter comprises a clock parameter between a processor of the computer and the dynamic random access memory, for adjusting an operating frequency between the processor and the dynamic random access memory to overclock the dynamic random access memory.

7. The notification method according to claim 1 , wherein the operating value set is associated with a result of performing the signal training on the memory chip, and obtaining the operating value set comprises: Inputting an i-th training signal to an i-th memory chip among the memory chip chips, so that the i-th memory chip outputs an i-th result signal, wherein i is an integer greater than 0 and less than or equal to the total number of the memory chip chips, and when i is greater than or equal to 2, using the (i-1)-th result signal as the i-th training signal; Determining whether the i-th memory chip outputs the corresponding i-th result signal based on the i-th training signal; as well as When it is determined that the i-th memory chip outputs the i-th result signal, the running value is obtained based on a variation value between the i-th training signal and the i-th result signal. After each of the memory particle chips outputs the corresponding i-th result signal and obtains a plurality of operating values, the operating values are used to form the operating value group.

8. The notification method of claim 1 , wherein before performing the signal training on the dynamic random access memory based on the boot parameter, the notification method further comprises: The startup parameter is adjusted according to a parameter adjustment instruction.

9. The notification method of claim 8, wherein receiving the parameter adjustment instruction comprises: Accessing a basic input / output system interface; and The parameter adjustment instruction is received at the basic input and output system interface.

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