Method, device and storage medium for writing chip key in intermediate test stage

Abstract

The present invention discloses a method, device and storage medium for writing a chip key in the middle test stage. The method includes product unique code generation, product key generation, product key storage, key search, writing the key into a memory, deleting the key, etc. The method disclosed by the present invention greatly improves the efficiency of writing the key of a security chip, reduces the labor cost, and enhances the security of the key.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and particularly to a method, device and storage medium for writing a chip key during the middle test stage. Background Art

[0002] At present, the market demand for security chips is strong, and the core of security chips is the product key. How to automatically write the key into the chip is a difficult problem.

[0003] Currently, in the market, "all 0" key initial values are written during the middle test of the product. When the product reaches the customers, the customers manually write the product key for each chip. This method has low efficiency and is not suitable for large-scale chip application scenarios such as identity cards and vehicle identification. In addition, when manually writing the key, it is easy to make mistakes. Once written incorrectly, the chip will not be able to perform two-way authentication, and the key of the chip has no read permission, resulting in the chip being scrapped. Moreover, when manually writing the key, there is also a risk of the key being stolen by humans. Summary of the Invention

[0004] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a method, device and storage medium for writing a chip key during the middle test stage, which can effectively reduce the risk of key leakage.

[0005] To solve the above technical problems, the present invention adopts the following technical solutions:

[0006] A method for writing a chip key during the middle test stage includes the following steps:

[0007] Step 1: Generate a unique chip code and record it in a first file for storage;

[0008] Step 2: Generate key parameters according to the unique chip code;

[0009] Step 3: Generate a key file, use the unique chip code as the file name of the key file, and save the corresponding key parameters in the key file;

[0010] Step 4: Search for and open the corresponding key file according to the unique chip code, obtain the key parameters, and write the key parameters into the chip memory for storage;

[0011] Step 5: Permanently delete the key file named with the unique chip code.

[0012] Preferably, during the middle test stage, after testing the non-volatile memory of the chip, Step 1 is implemented.

[0013] Preferably, in Step 1, the unique chip code is generated according to the X and Y coordinates of the probe station.

[0014] Preferably, in step 3: generate a key file, use the chip unique code as the file name of the key file, and save the corresponding key parameters in the key file, including:

[0015] Obtain the chip unique code saved in the first file, and create a new document with the chip unique code as the file name;

[0016] Store the key parameters corresponding to the chip unique code in the document with the chip unique code as the file name and arrange them in a certain order;

[0017] Add security access permissions to all generated files.

[0018] Preferably, the key parameters include a product key and a password.

[0019] A device for writing a chip key in the middle test stage includes a processor, and the processor is configured to:

[0020] Generate a chip unique code and record it in the first file for storage;

[0021] Generate key parameters according to the chip unique code;

[0022] Generate a key file, use the chip unique code as the file name of the key file, and save the corresponding key parameters in the key file;

[0023] Search for and open the corresponding key file according to the chip unique code, obtain the key parameters, and write the key parameters into the chip memory for storage;

[0024] Permanently delete this key file named with the chip unique code.

[0025] Preferably, the processor is further configured to: generate a chip unique code according to the X, Y coordinates of the probe station.

[0026] Preferably, the processor is further configured to: generate a key file, use the chip unique code as the file name of the key file, and save the corresponding key parameters in the key file, including:

[0027] Obtain the chip unique code saved in the first file, and create a new document with the chip unique code as the file name;

[0028] Store the key parameters corresponding to the chip unique code in the document with the chip unique code as the file name and arrange them in a certain order;

[0029] Add security access permissions to all generated files.

[0030] A non-transitory computer-readable storage medium storing instructions, which, when executed by a processor, perform the method of writing a chip key during the in-process testing phase as described above.

[0031] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0032] The present invention is highly automated, with no human participation throughout the process, high efficiency, a very fast running speed of the testing machine, no additional testing costs, and immediate permanent deletion of the key after completion, greatly reducing the risk of key leakage. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a flowchart of a method for writing a chip key during the in-process testing phase in an embodiment of the present invention;

[0034] Figure 2 It is a format diagram of the saved chip unique code generated in the first in-process testing phase in an embodiment of the present invention;

[0035] Figure 3 It is a diagram of a file set for saving a product key corresponding to a product unique code in an embodiment of the present invention;

[0036] Figure 4 It is a format diagram of the saved security key, password, and other information in a file in an embodiment of the present invention;

[0037] Figure 5 It is a hardware block diagram of a device for writing a chip key during the in-process testing phase in an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0038] The following listed partial embodiments are only for better illustrating the present invention, but the content of the present invention is not limited to being applied to the cited embodiments. Therefore, those skilled in the art, based on the above-mentioned invention content, make non-essential improvements and adjustments to the implementation schemes and apply them to other embodiments, which are still within the protection scope of the present invention.

[0039] Figure 1 It shows a flowchart of a method for writing a chip key during the in-process testing phase, starting from step 1: generating a chip unique code and recording it for saving in a first file;

[0040] In an embodiment of the present invention, security chips generally contain non-volatile memories for storing data, passwords, keys, etc. after the chip is powered off. The non-volatile memory is generally tested separately during the in-process testing phase, named "CP1". A program for calculating the chip unique code (UID) can be added during this testing process and output to a file for saving. The chip unique code (UID) is generally generated according to a certain algorithm based on the X and Y coordinates of the probe station and has uniqueness.

[0041] Therefore, in some instances, adding the generation of the chip unique code in Step 1 at the end of the CP1 program can screen out defective products in the test. Then, defective chips will not generate chip unique codes, saving key costs.

[0042] Figure 2 It shows the storage format of the generated chip unique code in the first stage of intermediate testing. Each line stores the unique code of a product. The number of good products on this wafer determines the number of lines of product unique codes generated and saved in the first file.

[0043] In Step 2, key parameters are generated based on the chip unique code. The key parameters described in the embodiments of the present invention mainly include product keys and passwords, but are not limited thereto.

[0044] In some embodiments, a key generator recognized by the National Cryptography Administration is used to generate a corresponding key, password, etc. for each chip according to the chip unique code (UID).

[0045] In Step 3, a key file is generated, with the chip unique code as the file name of the key file, and the corresponding key parameters are saved in the key file;

[0046] In some embodiments, the specific steps are as follows:

[0047] Obtain the chip unique code saved after CP1 testing, and create a new txt document with the chip unique code as the file name. The embodiments of the present invention only illustrate the format of one file. Those skilled in the art should understand that other file formats can also be used as long as they can achieve the corresponding functions.

[0048] Store the key and password corresponding to the chip unique code (UID) in the file with the chip unique code (UID) as the file name in a certain order.

[0049] Add security access permissions to all the generated files.

[0050] As Figure 3 shown, the embodiments of the present invention show a file set for storing product keys corresponding to product unique codes. The txt files saved with product unique codes as file names are under the file directory.

[0051] As Figure 4 shown, it shows the storage format of security keys, passwords, and other information in the file. In the embodiments of the present invention, the ranking of keys and passwords can be, for example, the first line is the card key, the second line is the batch key, the third line is the read password, the fourth line is the write password, and so on. Arranging in this way can improve the reading efficiency of the processor and thus enhance the operating efficiency of the entire method.

[0052] In step 4, search for and open the corresponding key file according to the chip unique code, obtain the key parameters, and write the key parameters into the chip memory for storage;

[0053] Except for the non-volatile memory of the chip, other circuits need to be tested again in the middle test, named "CP2". When performing the CP2 test, first calculate the unique code (UID) of the chip, write the UID into the memory for storage according to the test mode, and then use the chip unique code (UID) as the search keyword to search for and open the key and password files named after the chip unique code (UID) generated in step 3, extract the key and password, and write them to the specified address of the chip memory for storage in the test mode.

[0054] In step 5, permanently delete this key file named after the chip unique code.

[0055] In the embodiment of the present invention, continuously repeating steps 1-5 can cycle test multiple chips until the entire wafer is tested. This can ensure that the tested good products have successfully written the key and the file storing the key has been deleted. The chips corresponding to the key files that have not been deleted are all tested defective products. After dicing, the tested defective products will be destroyed, and the key files can be recycled and reused.

[0056] Figure 5 The hardware block diagram of a device for writing a chip key in the middle test stage according to an embodiment of the present invention is shown. As Figure 5 shown, the active fault diagnosis device 500 includes a processor 510 and a memory 520, and can be implemented when the processor 510 executes instructions stored in the memory 520.

[0057] The processor 510 can be a processing device including more than one general-purpose processing device, such as a microprocessor, a central processing unit (CPU), a graphics processing unit (GPU), etc. More specifically, the processor 510 can be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor running other instruction sets, or a processor running a combination of instruction sets. The processor 510 can also be more than one dedicated processing device, such as an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a digital signal processor (DSP), a system on chip (SoC), etc. The processor 510 can be communicatively coupled to the memory 520 and be configured to execute computer-executable instructions stored thereon to execute the method for determining the traffic state of a mixed traffic flow in the above embodiment.

[0058] The memory 520 may be a non-transitory computer-readable medium, such as a read-only memory (ROM), a random access memory (RAM), a phase change random access memory (PRAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), an electrically erasable programmable read-only memory (EEPROM), other types of random access memory (RAM), a flash drive or other forms of flash memory, a cache, a register, a static memory, a compact disc read-only memory (CD-ROM), a digital versatile disc (DVD) or other optical memory, a cassette tape or other magnetic storage device, or any other possible non-transitory medium used to store information or instructions that can be accessed by a computer device, etc.

[0059] Embodiments of the present invention also provide a non-transitory computer-readable medium storing instructions, which when executed by a processor, perform the method of writing a chip key in the in-process test phase according to any one of the above.

[0060] In addition, although exemplary embodiments have been described herein, the scope includes any and all embodiments based on the present disclosure having equivalent elements, modifications, omissions, combinations (e.g., schemes that cross various embodiments), adaptations or alterations. The elements in the claims will be broadly interpreted based on the language used in the claims and are not limited to the examples described in this specification or during the implementation of the present disclosure, and the examples will be construed as non-exclusive. Thus, this specification and the examples are intended to be considered only as examples, and the true scope and spirit are indicated by the following claims and the full scope of their equivalents.

[0061] The above description is intended to be illustrative and not restrictive. For example, the above examples (or one or more of them) can be used in combination with each other. For example, those of ordinary skill in the art can use other embodiments when reading the above description. Additionally, in the above detailed description, various features can be grouped together to simplify the present disclosure. This should not be construed as an intention that a disclosed feature not claimed is necessary for any claim. On the contrary, the subject matter of the present invention may be less than all the features of a particular disclosed embodiment. Thus, the following claims are incorporated herein as examples or embodiments into the detailed description, where each claim independently serves as a separate embodiment, and it is contemplated that these embodiments can be combined with each other in various combinations or permutations. The scope of the present invention should be determined with reference to the appended claims and the full scope of the equivalents to which those claims are entitled.

Claims

1. A method for writing a chip key during the middle test stage, characterized in that, It includes the following steps: Step 1: Generate a unique chip code and record it in a first file for storage; Step 2: Generate key parameters based on the unique chip code; Step 3: Generate a key file, using the unique chip code as the file name of the key file, and store the corresponding key parameters in the key file; Step 4: Search for and open the corresponding key file according to the unique chip code, obtain the key parameters, and write the key parameters into the chip memory for storage; Step 5: Permanently delete this key file named with the unique chip code; The said Step 3: Generate a key file, using the unique chip code as the file name of the key file, and store the corresponding key parameters in the key file, including: Obtain the unique chip code stored in the first file, and create a new document with the unique chip code as the file name; Store the key parameters corresponding to the unique chip code in the document named with the unique chip code and arrange them in a certain order; Add security access permissions to all the generated files.

2. The method according to claim 1, characterized in that In the middle test stage, after testing the non-volatile memory of the chip, implement Step 1.

3. The method according to claim 1, wherein In the said Step 1, generate a unique chip code according to the X, Y coordinates of the probe station.

4. The method according to any one of claims 1 to 3, characterized in that, The said key parameters include a product key and a password.

5. A device for writing a chip key during the middle test stage, characterized in that, It includes a processor, and the processor is configured to: Generate a unique chip code and record it in a first file for storage; Generate key parameters based on the unique chip code; Generate a key file, using the unique chip code as the file name of the key file, and store the corresponding key parameters in the key file; Search for and open the corresponding key file according to the unique chip code, obtain the key parameters, and write the key parameters into the chip memory for storage; Permanently delete this key file named with the unique chip code; The processor is further configured to: Generate a key file, using the unique chip code as the file name of the key file, and store the corresponding key parameters in the key file, including: Obtain the unique chip code stored in the first file, and create a new document with the unique chip code as the file name; Store the key parameters corresponding to the unique chip code in the document named with the unique chip code and arrange them in a certain order; Add security access permissions to all the generated files.

6. The device according to claim 5, characterized in that, The processor is further configured to: Generate a unique chip code according to the X, Y coordinates of the probe station.

7. A non-transitory computer-readable storage medium storing instructions, which when executed by a processor, execute the method of writing a chip key in the middle test stage according to any one of claims 1 to 4.

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