Display device

Abstract

A display device is provided that has improved reliability by effectively controlling the spreading of an organic layer. The display device includes: a substrate including a display area and a peripheral area outside the display area; a display element at the display area; an input sensing layer above the display element; and an optical functional layer on the input sensing layer and including a first layer corresponding to the display area and the peripheral area and a second layer on the first layer, wherein the first layer is defined with a first valley portion that is defined with a plurality of first holes on the peripheral area and surrounding the second layer.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims the priority and benefit of Korean Patent Application No. 10-2020-0075936, filed on Jun. 22, 2020, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments relate to a display device having improved reliability due to effectively controlling the spreading of an organic layer. Background Art

[0004] Compared with other display devices, an organic light-emitting display device has a larger viewing angle, better contrast characteristics, and a faster response speed, and thus has attracted attention as a next-generation display device.

[0005] Generally, an organic light-emitting display device includes thin-film transistors formed on a substrate and organic light-emitting diodes as display elements, and the organic light-emitting diodes emit light by themselves (e.g., are self-emissive). Such an organic light-emitting display device can be used as a display for small products such as mobile phones, and can also be used as a display for large products such as televisions. Summary of the Invention

[0006] Conventional display devices include an organic layer, and the organic layer can be formed using, for example, an inkjet method. During this process, the organic layer may overflow to the outside of the region where the organic layer is to be formed.

[0007] One or more embodiments of the present disclosure include a display device having improved reliability due to effectively controlling the spreading of an organic layer. However, the disclosed embodiments are merely examples, and the scope of the present disclosure is not limited thereto.

[0008] Additional aspects will be partially set forth in the following description, and will be partially apparent from the description, or may be learned by practicing the disclosed embodiments.

[0009] According to one or more embodiments, a display device includes: a substrate including a display region and a peripheral region outside the display region; a display element at the display region; an input sensing layer above the display element; and an optical function layer on the input sensing layer and including a first layer corresponding to the display region and the peripheral region and a second layer on the first layer, wherein the first layer is defined with a first valley portion, and the first valley portion is defined with a plurality of first holes on the peripheral region and surrounding the second layer.

[0010] The plurality of first holes may be aligned in at least one row in a first direction and may be aligned in at least one column in a second direction intersecting the first direction.

[0011] The plurality of first holes may include: a plurality of first sub-holes arranged in the first direction; a plurality of second sub-holes spaced apart from the plurality of first sub-holes and arranged in the first direction; and a plurality of third sub-holes spaced apart from the plurality of second sub-holes and arranged in the first direction.

[0012] The plurality of first sub-holes may be spaced apart from each other at intervals of a first distance, wherein the plurality of second sub-holes are centered between corresponding adjacent first sub-holes among the plurality of first sub-holes with respect to the first direction.

[0013] At least one of the plurality of first holes may have a rhombus shape.

[0014] At least one vertex of the first hole may face an end of the second layer.

[0015] A first width between two parallel sides of one of the plurality of first holes may be from about 1 μm to about 10 μm.

[0016] A second width between two opposite vertices of one of the plurality of first holes may be from about 1 μm to about 15 μm.

[0017] An adjacent pair of the first holes may be spaced apart from each other at intervals of a first distance from about 1 μm to about 15 μm in the first direction.

[0018] The first width may be less than the first distance.

[0019] The first valley portion may further include an auxiliary valley extending in the first direction, and the first hole is between the auxiliary valley and an end of the second layer.

[0020] A first end of the auxiliary valley adjacent to the first hole may be curved corresponding to the shape and arrangement of the first hole.

[0021] A second end of the auxiliary valley opposite to the first end may include a straight shape.

[0022] The first layer may be further defined with a second valley portion, the second valley portion surrounding the second layer corresponding to the peripheral region and spaced apart from the first valley portion.

[0023] The second valley portion may be defined with a plurality of second holes.

[0024] The second valley portion may extend in the first direction.

[0025] In a second direction intersecting the first direction, the width of the second valley portion may be less than or equal to the width of the first valley portion.

[0026] The display device may further include: a thin film encapsulation layer between the display element and the input sensing layer, and the thin film encapsulation layer includes at least one organic encapsulation layer and at least one inorganic encapsulation layer, wherein the input sensing layer is directly on the thin film encapsulation layer.

[0027] The display device may further include: a partition wall surrounding the display area corresponding to the peripheral area, wherein the first valley portion surrounds the partition wall.

[0028] The second layer may cover the partition wall.

[0029] The at least one inorganic encapsulation layer may extend under the first layer in the peripheral area, wherein the first hole exposes at least a part of the at least one inorganic encapsulation layer.

[0030] The first layer may be further defined with an opening pattern corresponding to the display element.

[0031] The width of at least one of the plurality of first holes may be less than or equal to the width of the opening pattern.

[0032] The display element may include a pixel electrode, a counter electrode opposite to the pixel electrode, and an intermediate layer between the pixel electrode and the counter electrode, wherein the display device further includes: a pixel defining layer covering an edge of the pixel electrode and having an opening exposing a central portion of the pixel electrode, and wherein the width of the opening pattern is greater than the width of the opening.

[0033] The intermediate layer may include a green emission layer, wherein the opening pattern has the same size as a corresponding one of the plurality of first holes.

[0034] The second layer may have a refractive index greater than that of the first layer.

[0035] The second layer may have a refractive index of about 1.6 or greater.

[0036] The depth of the first hole may be about 2 μm or greater.

[0037] The second layer may extend toward the peripheral area and include an end spaced apart from the first valley portion.

[0038] According to one or more embodiments, a display device includes: a substrate including a display area and a peripheral area outside the display area; an organic insulating layer on the substrate; and a high refractive index layer on the organic insulating layer corresponding to the display area, wherein the organic insulating layer defines a first valley portion surrounding the high refractive index layer corresponding to the peripheral area and defines a hole, and wherein the high refractive index layer extends toward the peripheral area and includes a portion spaced apart from the first valley portion.

[0039] These and / or other aspects will become apparent and be more readily understood from the following description of the embodiments, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The above and other aspects of some embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the drawings, in which:

[0041] Figure 1 is a plan view of a part of a display device according to some embodiments;

[0042] Figure 2A and Figure 2B is a cross-sectional view taken along line A-A' of the display device; Figure 1

[0043] Figure 3 is a cross-sectional view of a part of a display device according to some embodiments;

[0044] Figure 4 Figure 1 is a plan view of a display panel of the display device;

[0045] Figure 5 is an equivalent circuit diagram of a pixel that may be included in a display device according to some embodiments;

[0046] Figure 6 is a plan view of an input sensing layer of a display device according to some embodiments;

[0047] Figure 7 Figure 6 is an enlarged plan view of part B;

[0048] Figures 8A to 8E Figure 7 is a cross-sectional view taken along line C-C' of a part of a display area of a display device according to some embodiments;

[0049] Figure 9 Figure 6 is

[0050] an enlarged plan view of part D;

[0050] Figure 10Yes Figure 4 An enlarged plan view of part E of

[0051] Figure 11A is Figure 10 A cross-sectional view taken along line F-F' of

[0052] Figure 11B and Figure 11C and Figure 12 are Figure 11A Variations of

[0053] Figure 13 is Figure 10 An enlarged plan view of a display area and a part of a first valley portion of

[0054] Figure 14 is Figure 13 A cross-sectional view of a part of a manufacturing process corresponding to a cross-section taken along line G-G' of

[0055] Figure 15 is Figure 13 An enlarged plan view of a part of ; and

[0056] Figures 16 to 21 is a plan view schematically showing a part of a display device according to some embodiments. Detailed Description of Specific Embodiments

[0057] Aspects of some embodiments of the present disclosure and methods for implementing the same can be more easily understood through a detailed description with reference to the embodiments and the accompanying drawings. Hereinafter, the embodiments will be described in more detail with reference to the drawings. However, the described embodiments can be implemented in various different forms and should not be construed as limited to the embodiments shown herein. Instead, these embodiments are provided as examples so that the disclosure will be thorough and complete and will fully convey the aspects of the present disclosure to those skilled in the art. Accordingly, processes, elements, and techniques that are not necessary for a person of ordinary skill in the art to fully understand the aspects of the present disclosure may not be described.

[0058] Unless otherwise specified, throughout the drawings and the written description, the same reference numerals, characters, or combinations thereof represent the same elements, and thus, their description will not be repeated. In addition, parts that are not relevant to the description of the embodiments may not be shown to make the description clear. In the drawings, the relative dimensions of elements, layers, and regions may be exaggerated for clarity. Additionally, the use of cross-hatching and / or shading is generally provided in the drawings to clarify the boundaries between adjacent elements. Thus, unless otherwise specified, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for the specific materials, material properties, dimensions, ratios, commonalities between the elements shown, and / or any other characteristics, attributes, performances, etc. of the elements.

[0059] In this document, various embodiments are described with reference to cross-sectional views that are schematic illustrations of embodiments and / or intermediate structures. As such, variations in the shape of the illustrations due to, for example, manufacturing techniques and / or tolerances are to be expected. Additionally, for the purposes of describing embodiments in accordance with the concepts of the present disclosure, the specific structural descriptions or specific functional descriptions disclosed herein are merely illustrative. Accordingly, the embodiments disclosed herein should not be construed as being limited to the particular shapes shown in the regions, but rather include, for example, shape deviations caused by manufacturing.

[0060] For example, an implantation region shown as rectangular will generally have rounded or curved features at the edges of the implantation region and / or a gradient of implantation concentration, rather than a binary change from the implantation region to the non-implantation region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation occurs. Accordingly, the regions shown in the drawings are schematic in nature, and the shape of the regions is not intended to depict the actual shape of the regions of the device and is not intended to be limiting. Additionally, as will be recognized by those skilled in the art, the described embodiments can be modified in a variety of different ways, all of which do not depart from the spirit or scope of the present disclosure.

[0061] In the detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the various embodiments. However, it will be apparent that the various embodiments can be practiced without these specific details or with one or more equivalent arrangements. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the various embodiments.

[0062] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or section from another element, component, region, layer, or section. Accordingly, a first element, component, region, layer, or section described below can be referred to as a second element, component, region, layer, or section without departing from the spirit and scope of the present disclosure.

[0063] For ease of explanation, in this document, spatial relative terms such as "under", "below", "beneath", "underneath", "above", and "on" may be used to describe the relationship of one element or feature to another element(s) or feature(s) as shown in the accompanying drawings. It will be understood that, in addition to the orientation depicted in the drawings, the spatial relative terms are also intended to cover different orientations during the use or operation of the device. For example, if the device in the drawings is flipped, an element described as "under", "below", or "beneath" other elements or features will then be oriented "above" the other elements or features. Thus, the example terms "under" and "below" can cover both the upper and lower orientations. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and the spatial relative descriptors used herein should be interpreted accordingly. Similarly, when a first component is described as being disposed "on" a second component, this means that the first component is disposed on the upper or lower side of the second part, and is not limited to the upper side of the second part based on the direction of gravity.

[0064] In addition, in this specification, the phrase "in a plane" or "plan view" refers to observing the target part from the top, and the phrase "in a section" refers to observing a section formed by vertically cutting the target part from the side.

[0065] It will be understood that when an element, layer, region or component is referred to as being "formed on", "on", "connected to" or "coupled to" another element, layer, region or component, the element, layer, region or component may be directly formed on, directly on, directly connected to or directly coupled to the other element, layer, region or component, or may be indirectly formed on, indirectly on, indirectly connected to or indirectly coupled to the other element, layer, region or component, such that there may be one or more intermediate elements, layers, regions or components. For example, when a layer, region or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region or component, the layer, region or component may be directly electrically connected to or directly electrically coupled to the other layer, region and / or component, or there may be intermediate layers, regions or components. However, "directly connected / directly coupled" means that one component is directly connected or directly coupled to another component without an intermediate component. Similarly, the statement "component X is directly disposed on component Y" means that there is no adhesive layer / adhesive member disposed between component X and Y (e.g., after forming component Y, component X is formed on the substrate surface of component Y via a continuous process). At the same time, other statements describing the relationship between components, such as "between", "directly between" or "adjacent to" and "directly adjacent to", can be similarly interpreted. Additionally, it will also be understood that when an element or layer is referred to as being "between" two elements or layers, the element or layer may be the only element or layer between the two elements or layers, or there may also be one or more intermediate elements or layers.

[0066] For the purposes of the present disclosure, a statement such as "at least one of" when following a list of elements modifies the entire list of elements and not each individual element in the list. For example, "at least one of X, Y and Z", "at least one of X, Y or Z" and "at least one selected from the group consisting of X, Y and Z" can be interpreted as only X, only Y, only Z, any combination of two or more of X, Y and Z such as XYZ, XYY, YZ and ZZ for example, or any variation thereof. Similarly, a statement such as "at least one of A and B" can include A, B, or A and B. As used herein, the term "and / or" includes any combination and all combinations of one or more of the associated listed items. For example, a statement such as "A and / or B" can include A, B, or A and B.

[0067] In the examples, the x-axis, y-axis, and / or z-axis are not limited to the three axes of a rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. This also applies to the first direction, second direction, and / or third direction.

[0068] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms "a" and "an" are also intended to include the plural forms. It will also be understood that when used in this specification, the terms "comprises," "comprising," "have," "having," "includes," and "including" specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0069] As used herein, the terms "substantially," "about," "approximate," and similar terms are used as approximating terms and not as terms of degree, and are intended to account for the inherent deviations of measured or calculated values recognized by one of ordinary skill in the art. Given the measurements under discussion and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), "about" or "approximate" as used herein includes the stated value and means within an acceptable deviation for the particular value as determined by one of ordinary skill in the art. For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value. Additionally, when describing embodiments of the disclosure, the use of "may" means "one or more embodiments of the disclosure."

[0070] When one or more embodiments can be implemented differently, the specific process order can be performed in an order different from that described. For example, two consecutively described processes can be performed substantially simultaneously or in an order opposite to that described.

[0071] In addition, any numerical range disclosed and / or recited herein is intended to include all sub-ranges having the same numerical precision contained within the recited range. For example, the range "1.0 to 10.0" is intended to include all sub-ranges between (and including) the recited minimum value of 1.0 and the recited maximum value of 10.0, that is, all sub-ranges having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as, by way of example, 2.4 to 7.6. Any maximum numerical limitation recited herein is intended to include all lower numerical limitations contained therein, and any minimum numerical limitation recited in this specification is intended to include all higher numerical limitations contained therein. Accordingly, the applicant reserves the right to amend this specification (including the claims) to expressly recite any sub-ranges that are contained within the ranges expressly recited herein. All such ranges are intended to be inherently described in this specification.

[0072] Any suitable hardware, firmware (e.g., application specific integrated circuit), software, or a combination of software, firmware, and hardware can be used to implement the electronic or electrical device and / or any other related device or component according to embodiments of the present disclosure described herein. For example, the various components of these devices can be formed on one integrated circuit (IC) chip, or can be formed on separate IC chips. In addition, the various components of these devices can be implemented on a flexible printed circuit film, tape carrier package (TCP), printed circuit board (PCB), or can be formed on a substrate.

[0073] In addition, the various components of these devices can be processes or threads running on one or more processors in one or more computing devices, executing computer program instructions and interacting with other system components to perform the various functions described herein. The computer program instructions are stored in a memory, which can be implemented in a computing device using a standard storage device such as, by way of example, random access memory (RAM). The computer program instructions can also be stored in other non-transitory computer-readable media such as, by way of example, a CD-ROM or a flash drive. Additionally, those skilled in the art should recognize that, without departing from the spirit and scope of the embodiments of the present disclosure, the functions of various computing devices can be combined or integrated into a single computing device, or the functions of a particular computing device can be distributed within one or more other computing devices.

[0074] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms, such as those defined in a general dictionary, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and / or this specification, unless explicitly so defined herein, and should not be interpreted in an idealized or overly formal sense.

[0075] Figure 1 is a schematic plan view of a part of a display device 1 according to some embodiments.

[0076] Referring to Figure 1 , the display device 1 includes a display area DA and a peripheral area NDA outside the display area DA. A plurality of pixels P including display elements are arranged in the display area DA, and the display device 1 can provide an image by using light emitted from the plurality of pixels P arranged in the display area DA. The peripheral area NDA is a non-display area in which no display elements are arranged, and the display area DA can be completely surrounded by the peripheral area NDA. It can be understood that since the display device 1 and the substrate 100 can each be described as including a display area DA and a peripheral area NDA outside the display area DA, elements such as pixels, circuits, or lines can be described as being in a certain area (i.e., in a certain area of the display device 1) or described as being on a certain area (i.e., on a certain area of the substrate 100).

[0077] Although Figure 1 shows the display device 1 including a flat display surface, the embodiments of the present disclosure are not limited thereto. According to other embodiments, the display device 1 can include a three-dimensional display surface or a curved display surface.

[0078] When the display device 1 includes a three-dimensional display surface, the display device 1 can include a plurality of display areas pointing in different directions, and for example, can include a display surface in the form of a polyprism. According to other embodiments, when the display device 1 includes a curved display surface, the display device 1 can be implemented in various types, such as a flexible display device, a foldable display device, and a rollable display device.

[0079] According to some embodiments, Figure 1 shows a display device 1 suitable for a mobile phone. For example, electronic modules, camera modules, power modules, etc. mounted on a main board can be arranged together with the display device 1 in a bracket / case, etc., so as to constitute a mobile phone. The display device 1 according to some embodiments is applicable not only to large electronic devices such as televisions and monitors, but also to small and medium-sized electronic devices such as tablet computers, car navigation devices, game consoles, and smart watches.

[0080] Figure 1 Illustrates a case where the display area DA of the display device 1 has a rectangular shape with rounded corners. However, according to other embodiments, the shape of the display area DA may be circular, elliptical, or a polygon such as a triangle or pentagon.

[0081] Although the organic light-emitting display device will now be shown and described as the display device 1 according to some embodiments of the present disclosure, other embodiments are not limited thereto. According to other embodiments, the display device 1 may be an inorganic light-emitting display or a quantum dot light-emitting display, etc. For example, the emission layer of the display element included in the display device 1 may include an organic material, may include an inorganic material, may include quantum dots, may include an organic material and quantum dots, or may include an inorganic material and quantum dots.

[0082] Figure 2A and Figure 2B is a cross-sectional view taken along line A - A' of the display device 1, and Figure 1 is a cross-sectional view of a part of the display device 1 according to some embodiments. Figure 3 is a simplified cross-sectional view for explaining the stacking relationship between the functional panels and / or functional layers constituting the display device 1. Figure 2A 、 Figure 2B and Figure 3 is a simplified cross-sectional view for explaining the stacking relationship between the functional panels and / or functional layers constituting the display device 1.

[0083] Referring to Figure 2A , according to some embodiments, the display device 1 may include a display layer DU, an input sensing layer TU, an optical function layer OU, an anti-reflection layer PU, and a window layer WU. At least some of the components of the display layer DU, the input sensing layer TU, the optical function layer OU, the anti-reflection layer PU, and the window layer WU may be formed by a continuous process or may be bonded to each other via an adhesive member. Figure 2A Illustrates an optically clear adhesive member OCA as the adhesive member. The adhesive member described below may include a typical adhesive. According to some embodiments, the anti-reflection layer PU and the window layer WU may be replaced by other components or may be omitted.

[0084] According to some embodiments, the input sensing layer TU is directly disposed on the display layer DU. The display layer DU, the input sensing layer TU directly disposed on the display layer DU, and the optical function layer OU may be defined as a display panel DP. According to some embodiments, as Figure 2A shown, the optically clear adhesive member OCA may be respectively disposed between the display panel DP and the anti-reflection layer PU and between the anti-reflection layer PU and the window layer WU.

[0085] According to other embodiments, as Figure 2BAs shown, the display panel DP may include a color filter layer CU. The color filter layer CU may be disposed between the input sensing layer TU and the optical function layer OU. The color filter layer CU may include color filters corresponding to the light emitting regions of each pixel P and a light shielding layer corresponding to the non-light emitting regions between the pixels P. According to some embodiments, an optically transparent adhesive member OCA may be omitted between the color filter layer CU and the display panel DP, and the color filter layer CU may be directly on the display panel DP.

[0086] The display layer DU generates an image, and the input sensing layer TU obtains coordinate information of an external input (e.g., a touch event). The display panel DP according to some embodiments may further include a protection member disposed on the lower surface of the display layer DU. The protection member and the display layer DU may be bonded to each other via an adhesive member.

[0087] The optical function layer OU may improve light efficiency. The optical function layer OU may improve, for example, the front light efficiency and / or the side visibility of the light emitted by the organic light emitting diode OLED.

[0088] The anti-reflection layer PU reduces the reflectance of external light incident on the anti-reflection layer PU from the top of the window layer WU. The anti-reflection layer PU according to some embodiments may include a phase retarder and a polarizer. The phase retarder may be film type or liquid coating type, and may include a λ / 2 phase retarder and / or a λ / 4 phase retarder. The polarizer may also be film type or liquid coating type. The film type may include a stretchable synthetic resin film, and the liquid coating type may include liquid crystals arranged (e.g., arranged in a predetermined arrangement). The phase retarder and the polarizer may further include protective films respectively. The phase retarder and the polarizer may be defined as the base layer of the anti-reflection layer PU.

[0089] Now, reference will be made to Figure 3 describe in detail the display layer DU, the input sensing layer TU, and the optical function layer OU.

[0090] Refer to Figure 3 , the display panel DP includes a display layer DU and an input sensing layer TU. The display layer DU is simply shown to illustrate the stacking structure of the input sensing layer TU. In some embodiments, Figure 2A the anti-reflection layer PU of Figure 2A and the window layer WU of

[0091] The display layer DU may be obtained by sequentially disposing a circuit layer CL, an organic light emitting diode OLED, and a thin film encapsulation layer TFE on a substrate 100. The input sensing layer TU may be directly disposed on the thin film encapsulation layer TFE. As Figure 8AAs shown in (to be described later), the thin film encapsulation layer TFE includes at least one organic encapsulation layer 320, and thus can provide a relatively flat substrate surface. Therefore, even when forming components of the input sensing layer TU through a continuous process, the defect rate can be reduced.

[0092] The input sensing layer TU can have a multilayer structure. The input sensing layer TU includes detection electrodes, signal lines (or traces) connected to the detection electrodes, and at least one insulating layer. The input sensing layer TU can detect external inputs according to, for example, the capacitance method. In the present disclosure, the operation method of the input sensing layer TU is not particularly limited. According to some embodiments, the input sensing layer TU can sense external inputs according to the electromagnetic induction method or the pressure detection method.

[0093] As Figure 3 shown, the input sensing layer TU according to some embodiments can include a first insulating layer IL1, a first conductive layer CL1, a second insulating layer IL2, and a second conductive layer CL2.

[0094] For example, each of the first conductive layer CL1 and the second conductive layer CL2 can have a single-layer structure or a stacked multilayer structure. The conductive layer having a single-layer structure can include a metal layer or a transparent conductive layer. The metal layer can include molybdenum, silver, titanium, copper, aluminum, and their alloys. The transparent conductive layer can include transparent conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO). Optionally, the transparent conductive layer can include a conductive polymer (e.g., PEDOT), metal nanowires, graphene, etc.

[0095] The conductive layer having a multilayer structure can include multiple metal layers. The multiple metal layers can have, for example, a three-layer structure of titanium / aluminum / titanium (Ti / Al / Ti). The conductive layer having a multilayer structure can include at least one metal layer and at least one transparent conductive layer.

[0096] Each of the first conductive layer CL1 and the second conductive layer CL2 includes a plurality of patterns. It can be understood hereinafter that the first conductive layer CL1 includes first conductive patterns, and the second conductive layer CL2 includes second conductive patterns. The first conductive patterns and the second conductive patterns can form Figure 6 the detection electrodes shown. According to some embodiments, as will be described later with reference to Figure 6 description, the detection electrodes can have a grid shape, which reduces or prevents the user's visual recognition of the detection electrodes.

[0097] Each of the first insulating layer IL1 and the second insulating layer IL2 may have a single-layer or multi-layer structure. Each of the first insulating layer IL1 and the second insulating layer IL2 may include an inorganic material or a composite material. For example, at least one of the first insulating layer IL1 and the second insulating layer IL2 may include an inorganic layer (hereinafter also referred to as the first inorganic insulating layer IL1 and the second inorganic insulating layer IL2). The inorganic layer may include at least one of alumina, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. According to other embodiments, the first inorganic insulating layer IL1 and / or the second inorganic insulating layer IL2 may be replaced by an organic insulating layer.

[0098] The display panel DP further includes an optical function layer OU. The optical function layer OU may be directly on the input sensing layer TU. The optical function layer OU may include a first layer 410 and a second layer 420 on the first layer 410. The first layer 410 and the second layer 420 may include an organic insulating material and may be included to have different refractive indices. According to some embodiments, the refractive index of the second layer 420 (e.g., as a high refractive index layer) may be greater than the refractive index of the first layer 410 (e.g., as an organic insulating layer).

[0099] Figure 4 is Figure 1 a plan view of the display panel DP of the display device 1.

[0100] Referring to Figure 4 , the display panel DP includes a display portion 10, a first scan driving circuit 20 and a second scan driving circuit 30, a terminal portion 40, a data driving circuit 50, a driving voltage supply line 60, and a common voltage supply line (e.g., a common power supply line) 70 disposed on a substrate 100. In other embodiments, an emission control driving circuit may be further disposed on one side of the first scan driving circuit 20.

[0101] The substrate 100 may include a material such as a glass material, a metal, or an organic material. According to some embodiments, the substrate 100 may be formed of a flexible material. For example, the substrate 100 may include a polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate.

[0102] The display portion 10 includes scan lines SL extending in a first direction (e.g., the x direction), data lines DL extending in a second direction (e.g., the y direction) intersecting the first direction (e.g., the x direction), and pixels P connected to a driving voltage line PL. Each of the pixels P may emit, for example, red light, green light, blue light, and / or white light and may include, for example, an organic light-emitting diode.

[0103] The display unit 10 provides a specific image through the light emitted from the pixels P, and the display area DA is defined by the pixels P. The display unit 10 may have an approximately rectangular shape. However, according to various embodiments, the display unit 10 may have a polygonal, circular, or elliptical shape, or may have a shape corresponding to some of the polygonal, circular, and elliptical shapes. The display unit 10 may have a generally rectangular shape including rounded corners. The display unit 10 is positioned on the substrate 100, and the substrate 100 may have an outer edge, at least a part of which is curved.

[0104] The first scan driving circuit 20 and the second scan driving circuit 30 are arranged in the peripheral area NDA of the substrate 100, generate scan signals, and transmit the scan signals to each of the pixels P via the scan lines SL. For example, the first scan driving circuit 20 may be positioned on the left side of the display unit 10, and the second scan driving circuit 30 may be positioned on the right side of the display unit 10. The first scan driving circuit 20 and the second scan driving circuit 30 are respectively arranged on both sides of the display unit 10. However, according to other embodiments, the scan driving circuit may be arranged on one side of the display unit 10.

[0105] The terminal portion 40 is positioned at one end of the substrate 100 and includes a plurality of terminals 41, 42, 43, and 44. The terminal portion 40 may be exposed without being covered by an insulating layer and may be electrically connected to a controller, such as a flexible printed circuit board or a driver integrated circuit (IC) chip.

[0106] The controller changes a plurality of image signals received from an external source into a plurality of image data signals and transmits the plurality of image data signals to the data driving circuit 50 via the terminal 41. The data driving circuit 50 may generate data signals, and the generated data signals may be transmitted to the display area DA via the fan-out wiring FW.

[0107] The controller may receive a vertical synchronization signal, a horizontal synchronization signal, and a clock signal to generate control signals for controlling the driving of the first scan driving circuit 20 and the second scan driving circuit 30, and may transmit the generated control signals to the first scan driving circuit 20 and the second scan driving circuit 30 via the terminal 43. The controller respectively transmits the driving voltage ELVDD (see Figure 5 ) and the common voltage ELVSS (see Figure 5 ) to the driving voltage supply line 60 and the common voltage supply line 70 via the terminals 42 and 44.

[0108] The data driving circuit 50 is in the peripheral area NDA of the substrate 100, generates data signals, and transmits the data signals to each of the pixels P via the data lines DL. The data driving circuit 50 may be on one side of the display unit 10, for example, between the terminal portion 40 and the display unit 10.

[0109] The driving voltage supply line 60 may be on the peripheral area NDA. For example, the driving voltage supply line 60 may be between the data driving circuit 50 and the display unit 10. The driving voltage supply line 60 supplies the driving voltage ELVDD (see Figure 5 ) to the pixel P. The driving voltage supply line 60 may extend in a first direction (e.g., the x direction) and may be connected to a plurality of driving voltage lines PL each extending in a second direction (e.g., the y direction).

[0110] The common voltage supply line 70 is arranged on the peripheral area NDA and supplies Figure 5 the common voltage ELVSS to the opposite electrode 230 of the organic light emitting diode OLED of each pixel P. For example, the common voltage supply line 70 has an annular shape with one side open and thus may extend along the edge of the substrate 100 except for the terminal portion 40. Figure 8A The optical function layer OU may be on the display area DA. The optical function layer OU may be above the entire surface of the display area DA and may partially extend into the peripheral area NDA. Basically, the optical function layer OU is arranged on

[0111] the input sensing layer TU of Figure 2A and Figure 3 and may improve the light emission efficiency and side visibility of the pixel P on the display area DA.

[0112] The optical function layer OU may include a first layer 410 and a second layer 420 on the first layer 410. The first layer 410 may extend more toward the peripheral area NDA than the second layer 420 and thus may be closer to the edge of the substrate 100. The valley portion VP described later may be on the first layer 410 located on the peripheral area NDA.

[0113] The second layer 420 is arranged on the first layer 410 to extend toward the peripheral area NDA and may be controlled by the valley portion VP or may have a shape corresponding to the valley portion VP. In other words, the second layer 420 may be arranged on the peripheral area NDA so as not to extend beyond the valley portion VP.

[0114] For example, the second layer 420 may be formed by an inkjet method. Since the second layer 420 includes an organic insulating material having good spreadability, the display device 1 needs a structure capable of controlling the spread of the second layer 420 in the edge of the substrate 100.

[0115] The valley portion VP may be on the peripheral area NDA to surround the display area DA. The valley portion VP may be outside the common voltage supply line 70. According to some embodiments, Figure 3The first layer 410 can extend toward the peripheral region NDA, and the trough portion VP can be defined by removing a part of the first layer 410. The trough portion VP can effectively control the spreading of the second layer 420 included in the display region DA toward the edge of the substrate 100.

[0116] According to some embodiments, the trough portion VP can have a closed-loop shape to surround an organic layer (e.g., the second layer 420). The structure of the trough portion VP will be described in detail later with reference to Figure 9 and its subsequent drawings.

[0117] Figure 5 is an equivalent circuit diagram of a pixel P that can be included in the display device 1 according to some embodiments.

[0118] Referring to Figure 5 , each pixel P includes a pixel circuit PC connected to a scan line SL and a data line DL, and an organic light-emitting diode OLED connected to the pixel circuit PC.

[0119] The pixel circuit PC includes a driving thin-film transistor Td, a switching thin-film transistor Ts, and a storage capacitor Cst. The switching thin-film transistor Ts is connected to the scan line SL and the data line DL, and transmits a data signal Dm received via the data line DL to the driving thin-film transistor Td according to a scan signal Sn received via the scan line SL.

[0120] The storage capacitor Cst is connected to the switching thin-film transistor Ts and a driving voltage line PL, and stores a voltage corresponding to the difference between the voltage received from the switching thin-film transistor Ts and the driving voltage ELVDD supplied to the driving voltage line PL.

[0121] The driving thin-film transistor Td is connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current I flowing from the driving voltage line PL to the organic light-emitting diode OLED according to the voltage value stored in the storage capacitor Cst d . The organic light-emitting diode OLED can emit light with a certain brightness through the driving current I d .

[0122] Although the case where the pixel circuit PC includes two thin-film transistors Td, Ts and one storage capacitor Cst is shown in Figure 5 , the present disclosure is not limited thereto. According to other embodiments, the pixel circuit PC can include seven thin-film transistors and one storage capacitor. According to other embodiments, the pixel circuit PC can include two or more storage capacitors.

[0123] Figure 6is a schematic plan view of an input sensing layer TU of a display device 1 according to some embodiments, and Figure 7 is Figure 6 an enlarged plan view of part B of

[0124] Referring to Figure 6 , the input sensing layer TU may include first detection electrodes IE1-1 to IE1-5, first signal lines SL1-1 to SL1-5 respectively connected to the first detection electrodes IE1-1 to IE1-5, second detection electrodes IE2-1 to IE2-4, and second signal lines SL2-1 to SL2-4 respectively connected to the second detection electrodes IE2-1 to IE2-4.

[0125] In other embodiments, the input sensing layer TU may further include optical dummy electrodes disposed on a boundary region between the first detection electrodes IE1-1 to IE1-5 and the second detection electrodes IE2-1 to IE2-4.

[0126] Figure 3 The thin film encapsulation layer TFE of Figure 8A includes at least one

[0127] organic encapsulation layer 320 of

[0128] Figure 8A and thus provides a relatively flat substrate surface. Therefore, even when forming components of the input sensing layer TU by a continuous process, the defect rate can be reduced. Since the first signal lines SL1-1 to SL1-5 and the second signal lines SL2-1 to SL2-4 are disposed in a peripheral region NDA with a reduced step difference, the first signal lines SL1-1 to SL1-5 and the second signal lines SL2-1 to SL2-4 can have a uniform thickness. Therefore, the stress on the first signal lines SL1-1 to SL1-5 and the second signal lines SL2-1 to SL2-4 caused by the step difference of the underlying layer can be reduced.

[0127] The first detection electrodes IE1-1 to IE1-5 cross the second detection electrodes IE2-1 to IE2-4. The first detection electrodes IE1-1 to IE1-5 may be disposed in a second direction (e.g., the y direction), and each of the first detection electrodes IE1-1 to IE1-5 may extend in a first direction (e.g., the x direction). The second detection electrodes IE2-1 to IE2-4 may be disposed in the first direction (e.g., the x direction), and each of the second detection electrodes IE2-1 to IE2-4 may extend in the second direction (e.g., the y direction).

[0128] The first detection electrodes IE1-1 to IE1-5 each include a first sensor SP1 and each include a first sensor connector CP1. The second detection electrodes IE2-1 to IE2-4 each include a second sensor SP2 and each include a second sensor connector CP2. Two first sensors SP1 on two ends of the first detection electrodes IE1-1 to IE1-5 in the first sensors SP1 may have a size smaller than that of the first sensors SP1 of the first detection electrodes IE1-1 to IE1-5 (for example, a size about 1 / 2 of the size of the first sensors SP1 of the first detection electrodes IE1-1 to IE1-5). Two second sensors SP2 on two ends of the second detection electrodes IE2-1 to IE2-4 in the second sensors SP2 may have a size smaller than that of the second sensors SP2 of the second detection electrodes IE2-1 to IE2-4 (for example, a size about 1 / 2 of the size of the second sensors SP2 of the second detection electrodes IE2-1 to IE2-4).

[0129] Figure 6 The first detection electrodes IE1-1 to IE1-5 and the second detection electrodes IE2-1 to IE2-4 according to some embodiments are shown, but the shapes of the first detection electrodes IE1-1 to IE1-5 and the second detection electrodes IE2-1 to IE2-4 are not limited. According to some embodiments, each of the first detection electrodes IE1-1 to IE1-5 and the second detection electrodes IE2-1 to IE2-4 may have a shape in which the sensor and the sensor connector are not distinguishable from each other (for example, a rod shape). Figure 6 The first sensor SP1 and the second sensor SP2 each having a rhombus shape are shown, but the present disclosure is not limited thereto. Each of the first sensor SP1 and the second sensor SP2 may have any one of other polygonal shapes.

[0130] The first sensor SP1 in one first detection electrode is arranged in a first direction (for example, the x direction), and the second sensor SP2 in one second detection electrode is arranged in a second direction (for example, the y direction). Each of the first sensor connectors CP1 connects adjacent first sensors SP1 in the first sensors SP1 to each other, and each of the second sensor connectors CP2 connects adjacent second sensors SP2 in the second sensors SP2 to each other.

[0131] The first signal lines SL1-1 to SL1-5 are respectively connected to a corresponding end of the first detection electrodes IE1-1 to IE1-5. The second signal lines SL2-1 to SL2-4 are respectively connected to two ends of the second detection electrodes IE2-1 to IE2-4. According to other embodiments, the first signal lines SL1-1 to SL1-5 may be respectively connected to two ends of the first detection electrodes IE1-1 to IE1-5. According to other embodiments, the second signal lines SL2-1 to SL2-4 may be respectively connected to a single corresponding end of the second detection electrodes IE2-1 to IE2-4.

[0132] The first signal lines SL1-1 to SL1-5 and the second signal lines SL2-1 to SL2-4 may be connected to the pads PD. The pads PD may be arranged in the pad region PDA.

[0133] According to some embodiments, the positions of the first signal lines SL1-1 to SL1-5 may be interchanged with the positions of the second signal lines SL2-1 to SL2-4. For example, Figure 6 Conversely, the first signal lines SL1-1 to SL1-5 may be arranged on the left side, and the second signal lines SL2-1 to SL2-4 may be arranged on the right side.

[0134] Referring to Figure 6 , each of the first detection electrodes IE1-1 to IE1-5 and the second detection electrodes IE2-1 to IE2-4 may have a mesh shape. Since each of the first detection electrodes IE1-1 to IE1-5 and the second detection electrodes IE2-1 to IE2-4 has a mesh shape, the parasitic capacitance between the first detection electrodes IE1-1 to IE1-5 and the second detection electrodes IE2-1 to IE2-4 and Figure 8A the electrodes (e.g., the counter electrode 320) of the display layer DU can be reduced. As will be described later, the first detection electrodes IE1-1 to IE1-5 and the second detection electrodes IE2-1 to IE2-4 do not overlap with the light emitting regions PA-R, PA-G, and PA-B, and thus are not visually recognized by the user of the display device 1.

[0135] The first detection electrodes IE1-1 to IE1-5 and the second detection electrodes IE2-1 to IE2-4, each having a mesh shape, may include metals that can be subjected to a low-temperature process, such as silver, aluminum, copper, chromium, nickel, and titanium. Therefore, even when the input sensing layer TU is formed via a continuous process, damage to the Figure 8A organic light emitting diode OLED can be reduced or prevented.

[0136] Referring to Figure 7, a part of the first sensor SP1 is enlarged and shown. The first sensor SP1 does not overlap with the light-emitting regions PA-R, PA-G, and PA-B, but instead overlaps with the non-light-emitting region NPA. Each of the light-emitting regions PA-R, PA-G, and PA-B can be defined as being the same as the light-emitting region PA of Figure 7 the light-emitting region PA is the same.

[0137] The grid lines of the first sensor SP1 can define a plurality of grid holes OPR, OPG, and OPB. The grid lines can have a three-layer structure of Ti / Al / Ti. The grid holes OPR, OPG, and OPB can have a one-to-one correspondence with the light-emitting regions PA-R, PA-G, and PA-B.

[0138] The light-emitting regions PA-R, PA-G, and PA-B can be classified according to the color of the light beam generated by the organic light-emitting diode OLED. Figure 7 The three light-emitting regions PA-R, PA-G, and PA-B are shown as being distinguished by the colors of the light emitted by the three light-emitting regions PA-R, PA-G, and PA-B, respectively. According to some embodiments, the light-emitting regions PA-R, PA-G, and PA-B can emit red light, green light, and blue light, respectively.

[0139] Figure 7 The grid holes OPR, OPG, and OPB having a one-to-one correspondence with the light-emitting regions PA-R, PA-G, and PA-B are shown, but the embodiments of the present disclosure are not limited thereto. Each of the grid holes OPR, OPG, and OPB can correspond to two or more of the light-emitting regions PA-R, PA-G, and PA-B. In Figure 7 it, the planar shapes of the grid holes OPR, OPG, and OPB correspond to the shapes of the light-emitting regions PA-R, PA-G, and PA-B, and are thus shown as rhombus shapes. However, the embodiments are not limited thereto. The grid holes OPR, OPG, and OPB can have a polygonal shape other than the rhombus shape as the planar shape of the grid holes OPR, OPG, and OPB. For example, the grid holes OPR, OPG, and OPB can have a polygonal shape with rounded corners.

[0140] The first layer 410 can be arranged to cover the first sensor SP1. In other words, the first layer 410 can be arranged to cover the formation of the first sensor SP1 of Figure 8AThe second conductive layer CL2. In the first layer 410, opening patterns OPR-H, OPG-H, and OPB-H corresponding to the respective display elements of pixels Pr, Pg, and Pb can be formed, that is, opening patterns OPR-H, OPG-H, and OPB-H corresponding to the light-emitting regions PA-R, PA-G, and PA-B. In a plane (e.g., the x-y plane), the areas of the opening patterns OPR-H, OPG-H, and OPB-H can be larger than the areas of the light-emitting regions PA-R, PA-G, and PA-B. The opening patterns OPR-H, OPG-H, and OPB-H are respectively positioned in the light extraction directions of pixels Pr, Pg, and Pb, thereby enhancing the straightness of the light beams emitted by the light-emitting regions PA-R, PA-G, and PA-B, and thus the light extraction efficiency can be improved.

[0141] Figure 7 The first sensor SP1 is shown, but each of the second sensors SP2 has a structure substantially the same as that of the Figure 7 first sensor SP1 shown therein.

[0142] Figures 8A to 8E is a cross-sectional view taken along line C-C' of a part of the display area DA of the display device 1 according to some embodiments. Figure 7 of the line C-C'.

[0143] Referring to Figure 8A , the substrate 100 may include glass or a polymer resin. Examples of the polymer resin may include polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, and cellulose acetate propionate. The substrate 100 including the polymer resin may have flexible, rollable, or bendable characteristics. The substrate 100 may have a multilayer structure including a layer containing the above polymer resin and an inorganic layer.

[0144] The buffer layer 101 may be located on the substrate 100, and may reduce or prevent foreign substances, moisture, or ambient air from penetrating from below the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 101 may include an inorganic material (such as an oxide or a nitride), an organic material, or an organic and inorganic compound, and may be a single layer or a multilayer of an inorganic material and an organic material. According to some embodiments, the buffer layer 101 may include silicon oxide (SiO x ), silicon nitride (SiN x ), or / and silicon oxynitride (SiON).

[0145] In the light-emitting region (e.g., Figure 8AA thin film transistor (TFT), a storage capacitor, and an organic light-emitting diode (OLED) electrically connected to the TFT and the storage capacitor can be positioned on a substrate 100 at positions corresponding to the light-emitting regions (PA-G) shown.

[0146] The TFT can be on a buffer layer 101. The TFT can include a semiconductor layer 134, a gate electrode 136, a source electrode 138s, and a drain electrode 138d.

[0147] The semiconductor layer 134 can include at least one of amorphous silicon (a-Si), polycrystalline silicon, an oxide semiconductor, and an organic semiconductor material. According to some embodiments, the semiconductor layer 134 can include low-temperature polycrystalline silicon (LTPS). Since polycrystalline silicon materials have a high electron mobility (100 cm 2 / Vs or higher), the power consumption is low and the reliability is high, and thus it can be used as the semiconductor layer of the TFT of a display device.

[0148] The semiconductor layer 134 can include a channel region 131 overlapping with the gate electrode 136, and a source region 132 and a drain region 133 positioned on respective side portions of the channel region 131 and having a higher impurity concentration than the channel region 131. The impurities can include N-type impurities or P-type impurities. The source region 132 and the drain region 133 can be understood as the source electrode and the drain electrode of the TFT.

[0149] A gate insulating layer 103 can be between the semiconductor layer 134 and the gate electrode 136. The gate insulating layer 103 can include silicon oxide (SiO x ), silicon nitride (SiN x ), or / and silicon oxynitride (SiON), and can be a single layer or multiple layers.

[0150] An interlayer insulating layer 107 can be on the gate electrode 136. The interlayer insulating layer 107 can include silicon oxide (SiO x ), silicon nitride (SiN x ), or / and silicon oxynitride (SiON), and can be a single layer or multiple layers.

[0151] The TFT can include a source electrode 138s and a drain electrode 138d respectively connected to the source region 132 and the drain region 133 of the semiconductor layer 134. The source electrode 138s and the drain electrode 138d can be electrically connected to the source region 132 and the drain region 133 of the semiconductor layer 134 respectively via contact holes penetrating through the gate insulating layer 103 and the interlayer insulating layer 107.

[0152] The source electrode 138s and the drain electrode 138d may include aluminum (Al), copper (Cu), or titanium (Ti), and may be formed as a single layer or as a multi-layer. According to some embodiments, the source electrode 138s and the drain electrode 138d may have a multi-layer structure, such as Ti / Al / Ti or TiN / Al / Ti.

[0153] In other embodiments, Figure 4 the data line DL and Figure 4 the driving voltage line PL may be formed on the same layer as the source electrode 138s and the drain electrode 138d, and may include the same materials as the source electrode 138s and the drain electrode 138d.

[0154] According to some embodiments, the thin film transistor TFT may be covered by a protective layer 109. The protective layer 109 may reduce or prevent wiring including metals such as aluminum that can be damaged by an etchant from being exposed to an etching environment during the manufacture of the display device. The protective layer 109 may extend to the peripheral area NDA (see Figure 1 and Figure 4 ). In some cases, the protective layer 109 may be omitted.

[0155] A planarization layer 111 for planarizing the upper surface of the thin film transistor TFT may be disposed on the protective layer 109. The upper surface on which the pixel electrode 210 will be disposed may be planarized by the planarization layer 111. The planarization layer 111 may include an organic insulating material and may be a single layer or a multi-layer.

[0156] The pixel electrode 210 is on the planarization layer 111. The pixel electrode 210 may be a (semi)-transmissive electrode or a reflective electrode. According to some embodiments, the pixel electrode 210 may include a reflective layer formed of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof, and a transparent or semi-transparent electrode layer formed on the reflective layer. The transparent or semi-transparent electrode layer may include at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO). According to some embodiments, the pixel electrode 210 may have a stacked structure of ITO / Ag / ITO.

[0157] The pixel defining layer 112 may be on the pixel electrode 210, and the pixel defining layer 112 may have openings corresponding to each (sub) pixel. The pixel defining layer 112 may define the light emitting region PA-G by including the openings, and at least a central portion of the pixel electrode 210 is exposed through the openings. The pixel defining layer 112 may reduce or prevent the possibility of arc or the like occurring between the edge of the pixel electrode 210 and the counter electrode 230 by increasing the distance between the edge of the pixel electrode 210 and the counter electrode 230. The pixel defining layer 112 may include an organic material, for example, polyimide or hexamethyldisiloxane (HMDSO).

[0158] According to some embodiments, the spacer 113 may be on the pixel defining layer 112. According to some embodiments, the spacer 113 may be positioned at the non-light emitting region NPA. The spacer 113 may reduce or prevent the possibility of damaging the organic light emitting diode OLED due to the sagging of the mask in the manufacturing process using the mask. The spacer 113 may include an organic insulating material and may be a single layer or multiple layers.

[0159] The planarization layer 111, the pixel defining layer 112, and the spacer 113 may include an organic insulating material. The organic insulating material may include imide-based polymers, commercial polymers such as polymethyl methacrylate (PMMA) or polystyrene (PS), polymer derivatives having phenol-based groups, acrylic-based polymers, aryl ether-based polymers, amide-based polymers, fluorine-based polymers, parylene-based polymers, vinyl alcohol-based polymers, or mixtures thereof. According to some embodiments, the planarization layer 111 may include polyimide.

[0160] The intermediate layer 220 is between the pixel electrode 210 and the counter electrode 230. The intermediate layer 220 may include a low molecular weight material or a high molecular weight material.

[0161] When the intermediate layer 220 includes a low molecular weight material, the intermediate layer 220 may be formed by stacking a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL) in a single structure or a composite structure, and may include any one of various materials such as copper phthalocyanine (CuPc), N,N'-bis(naphthalen-1-yl)-N,N'-diphenylbenzidine (NPB), or tris(8-hydroxyquinoline) aluminum (Alq3). These layers may be formed via vacuum deposition.

[0162] When the intermediate layer 220 includes a high molecular weight material, the intermediate layer 220 can generally have a structure including an HTL and an EML. In this case, the HTL can include poly(ethylenedioxythiophene) (PEDOT), and the EML can include a high molecular weight material, such as a poly(phenylenevinylene) (PPV)-based material or a polyfluorene-based material.

[0163] The intermediate layer 220 is not limited to the above structure and can have any of various other structures. For example, at least one of the layers constituting the intermediate layer 220 can be integrally formed with the counter electrode 230. According to other embodiments, the intermediate layer 220 can include a layer patterned to correspond to each of the plurality of pixel electrodes 210.

[0164] The counter electrode 230 can be disposed on the display area DA and can cover the entire display area DA. In other words, the counter electrode 230 can be formed as a single body covering the entire display area DA. A part of the counter electrode 230 can extend to the peripheral area NDA. As Figure 10 shown, the counter electrode 230 can extend to a partition wall (e.g., the first partition wall PW1) disposed in the peripheral area NDA, and thus can be in electrical contact with the common voltage supply line 70.

[0165] The thin film encapsulation layer TFE can include at least one organic encapsulation layer and at least one inorganic encapsulation layer. According to some embodiments, the thin film encapsulation layer TFE can include a first inorganic encapsulation layer 310, a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330.

[0166] Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can include one or more inorganic insulating materials. The inorganic insulating materials can include, for example, alumina, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be formed by chemical vapor deposition.

[0167] The organic encapsulation layer 320 can include a polymer-based material. Examples of the polymer-based material can include acrylic resins, epoxy-based resins, polyimides, and polyethylene. For example, the organic encapsulation layer 320 can include an acrylic resin, such as polymethyl methacrylate or polyacrylic acid. The organic encapsulation layer 320 can be formed by curing a monomer or by coating a polymer.

[0168] The thin film encapsulation layer TFE can cover the entire display area DA and can extend toward the peripheral area NDA to cover a part of the peripheral area NDA. The thin film encapsulation layer TFE can extend outside the common voltage supply line 70 or can extend beyond the common voltage supply line 70.

[0169] The input sensing layer TU includes a first inorganic insulating layer IL1, a first conductive layer CL1 on the first inorganic insulating layer IL1, a second inorganic insulating layer IL2 on the first conductive layer CL1, and a second conductive layer CL2 on the second inorganic insulating layer IL2. The first conductive layer CL1 and the second conductive layer CL2 can correspond to Figure 7 the first sensor SP1. As described above, the first sensor SP1 may not overlap with the light emitting region PA-G and instead may overlap with the non-light emitting region NPA. In other embodiments, in some regions, the first conductive layer CL1 and the second conductive layer CL2 may be electrically connected to each other via contact holes defined in the second inorganic insulating layer IL2.

[0170] The optical function layer OU can be on the input sensing layer TU. The optical function layer OU can include a first layer 410 covering the second conductive layer CL2 and disposed on the second inorganic insulating layer IL2 and a second layer 420 disposed on the first layer 410.

[0171] The opening pattern OPG-H can be disposed in the first layer 410 to correspond to the light emitting region PA-G. The width W-H of the opening pattern OPG-H can be greater than the width of the light emitting region PA-G in the same direction. In other words, the width W-H of the opening pattern OPG-H is greater than the width of the opening of the pixel defining layer 112. This may mean that, as described above with reference to Figure 7 in a plane (e.g., in the x-y plane or in a plan view), the area of the opening pattern OPG-H is greater than the area of the light emitting region PA-G. The opening pattern OPG-H is positioned in the light extraction direction of the pixel Pg, thereby enhancing the flatness of the light emitted by the light emitting region PA-G and thus improving the light extraction efficiency.

[0172] To further improve the above light extraction efficiency, a second layer 420 having a refractive index higher than that of the first layer 410 can be further disposed on the first layer 410. The first layer 410 can include an organic insulating material having a first refractive index, and the second layer 420 can include an organic insulating material having a second refractive index.

[0173] The first refractive index of the first layer 410 can be in the range of approximately 1.3 to approximately 1.6. According to some embodiments, the first refractive index of the first layer 410 can be in the range of approximately 1.4 to approximately 1.55. The first layer 410 can include, for example, acrylic (ethyl) hexyl ester, pentafluoropropyl acrylate, poly(ethylene glycol) dimethacrylate, or ethylene glycol dimethacrylate. According to some embodiments, the first layer 410 can include an acrylic organic material having a refractive index of approximately 1.5. Alternatively, the first layer 410 can include a material included in the organic encapsulation layer 320 of the thin film encapsulation layer TFE. According to some embodiments, the first layer 410 can include an epoxy-based organic material and, in some cases, can also include a photocurable material.

[0174] The second layer 420 can be a planarization layer having a second refractive index. The second refractive index of the second layer 420 can be in the range of approximately 1.65 to approximately 1.85. The second layer 420 can include, for example, polydiarylsiloxane, methyltrimethoxysilane, or tetramethoxysilane. According to some embodiments, the second layer 420 can include an acrylic and / or siloxane-based organic material having a refractive index of approximately 1.6. According to other embodiments, the second layer 420 can include dispersed particles to have a high refractive index. In the second layer 420, metal oxide particles such as zinc oxide (ZnO x ), titanium oxide (TiO2), zirconium oxide (ZrO2), or barium titanate (BaTiO3) can be dispersed in the second layer 420.

[0175] As Figure 8B shown, the anti-reflection layer PU can be disposed on the optical functional layer OU. The anti-reflection layer PU can be attached to the optical functional layer OU through an optically transparent adhesive member OCA.

[0176] According to other embodiments, as Figure 8C shown, the color filter layer CU can be disposed on the input sensing layer TU, and the optical functional layer OU can be disposed on the color filter layer CU. The color filter layer CU can include a base layer 510, a light-shielding layer 520, a color filter 530, and an overcoat layer 540. According to some embodiments, the base layer 510 can be omitted.

[0177] The color filter 530 can be arranged by considering the colors of the light beams emitted by the pixels of the display panel DP, respectively. For example, according to the color of the light emitted by the organic light-emitting diode OLED, each color filter 530 can be red, green, or blue. The light-shielding layer 520 can include a pigment or dye having black in an insulating material (e.g., an organic insulating material). The light-shielding layer 520 can be, for example, a black matrix. The overcoat layer 540 can be between the color filter 530 and the input sensing layer TU, can include an organic material such as a resin, and can have a light-transmitting property.

[0178] According to other embodiments, as Figure 8D shown, in order to maximize the effect of the color filter layer CU, the pixel defining layer 112 and / or the spacer 113 may include a black light-shielding material. In this case, the pixel defining layer 112 and / or the spacer 113 may be included as, for example, a black matrix. The light-shielding layer 520 may be arranged to correspond to the non-emitting area NPA (see Figure 8A ), thereby reducing or preventing color mixing due to light leakage between the pixels P. In addition, the pixel defining layer 112 and / or the spacer 113 may further perform a light-shielding function together with the light-shielding layer 520, thereby increasing or maximizing the effect of the color filter layer CU. In some embodiments, the Figure 8B anti-reflection layer PU may be omitted.

[0179] According to other embodiments, as Figure 8E shown, the color filter layer CU' may be arranged on the input sensing layer TU, and the color filter layer CU' may include a light-shielding layer 520' and a color filter 530'. The light-shielding layer 520' may be positioned in the non-emitting area NPA (see Figure 8A ) and may surround the light-emitting area PA-G (see Figure 8A ).

[0180] According to some embodiments, the light-shielding layer 520' may passivate the touch electrodes of the input sensing layer TU. For example, as Figure 8E shown, the second conductive layer CL2 of the input sensing layer TU including the touch electrodes may be overlapped by the light-shielding layer 520' and may be covered by the light-shielding layer 520'.

[0181] Figure 9 is Figure 6 an enlarged plan view of a portion D of Figure 10 is Figure 4 an enlarged plan view of a portion E of Figure 11A and is Figure 10 a cross-sectional view taken along line F-F' of Figure 11B , Figure 11C and Figure 12 are Figure 11A variations of

[0182] Figure 9 shows a structure corresponding to the position of a portion D of the input sensing layer TU of Figure 6 , but in addition to the input sensing layer TU, a display layer DU below the input sensing layer TU is also shown (see Figure 8A ).

[0183] Referring to Figure 9 , as described above, the detection electrodes may be positioned in the display area DA.Figure 9 Some detection electrodes are shown positioned at the lower right corner of the display area DA. For example, a first detection electrode IE1-5 and a second detection electrode IE2-1.

[0184] The signal lines can be positioned outside the display area DA, i.e., positioned in the peripheral area NDA. Figure 9 Some signal lines are shown positioned at the lower right corner of the display area DA. For example, a first signal line SL1-1 to SL1-5 (collectively labeled as SL1 in Figure 9 ).

[0185] The electrostatic protection line ESL can be positioned outside the first signal lines SL1-1 to SL1-5. The electrostatic protection line ESL can be arranged outside the first signal lines SL1-1 to SL1-5 and the second signal lines SL2-1 to SL2-4 (see Figure 6 ), i.e., can be arranged on the outermost edge of the input sensing layer TU. The electrostatic protection line ESL can be included such that no signal is applied thereto, but a uniform constant voltage flows through.

[0186] The shielding layer 90 can be positioned outside the electrostatic protection line ESL. The shielding layer 90 can be arranged on the same layer as Figure 8A the pixel electrode 210, and can include the same material as that included in the pixel electrode 210. A driving circuit, such as a second scan driving circuit 30 (see Figure 6 ) can be below the shielding layer 90. The shielding layer 90 can include a plurality of through holes 90H. Figure 8A The planarization layer 111 of Figure 6 can be between the second scan driving circuit 30 (see

[0187] ), and the shielding layer 90, and the exhaust gas generated by the planarization layer 111 during the manufacture of the display device can be discharged through the plurality of through holes 90H. Figure 8A The anti-reflection layer 92 can be arranged above the shielding layer 90. In other embodiments, the planarization layer 111 positioned below the shielding layer 90 can include a valley structure obtained by removing a part of the planarization layer 111. The valley structure can block the introduction of impurities into the display area DA by blocking the penetration of external moisture through the outside of the planarization layer 111 corresponding to the organic insulating material. The valley structure can also reduce or prevent

[0188] the overflow of the organic encapsulation layer 320 of the thin film encapsulation layer TFE of

[0189] According to some embodiments, the crack sensing line 80 may be outside the shielding layer 90. According to some embodiments, when the display device 1 includes a transmissive unit that penetrates the substrate 100 in the display area DA and / or the peripheral area NDA, the crack sensing line 80 may sense cracks in the layers around the transmissive unit. According to other embodiments, when the display device 1 does not include a transmissive unit, the crack sensing line 80 may be omitted.

[0190] The first partition wall PW1 and the second partition wall PW2 may be positioned outside the crack sensing line 80. The first valley portion VP1 and the second valley portion VP2 may be positioned outside the first partition wall PW1 and the second partition wall PW2. The first partition wall PW1, the second partition wall PW2, the first valley portion VP1, and the second valley portion VP2 will be described in detail with reference to Figure 10 and other drawings to be described later.

[0191] Referring to Figure 10 and Figure 11A , the peripheral area NDA is on one side (e.g., outside the display area DA) of the display area DA. In the peripheral area NDA, the auxiliary partition wall PW0, the first partition wall PW1, and the second partition wall PW2 may be sequentially arranged adjacent to the display area DA. The auxiliary partition wall PW0, the first partition wall PW1, and the second partition wall PW2 may be spaced apart from each other (e.g., a predetermined distance).

[0192] In Figure 11A , the first partition wall PW1 and the second partition wall PW2 may respectively include portions 111P1 and 111P2 of the planarization layer 111, portions 112P1 and 112P2 of the pixel defining layer 112, and portions 113P1 and 113P2 of the spacer 113. However, embodiments of the present disclosure are not limited thereto.

[0193] The auxiliary partition wall PW0 may be a single layer and may be positioned on the planarization layer 111. In this case, the auxiliary partition wall PW0 may include the same material as the pixel defining layer 112 or the spacer 113. According to other embodiments, the auxiliary partition wall PW0 may be on the interlayer insulating layer 107. In this case, the auxiliary partition wall PW0 may include the same material as the planarization layer 111.

[0194] The first partition wall PW1 and the second partition wall PW2 are arranged to surround the display area DA, and can reduce or prevent the organic encapsulation layer 320 of the thin film encapsulation layer TFE from overflowing to the outside of the substrate 100. Accordingly, the organic encapsulation layer 320 can contact or can be close to the inner surface of the first partition wall PW1 facing the display area DA. In this case, the organic encapsulation layer 320 being close to the inner surface of the first partition wall PW1 can be understood as the first inorganic encapsulation layer 310 being between the organic encapsulation layer 320 and the first partition wall PW1, and the organic encapsulation layer 320 being in direct contact with the first inorganic encapsulation layer 310. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be on the first partition wall PW1 and the second partition wall PW2, and can extend toward the edge of the substrate 100.

[0195] The valley portion VP can be located outside the second partition wall PW2. According to some embodiments, the valley portion VP can include a first valley portion VP1 and a second valley portion VP2. The first valley portion VP1 and the second valley portion VP2 can be formed by removing at least a portion of the first layer 410. The first valley portion VP1 and the second valley portion VP2 can be included by forming holes (or grooves) that penetrate at least a portion of the first layer 410, or can be included by forming recesses that do not completely penetrate the first layer 410 but are formed in the first layer 410 in the direction toward the substrate 100. The first valley portion VP1 can be closer to the display area DA than the second valley portion VP2. During film formation, the first valley portion VP1 and the second valley portion VP2 can control the spreading of the second layer 420 having mobility.

[0196] According to some embodiments, the first valley portion VP1 can include a plurality of first holes H1. In other words, it can be understood that the plurality of first holes H1 form at least one row and at least one column, and the matrix of the plurality of first holes H1 forms the first valley portion VP1.

[0197] In Figure 10 compared with the first valley portion VP1, the second valley portion VP2 has an integrally connected shape. However, embodiments of the present disclosure are not limited thereto. Various embodiments regarding the shapes of the first valley portion VP1 and the second valley portion VP2 will be described in detail later with reference to Figures 14 to 21

[0198] The second layer 420 may be included to cover the entire display area DA and may partially extend into the peripheral area NDA. The second layer 420 may extend to the second partition wall PW2 to cover the auxiliary partition wall PW0, the first partition wall PW1, and the second partition wall PW2, and may not overlap with the first valley portion VP1. Accordingly, the end portion 420e of the second layer 420 may be spaced apart (e.g., a predetermined distance) from the first valley portion VP1 and may be positioned between the second partition wall PW2 and the first valley portion VP1.

[0199] In Figure 10 and subsequent drawings, the end portion 420e of the second layer 420 is spaced apart (e.g., a predetermined distance) from the first valley portion VP1. However, in some cases, at least a portion of the second layer 420 may fill at least some of the plurality of first holes H1 in the first valley portion VP1 and / or at least some of the second valley portion VP2. Even in such a case, the second layer 420 may be controlled by the first valley portion VP1 (or the second valley portion VP2). This may mean that a part or all of the second layer 420 may fill a part or all of the first valley portion VP1 (or the second valley portion VP2), but does not overflow (e.g., does not extend beyond) the first valley portion VP1 (or the second valley portion VP2) thereby.

[0200] The end portion TFEe of the thin film encapsulation layer TFE may be between the end portion 100e of the substrate 100 and the end portion 410e of the first layer 410. The end portion TFEe of the thin film encapsulation layer TFE may refer to the end portion of the first inorganic encapsulation layer 310 and / or the second inorganic encapsulation layer 330 or may correspond to the end portion of the first inorganic encapsulation layer 310 and / or the second inorganic encapsulation layer 330.

[0201] Referring Figure 11A , the first valley portion VP1 and the second valley portion VP2 may penetrate the first layer 410, and the first valley portion VP1 may include a plurality of first holes H1. The first valley portion VP1 and the second valley portion VP2 may expose at least a portion of the second inorganic encapsulation layer 330 positioned below the first layer 410.

[0202] The width W-VP1 of the first valley portion VP1 in one direction (e.g., the x direction) may be greater than the width W-VP2 of the second valley portion VP2 in the same direction (e.g., the x direction). In other words, in the x direction intersecting the y direction, the width W-VP2 of the second valley portion VP2 is less than or equal to the width W-VP1 of the first valley portion VP1. The first valley portion VP1 may be a main valley portion for controlling the spreading of the second layer 420, and the second valley portion VP2 may be an auxiliary valley portion for preparing for the case where the second layer 420 spreads over the first valley portion VP1. Therefore, since the width W-VP1 of the first valley portion VP1 is greater than the width W-VP2 of the second valley portion VP2, the function as the main valley portion can be effectively achieved.

[0203] According to some embodiments, the depth dt of each of the plurality of first holes H1 may be, for example, about 2 μm or greater (e.g., the first layer 410 may have a thickness of about 2 μm or greater). However, when the thickness of the first layer 410 is less than or equal to about 2 μm, the depth dt of each of the plurality of first holes H1 can be adjusted by forming holes or recesses in the first inorganic encapsulation layer 310 and / or the second inorganic encapsulation layer 330 located below the first layer 410. Substantially, in order for the first valley portion VP1 to control the spreading of the second layer 420, each of the plurality of first holes H1 may have a depth (e.g., a predetermined depth, or a depth greater than the predetermined depth). When the depth dt of each of the plurality of first holes H1 is less than about 2 μm, it is difficult for the first valley portion VP1 to effectively control the spreading of the second layer 420.

[0204] As Figure 11B shown, the antireflection layer PU may be disposed above Figure 11A the display panel DP (see Figure 3 ). The antireflection layer PU may be attached to the display panel DP below the antireflection layer PU through an optically transparent adhesive member OCA (see Figure 3 ). The antireflection layer PU may be, for example, a polarizer and may extend to the second valley portion VP2. As described above with reference to Figure 10 , the end portion PUe of the antireflection layer PU may overlap with the second valley portion VP2. However, the embodiments are not limited thereto, and for example, the antireflection layer PU may overlap with the display area DA, while the end portion PUe of the antireflection layer PU does not extend to the second valley portion VP2. In this case, it is sufficient that the end portion PUe of the antireflection layer PU is positioned at the boundary between the display area DA and the peripheral area NDA or on the peripheral area NDA, and various modifications are possible. According to some embodiments, the end portion PUe of the antireflection layer PU may be between the display area DA and the second valley portion VP2.

[0205] According to other embodiments, as described above with reference to Figure 8D , the color filter layer CU may be on the Figure 11A display panel DP (see Figure 3 ). Figure 11C It may correspond to the peripheral region NDA extending from the Figure 8D display area DA. When the pixel defining layer 112 and / or the spacer 113 are included as the black matrix, as described above with reference to Figure 8D , the auxiliary partition walls PW0, the first partition wall PW1, and the second partition wall PW2 arranged in the peripheral region NDA may be included as the black matrix. In this case, as shown in Figure 11C , the light-shielding material included in the pixel defining layer 112 may flow to the lower planarization layer 111, and thus, at least a part of the planarization layer 111 may become the black matrix.

[0206] As shown in Figure 12 , the display device 1 according to some embodiments may include only the first valley portion VP1. In other words, as shown in Figure 12 , the second valley portion VP2 may be omitted, and the spreading of the second layer 420 may be controlled only by the first valley portion VP1. Figure 12 The shape of the first valley portion VP1 in Figure 10 is the same as the shape of the first valley portion VP1 described above with reference to Figure 12 . However, in

[0207] with reference to Figures 11A to 12 , the second layer 420 does not overlap with the first valley portion VP1. The surface of the first layer 410 having a plurality of first holes H1 thereon is hydrophobic due to low surface energy (surface tension). This phenomenon is called the lotus effect. Since the surface of the first layer 410 is hydrophobic due to the lotus effect, the spreading of the second layer 420 can be controlled to stop in the region before reaching the first valley portion VP1 and will not overflow into the first valley portion VP1.

[0208] To increase or maximize the lotus effect, the size and configuration of the plurality of first holes H1 constituting the first valley portion VP1 serve as important factors. The size of each of the plurality of first holes H1 may be appropriately a relatively minute size less than or equal to a given size (e.g., a predetermined size), and the plurality of first holes H1 may be arranged regularly. Now, various embodiments regarding the size and configuration of the plurality of first holes H1 will be described with reference to Figures 13 to 21 .

[0209] Figure 13 is Figure 10 an enlarged plan view of a part of the display area DA and the first valley portion VP1, Figure 14is a cross-sectional view that is part of a manufacturing process corresponding to a cross-section taken along line G-G' of Figure 13 , and Figure 13 is an enlarged plan view of a part of Figure 13 . Figure 15 is Figure 13 Referring to Figure 13 , pixels Pr, Pg, and Pb can be arranged on the display area DA, and the first layer 410 can be arranged above the pixels Pr, Pg, and Pb. The first layer 410 can be arranged on the entire surface of the display area DA and can extend to the peripheral area NDA.

[0210] Referring to Figure 13 ,pixels Pr, Pg, and Pb can be arranged on the display area DA, and the first layer 410 can be arranged above the pixels Pr, Pg, and Pb. The first layer 410 can be arranged on the entire surface of the display area DA and can extend to the peripheral area NDA.

[0211] The first layer 410 can include opening patterns OPR-H, OPG-H, and OPB-H corresponding to the display area DA, and can include a first valley portion VP1 defined as a plurality of first holes H1 corresponding to the peripheral area NDA. As described above, the opening patterns OPR-H, OPG-H, and OPB-H can correspond to the pixels Pr, Pg, and Pb, respectively.

[0212] In the display area DA, the second layer 420 can cover the first layer 410, and a part of the second layer 420 can extend to the peripheral area NDA. The end 420e of the second layer 420 can be spaced apart (e.g., a predetermined distance) from the first valley portion VP1. In other words, the second layer 420 can not overlap with the first valley portion VP1.

[0213] The plurality of first holes H1 can be arranged to form at least one row in one direction (e.g., the y direction) and at least one column in another direction (e.g., the x direction) intersecting the one direction.

[0214] Referring to Figure 15 ,the plurality of first holes H1 can include a plurality of first sub-holes SH1, a plurality of second sub-holes SH2, and a plurality of third sub-holes SH3 arranged in one direction (e.g., the y direction). The plurality of first sub-holes SH1, the plurality of second sub-holes SH2, and the plurality of third sub-holes SH3 can be arranged to form a first row L1, a second row L2, and a third row L3, respectively. The plurality of first sub-holes SH1 in the first row L1, the plurality of second sub-holes SH2 in the second row L2, and the plurality of third sub-holes SH3 in the third row L3 can be spaced apart from each other in another direction (e.g., the x direction).

[0215] According to some embodiments, a plurality of first sub-holes SH1 may be spaced apart from each other at intervals of a first distance d1 in a first direction (e.g., the y direction), and a plurality of second sub-holes SH2 (e.g., corresponding apex angles of the plurality of second sub-holes SH2) may be offset by half of the first distance d1 from the plurality of first sub-holes SH1 (e.g., corresponding side angles of the plurality of first sub-holes SH1) in the first direction (e.g., the y direction). That is, while the second sub-holes SH2 may be offset from the first sub-holes SH1 in a second direction (e.g., the x direction), they may be centered relative to the first direction (e.g., the y direction) between corresponding adjacent first sub-holes SH1 among the first sub-holes SH1. The plurality of second sub-holes SH2 may correspond to regions corresponding to the distance at which the plurality of first sub-holes SH1 are spaced apart from each other (e.g., the plurality of second sub-holes SH2 may be spaced apart from each other at intervals of the first distance d1 in the first direction (e.g., the y direction)). The plurality of third sub-holes SH3 may be arranged in the same manner as the plurality of first sub-holes SH1.

[0216] In other words, assuming that the first direction (e.g., the y direction) is the row direction and the second direction (e.g., the x direction) is the column direction, the plurality of first sub-holes SH1 and the plurality of third sub-holes SH3 are arranged in the same column (e.g., the first column R1 and the second column R2), but the plurality of second sub-holes SH2 may be positioned between the columns (e.g., positioned between the first column R1 and the second column R2). Since, as described above, the plurality of second sub-holes SH2 are positioned by being offset by 1 / 2 of the first distance d1 between the plurality of first sub-holes SH1, the control region for the second layer 420 to spread migratively toward the plurality of first sub-holes SH1 can be increased, and thus the spreading of the second layer 420 can be controlled more effectively.

[0217] The second layer 420 may spread in a direction (e.g., the x direction) toward the first valley portion VP1, may be mainly controlled by the plurality of first sub-holes SH1, and may be secondly controlled by the plurality of second sub-holes SH2. According to some embodiments, the end 420e of the second layer 420 may be curved according to the shape in which the plurality of first sub-holes SH1 and the plurality of second sub-holes SH2 are arranged as Figure 15 described above.

[0218] Each of the plurality of first holes H1 may have any one of various shapes. Each of the plurality of first holes H1 may have various shapes, such as circular, oval, polygonal, and rounded polygonal. According to some embodiments, each of the plurality of first holes H1 may have a rhombus shape. In other words, the plurality of first holes H1 may have a rectangular shape, but may also have a rhombus shape. The rhombus shape means that at least one vertex of each of the plurality of first holes H1 faces the end 420e of the second layer 420. Therefore, since the portions of the plurality of first holes H1 corresponding to the vertices (rather than the edges corresponding to the sides) are arranged to face the end 420e of the second layer 420, the pressure at the end 420e of the second layer 420 can be dispersed, and thus the spreading of the second layer 420 can be controlled more effectively.

[0219] When the size of each of the plurality of first holes H1 increases (e.g., increases to a predetermined size or larger), the lotus effect may decrease, and thus the spreading of the second layer 420 may be controlled less efficiently and may overflow into the first valley portion VP1.

[0220] Therefore, according to some embodiments, assuming that each of the plurality of first holes H1 has a rhombus shape, two opposite sides may have a first width w1 between the two sides. For example, the first width w1 may be from about 1 μm to about 10 μm. In each of the plurality of first holes H1, a second width w2 between two opposite vertices may be from about 1 μm to about 15 μm. For example, if the first width w1 is about 10 μm, the second width w2 may be about 14.14 μm.

[0221] When the distance between the plurality of first holes H1 widens (e.g., widens to a predetermined distance or larger), the lotus effect may decrease.

[0222] Therefore, according to some embodiments, the plurality of first holes H1 may be spaced apart from each other at intervals of a first distance d1 in a first direction (e.g., the y direction). For example, the first distance d1 may be from about 1 μm to about 15 μm. According to some embodiments, the first width w1 of each of the plurality of first holes H1 may be less than the first distance d1 between the plurality of first holes H1.

[0223] The plurality of first holes H1 may be spaced apart from each other at a second distance d2 in a second direction (e.g., the x direction). Specifically, the first sub-hole SH1 and the third sub-hole SH3 aligned in the first column R1 may be spaced apart from each other at the second distance d2. For example, the second distance d2 may be from about 1 μm to about 15 μm.

[0224] A plurality of first holes H1 may be spaced apart from each other in a third direction (e.g., the w direction) by a third distance d3. The third direction (e.g., the w direction) may intersect both the first direction (e.g., the y direction) and the second direction (e.g., the x direction) simultaneously and may be, for example, a diagonal direction. For example, the third distance d3 may be from about 1 μm to about 10 μm.

[0225] Figure 14 Reference Figure 12 Both the display area DA and the peripheral area NDA are shown. To focus on and describe the opening pattern OPG-H and the plurality of first holes H1 formed in the first layer 410 and the second layer 420 disposed on the first layer 410, Figure 14 the illustration of other components is omitted.

[0226] To correspond to the display area DA, display elements, i.e., organic light-emitting diodes OLEDs, are disposed on the substrate 100. Organic light-emitting diodes OLEDs each including pixels Pg emitting green light are shown. The first layer 410 is above the organic light-emitting diodes OLEDs, and the first layer 410 may include opening patterns OPG-H corresponding to the organic light-emitting diodes OLEDs respectively.

[0227] The first layer 410 may extend into the peripheral area NDA and may include a first valley portion VP1 having a plurality of first holes H1 in the peripheral area NDA.

[0228] According to some embodiments, the width W-H1 of each of the plurality of first holes H1 may be less than or equal to the width W-H of each of the opening patterns OPG-H. Referring to the above Figure 7 or Figure 13 , the pixels Pr, Pg, and Pb may include a first pixel Pr emitting red light, a second pixel Pg emitting green light, and a third pixel Pb emitting blue light. The area of each second pixel Pg emitting green light may be less than the area of each first pixel Pr or each third pixel Pb. Accordingly, the opening patterns OPR-H, OPG-H, and OPB-H have dimensions corresponding to the dimensions of the pixels Pr, Pg, and Pb respectively, and the opening pattern OPG-H corresponding to the second pixel Pg emitting green light may have the smallest dimension. The width W-H1 of each of the plurality of first holes H1 may be less than or equal to the width W-H of the opening pattern OPG-H corresponding to the second pixel Pg among the opening patterns OPR-H, OPG-H, and OPB-H.

[0229] The second layer 420 may be on the first layer 410 and may be formed using, for example, Figure 14formed by the spraying method in. In other words, the second layer 420 can be formed by directly depositing the spraying material I-J onto the first layer 410. In the display device 1 according to some embodiments, the first valley portion VP1 controls the spreading of the second layer 420, thereby reducing or preventing the second layer 420 from overflowing to the edge of the substrate 100, and thus the defect rate during the spraying process can be reduced or minimized.

[0230] Figures 16 to 21 is a plan view schematically showing a part of a display device according to some embodiments. Figures 16 to 21 shows Figure 13 a modification of the example shown in.

[0231] Referring to Figure 16 , the first layer 410 may further include a second valley portion VP2 outside the first valley portion VP1. Figure 16 may correspond to Figure 10 and Figure 11A . Figure 16 The structure of is the same as that of Figure 10 and Figure 11A , and thus its redundant description will be omitted.

[0232] Figure 17 Similar to Figure 16 but different from Figure 16 in that the second valley portion VP2 includes a plurality of second holes H2 in the same manner as the first valley portion VP1. The configuration and respective shapes of the plurality of second holes H2 constituting the second valley portion VP2 may be the same as the configuration and respective shapes of the plurality of first holes H1 of the first valley portion VP1, and thus its redundant description will be omitted.

[0233] Referring to Figure 18 , the first layer 410 includes a first valley portion VP1, and the first valley portion VP1 may include a plurality of first holes H1 and a first auxiliary valley SV1. The first auxiliary valley SV1 may be continuously formed along a first direction (e.g., the y direction) substantially parallel to the end 420e of the second layer 420, and the plurality of first holes H1 are between the first auxiliary valley SV1 and the end 420e of the second layer 420.

[0234] The width W-VP11 of the plurality of first holes H1 in the second direction (e.g., the x direction) may be equal to or greater than the width (e.g., average width, maximum width, or minimum width) W-VP12 of the first auxiliary valley SV1 in the second direction (e.g., the x direction). Since the first auxiliary valley SV1 basically plays an auxiliary role in controlling the spreading of the second layer 420, the plurality of first holes H1 that play a main or dominant role in controlling the spreading of the second layer 420 may have a wider area than the first auxiliary valley SV1.

[0235] In the first auxiliary valley SV1, a first end portion SV1a of the first auxiliary valley SV1 adjacent to the plurality of first holes H1 can be bent or can have a serrated shape along the configuration of the plurality of first holes H1. Figure 17 The first end portion SV1a having an irregular shape according to the shape of the plurality of first holes H1 is shown, but the embodiment is not limited thereto.

[0236] A second end portion SV1b of the first auxiliary valley SV1 opposite to the first end portion SV1a can include a linear shape. Since the first end portion SV1a is in the direction toward the second layer 420, if the second layer 420 overflows into the plurality of first holes H1, the shape of the first end portion SV1a of the first auxiliary valley SV1 can distribute the pressure of the end portion 420e of the second layer 420.

[0237] According to other embodiments, as Figure 19 shown, both the first end portion SV1a and the second end portion SV1b of the first auxiliary valley SV1 can include a linear shape.

[0238] Figure 19 And Figure 20 Similar to Figure 18 but different from Figure 18 in that a second valley portion VP2 is further included outside the first valley portion VP1. The configuration and shape of the second valley portion VP2 are the same as the above-described configuration and the above-described shape of the second valley portion VP2 of Figure 16 and thus redundant description thereof will be omitted.

[0239] Figure 21 Similar to Figure 18 but different from Figure 18 in that a second valley portion VP2 having the same shape as the first valley portion VP1 is further included. The configuration and shape of the second auxiliary valley SV2 are the same as the above-described configuration and the above-described shape of the first auxiliary valley SV1 and thus redundant description thereof will be omitted.

[0240] Although only the display device has been described above, the embodiment is not limited thereto. For example, a display device manufactured by using a method of manufacturing a display device also belongs to the scope of the present disclosure.

[0241] According to some embodiments as described above, a display device having improved reliability by effectively controlling the spreading of the organic layer can be realized. Of course, the scope of the present disclosure is not limited thereto.

[0242] It should be understood that the embodiments described herein are to be considered in a descriptive sense only and not for purposes of limitation. The description of aspects of the disclosed embodiments should generally be considered to be applicable to other similar aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those of ordinary skill in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope defined by the appended claims, and their functional equivalents will be included therein.

Claims

1. A display device, wherein, The display device includes: a substrate including a display area and a peripheral area outside the display area; display elements at the display area; an input sensing layer above the display elements; and an optical functional layer on the input sensing layer and including a first layer corresponding to the display area and the peripheral area and a second layer on the first layer, wherein the first layer is defined with a first valley portion, and the first valley portion is defined with a plurality of first holes on the peripheral area and surrounding the second layer.

2. The display device according to claim 1, wherein, The plurality of first holes are aligned in at least one row in a first direction and in at least one column in a second direction intersecting the first direction.

3. The display device according to claim 2, wherein, The plurality of first holes include: a plurality of first sub-holes arranged in the first direction; a plurality of second sub-holes spaced apart from the plurality of first sub-holes and arranged in the first direction; and a plurality of third sub-holes spaced apart from the plurality of second sub-holes and arranged in the first direction.

4. The display device according to claim 3, wherein, The plurality of first sub-holes are spaced apart from each other at an interval of a first distance, and wherein the plurality of second sub-holes are centered between corresponding adjacent first sub-holes among the plurality of first sub-holes with respect to the first direction.

5. The display device according to claim 1, wherein, At least one of the plurality of first holes has a diamond shape.

6. The display device according to claim 5, wherein, At least one vertex of the plurality of first holes faces an end of the second layer.

7. The display device according to claim 5, wherein, A first width between two parallel sides of one of the plurality of first holes is 1 μm to 10 μm.

8. The display device according to claim 7, wherein, A second width between two opposite vertices of one of the plurality of first holes is 1 μm to 15 μm.

9. The display device according to claim 8, wherein, An adjacent pair of the plurality of first holes are spaced apart from each other at an interval of a first distance of 1 μm to 15 μm in the first direction.

10. The display device according to claim 9, wherein, The first width is less than the first distance.

11. The display device according to claim 1, wherein, The first valley portion further includes an auxiliary valley extending in the first direction, and the plurality of first holes are between the auxiliary valley and an end of the second layer.

12. The display device according to claim 11, wherein, A first end of the auxiliary valley adjacent to the plurality of first holes is curved corresponding to the shape and arrangement of the plurality of first holes.

13. The display device according to claim 12, wherein, A second end of the auxiliary valley opposite to the first end includes a straight shape.

14. The display device according to claim 1, wherein, The first layer is further defined with a second valley portion surrounding the second layer corresponding to the peripheral area and spaced apart from the first valley portion.

15. The display device according to claim 14, wherein, The second valley portion is defined with a plurality of second holes.

16. The display device according to claim 14, wherein, The second valley portion extends in the first direction.

17. The display device according to claim 16, wherein, In a second direction intersecting the first direction, a width of the second valley portion is less than or equal to a width of the first valley portion.

18. The display device according to claim 1, wherein, The display device further includes: a thin film encapsulation layer between the display elements and the input sensing layer, and the thin film encapsulation layer includes at least one organic encapsulation layer and at least one inorganic encapsulation layer, wherein the input sensing layer is directly on the thin film encapsulation layer.

19. The display device according to claim 18, wherein, The display device further includes: a partition wall surrounding the display area corresponding to the peripheral area, wherein the first valley portion surrounds the partition wall.

20. The display device according to claim 19, wherein, The second layer covers the partition wall.

21. The display device according to claim 18, wherein, The at least one inorganic encapsulation layer extends under the first layer in the peripheral area, and Among them, the plurality of first holes expose at least a part of the at least one inorganic encapsulation layer.

22. The display device according to claim 1, wherein, The first layer is further defined with an opening pattern corresponding to the display element.

23. The display device according to claim 22, wherein, The width of at least one of the plurality of first holes is less than or equal to the width of the opening pattern.

24. The display device according to claim 22, wherein, The display element includes a pixel electrode, a counter electrode opposite to the pixel electrode, and an intermediate layer between the pixel electrode and the counter electrode. Among them, the display device further includes: a pixel defining layer that covers the edge of the pixel electrode and has an opening exposing the central portion of the pixel electrode, and Among them, the width of the opening pattern is greater than the width of the opening.

25. The display device according to claim 24, wherein, The intermediate layer includes a green emission layer, and Among them, the opening pattern has the same size as a corresponding one of the plurality of first holes.

26. The display device according to claim 1, wherein, The second layer has a refractive index greater than that of the first layer.

27. The display device according to claim 26, wherein, The second layer has a refractive index of 1.6 or greater.

28. The display device according to claim 1, wherein, The depth of the plurality of first holes is 2 μm or greater.

29. The display device according to claim 1, wherein, The second layer extends toward the peripheral region and includes an end portion spaced apart from the first valley portion.

30. A display device, wherein, The display device includes: a substrate including a display region and a peripheral region outside the display region; an organic insulating layer on the substrate; and a high refractive index layer on the organic insulating layer corresponding to the display region, Among them, the organic insulating layer is defined with a first valley portion that surrounds the high refractive index layer corresponding to the peripheral region and is defined with holes, and Among them, the high refractive index layer extends toward the peripheral region and includes a portion spaced apart from the first valley portion.

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