Back-illuminated image sensor and method for manufacturing the same

Abstract

The present invention provides a back-illuminated image sensor, comprising: a pixel area substrate, an isolation structure, a first dielectric layer, a metal grid, and a second dielectric layer. Grid trenches and metal plugs are formed in the pixel area substrate, and the isolation structure is located in the grid trenches and on the surface of the pixel area substrate between the grid trenches; wherein the isolation structure comprises: a high-K dielectric layer, an insulating layer, and a metal inner core layer. The present application also provides a manufacturing method for a back-illuminated image sensor. The present application adds the metal inner core layer to the isolation structure, and by applying a negative bias voltage to the metal inner core layer, effective isolation of photo-generated electrons and / or noise electrons in each pixel area substrate region between the grid trenches is achieved, the crosstalk resistance of the device is improved, and the image quality is improved.

Description

Technical Field

[0001] This application relates to the technical field of semiconductor devices, and particularly to a back-illuminated image sensor and a manufacturing method thereof. Background Art

[0002] In a back-illuminated image sensor (BSI CIS), especially in an ultra-thin stacked image sensor (UTS CIS), there are problems of electronic crosstalk and optical crosstalk between pixel units. Currently, in order to reduce the electronic and optical crosstalk between pixel arrays, deep trench isolation (DTI) can be performed on pixel units. Specifically, a high dielectric constant (High K) material is filled in the deep trench to form a barrier to isolate the photo-generated electrons or noise electrons generated between pixel arrays.

[0003] However, as the market demand for the pixels of back-illuminated image sensors is getting higher and higher, and the size of the sensor module needs to be continuously reduced, the size of a single pixel unit needs to be continuously reduced. Under the same process, the full well capacity (FWC) of a single pixel also decreases accordingly, and the signal-to-noise ratio degradation caused by electronic crosstalk becomes more and more serious. The solution of using a high dielectric constant (High K) material to fill the deep trench to form an isolation barrier can no longer solve the problems of electronic crosstalk and optical crosstalk. Therefore, new designs and processes are needed to improve the crosstalk resistance and image pixels of back-illuminated image sensors. Summary of the Invention

[0004] This application provides a back-illuminated image sensor and a manufacturing method thereof, which can solve the problems of electronic crosstalk and optical crosstalk of the back-illuminated image sensor.

[0005] On the one hand, an embodiment of this application provides a back-illuminated image sensor, including:

[0006] A pixel area substrate, in which grid trenches and a plurality of through holes located on the sides of the grid trenches are respectively formed, and metal plugs are formed in the through holes;

[0007] An isolation structure, which is located in the grid trenches and on the surface of the pixel area substrate between the grid trenches;

[0008] A first dielectric layer, which is located on the isolation structure and the metal plugs;

[0009] A metal grid, which is located on the first dielectric layer on the surface of the isolation structure; and,

[0010] A second dielectric layer, which is located on the metal grid;

[0011] Wherein, the isolation structure includes: a high-K dielectric layer, an insulating layer, and a metal inner core layer. The high-K dielectric layer covers the bottom wall and side walls of the grid trench and the surface of the pixel area substrate between the grid trenches. The insulating layer covers the high-K dielectric layer, and the metal inner core layer is located on the insulating layer in the grid trench.

[0012] Optionally, on the back-illuminated image sensor, the back-illuminated image sensor further includes: a metal interconnection structure. The metal interconnection structure is located on any one of the metal plugs and is connected to any grid point of the metal grid, and the grid point connected to the metal interconnection structure is completely disconnected from the remaining part of the metal grid.

[0013] Optionally, on the back-illuminated image sensor, the back-illuminated image sensor further includes: a metal buffer layer. The metal buffer layer is located between the grid point and the metal inner core layer. Wherein, through the metal interconnection structure, the grid point, and the metal buffer layer, the metal plug and the metal inner core layer are electrically connected.

[0014] Optionally, on the back-illuminated image sensor, the metal inner core layer is in a grid shape, and the upper surface of the metal inner core layer is flush with the upper surface of the insulating layer between the grid trenches.

[0015] Optionally, on the back-illuminated image sensor, the back-illuminated image sensor further includes: a barrier layer. The barrier layer covers the surface of the substrate around the grid trench.

[0016] Optionally, on the back-illuminated image sensor, the isolation structure further includes: an anti-reflection layer. The anti-reflection layer is located between the high-K dielectric layer and the insulating layer.

[0017] Optionally, on the back-illuminated image sensor, the back-illuminated image sensor further includes: a logic area substrate. The logic area substrate is located on the surface of the pixel area substrate away from the metal grid, and the through hole extends from the pixel area substrate into the logic area substrate.

[0018] On the other hand, an embodiment of the present application provides a manufacturing method of a back-illuminated image sensor, including:

[0019] Providing a pixel area substrate, in which a grid trench and a plurality of through holes located on the side of the grid trench are respectively formed, and a metal plug is formed in the through hole;

[0020] Forming an isolation structure on the surface of the pixel area substrate in the grid trench and between the grid trenches;

[0021] A first dielectric layer is formed on the isolation structure, on the metal plugs, and on the remaining surface of the pixel region substrate;

[0022] A metal material layer and a second dielectric layer are sequentially formed on the first dielectric layer; and,

[0023] The second dielectric layer, the metal material layer, and a part of the first dielectric layer with a certain thickness are etched to form a metal grid on the first dielectric layer on the surface of the isolation structure;

[0024] Wherein, the step of forming the isolation structure includes:

[0025] A high-K dielectric layer is formed on the bottom wall and side walls of the grid trench and on the surface of the pixel region substrate between the grid trenches;

[0026] An insulating layer is formed on the high-K dielectric layer;

[0027] A metal filling layer is formed on the insulating layer;

[0028] The metal filling layer between the grid trenches is etched away to obtain a metal inner core layer in the grid trenches.

[0029] Optionally, in the manufacturing method of the back-illuminated image sensor, while etching the second dielectric layer, the metal material layer, and a part of the first dielectric layer with a certain thickness to form a metal grid, the second dielectric layer, the metal material layer, and a part of the first dielectric layer with a certain thickness are etched to form a metal interconnect structure on any one of the metal plugs, wherein the metal interconnect structure is connected to any grid point of the metal grid, and the grid point connected to the metal interconnect structure is completely disconnected from the remaining part of the metal grid.

[0030] Optionally, in the manufacturing method of the back-illuminated image sensor, while etching away the metal filling layer between the grid trenches to obtain a metal inner core layer in the grid trenches, a part of the metal filling layer between the grid trenches or at the edge of the grid trenches is retained to form a metal cushion layer, wherein the metal plug and the metal inner core layer are electrically connected through the metal interconnect structure, the grid point, and the metal cushion layer.

[0031] The technical solution of the present application has at least the following advantages:

[0032] In the present application, an isolation structure is formed on the surface of the pixel area substrate in and between the grid trenches. The isolation structure includes: a high-K dielectric layer, an insulating layer, and a metal core layer, and the metal core layer is connected to the metal plug in the through hole. By applying a certain bias voltage to the metal core layer, the present invention isolates the photo-generated electrons and / or noise electrons in each pixel area substrate region between the grid trenches, avoiding the crosstalk of the photo-generated electrons and / or noise electrons in each pixel area substrate region, improving the anti-crosstalk ability of the back-illuminated image sensor, enhancing the imaging color vividness of the image sensor, improving the image pixels, and improving the image quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0034] Figures 1 - 9 It is a schematic diagram of a semiconductor structure in each process step of manufacturing a back-illuminated image sensor according to an embodiment of the present invention;

[0035] Among them, the reference numerals are explained as follows:

[0036] 10 - Pixel area substrate, 11 - First bonding layer, 12 - Through hole, 121 - Metal plug, 122 - First lead solder joint, 13 - Grid trench, 14 - First opening, 15 - Isolation structure, 151 - High-K dielectric layer, 152 - Insulating layer, 153 - Metal filling layer, 154 - Metal core layer, 155 - Metal lining layer, 16 - Barrier layer, 17 - First dielectric layer, 171 - Second opening, 172 - Third opening, 173 - Fourth opening, 18 - Metal material layer, 181 - Metal grid, 1811 - Any grid point of the metal grid, 1812 - Remaining part of the metal grid, 182 - Metal interconnection structure, 183 - Second lead solder joint, 19 - Second dielectric layer;

[0037] 20 - Logic area substrate, 21 - Second bonding layer. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0038] The following will clearly and completely describe the technical solutions in the present application with reference to the drawings. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0039] In the description of the present application, it should be noted that the orientation or positional relationship indicated by terms such as "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present application. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0040] In the description of the present application, it should be noted that unless otherwise clearly specified and limited, the terms "mount", "connect", "couple" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and can also be the communication inside two elements. It can be a wireless connection or a wired connection. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific situations.

[0041] In addition, the technical features involved in different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0042] An embodiment of the present application provides a method for manufacturing a back-illuminated image sensor. The method for manufacturing the back-illuminated image sensor mainly includes:

[0043] The first step: providing a pixel region substrate, in which grid trenches and a plurality of through holes located on the sides of the grid trenches are respectively formed, and metal plugs are formed in the through holes;

[0044] The second step: forming an isolation structure on the surface of the pixel region substrate in the grid trenches and between the grid trenches;

[0045] The third step: forming a first dielectric layer on the isolation structure, on the metal plugs, and on the remaining surface of the pixel region substrate;

[0046] The fourth step: sequentially forming a metal material layer and a second dielectric layer on the first dielectric layer; and,

[0047] The fifth step: etching the metal material layer to form a metal grid on the first dielectric layer on the surface of the isolation structure.

[0048] Specifically, please refer to Figures 1 - 9 , Figures 1 - 9 which is a schematic diagram of the semiconductor structure in each process step of manufacturing the back-illuminated image sensor according to the embodiment of the present invention.

[0049] First, please refer to Figure 1 to provide a pixel area substrate 10, in which a grid trench 13, a plurality of through holes 12 located on the side of the grid trench 13, and a first opening 14 are respectively formed. Specifically, before etching the pixel area substrate 10 to form the grid trench 13 and the through hole 12, the following steps are further included: forming a first bonding layer 11 on the pixel area substrate 10; providing a logic area substrate 20, and forming a second bonding layer 21 on the logic area substrate 20; bonding the pixel area substrate 10 and the logic area substrate 20 together by using a van der Waals force bonding process through the first bonding layer 11 and the second bonding layer 21; thinning the surface of the pixel area substrate 10 away from the first bonding layer 11.

[0050] In this embodiment, subsequent processes on the pixel area substrate 10 are all performed on the surface of the thinned pixel area substrate 10 away from the first bonding layer 11. The pixel area substrate 10 can be one of single crystal silicon, polycrystalline silicon, amorphous silicon, etc., the pixel area substrate 10 can also be gallium arsenide, silicon gallium compound, etc., and the pixel area substrate 10 can also have a silicon-on-insulator or epitaxial layer-on-silicon structure; the pixel area substrate 10 can also be other semiconductor materials, which will not be listed one by one here. Further, the grid trench 13 can be understood as being formed by vertically arranging a plurality of first deep trenches and a plurality of second deep trenches. The first opening 14 is used to form a first lead solder joint 122 subsequently. Further, the through hole 12 is a through silicon via (TSV), and the pixel area substrate 10, the first bonding layer 11, and the second bonding layer 22 are etched to form the through hole 12, so that the through hole 12 extends from the pixel area substrate 10 into the logic area substrate 20. Subsequently, the through hole 12 is filled with a metal material to form a metal plug 121, and the metal plug 121 is used to connect the respective metal layers in the pixel area substrate 10 and the logic area substrate 20.

[0051] Next, please refer to Figure 2 and Figure 3 to form an isolation structure 15 on the surface of the pixel area substrate 10 in the grid trench 13 and between the grid trenches 13. Specifically, forming the isolation structure 15 mainly includes four steps:

[0052] 1) Form a high-K dielectric layer 151 on the bottom wall and side walls of the grid trench 13 and the surface of the pixel area substrate 10 between the grid trenches 13;

[0053] 2) Form an insulating layer 152 on the high-K dielectric layer 151;

[0054] 3) Form a metal filling layer 153 on the insulating layer 152; and,

[0055] 4) Etch and remove the metal filling layer 153 between the grid trenches 13 to obtain a metal inner core layer 154 in the grid trenches 13.

[0056] Among them, please refer to Figure 4 , Figure 4 is a top view of the isolation structure 15, and the metal inner core layer 154 is in a grid shape. When forming the metal inner core layer 154, it also includes back-etching a part of the thickness of the metal filling layer 153 on the grid trenches 13. The present invention needs to ensure that the upper surface of the metal inner core layer 154 is flush with the upper surface of the insulating layer 152 between the grid trenches 130. The size of the metal filling layer 153 in width can be 100 Å to 2000 Å. The metal filling layer 153 can be a metal material such as aluminum or tungsten. The insulating layer 152 can be silicon dioxide. The thickness of the high-K dielectric layer 151 and the thickness of the insulating layer 152 are set according to specific actual situations, and the present invention does not limit the thickness of the high-K dielectric layer 151 and the thickness of the insulating layer 152. In this application, the isolation structure 15 including the high-K dielectric layer 151, the insulating layer 152, and the metal inner core layer 154 is formed on the surface of the pixel region substrate 10 between the grid trenches 13 and between the grid trenches 13. Subsequently, a certain negative bias voltage is applied to the metal inner core layer 154, so as to isolate the photo-generated electrons and / or noise electrons in each pixel region substrate area (each pixel unit) between the grid trenches 13 by using the metal inner core layer 154, and avoid the crosstalk of the photo-generated electrons and / or noise electrons in each pixel unit, thereby improving the anti-crosstalk ability of the back-illuminated image sensor.

[0057] Preferably, after forming the high-K dielectric layer 151 and before forming the insulating layer 152, it further includes a step of depositing an anti-reflection layer (not shown) on the high-K dielectric layer 151, and the anti-reflection layer covers the high-K dielectric layer 151.

[0058] Furthermore, as Figure 3 shown, when etching and removing the metal filling layer 153 between the grid trenches 13 to obtain a metal inner core layer 154 in the grid trenches, a part of the metal filling layer 153 between the grid trenches 13 or at the edge of the grid trenches 13 is retained to form a metal padding layer 155. As can be seen from Figure 4 , the metal padding layer 155 is connected to the metal inner core layer 154.

[0059] Preferably, during the process of forming the isolation structure 15, metal materials such as aluminum or tungsten are also correspondingly filled in the through holes 12, so as to form metal plugs 121 in the through holes 12, and a barrier layer 16 is formed on the through holes 12. The barrier layer 16 can be silicon nitride. During the process of forming the isolation structure 15, the metal filling layer 153 is also correspondingly deposited in the first opening 14, and a first lead solder joint 122 is formed through an etching-back process. The first lead solder joint 122 is used for subsequent packaging to connect to an external circuit.

[0060] Then, referring to Figure 5 , a first dielectric layer 17 is formed on the isolation structure 15, the metal plugs 121, and the remaining pixel area substrate surface 10. Specifically, the first dielectric layer 17 can be silicon dioxide. In this embodiment, the first dielectric layer 17 can be grown by a CVD process, and the thickness of the first dielectric layer 17 can be 0.5 μm to 2 μm. As Figure 5 shown, the first dielectric layer 17 covers the insulating layer 152, the metal inner core layer 154, the barrier layer 16, and fills the first opening 14 (i.e., covers the first lead solder joint 122).

[0061] Further, referring to Figure 6 , after forming the first dielectric layer 17, some photolithography and etching processes are also required in this embodiment, which are: etching the first dielectric layer 17 and the barrier layer 16 to form a second opening 171 on the metal plugs 121; etching the first dielectric layer 17 to form a third opening 172 on the metal pad layer 155; etching the first dielectric layer 17, the insulating layer 152, and the high-K dielectric layer 151 to form a fourth opening 173 on the surface of the pixel area substrate 10 around the isolation structure 15. Among them, during the process of forming different openings above, etching the first dielectric layer 17 can be completed in one etching process.

[0062] Further, referring to Figure 7 , a metal material layer 18 and a second dielectric layer 19 are sequentially formed on the first dielectric layer 17. The metal material layer 18 fills the second opening 171, the third opening 172, and the fourth opening 173 and covers the first dielectric layer 17. The material of the metal material layer 18 is a metal such as aluminum or tungsten, and the material of the second dielectric layer 19 can be silicon dioxide. The thickness of the metal material layer 18 can be 0.5 μm to 1 μm. The thickness of the second dielectric layer 19 can be 1 μm to 2 μm. Filling / depositing the metal material layer 18 in the fourth opening 173 is for forming a second lead solder joint 183 subsequently. The second lead solder joint 183 is a ground (BSGND) structure.

[0063] Finally, referring to Figure 8 and Figure 9 , Figure 8 is a top view of the back-illuminated image sensor, Figure 9 is a cross-sectional view of the AA plane of the back-illuminated image sensor. The second dielectric layer 19, the metal material layer 18, and a part of the thickness of the first dielectric layer 17 are etched to form a metal grid 181 on the first dielectric layer 17 on the surface of the isolation structure 15. Specifically, referring to Figure 8 , while etching away the second dielectric layer 19, the metal material layer 18, and a part of the thickness of the first dielectric layer 17 between the grid trenches 13 to form the metal grid 181, the metal material layer 18 is etched so that any grid point 1811 of the metal grid is completely disconnected from the remaining part 1812 of the metal grid, and the metal material layer 18 is etched to form a metal interconnect structure 182 on the surface of any one of the metal plugs 121. In this embodiment, taking the grid point 1811 at the vertex position of the metal grid 18 and the first metal plug 121 in a row of the metal plugs 121 as an example, the metal interconnect structure 182 on the first metal plug 121 is connected to the grid point 1811 at the vertex position of the metal grid 18. Since the grid point 1811 connected to the metal interconnect structure 182 is completely disconnected from the remaining part 1812 of the metal grid, the metal interconnect structure 182 is completely disconnected from the remaining part 1812 of the metal grid, and there is no electrical connection relationship. Among them, through the metal interconnect structure 182, the grid point 1811, and the metal cushion layer 155, the metal plug 121 and the grid-shaped metal inner core layer 154 are electrically connected. The second lead solder joint 183 formed in the fourth opening 173 is electrically connected to the metal grid 181, and this second lead solder joint 183 (grounding structure) is used for grounding the metal grid 181 during the operation of the device.

[0064] In this application, an isolation structure 15 including a high-K dielectric layer 151, an insulating layer 152, and a metal inner core layer 154 is formed on the surface of the pixel region substrate 10 in the grid trenches 13 and between the grid trenches 13, and the metal inner core layer 154 is electrically connected to the metal plug 121. By applying a certain negative bias voltage to the metal interconnect structure 182, that is, applying a certain negative bias voltage to the metal inner core layer 154 in the internal isolation structure 15, the metal inner core layer 154 is used to isolate the photo-generated electrons and / or noise electrons in each pixel region substrate 10 region (each pixel unit) between the grid trenches 13, avoiding the crosstalk of the photo-generated electrons and / or noise electrons in each pixel unit, improving the anti-crosstalk ability of the back-illuminated image sensor, enhancing the imaging color vividness of the image sensor, improving the image pixels, and improving the image quality.

[0065] Further, in the process of etching away the second dielectric layer 19, the metal material layer 18, and a partial thickness of the first dielectric layer 17 between the grid trenches 13 to form the metal grid 181, a re-etch process may also be performed on the first dielectric layer 17 to expose the first lead solder joint 122.

[0066] Based on the same inventive concept, an embodiment of the present application also provides a back-illuminated image sensor. Refer to Figure 9 , the back-illuminated image sensor includes:

[0067] A pixel area substrate 10, in which grid trenches 13 and a plurality of through holes 12 located on the sides of the grid trenches 13 are respectively formed, and metal plugs 121 are formed in the through holes 12;

[0068] An isolation structure 15, which is located in the grid trenches 13 and on the surface of the pixel area substrate 10 between the grid trenches 13;

[0069] A first dielectric layer 17, which is located on the isolation structure 15 and the metal plugs 121;

[0070] A metal grid 181, which is located on the first dielectric layer 17 on the surface of the isolation structure 15; and,

[0071] A second dielectric layer 19, which is located on the metal grid 181.

[0072] Further, the isolation structure 15 includes: a high-K dielectric layer 151, an insulating layer 152, and a metal inner core layer 154. The high-K dielectric layer 151 covers the bottom wall and side walls of the grid trenches 13 and the surface of the pixel area substrate 10 between the grid trenches 13. The insulating layer 152 covers the high-K dielectric layer 151, and the metal inner core layer 154 is located on the insulating layer 152 in the grid trenches 13.

[0073] Preferably, the back-illuminated image sensor may further include: a barrier layer 16, which covers the surface of the substrate around the grid trenches 13, including covering the surface of the metal plugs 121.

[0074] In this embodiment, the back-illuminated image sensor further includes: a logic area substrate 20, which is located on the surface of the pixel area substrate 10 far from the metal grid 181, and the through holes 12 extend from the pixel area substrate 10 into the logic area substrate 20.

[0075] Preferably, the back-illuminated image sensor further includes: a metal interconnect structure 182, the metal interconnect structure 182 is located on any one of the metal plugs and is connected to any grid point 1811 of the metal grid, and the grid point 1811 connected to the metal interconnect structure 182 is completely disconnected from the remaining part 1812 of the metal grid.

[0076] The back-illuminated image sensor further includes: a metal liner layer 155, the metal liner layer 155 is located between any grid point 1811 of the metal grid and the metal inner core layer 155, wherein, through the metal interconnect structure 182, the grid point 1811 and the metal liner layer 155, a specific metal plug 121 located under the metal interconnect structure 182 and the metal inner core layer 154 are electrically connected.

[0077] Obviously, the above embodiments are only examples given for clear illustration and are not limitations on the implementation manners. For those of ordinary skill in the art, other different forms of changes or variations can be made based on the above description. It is not necessary and impossible to enumerate all the implementation manners here. And the obvious changes or variations derived therefrom are still within the protection scope of the present invention.

Claims

1. A back-illuminated image sensor, characterized in that, Including: A pixel region substrate, in which grid trenches and a plurality of through holes located on the sides of the grid trenches are respectively formed, and metal plugs are formed in the through holes; An isolation structure, which is located on the surface of the pixel region substrate in the grid trenches and between the grid trenches; A first dielectric layer, which is located on the isolation structure and the metal plugs; A metal grid, which is located on the first dielectric layer on the surface of the isolation structure; And, A second dielectric layer, which is located on the metal grid; Wherein, the isolation structure includes: a high-K dielectric layer, an insulating layer, and a metal core layer. The high-K dielectric layer covers the bottom wall and side walls of the grid trenches and the surface of the pixel region substrate between the grid trenches. The insulating layer covers the high-K dielectric layer, and the metal core layer is located on the insulating layer in the grid trenches; Wherein, the back-illuminated image sensor further includes: a metal interconnection structure, which is located on any one of the metal plugs and is connected to any grid point of the metal grid, and the grid point connected to the metal interconnection structure is completely disconnected from the remaining part of the metal grid.

2. The back-illuminated image sensor according to claim 1, wherein The back-illuminated image sensor further includes: a metal cushion layer, which is located between the grid point and the metal core layer. Wherein, through the metal interconnection structure, the grid point, and the metal cushion layer, the metal plug and the metal core layer are electrically connected.

3. The back-illuminated image sensor according to claim 1, characterized in that, The metal core layer is in a grid shape, and the upper surface of the metal core layer is flush with the upper surface of the insulating layer between the grid trenches.

4. The back-illuminated image sensor according to claim 1, wherein The back-illuminated image sensor further includes: a barrier layer, which covers the surface of the substrate around the grid trenches.

5. The back-illuminated image sensor according to claim 1, wherein, The isolation structure further includes: an anti-reflection layer, which is located between the high-K dielectric layer and the insulating layer.

6. The back-illuminated image sensor according to claim 1, wherein The back-illuminated image sensor further includes: a logic region substrate, which is located on the surface of the pixel region substrate far from the metal grid, and the through holes extend from the pixel region substrate into the logic region substrate.

7. A manufacturing method of a back-illuminated image sensor, characterized in that, Including: Providing a pixel region substrate, in which grid trenches and a plurality of through holes located on the sides of the grid trenches are respectively formed, and metal plugs are formed in the through holes; Forming an isolation structure on the surface of the pixel region substrate in the grid trenches and between the grid trenches; Forming a first dielectric layer on the isolation structure, the metal plugs, and the remaining surface of the pixel region substrate; Sequentially forming a metal material layer and a second dielectric layer on the first dielectric layer; and, Etching the second dielectric layer, the metal material layer, and a part of the thickness of the first dielectric layer to form a metal grid on the first dielectric layer on the surface of the isolation structure; Wherein, the step of forming the isolation structure includes: Forming a high-K dielectric layer on the bottom wall and side walls of the grid trenches and the surface of the pixel region substrate between the grid trenches; Forming an insulating layer on the high-K dielectric layer; Forming a metal filling layer on the insulating layer; Etch away the metal filling layer between the grid trenches to obtain a metal core layer in the grid trenches; Wherein, while etching the second dielectric layer, the metal material layer, and a part of the thickness of the first dielectric layer to form a metal grid, the second dielectric layer, the metal material layer, and a part of the thickness of the first dielectric layer are etched to form a metal interconnect structure on any one of the metal plugs, wherein the metal interconnect structure is connected to any lattice point of the metal grid, and the lattice point connected to the metal interconnect structure is completely disconnected from the remaining part of the metal grid.

8. The manufacturing method of the back-illuminated image sensor according to claim 7, characterized in that, While etching away the metal filling layer between the grid trenches to obtain a metal core layer in the grid trenches, a part of the metal filling layer between the grid trenches or at the edge of the grid trenches is retained to form a metal cushion layer, wherein through the metal interconnect structure, the lattice point, and the metal cushion layer, the metal plug and the metal core layer are electrically connected.

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