Simplified transform codec tools

Abstract

Apparatus, systems and methods for digital video coding and decoding, including using multiple transforms, are described. In one representative aspect, a method for video processing includes: selecting a common transform as a vertical transform and a horizontal transform as part of a multiple transform selection (MTS) process, and applying the vertical transform and the horizontal transform to the current block as part of performing a conversion between the current block of video and a bitstream representation of the video.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is filed in a timely manner, in accordance with applicable patent laws and / or implementing regulations regarding the Paris Convention, to claim the priority and benefits of International Patent Application No. PCT / CN2019 / 090261 filed on June 6, 2019 and International Patent Application No. PCT / CN2019 / 101793 filed on August 21, 2019. For all purposes prescribed by law, the entire disclosure of the above-mentioned application is incorporated herein by reference as part of the disclosure of this application. Technical Field

[0003] This patent document relates to video encoding and decoding technologies, devices and systems. Background Art

[0004] Despite advances in video compression, digital video remains the largest bandwidth used on the Internet and other digital communications networks. As the number of connected user devices capable of receiving and displaying video increases, bandwidth requirements for digital video use are expected to continue to grow. Summary of the invention

[0005] Devices, systems and methods related to digital video coding are described, and in particular, multiple transform methods for video coding are described. The described methods can be applied to existing video coding standards (e.g., High Efficiency Video Codec (HEVC)) and future video coding standards (e.g., Versatile Video Codec (VVC)) or codecs.

[0006] In yet another representative aspect, the disclosed technology can be used to provide an example method of video processing, the method comprising: selecting a common transform as a vertical transform and a horizontal transform as part of a multiple transform selection (MTS) process, and applying the vertical transform and the horizontal transform to the current block as part of performing a conversion between the current block of video and a bitstream representation of the video.

[0007] In yet another representative aspect, the disclosed technology can be used to provide an example method of video processing. The method includes: as part of a multiple transform selection (MTS) process, selecting one or more transforms that do not include a discrete sine transform of type VIII (DST-VIII) for a current block of a video; and as part of performing a conversion between the current block and a bitstream representation of the video, based on the current block being decoded using a sub-block transform (SBT) codec, applying the one or more transforms to the current block.

[0008] In another representative aspect, the disclosed technology can be used to provide an example method of video processing. The method includes: as part of MTS processing, selecting a vertical transform and a horizontal transform for a current block of a video, wherein the current block is encoded and decoded using a sub-block transform (SBT) based on a transform block (TB) having a size smaller than a current block, wherein the TB has a height (H) and a width (W), and wherein H and W are positive integers; and based on the selection, performing a conversion between the current block and a bitstream representation of the video.

[0009] In another representative aspect, the disclosed technology can be used to provide an example method of video processing. The method includes: for a current block of a video, based on one or more messages signaled in a bitstream representation of the video, making a decision about applying transform coefficient zeroing processing, and performing conversion between the current block and the bitstream representation based on the decision, wherein the one or more messages are signaled in a video parameter set (VPS), a sequence parameter set (SPS), a picture parameter set (PPS), an adaptation parameter set (APS), a decoder parameter set (DPS), a slice header, a picture header, a sequence header, a slice group header, a slice, a codec tree unit (CTU) row, a CTU, a codec unit (CU), a prediction unit (PU), or a transform unit (TU).

[0010] In another representative aspect, the disclosed technology can be used to provide an example method of video processing, the method comprising, for a current block of video, making a decision about applying transform coefficient zeroing based on the size and type of the transform, and performing a conversion between the current block and a bitstream representation based on the decision.

[0011] In yet another representative aspect, the disclosed technology can be used to provide an example method of video processing, the method comprising, for a current block of video, making a decision about applying transform coefficient zeroing based on an implicit transform of a multiple transform selection (MTS) process, and performing a conversion between the current block and a bitstream representation based on the decision, wherein the implicit MTS process comprises using characteristics of the current block to determine a transform to use during the conversion.

[0012] In yet another representative aspect, the above method is embodied in the form of processor executable code and stored in a computer readable program medium.

[0013] In yet another representative aspect, a device configured or operable to perform the above method is disclosed. The device may include a processor programmed to implement the method.

[0014] In yet another representative aspect, a video decoder device may implement the methods described herein.

[0015] The above and other aspects and features of the disclosed technology are described in more detail in the drawings, the description and the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 An example of a codec block diagram is shown.

[0017] Figure 2 Examples of 67 intra prediction modes are shown.

[0018] Figure 3A and 3B An example of reference samples for wide-angle intra prediction mode for a non-square block is shown.

[0019] Figure 4 An example of discontinuity when using wide angle intra prediction is shown.

[0020] Figures 5A-5D An example of samples used by the Position Dependent Intra Prediction Combining (PDPC) method is shown.

[0021] Figure 6 Examples of partitioning into 4x8 and 8x4 blocks are shown.

[0022] Figure 7 Examples of partitioning of all blocks except 4×8, 8×4, and 4×4 are shown.

[0023] Figure 8 An example of dividing a block of 4×8 samples into two independently decodable regions is shown.

[0024] Fig. 9 An example of a processing order for pixel rows that maximizes throughput for a 4xN block using vertical prediction values ​​is shown.

[0025] Fig.10 An example of a secondary transform of JEM is shown.

[0026] Fig.11 An example of the proposed simplified quadratic transform (RST) is shown.

[0027] Fig.12 Examples of forward and inverse simplification transforms are shown.

[0028] Fig.13 An example of forward RST 8×8 processing with a 16×48 matrix is ​​shown.

[0029] Fig.14 An example is shown where positions 17 to 64 are scanned in an 8x8 block for non-zero elements.

[0030] Fig.15 Examples of sub-block transform modes SBT-V and SBT-H are shown

[0031] Fig.16A and16B An example of coefficient encoding and decoding based on the scan area is shown.

[0032] Figures 17A-17F A flow chart illustrating an example method of video processing is shown.

[0033] Fig.18 is a block diagram of an example of a hardware platform for implementing the visual media decoding or visual media encoding techniques described in this document.

[0034] Fig.19 is a block diagram of an example video processing system in which the disclosed techniques may be implemented. DETAILED DESCRIPTION

[0035] 1 Introduction

[0036] Video coding methods and techniques are ubiquitous in modern technology due to the growing demand for higher resolution video. Video codecs typically include electronic circuits or software that compress or decompress digital video and are constantly being improved to provide higher codec efficiency. Video codecs convert uncompressed video to a compressed format and vice versa. There is a complex relationship between video quality, the amount of data used to represent the video (determined by the bitrate), the complexity of the encoding and decoding algorithms, sensitivity to data loss and errors, ease of editing, random access, and end-to-end delay (latency). The compression format usually conforms to a standard video compression specification, such as the High Efficiency Video Codec (HEVC) standard (also known as H.265 or MPEG-H Part 2), the yet-to-be-finalized Versatile Video Codec (VVC) standard, or other current and / or future video codec standards.

[0037] Embodiments of the disclosed technology can be applied to existing video codec standards (e.g., HEVC, H.265) and future standards to improve runtime performance. Section headings are used in this document to improve the readability of the description and do not in any way limit the discussion or embodiments (and / or implementations) to only the corresponding sections.

[0038] 2. Implementation and Examples of Multiple Transformation Methods

[0039] 2.1 Color Space and Chroma Subsampling

[0040] A color space, also called a color model (or color system), is an abstract mathematical model that simply describes the range of colors as a tuple of numbers, usually 3 or 4 values ​​or color components (such as RGB). Fundamentally, a color space is a refinement of coordinate systems and subspaces.

[0041] For video compression, the most commonly used color spaces are YCbCr and RGB.

[0042] YCbCr, Y'CbCr, or Y Pb / Cb Pr / Cr, also known as YCBCR or Y'CbCr, is a family of color spaces used as part of the color image pipeline in video and digital photography systems. Y' is the luminance component, CB and CR are the blue difference and red difference chrominance components. Y' (with primaries) is different from Y (luminance), which means that the light intensity is non-linearly encoded and decoded based on the gamma-corrected RGB primaries.

[0043] Chroma subsampling is the practice of encoding an image at a lower resolution for chroma information than for luminance information, taking advantage of the fact that the human visual system is less sensitive to color differences than to brightness.

[0044] 4:4:4 format. Each of the three Y'CbCr components has the same sample rate, so there is no chroma subsampling. This scheme is sometimes used in high-end film scanners and film post-production.

[0045] 4:2:2 format. The two chroma components are sampled at half the luma sampling rate: the horizontal chroma resolution is halved. This reduces the bandwidth of the uncompressed video signal by one third, with little visible difference

[0046] 4:2:0 format. In 4:2:0, the horizontal sampling is doubled compared to 4:1:1, but since in this scheme the Cb and Cr channels are sampled only on every alternate line, the vertical resolution is halved. Hence the data rate is the same. Cb and Cr are subsampled by a factor of 2 both horizontally and vertically. There are three variants of the 4:2:0 scheme with different horizontal and vertical positions.

[0047] In MPEG-2, Cb and Cr are located at the same position in the horizontal direction. Cb and Cr are located between pixels in the vertical direction (in the gap).

[0048] o In JPEG / jif, H.261, and MPEG-1, Cb and Cr are located in the gaps, in the middle of alternating luminance samples.

[0049] In 4:2:0 DV, Cb and Cr are located in the same position horizontally. In the vertical direction, they are located on alternating lines.

[0050] 2.2 Encoding and decoding process of typical video codecs

[0051] Figure 1An example of a VVC codec block diagram is shown, which contains three in-loop filtering blocks: deblocking filter (DF), sample adaptive offset (SAO) and ALF. Unlike DF, which uses a predefined filter, SAO and ALF use the original samples of the current picture to reduce the mean square error between the original and reconstructed samples by adding an offset and by applying a finite impulse response (FIR) filter, respectively, where the codec's side information signals the offset and filter coefficients. ALF is located at the last processing stage for each picture and can be seen as a tool that tries to catch and repair artifacts created by previous stages.

[0052] 2.3 Intra-mode codec with 67 intra-prediction modes

[0053] To capture arbitrary edge orientations present in natural videos, the number of directional intra modes is extended from the 33 used by HEVC to 65. The additional directional modes are Figure 2 The directional intra prediction modes are depicted as red dot arrows in , and the planar and DC modes remain the same. These dense directional intra prediction modes apply to all block sizes and both luma and chroma intra prediction.

[0054] like Figure 1 As shown, the traditional angular intra prediction direction is defined as from 45 degrees to -135 degrees in the clockwise direction. In VTM2, for non-square blocks, several traditional angular intra prediction modes are adaptively replaced with wide-angle intra prediction modes. The replaced mode is signaled using the original method and remapped to the index of the wide-angle mode after parsing. The total number of intra prediction modes remains unchanged (e.g., 67), and the intra mode encoding and decoding remains unchanged.

[0055] In HEVC, each intra-coded block has a square shape, where the length of each side is a power of 2. Therefore, no division operation is required to generate intra prediction values ​​using DC mode. In VTV2, blocks can have a rectangular shape, and in general, a division operation must be used for each block. To avoid division operations for DC prediction, only the longer sides are used to calculate the average value for non-square blocks.

[0056] 2.4 Wide-angle intra prediction for non-square blocks

[0057] In some embodiments, the traditional angular intra prediction direction is defined as from 45 degrees to -135 degrees in a clockwise direction. In VTM2, for non-square blocks, several traditional angular intra prediction modes are adaptively replaced with wide-angle intra prediction modes. The replaced modes are signaled using the original method and remapped to the index of the wide-angle mode after parsing. The total number of intra prediction modes for a block remains unchanged (e.g., 67), and the intra mode encoding and decoding remains unchanged.

[0058] To support these prediction directions, a top reference of length 2W+1 and a left reference of length 2H+1 are defined as Figure 3A and 3B as shown in the example.

[0059] In some embodiments, the mode number of the replaced modes in the wide direction mode depends on the aspect ratio of the block. Table 1 shows the replaced intra prediction modes.

[0060] Table 1: Intra prediction modes replaced by wide angle mode

[0061]

[0062] like Figure 4 As shown in Figure 2, in the case of wide-angle intra prediction, two vertically adjacent prediction samples can use two non-adjacent reference samples. Therefore, low-pass reference sample filtering and side smoothing are applied to wide-angle prediction to reduce the increased gap Δp. α negative impact.

[0063] 2.5 Example of Position Dependent Intra Prediction Combination (PDPC)

[0064] In VTM2, the result of intra prediction for planar mode is further modified by the Position Dependent Intra Prediction Combination (PDPC) method. PDPC is an intra prediction method that calls for a combination of unfiltered boundary reference samples and HEVC-type intra prediction with filtered boundary reference samples. PDPC is applicable to the following intra modes that do not require signaling: planar, DC, horizontal, vertical, bottom left corner mode and its eight adjacent corner modes, and top right corner mode and its eight adjacent corner modes.

[0065] The prediction sample pred(x,y) is predicted using the intra prediction mode (DC, planar, angular) and a linear combination of the reference samples according to the following equation:

[0066] pred(x,y)=(wL×R -1,y +wT×R x,-1 –wTL×R -1,-1 +(64–wL–wT+wTL)×pred(x,y)+32)>>shift

[0067] In this paper, R x,-1 , R -1,y Respectively represent the reference sample points located at the top and left of the current sample point (x, y), R -1,-1 Indicates the reference sample located at the upper left corner of the current block.

[0068] In some embodiments, and if PDPC is applied to DC, planar, horizontal, and vertical intra modes, no additional boundary filters are needed as required in the case of HEVC DC mode boundary filters or horizontal / vertical mode edge filters.

[0069] Figures 5A-5D The reference samples (R) of PDPC applied to various prediction modes are shown. x,-1 ,R -1,y and R -1,-1 ). The prediction sample pred(x',y') is located at (x',y') in the prediction block. The reference sample R x,-1 The coordinate x of is given by: x = x' + y' + 1, with reference to the sample point R -1,y The coordinate y of is similarly given by: y=x'+y'+1.

[0070] In some embodiments, the PDPC weight depends on the prediction mode and is shown in Table 2, where S=shift.

[0071] Table 2: Examples of PDPC weights according to prediction mode

[0072] Prediction Model w wxya wxya Upper right diagonal 16>>((y'<<1)>>S) 16>>((x'<<1)>>S) 0 Lower left diagonal 16>>((y'<<1)>>S) 16>>((x'<<1)>>S) 0 Upper right adjacent diagonal 32>>((y'<<1)>>S) 0 0 Lower left adjacent diagonal 0 32>>((x'<<1)>>S) 0

[0073] 2.6 Intra-frame segmentation of sub-blocks

[0074] In JVET-M0102, ISP is proposed, which divides the luma intra prediction block vertically or horizontally into 2 or 4 sub-partitions according to the size of the block, as shown in Table 3. Figure 6 and Figure 7 Examples of two possibilities are shown. All sub-partitions satisfy the condition of having at least 16 samples.

[0075] Table 3: Number of subpartitions depending on block size

[0076] Block size Number of subpartitions 4×4 No division 4×8 and 8×4 2 All other cases 4

[0077] For each of these subpartitions, a residual signal is generated by entropy decoding the coefficients sent by the encoder, followed by inverse quantization and inverse transformation. The subpartitions are then intra predicted, and the corresponding reconstructed samples are finally obtained by adding the residual signal to the prediction signal. Thus, the reconstructed values ​​of each subpartition will be used to generate the prediction of the next subpartition, which will repeat the process and so on. All subpartitions share the same intra mode.

[0078] Two different categories of processing order (called normal and reverse order) are used, based on the intra mode and partition used. In the normal order, the first sub-partition to be processed is the partition containing the top left sample of the CU, and then continues downwards (horizontal partitioning) or to the right (vertical partitioning). As a result, the reference samples used to generate the sub-partition prediction signal are located only to the left and above the line. On the other hand, the reverse processing order starts either from the sub-partition containing the bottom left sample of the CU and continues upwards, or from the sub-partition containing the top right sample of the CU and continues to the left.

[0079] 2.7 Block Differential Pulse Codec Modulation Codec (BDPC)

[0080] BDPCM was proposed in JVET-M0057. Due to the shape of the horizontal (or vertical) prediction value (using the left (A) (or, above (B)) pixel for the prediction of the current pixel), the most throughput-efficient way to process a block is to process all pixels of a column (or, a row) and process these columns (or rows) sequentially. In order to increase the throughput, we introduce the following processing: when the prediction value selected on the block is vertical, the block of width 4 is divided into two halves with a horizontal boundary, and when the prediction value selected on the block is horizontal, the block of height 4 is divided into two halves with a vertical boundary.

[0081] When partitioning a block, samples from one area are not allowed to use pixels from another area to compute a prediction: if this happens, the predicted pixels will be replaced by reference pixels in the prediction direction. Figure 8 , different positions of the current pixel X in a 4×8 block for vertical prediction are shown.

[0082] Due to this feature, it is now possible to process a 4×4 block in 2 cycles, and a 4×8 or 8×4 block in 4 cycles, and so on. Fig. 9 shown.

[0083] Table 4 summarizes the number of cycles required to process a block, depending on the block size. It is common to show that any block with both dimensions greater than or equal to 8 can be processed with 8 pixels per cycle or more.

[0084] Table 4: Throughput of blocks of size 4xN, Nx4

[0085]

[0086] 2.8 Quantized Residual Domain BDPCM

[0087] In JVET-N0413, quantized residual domain BDPCM (hereinafter referred to as RBDPCM) is proposed. Similar to intra prediction, intra prediction is performed on the entire block by copying samples in the prediction direction (horizontal or vertical prediction). The residual is quantized, and the deviation between the quantized residual and its predicted value (horizontal or vertical) quantized value is encoded and decoded.

[0088] For a block of size M (rows) × N (columns), let r i,j , 0≤i≤M-1,0≤j≤N-1 is the prediction residual after performing intra prediction using unfiltered samples from the upper or left block boundary samples horizontally (copying the left neighbor pixel values ​​row by row across the prediction block) or vertically (copying the top neighbor to each row in the prediction block). Let Q(r i,j ), 0≤i≤M-1,0≤j≤N-1 represents the residual r i,j The quantized version of , where the residual is the difference between the original block and the predicted block value. Then, block DPCM is applied to the quantized residual samples to obtain a modified , with elements An M×N array When vertical BDPCM is signaled:

[0089]

[0090] For horizontal prediction, similar rules apply and the residual quantization samples are obtained by

[0091]

[0092] Residual quantization samples is sent to the decoder.

[0093] At the decoder side, the above calculation is reversed to produce Q(r i,j ),0≤i≤M-1,0≤j≤N-1. For vertical prediction,

[0094]

[0095] For the horizontal case,

[0096]

[0097] Dequantized residual Q -1 (Q(r i,j )) is added to the intra block prediction value to produce the reconstructed sample value.

[0098] One of the benefits of this approach is that DPCM inversion can be done dynamically during the coefficient parsing process by simply adding prediction values ​​when parsing the coefficients, or it can be performed after parsing.

[0099] Transform skipping is always used in quantized residual domain BDPCM.

[0100] 2.9 Multiple Transform Set (MTS) in VVC

[0101] In VTM4, large block size conversion of up to 64×64 is supported, which is mainly suitable for higher resolution videos, such as 1080p and 4K sequences. For transform blocks with a size (width or height, or both width and height) equal to 64, the high-frequency transform coefficients are zeroed, so that only the low-frequency coefficients are retained. For example, for an M×N transform block, with M as the block width and N as the block height, when M is equal to 64, only the 32 columns of transform coefficients on the left are retained. Similarly, when N is equal to 64, only the top 32 rows of transform coefficients are retained. When the transform skip mode is used for a large block, the entire block will be used without zeroing any values.

[0102] In addition to DCT-II already used in HEVC, the Multiple Transform Selection (MTS) scheme is used for residual coding of inter-frame and intra-frame coding blocks. It uses multiple selected transforms from DCT8 / DST7. The newly introduced transform matrices are DST-VII and DCT-VIII. Table 4 below shows the basis functions of the selected DST / DCT.

[0103] Table 4: Basis functions of the transformation matrix used in VVC

[0104]

[0105] To maintain orthogonality of the transform matrices, the transform matrices are quantized more precisely than in HEVC. To keep the intermediate values ​​of the transform coefficients within 16 bits, all coefficients have 10 bits after horizontal and vertical transforms.

[0106] To control the MTS scheme, separate enable flags are specified at the SPS level for intra and inter frames respectively. When MTS is enabled at SPS, a CU-level flag is signaled to indicate whether MTS is applied. Here, MTS is applied only to luma. The MTS CU-level flag is signaled when the following conditions are met.

[0107] o Both width and height are less than or equal to 32

[0108] οCBF flag equals one

[0109] If the MTS CU flag is equal to zero, DCT2 is applied bidirectionally. However, if the MTS CU flag is equal to 1, two other flags are additionally signaled to indicate the transform type in the horizontal and vertical directions, respectively. The transform and signaling mapping table is shown in Table 5. When it comes to transform matrix precision, an 8-bit main transform core is used. Therefore, all transform cores used by HEVC remain unchanged, including 4-point DCT-2 and DST-7, 8-point, 16-point, and 32-point DCT-2. In addition, other transform cores including 64-point DCT-2, 4-point DCT-8, 8-point, 16-point, 32-point DST-7 and DCT-8 use an 8-bit main transform core.

[0110]

[0111] To reduce the complexity of large-size DST-7 and DCT-8, high-frequency transform coefficients are zeroed for DST-7 and DCT-8 blocks with size (width or height, or both) equal to 32. Only coefficients in the 16×16 low-frequency region are retained.

[0112] As in HEVC, the residual of a block can be coded with transform skip mode. To avoid redundancy in syntax coding and decoding, the transform skip flag is not signaled when MTS_CU_flag at the CU level is not equal to 0. The block size restrictions for transform skip are the same as MTS in JEM4, which indicates that transform skip is applicable to a CU when both block width and height are equal to or less than 32.

[0113] Implicit MTS is a recent tool of VVC. The variable implicitMtsEnabled is derived as follows: – If sps_mts_enabled_flag is equal to 1 and one of the following conditions is true, implicitMtsEnabled is set to 1:

[0114] –IntraSubPartitionsSplitType is not equal to ISP_NO_SPLIT

[0115] –cu_sbt_flag is equal to 1 and Max(nTbW, nTbH) is less than or equal to 32

[0116] –sps_explicit_mts_intra_enabled_flag is equal to 0, CuPredMode[0][xTbY][yTbY] is equal to MODE_INTRA, lfnst_idx[x0][y0] is equal to 0, and intra_mip_flag[x0][y0] is equal to 0

[0117] – Otherwise, implicitMtsEnabled is set to 0.

[0118] In VVC draft v6, if the current codec block is the luma component and implicitMtsEnabled is equal to 1, the implicit MTS transform selection is determined by the following formula:

[0119] trTypeHor=(nTbW>=4&&nTbW<=16)? DST7:DCT2(8-965)

[0120] trTypeVer=(nTbH>=4&&nTbH<=16)? DST7:DCT2(8-966)

[0121] where trTypeHor and trTypeVer specify the horizontal and vertical transform kernels, and nTbW and nTbH specify the width and height of the transform block. These two formulas indicate that the implicit MTS transform is selected from the following pairs: {DST7, DST7}, {DST7, DCT2}, {DCT2, DST7}, {DCT2, DCT2}

[0122] 2.10 Simplified quadratic transform (RST) proposed in JVET-N 0193

[0123] 2.10.1 JEM’s Nonseparable Quadratic Transform (NSST)

[0124] In JEM, a secondary transform is applied between the forward main transform and quantization (at the encoder side) and between inverse quantization and inverse main transform (at the decoder side). Fig.10 As shown, a 4×4 (or 8×8) secondary transform is performed according to the block size. For example, for each 8×8 block, a 4×4 secondary transform is applied to small blocks (i.e., min(width, height) <8), and an 8×8 secondary transform is applied to larger blocks (i.e., min(width, height)>4).

[0125] The following describes the application of the inseparable transformation using the input as an example. To apply the inseparable transformation, the 4x4 input block

[0126] First, we represent it as a vector

[0127]

[0128] The inseparable transformation is computed as in indicates the transform coefficient vector, and T is the 16×16 transform matrix. 16×1 coefficient vector Subsequently, the scan order (horizontal, vertical, or diagonal) of the block is reorganized into 4×4 blocks. Coefficients with smaller indices are placed in the 4x4 coefficient block together with smaller scan indices. There are a total of 35 transform sets, and each transform set uses 3 non-separable transform matrices (kernels). The mapping from the intra prediction mode to the transform set is predefined. For each transform set, the selected non-separable second-order transform (NSST) candidate is further specified by a second-order transform index signaled explicitly. After the transform coefficients, this index is signaled once per frame within the CU in the bitstream.

[0129] 2.10.2 Reduced Second-Order Transform (RST) in JVET-N0193

[0130] The RST transform (also known as the Low-Frequency Non-Separable Transform (LFNST)) was introduced in JVET-K0099, and a mapping of 4 transform sets (instead of 35 transform sets) was introduced in JVET-L0133. In this JVET-N0193, 16×64 (further simplified to 16×48) and 16×16 matrices are adopted. For ease of annotation, the 16×64 (simplified to 16×48) transform is denoted as RST8×8, and the 16×16 transform is denoted as RST4×4. Fig.11 An example of RST is shown.

[0131] RST calculation

[0132] The main idea of the Reduced Transform (RT) is to map an N-dimensional vector to an R-dimensional vector in a different space, where R / N (R < N) is the reduction factor.

[0133] The RT matrix is an R×N matrix as follows:

[0134]

[0135] where the R rows of the transform are the R bases of the N-dimensional space. The inverse transform matrix of RT is the transpose of its forward transform. The forward and inverse RTs are as Fig.12 shown.

[0136] In this proposal, RST8×8 with a simplification factor of 4 (1 / 4 size) is applied. Therefore, a 16×64 direct matrix is ​​used instead of 64×64, which is the traditional 8×8 inseparable transform matrix size. In other words, a 64×16 inverse RST matrix is ​​used on the decoder side to generate the core (main) transform coefficients in the 8×8 upper left region. Forward RST8×8 uses a 16×64 (or 8×64 for 8×8 blocks) matrix, so it only produces non-zero coefficients in the upper left 4×4 region within a given 8×8 region. In other words, if RST is applied, then the 8×8 region except the upper left 4×4 region will have only zero coefficients. For RST4×4, a 16×16 (or 8×16 for 4×4 blocks) direct matrix multiplication is applied.

[0137] Anti-RST is applied conditionally when both of the following conditions are met:

[0138] οBlock size is greater than or equal to a given threshold (W>=4&&H>=4)

[0139] ο Transform skip mode flag equal to zero

[0140] If the width (W) and height (H) of the transform coefficient block are both greater than 4, RST8×8 is applied to the upper left 8×8 area of ​​the transform coefficient block. Otherwise, RST4×4 is applied to the upper left min(8,W)×min(8,H) area of ​​the transform coefficient block.

[0141] If the RST index is equal to 0, the RST is not applied. Otherwise, the RST is applied and its kernel is selected together with the RST index. The RST selection method and encoding and decoding of the RST index will be explained later.

[0142] In addition, RST is applied to intra CUs in intra and inter slices, and to both luma and chroma. If dual tree is enabled, the RST indexes for luma and chroma are signaled separately. For inter slices (dual tree is disabled), a single RST index is signaled and used for both luma and chroma.

[0143] In the 13th JVET meeting, intra sub-partitioning (ISP) was adopted as a new intra prediction mode. When ISP mode is selected, RST is disabled and the RST index is not signaled, because even if RST is applied to each feasible partition block, the performance improvement is minimal. In addition, disabling RST for the residual of ISP prediction can reduce the coding complexity.

[0144] RST selection

[0145] The RST matrix is ​​selected from four transform sets, each consisting of two transforms. Which transform set is applied is determined according to the intra prediction mode as follows:

[0146] (1) If one of the three CCLM modes is indicated, transform set 0 is selected.

[0147] (2) Otherwise, select the transformation set according to the following table:

[0148] Transformation Set Selection Table

[0149]

[0150]

[0151] The index for accessing the above table (denoted as IntraPredMode) is in the range of [-14, 83], which is the transform mode index for wide-angle intra prediction.

[0152] Reduced Dimensionality RST Matrix

[0153] As a further simplification, 16×48 matrices are used instead of 16×64 matrices with the same transform set configuration. Each 16×48 matrix takes 48 input data from three 4×4 blocks in the upper left 8×8 block (excluding the lower right 4×4 block) (e.g. Fig.13 shown).

[0154] RST signaling

[0155] Forward RST 8×8 with R=16 uses a 16×64 matrix, so it only generates non-zero coefficients in the top-left 4×4 region within a given 8×8 region. In other words, if RST is applied, only zero coefficients are generated in the 8×8 region other than the top-left 4×4 region. As a result, when any non-zero elements are detected in the 8×8 block region other than the top-left 4×4, the RST index is not encoded (it is not in Fig.14 ), because this means that no RST is applied. In this case, the RST index is inferred to be zero.

[0156] Zero range

[0157] Typically, any coefficient in a 4×4 subblock can be non-zero before inverse RST is applied to the 4×4 subblock. However, in some cases, it is restricted that certain coefficients in the 4×4 subblock must be zero before inverse RST can be applied to the subblock.

[0158] Let nonZeroSize be a variable. Require that coefficients with indices no less than nonZeroSize must be zero when rearranged into a 1D array before inverse RST.

[0159] When nonZeroSize is equal to 16, the coefficients in the upper left 4×4 sub-block have no zeroing constraints.

[0160] In JVET-N0193, when the current block size is 4×4 or 8×8, nonZeroSize is set equal to 8 (i.e., the coefficient with a scan index in the range [8, 15] (e.g., Fig.14 For other block sizes, nonZeroSize is set equal to 16.

[0161] Description of RST in the working draft

[0162] Sequence Parameter Set RBSP Syntax

[0163]

[0164]

[0165] Residual Codec Syntax

[0166]

[0167] Codec unit syntax

[0168]

[0169]

[0170] Sequence Parameter Set RBSP Semantics

[0171] …

[0172] sps_st_enabled_flag equal to 1 specifies that st_idx may be present in the residual codec syntax of an intra codec unit. sps_st_enabled_flag equal to 0 specifies that st_idx is not present in the residual codec syntax of an intra codec unit.

[0173] …

[0174] Codec unit semantics

[0175] …

[0176] st_idx[x0][y0] specifies which secondary transform kernel to apply between the two candidate kernels in the selected transform set. st_idx[x0][y0] equal to 0 specifies that no secondary transform is applied. Array index x0, y0 specifies the position (x0, y0) of the top left corner sample of the considered transform block relative to the top left corner sample of the picture.

[0177] When st_idx[x0][y0] does not exist, st_idx[x0][y0] is inferred to be equal to 0.

[0178] Transformation Processing of Scaled Transform Coefficients

[0179] Overview

[0180] The inputs to this process include:

[0181] –Specify the luminance position (xTbY, yTbY) of the upper left corner sample of the current luminance transform block relative to the luminance sample of the upper left corner of the current image,

[0182] – variable nTbW that specifies the current transform block width,

[0183] – variable nTbH that specifies the current transform block height,

[0184] – Variable cIdx that specifies the color component of the current block,

[0185] – An (nTbW)x(nTbH) array d[x][y] with scaled transform coefficients, where x=0..nTbW-1, y=0..nTbH-1.

[0186] The output of this process is an (nTbW)x(nTbH) array r[x][y] of residual samples, where x=0..nTbW-1 and y=0..nTbH-1.

[0187] If st_idx[xTbY][yTbY] is not equal to 0, the following applies:

[0188] 1. The variables nStSize, log2StSize, numStX, numStY, and nonZeroSize are derived as follows:

[0189] – If nTbW and nTbH are both greater than or equal to 8, log2StSize is set to 3 and nStOutSize is set to 48.

[0190] – Otherwise, log2StSize is set to 2 and nStOutSize is set to 16.

[0191] –nStSize is set to (1< <log2StSize)。

[0192] – If nTbH is equal to 4 and nTbW is greater than 8, numStX is set to 2.

[0193] – Otherwise, numStX is set to 1.

[0194] – If nTbW is equal to 4 and nTbH is greater than 8, then numStY is set to 2.

[0195] – Otherwise, numStY is set to be equal to 1.

[0196] – If both nTbW and nTbH are equal to 4, or both nTbW and nTbH are equal to 8, then nonZeroSize is set to be equal to 8.

[0197] – Otherwise, nonZeroSize is set to 16.

[0198] 2. For xSbIdx = 0..numStX – 1 and ySbIdx = 0..numStY – 1, the following applies:

[0199] – The derivation of the variable array u[x] (x = 0..nonZeroSize – 1) is as follows:

[0200] xC = (xSbIdx << log2StSize) + DiagScanOrder[log2StSize][log2StSize][x][0]

[0201] yC = (ySbIdx << log2StSize) + DiagScanOrder[log2StSize][log2StSize][x][1] u[x] = d[xC][yC]

[0202] – By calling the one-dimensional transform process specified in Clause 8.7.4.4, u[x] (x = 0..nonZeroSize – 1) is transformed into the variable array v[x] (x = 0..nStOutSize – 1). In this one-dimensional transform process, the transform input length of the scaled transform coefficients is nonZeroSize, the transform output length is nStOutSize, the list u[x] (x = 0..nonZeroSize – 1), the index stPredModeIntra of the transform set selection, and the index st_idx[xTbY][yTbY] of the transform selection in the transform set are used as inputs, and the output is the list v[x] (x = 0..nStOutSize – 1). The variable stPredModeIntra is set to predModeIntra specified in Clause 8.4.4.2.1.

[0203] – The array d[(xSbIdx << log2tsize) + x][(ySbIdx << log2tsize) + y] (x = 0..nStSize – 1, y = 0..nStSize – 1) is derived as follows:

[0204] – If stPredModeIntra is less than or equal to 34, or equal to INTRA_LT_CCLM,

[0205] INTRA_T_CCLM or INTRA_L_CCLM, the following applies:

[0206] d[(xSbIdx< <log2StSize)+x][(ySbIdx<<log2StSize)+y]=

[0207] (y<4)? v[x+(y< <log2StSize)]:((x<4)?v[32+x+((y–4)<<2)]:

[0208] d[(xSbIdx< <log2StSize)+x][(ySbIdx<<log2StSize)+y])

[0209] – Otherwise, the following applies:

[0210] d[(xSbIdx< <log2StSize)+x][(ySbIdx<<log2StSize)+y]=

[0211] (y<4)? v[y+(x< <log2StSize)]:((x<4)?v[32+(y–4)+(x<<2)]:

[0212] d[(xSbIdx< <log2StSize)+x][(ySbIdx<<log2StSize)+y])

[0213] Secondary transformation processing

[0214] The input to this process is:

[0215] – variable nTrS that specifies the transform output length,

[0216] – variable nonZeroSize that specifies the length of the conversion input,

[0217] – List of transformed inputs x[j] (j=0..nonZeroSize-1),

[0218] – the variable stPredModeIntra that specifies the index of the transform set selection,

[0219] – The variable stIdx, which specifies the index of the transform selection in the collection.

[0220] The output of this process is a list y[i] (i=0..nTrS-1) of transformed samples.

[0221] The transform matrix derivation process specified in clause 8.7.4.5 involves the transform output length nTrS, the transform set selection index stPredModeIntra and the transform selection index stIdx in the transform set as input, and the transform matrix secTransMatrix as output.

[0222] The transformation sample list y[i] (i=0..nTrS-1) is derived as follows:

[0223]

[0224] CoeffMin=-(1<<15)and CoeffMax=(1<<15)-1;

[0225] Secondary transformation matrix derivation and processing

[0226] The inputs to this process include:

[0227] – variable nTrS that specifies the transform output length,

[0228] – the variable stPredModeIntra that specifies the index of the transform set selection,

[0229] – The variable stIdx that specifies the index of the transform selection in the transform set.

[0230] The output of this process is the transformation matrix secTransMatrix.

[0231] The variable stTrSetIdx is derived as follows:

[0232] stPredModeIntra stTrSetIdx stPredModeIntra<0 1 0<=stPredModeIntra<=1 0 2<=stPredModeIntra<=12 1 13<=stPredModeIntra<=23 2 24<=stPredModeIntra<=44 3 45<=stPredModeIntra<=55 2 56<=stPredModeIntra 1

[0233] The transformation matrix secTransMatrix is ​​derived based on nTrS, stTrSetIdx and stIdx as follows:

[0234] – If nTrS is equal to 16, stTrSetIdx is equal to 0, and stIdx is equal to 1, then the following applies: secTransMatrix[m][n] = ...

[0235] – If nTrS is equal to 16, stTrSetIdx is equal to 0, and stIdx is equal to 2, then the following applies: secTransMatrix[m][n] = ...

[0236] – If nTrS is equal to 16, stTrSetIdx is equal to 1, and stIdx is equal to 1, the following applies:

[0237] secTransMatrix[m][n]=…

[0238] – If nTrS is equal to 16, stTrSetIdx is equal to 1, and stIdx is equal to 2, then the following applies: secTransMatrix[m][n] = ...

[0239] – If nTrS is equal to 16, stTrSetIdx is equal to 2, and stIdx is equal to 1, then the following applies: secTransMatrix[m][n] = ...

[0240] – If nTrS is equal to 16, stTrSetIdx is equal to 2, and stIdx is equal to 2, then the following applies: secTransMatrix[m][n] = ...

[0241] – If nTrS is equal to 16, stTrSetIdx is equal to 3, and stIdx is equal to 1, then the following applies: secTransMatrix[m][n] = ...

[0242] – If nTrS is equal to 16, stTrSetIdx is equal to 3, and stIdx is equal to 2, then the following applies: secTransMatrix[m][n] = ...

[0243] – If nTrS is equal to 48, stTrSetIdx is equal to 0, and stIdx is equal to 1, then the following applies: secTransMatrix[m][n] = ...

[0244] – If nTrS is equal to 48, stTrSetIdx is equal to 0, and stIdx is equal to 2, then the following applies: secTransMatrix[m][n] = ...

[0245] – If nTrS is equal to 48, stTrSetIdx is equal to 1, and stIdx is equal to 1, then the following applies: secTransMatrix[m][n] = ...

[0246] – If nTrS is equal to 48, stTrSetIdx is equal to 1, and stIdx is equal to 2, then the following applies: secTransMatrix[m][n] = ...

[0247] – If nTrS is equal to 48, stTrSetIdx is equal to 2, and stIdx is equal to 1, then the following applies: secTransMatrix[m][n] = ...

[0248] – If nTrS is equal to 48, stTrSetIdx is equal to 2, and stIdx is equal to 2, then the following applies: secTransMatrix[m][n] = ...

[0249] – If nTrS is equal to 48, stTrSetIdx is equal to 3, and stIdx is equal to 1, then the following applies: secTransMatrix[m][n] = ...

[0250] – If nTrS is equal to 48, stTrSetIdx is equal to 3, and stIdx is equal to 2, then the following applies: secTransMatrix[m][n] = ...

[0251] 2.11 Dequantization Limiting in HEVC

[0252] In HEVC, the scaled transform coefficient d' is calculated as follows

[0253] d'=Clip3(coeffMin,coeffMax,d),

[0254] where d is the scaled transform coefficient before clipping.

[0255] For the luminance component,

[0256] coeffMin=CoeffMinY, coeffMax=CoeffMaxY

[0257] For the chrominance component,

[0258] coeffMin=CoeffMinC, coeffMax=CoeffMaxC.

[0259] In this article,

[0260] CoeffMinY=-(1<<(extended_precision_processing_flag?Max(15,BitDepthY+6):15))

[0261] CoeffMinC=-(1<<(extended_precision_processing_flag?Max(15,BitDepthC+6):15))

[0262] CoeffMaxY=(1<<(extended_precision_processing_flag?Max(15,BitDepthY+6):15)-1

[0263] CoeffMaxC=(1<<(extended_precision_processing_flag?Max(15,BitDepthC+6):15))–1

[0264] The extended_precision_processing_flag is a syntax element signaled in the SPS.

[0265] 2.12 Affine Linear Weighted Intra Prediction (ALWIP, or Matrix-based Intra Prediction)

[0266] Affine Linear Weighted Intra Prediction (ALWIP, or Matrix-based Intra Prediction (MIP)) was proposed in JVET-N0217.

[0267] In JVET-N0217, two tests were performed. In Test 1, ALWIP was designed with a memory limit of 8K bytes and a maximum of 4 multiplications per sample. Test 2 was similar to Test 1, but the design was further simplified in terms of memory requirements and model architecture.

[0268] ο A single set of matrices and offset vectors for all block shapes.

[0269] ο Reduce the number of patterns used for all block shapes to 19.

[0270] ο Reduces memory requirements to 5760 10-bit values, or 7.20 kilobytes.

[0271] o Linear interpolation of the prediction samples is performed in a single step in each direction instead of the iterative interpolation in the first test.

[0272] 2.13 Sub-block Transformation

[0273] For inter-prediction CUs with cu_cbf equal to 1, cu_sbt_flag can be signaled to indicate whether to decode the entire residual block or a sub-part of the residual block. In the former case, the MTS information is further parsed to determine the transform type of the CU. In the latter case, a portion of the residual block is coded with the inferred adaptive transform and another portion of the residual block is zeroed. SBT is not applicable to combined inter-intra modes.

[0274] In sub-block transforms, position-dependent transforms are applied to luma transform blocks in SBT-V and SBT-H (chroma TBs of DCT-2 are always used). The two positions of SBT-H and SBT-V are associated with different core transforms. More specifically, Fig.15The horizontal and vertical transforms for each SBT position are specified in . For example, the horizontal and vertical transforms for SBT-V position 0 are DCT-8 and DST-7, respectively. When one side of the residual TU is larger than 32, the corresponding transform is set to DCT-2. Therefore, the sub-block transform jointly specifies the horizontal and vertical transforms, TU tiling, and cbf of the residual block, which can be considered as a syntactic shortcut for the case where the primary residual of a block is on one side of the block.

[0275] 2.14 AVS-M4763: Scan Region Based Coefficient Codec (SRCC)

[0276] SRCC has been incorporated into AVS-3. Using SRCC, such as Fig.16A and 16B The lower right corner position (SRx, SRy) is shown being signaled, and only the coefficients within the rectangle with four corners (0, 0), (SRx, 0), (0, SRy), (SRx, SRy) are scanned and signaled. All coefficients outside the rectangle are zero.

[0277] 3 Examples of defects in existing implementations

[0278] The current design of MTS has the following problems:

[0279] Signaling the index may result in overhead bits.

[0280] In MTS and SBT, some combinations of transformations may not be efficient.

[0281] The decision of implicit MTS may not be efficient. In the current VVC, implicitMtsEnabled depends on sps_mts_enabled_flag being equal to 1. However, when sps_mts_enabled_flag is equal to 0, implicitMtsEnabled may also need to be applied.

[0282] In the current VVC, the transform skip (TS) flag is encoded regardless of whether the current block is encoded or decoded in QR-BDPCM mode. However, when QR-BDPCM is enabled, no transform needs to be applied. Therefore, when a block is encoded and decoded in QR-BDPCM, the signaling of the TS flag is redundant.

[0283] In current VVC, the transform skip flag is context-coded with a context that can also be used to code the bin indicating whether the transform matrix is ​​DCT2. Sharing contexts may be less efficient.

[0284] Bins with 5 context encoding use 9 contexts required to encode and decode the transform matrix index, which affects the parsing throughput.

[0285] QR-BDPCM / TS may also be applicable to chrominance blocks. How to better determine the use of QR-BDPCM / TS requires further research.

[0286] 4 Exemplary Methods of Multiple Transformations

[0287] Embodiments of the currently disclosed technology overcome the shortcomings of existing implementations, thereby providing a video codec with higher codec efficiency but lower computational complexity. As described in this document, methods for multiple transforms can enhance existing and future video codec standards, as described in the examples described below for various implementations. The examples of the disclosed technology provided below illustrate the general concepts and are not meant to be interpreted as limiting. In the examples, the various features described in these examples may be combined unless expressly stated to the contrary.

[0288] In the following examples, assume that:

[0289] ο Max(x, y) returns the larger of x and y, and

[0290] oMin(x, y) returns the smaller of x and y.

[0291] Implicit MTS

[0292] It is proposed to decide the transform (horizontal and / or vertical transform) applied to a block based on the decoded coefficients without receiving the transform index.

[0293] 1. The decoded coefficients can be the same color component or different color components of the current block or

[0294] A plurality of representative blocks are associated.

[0295] a. In one example, determination of a transform for the first block may depend on decoded coefficients of the first block.

[0296] b. In one example, determination of a transform for a first block may depend on decoded coefficients of a second block which may be different from the first block.

[0297] i. In one example, the second block may have the same color component, such as a luminance component, as the color component of the first block.

[0298] 1) In one example, the second block may be adjacent to the first block.

[0299] 2) In one example, the second block may have the same intra prediction mode as the first block.

[0300] 3) In one example, the second block may have the same block size as the first block.

[0301] 4) In one example, the second block may be the last decoded block preceding the first block in decoding order that satisfies certain conditions, such as the same intra prediction mode or the same size.

[0302] ii. In one example, the second block may have different color components than the first block.

[0303] 1) In one example, the first block may be a luma component, and the second block may be a chroma component (eg, Cb / Cr, B / R component).

[0304] a) In one example, the three blocks are in the same codec unit.

[0305] b) Furthermore, alternatively, the implicit MTS is only applied to luma blocks and not to chroma blocks.

[0306] 2) In one example, the first block in the first color component and the second block in the second color component may be located at corresponding positions of the picture to each other.

[0307] c. In one example, determination of a transform for a first block may depend on decoded coefficients of a plurality of blocks including at least one block that is different from the first block.

[0308] i. In one example, the plurality of blocks may include a first block.

[0309] ii. In one example, the plurality of blocks may include one block or a plurality of blocks adjacent to the first block.

[0310] iii. In one example, the plurality of blocks may include one block or a plurality of blocks having the same block size as the first block.

[0311] iv. In one example, the plurality of blocks may include the last N decoded blocks that precede the first block in decoding order and satisfy a certain condition (such as the same intra prediction mode or the same size). N is an integer greater than 1.

[0312] v. In one example, the plurality of blocks may include a block or blocks that are not in the same color component as the first block.

[0313] 1) In one example, the first block may be in the luma component. The plurality of blocks may include blocks in the chroma components (eg, the second block in the Cb / B component, and the third block in the Cr / R component).

[0314] a) In one example, the three blocks are in the same codec unit.

[0315] b) Furthermore, alternatively, the implicit MTS is only applied to luma blocks and not to chroma blocks.

[0316] 2) In one example, the first block in the first color component and a number of blocks included in the plurality of blocks that are not in the first color component may be located at corresponding positions of the picture having the first block.

[0317] 2. The decoded coefficients used for transform determination are those coefficients that are not equal to zero (denoted as significant coefficients). Those coefficients used for transform determination are called representative coefficients.

[0318] a. In one example, the representative coefficients are all significant coefficients in the representative block.

[0319] b. Alternatively, the representative coefficients are a portion of the significant coefficients in the representative block.

[0320] i. In one example, representative coefficients are those decoded significant coefficients that are greater than or not less than a threshold value

[0321] ii. In one example, representative coefficients are those decoded significant coefficients that are less than or not greater than a threshold

[0322] iii. In one example, the representative coefficients are the first K (K>=1) decoded significant coefficients in decoding order.

[0323] iv. In one example, the representative coefficients are the last K (K>=1) decoded significant coefficients in decoding order.

[0324] v. In one example, the representative coefficients may be those coefficients at predetermined positions in the block.

[0325] 1) In one example, the representative coefficient may include only one coefficient located at the coordinate (xPos, yPos) relative to the representative block, for example xPos=yPos=0.

[0326] 2) For example, the position may depend on the size of the block.

[0327] vi. In one example, the representative coefficients may be those coefficients at predetermined positions in the coefficient scanning order.

[0328] c. Alternatively, the representative coefficients may also include those zero coefficients.

[0329] d. Alternatively, the representative coefficients may be those derived from the decoded coefficients, such as by clipping to a range, by quantization.

[0330] 3. The transformation determines a function that may depend on the representative coefficients, such as a function that has a value V as output using the representative coefficients as input.

[0331] a. In one example, V is derived as the number of representative coefficients.

[0332] i. Alternatively, V is derived as the sum of representative coefficients.

[0333] 1) Alternatively, furthermore, the sum may be clipped to derive V.

[0334] ii. Alternatively, V is derived as the sum of the absolute values ​​of the representative coefficients.

[0335] 1) Alternatively, furthermore, the sum may be clipped to derive V.

[0336] b. In one example, the choice can be implicitly determined at the decoder depending on the parity of V

[0337] i. For example, if V is an even number, the first transform is selected as the horizontal transform and the second transform is selected as the vertical transform; if V is an odd number, the third transform is selected as the horizontal transform and the fourth transform is selected as the vertical transform.

[0338] 1) In one example, the first transform is the same as the second transform.

[0339] a) Alternatively, the first transform is different from the second transform.

[0340] 2) In one example, the third transform is the same as the fourth transform.

[0341] a) Alternatively, the third transform is different from the fourth transform.

[0342] 3) The first / second / third / fourth transform is a specific transform, such as DCT-X or DCT-Y. X can be an integer, such as 2 or 8. Y can be an integer, such as 7 or 8.

[0343] 4) Alternatively, furthermore, at least one of the third and fourth transformations is different from the first and second transformations.

[0344] a) In one example, when V is even, the first and second transforms are DCT-2, and when V is odd, the third and fourth transforms are DST-7.

[0345] b) Alternatively, when V is odd, the first and second transforms are DCT-2, and when V is even, the third and fourth transforms are DST-7.

[0346] c. In one example, if V is less than a threshold value T1, the fifth transform is selected as the horizontal transform, and the sixth transform is selected as the vertical transform. For example, T1=1 or 2.

[0347] i. Alternatively, if V is greater than threshold T2, the fifth transform is selected as the horizontal transform and the sixth transform is selected as the vertical transform.

[0348] ii. For example, the threshold may depend on the size of the block.

[0349] iii. For example, the threshold may depend on the QP.

[0350] iv. In one example, the fifth transform is the same as the sixth transform.

[0351] 1) Alternatively, the fifth transform is different from the sixth transform.

[0352] v. In one example, the fifth / sixth transform is a specific transform, such as DCT-X or DST-Y. X can be an integer, such as 2 or 8. Y can be an integer, such as 7 or 8.

[0353] d. In one example, the choice of transform may depend on a combination of V and other codec information.

[0354] i. For example, when the current picture / slice is intra-coded, if V is an even number, the first transform is selected as the horizontal transform, and the second transform is selected as the vertical transform; if V is an odd number, the third transform is selected as the horizontal transform, and the fourth transform is selected as the vertical transform; but when the current picture / slice is not intra-coded, if V is an even number, the third transform is selected as the horizontal transform, and the fourth transform is selected as the vertical transform; and if V is an odd number, the first transform is selected as the horizontal transform, and the second transform is selected as the vertical transform. These four transforms may be defined as in point 3.b.

[0355] 4. The transformation determination may also depend on the codec information of the current block.

[0356] a. In one example, if the current intra-coded block is in an I slice / picture, when V is an even number, DST-7 may be applied to the current block, and when V is an odd number, DCT-2 may be applied to the current block.

[0357] b. In one example, if the current intra-coded block is in a P / B slice / picture and V is an even number, DCT-2 may be applied to the current block, and when V is an odd number, DST-7 may be applied to the current block.

[0358] c. In one example, the determination may further depend on mode information (eg, intra-frame or inter-frame mode information).

[0359] d. In one example, the transform determination may depend on a scan area, which is the smallest rectangle covering all coefficients (e.g., Figures 16A-16B shown).

[0360] i. In one example, if the size (width times height) of the scan area associated with the current block is greater than a given threshold, a default transform (including horizontal and vertical transforms) may be used. Otherwise, the rules defined in point 3 may be used (e.g., DST-7 when V is even, and DCT-2 when V is odd).

[0361] ii. In one example, if the width of the scan area associated with the current block is greater than (or less than) a given maximum width (eg, 16), a default horizontal transform may be used. Otherwise, the rules defined in point 3 may be used.

[0362] iii. In one example, if the height of the scan area associated with the current block is greater than (or less than) a given maximum height (eg, 16), a default vertical transformation may be used. Otherwise, the rules defined in point 3 may be used.

[0363] iv. In one example, the given size is LxK, where L and K are integers, such as 16.

[0364] v. In one example, the default transform matrix may be DCT-2 or DST-7. 5. The transform set from which the implicit MTS may select a transform may be predefined.

[0365] a. In one example, the horizontal and vertical transform sets may not be the same.

[0366] i. Alternatively, the horizontal and vertical transform sets may be the same.

[0367] b. In one example, the transform set may include DCT-2 and DST-7.

[0368] c. In one example, the transform set may include DCT-2, DST-7, and identity transform.

[0369] d. In one example, the transform set may depend on codec information, color component, partition structure (eg, dual tree / single tree; quadtree / binary tree / ternary tree / extended quadtree), slice / picture type, etc.

[0370] i. In one example, the set of transforms may depend on the block size.

[0371] ii. In one example, for intra-coded blocks, DCT-2 and DST-7 may be included.

[0372] iii. In one example, for a block encoded with reference samples in the same picture

[0373] (e.g., intra block copy), may include DST-7 and identity transform (ie, no transform applied).

[0374] 6. In one example, one or more methods disclosed in points 1-5 can only be applied to a specific block.

[0375] a. For example, one or more methods disclosed in points 1-5 can only be applied to intra-frame coding blocks.

[0376] b. For example, one or more of the methods disclosed in points 1-5 can only be applied to blocks with specific constraints on coefficients.

[0377] i. A rectangle with four corners (0, 0), (CRx, 0), (0, CRy), (CRx, CRy) is defined as a constrained rectangle. In one example, one or more methods disclosed in points 1-5 can be applied only when all coefficients outside the constrained rectangle are zero. For example, CRx=CRy=16.

[0378] 1) For example, CRx=SRx and CRy=SRy, where (SRx, SRy) is defined in SRCC as described in Section 2.14.

[0379] 2) Alternatively, furthermore, the above method is only applied when the block width or block height is greater than K.

[0380] a) In one example, K is equal to 16.

[0381] b) In one example, the above method is only applied when the block width is greater than K1 and K1 is equal to CRx or when the block height is greater than K2 and K2 is equal to CRy.

[0382] 7. When the proposed transform selection method disclosed in points 1-5 is not applied, a default transform is used, such as DCT2.

[0383] Simplified MTS / SBT

[0384] 8. In one example, the vertical transform and the horizontal transform in MTS must be the same.

[0385] a. In one example, a block can only choose one of the following two transformations:

[0386] i. DCT-2 in horizontal transform and DCT-2 in vertical transform;

[0387] ii. DST-7 in horizontal conversion and DST-7 in vertical conversion;

[0388] b. In one example, signaling for MTS may include at most one flag for a block.

[0389] i. In one example, if the flag is equal to 0, DCT-2 in the horizontal transform and DCT-2 in the vertical transform are selected; if the flag is equal to 1, DST-7 in the horizontal transform and DST-7 in the vertical transform are selected.

[0390] ii. In one example, if the flag is equal to 1, DCT-2 in the horizontal transform and DCT-2 in the vertical transform are selected; if the flag is equal to 0, DST-7 in the horizontal transform and DST-7 in the vertical transform are selected.

[0391] 9. Assume that the width and height of the block are W and H respectively. Point 7 is applicable only if:

[0392] aW>=T1, and H>=T2, for example, T1=T2=8;

[0393] bW<=T1, and H<=T2, for example, T1=T2=16;

[0394] c.Min(W,H)>=T1, for example, T1=8;

[0395] d.Max(W,H)<=T1, e.g. T1=32

[0396] eW*H>=T1, e.g. T1=64

[0397] fW*H<=T1, for example, T1=256.

[0398] 10. In one example, transforms not including DST-8 may be applied to blocks encoded with SBT.

[0399] a. In one example, only DCT-2 and DST-7 can be applied to blocks encoded with SBT.

[0400] b. In one example, Fig.15In the case of the SBT shown (SBT-V, position 0), DCT-2 is applied horizontally and DST-7 is applied vertically.

[0401] c. In one example, Fig.15 In the case of the SBT shown (SBT-H, position 0), DST-7 is applied horizontally and DCT-2 is applied vertically.

[0402] 11. Assume that the width and height of the transform block are W and H, respectively. In one example, the selection of transform for a block coded with SBT may depend on the transform block size, where the transform block may be smaller than the coded block when SBT is applied.

[0403] a. In one example, Fig.15 In the case of the SBT shown (SBT-V, position 0), if W>=T1, DCT-2 is applied horizontally and DST-7 is applied vertically; otherwise, DCT-8 is applied horizontally and DST-7 is applied vertically. For example, T1=8.

[0404] b. In one example, Fig.15 In the case of the SBT shown (SBT-H, position 0), if H>=T1, DST-7 is applied horizontally and DCT-2 is applied vertically; otherwise, DST-7 is applied horizontally and DCT-8 is applied vertically. For example, T1=8.

[0405] 12. Whether transform coefficient zeroing is applied may depend on one or more messages signaled from the codec to the decoder, such as in VPS / SPS / PPS / APS / DPS / slice header / picture header / sequence header / slice group header / slice / CTU row / CTU / CU / PU / TU, etc.

[0406] a. In one example, the message may include a flag that controls the use of MTS (eg, sps_mts_enabled_flag in SPS).

[0407] b. In one example, the message may include a flag that controls the use of the SBT (eg, cu_sbt_flag in the CU).

[0408] c. In one example, whether transform coefficient zeroing is applied may depend on the signaled message and the transform block size.

[0409] d. In one example, once MTS is not enabled in the bitstream (eg, sps_mts_enabled_flag is equal to "false"), transform coefficient zeroing may not be applied to transform blocks of a specified size.

[0410] i. For example, if sps_mts_enabled_flag is equal to "false", transform coefficient zeroing may not be applied for a transform block having size M×32 (M<=32) or 32xN (N<=32), so the entire M×N (M<=32, N<=32) block is encoded and decoded without zeroing any transform coefficients.

[0411] e. In one example, once MTS is enabled in the bitstream (eg, sps_mts_enabled_flag is equal to "true"), transform coefficient zeroing may be applied for transform blocks having size M×32 (M<=32) or 32×N (N<=32).

[0412] i. In one example, for an M×N transform block, if sps_mts_enabled_flag is equal to “true” and cu_sbt_flag is equal to “true”, then when M is equal to 32, only the left 16 columns of transform coefficients are retained. Similarly, when N is equal to 32, only the upper 16 rows of transform coefficients are retained. All other coefficients are reset to zero.

[0413] 13. Whether transform coefficient zeroing is applied may depend on the transform type and / or transform size.

[0414] a. In one example, when the transform type is DCT-2, for M×64 (M<=64)

[0415] Or for a 64×N (N<=64) transform block, transform coefficient zeroing may be applied.

[0416] i. In one example, for an M×N transform block encoded and decoded with DCT-2, when M is equal to 64, only the left 32 columns of transform coefficients are retained. Similarly, when N is equal to 62, only the upper 32 rows of transform coefficients are retained.

[0417] b. In one example, when the transform type is DCT-8 or DST-7, for M×32

[0418] For a 32×N (M<=32) or 32×N (N<=32) transform block, transform coefficient zeroing may be applied.

[0419] i. In one example, for an M×N transform block encoded and decoded with DCT8 or DST7, when M is equal to 32, only the left 16 columns of transform coefficients are retained. Similarly, when N is equal to 32, only the upper 16 rows of transform coefficients are retained.

[0420] c. In one example, when transform skip mode is used for a block, the entire block is encoded without zeroing any transform coefficients.

[0421] 14. Whether transform coefficient zeroing is applied may depend on the implicit transform.

[0422] a. In one example, for M×32 (M<=32) or 32×N (N<=32) transform blocks coded and decoded with implicit transform, transform coefficient zeroing may be applied.

[0423] i. In one example, for an M×N transform block coded and decoded with implicit transform, when M is equal to 32, only the left 16 columns of transform coefficients are retained. Similarly, when N is equal to 32, only the upper 16 rows of transform coefficients are retained.

[0424] Implicit MTS Decision Making

[0425] 15. Regardless of whether MTS is enabled at the sequence / picture / sub-picture / slice / slice group / slice / tile / CTU row / CTU level (e.g., sps_mts_enabled_flag is equal to 1 or 0), implicit MTS can be applied to certain modes.

[0426] a. In one example, when MTS is disabled at the sequence / picture / sub-picture / slice / slice group / slice / tile / CTU row / CTU level (e.g., sps_mts_enabled_flag is equal to 0), implicit MTS can be applied in ISP mode.

[0427] b. In one example, when MTS is disabled at sequence / picture / sub-picture / slice / slice group / slice / tile / CTU row / CTU level (e.g., sps_mts_enabled_flag is equal to 0), implicit MTS may be applied in SBT mode.

[0428] c. In one example, when MIP and / or LFNST and / or explicit MTS are not applied and MTS is disabled at the sequence / picture / sub-picture / slice / slice group / slice / tile / CTU row / CTU level (e.g., sps_mts_enabled_flag is equal to 0), implicit MTS can be applied to intra prediction mode.

[0429] d. Alternatively, when MTS is disabled at sequence / picture / sub-picture / slice / slice group / slice / tile / CTU row / CTU level (e.g., sps_mts_enabled_flag is equal to 0), implicit MTS may not be applied to blocks with certain modes.

[0430] i. In one example, when MTS is disabled at the sequence / picture / sub-picture / slice / slice group / slice / tile / CTU row / CTU level (e.g., sps_mts_enabled_flag is equal to 0), implicit MTS may not be applied to blocks with intra prediction mode.

[0431] ii. In one example, when MTS is disabled at the sequence / picture / sub-picture / slice / slice group / slice / tile / CTU row / CTU level (e.g., sps_mts_enabled_flag is equal to 0), implicit MTS may not be applied to blocks with intra prediction modes that do not include ISP mode.

[0432] e. In one example, for ISP coded blocks, implicit MTS may be enforced.

[0433] i. For example, implicit transformations may be forced for ISP-coded blocks (eg, the variable implicitMtsEnabled may be inferred to be 1 for ISP-coded blocks).

[0434] ii. For example, a bitstream constraint may be applied that an implicit MTS must be used for blocks encoded by ISP.

[0435] iii. Alternatively, if the SPS level MTS flag is equal to 0 (such as sps_mts_enabled_flag is equal to 0), DCT-2 transform can be used for ISP coded blocks.

[0436] f. In one example, for SBT-encoded blocks, implicit MTS may be enforced.

[0437] i. For example, when the block width and block height of an SBT codec block are both less than or equal to 32, and the current codec block is a luma component, then implicit MTS may be forced to apply to such an SBT codec block (for example, for such an SBT codec block, the variable implicitMtsEnabled may be forced to 1).

[0438] 1) In another example, a bitstream constraint may be applied that for such ISP-coded blocks, an implicit MTS must be used.

[0439] ii. Alternatively, if the SPS level MTS flag is equal to 0 (such as sps_mts_enabled_flag is equal to 0), DCT-2 transform can be used for the SBT codec block.

[0440] g. In one example, the correlation between the SPS level MTS flag and the implicit MTS can be used only for intra-frame but non-ISP coded blocks.

[0441] i. For example, for blocks that are intra-coded but not ISP-coded, whether implicit MTS is used may be determined by the SPS-level MTS control flag(s) (such as when sps_mts_enabled_flag is equal to 1 and sps_explicit_mts_intra_enabled_flag is equal to 0).

[0442] 1) Alternatively, whether implicit MTS is used for ISP / SBT codec blocks has nothing to do with the MTS flag at the SPS level.

[0443] 16. Whether SBT / ISP is allowed for a sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block may depend on whether MTS is enabled for the sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block (e.g., sps_mts_enabled_flag is equal to 1 or 0).

[0444] a. In one example, when MTS is disabled (eg, sps_mts_enabled_flag is equal to 0), SBT / ISP may not be allowed.

[0445] b. In one example, explicit signaling of the ISP flag and / or the SBT flag can be enabled

[0446] MTS condition (for example, sps_mts_enabled_flag is equal to 1).

[0447] i. For example, once sps_mts_enabled_flag is equal to 1, ISP flags (eg, intra_subpartitions_mode_flag, intra_subpartitions_split_flag) may be signaled.

[0448] ii. For example, once sps_mts_enabled_flag is equal to 1, SBT flags (e.g., cu_sbt_flag, cu_sbt_quad_flag, cu_sbt_horizontal_flag, cu_sbt_pos_flag) may be signaled.

[0449] c. In one example, when implicit MTS is disabled, SBT / ISP may not be allowed.

[0450] d. In one example, when MTS is disabled in the conformant bitstream (e.g., sps_mts_enabled_flag is equal to 0), the control information of SBT and / or ISP of sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block (e.g., sps_isp_enabled_flag and / or sps_sbt_enabled_flag) must be 0.

[0451] i. Alternatively, when MTS is disabled (e.g., when sps_mts_enabled_flag is equal to 0), the control information of the SBT and / or ISP of the sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block (e.g.,

[0452] sps_isp_enabled_flag and / or sps_sbt_enabled_flag) are not signaled and are inferred to be 0.

[0453] ii. Alternatively, the control information of SBT and / or ISP for a sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU line / CTU / CU / block (e.g., sps_isp_enabled_flag and / or sps_sbt_enabled_flag) is signaled but omitted by the decoder. When MTS is disabled (e.g., sps_mts_enabled_flag is equal to 0), SBT and / or ISP are inferred to be disabled.

[0454] 17. Whether MTS is enabled (e.g., sps_mts_enabled_flag is equal to 1 or 0) for a sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block) may depend on whether SBT / ISP is allowed for the sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block.

[0455] a. In one example, when SBT and / or ISP are not enabled for a sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block in a conforming bitstream, MTS may be enabled (e.g., sps_mts_enabled_flag must be equal to 1).

[0456] i. Alternatively, when SBT and / or ISP is not enabled for a sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block, sps_mts_enabled_flag is not signaled and is inferred to be 1.

[0457] ii. Alternatively, when SBT and / or ISP is not enabled for a sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block, sps_mts_enabled_flag is signaled but omitted by the decoder and MTS is inferred to be enabled.

[0458] 18. Implicit MTS and explicit MTS can be controlled by separate syntax elements. For example, sps_implicit_mts_intra_enabled_flag and sps_explicit_mts_intra_enabled_flag control whether implicit MTS and explicit MTS are enabled at the sequence level, respectively.

[0459] a. In one example, the syntax element controlling MTS in points 11-13 (eg, sps_mts_enabled_flag) may be replaced by a syntax element controlling implicit MTS (eg, sps_implict_mts_intra_enabled_flag).

[0460] b. In one example, sps_implict_mts_intra_enabled_flag is signaled only if sps_mts_enabled_flag is equal to 1. If sps_implict_mts_intra_enabled_flag is not present, it can be inferred to be 0.

[0461] 19. In one example, for different coding modes of sequence / video / picture / slice / slice group / slice / tile / sub-picture / CTU row / CTU / CU / block, whether and / or how to apply implicit and / or explicit MTS can be controlled separately.

[0462] a. In one example, when implicit and / or explicit MTS is disabled for an intra-coded CU, sps_mts_enabled_flag is 0.

[0463] b. In one example, sps_mts_enabled_flag does not control whether implicit and / or explicit MTS is enabled for inter-coded / non-intra-coded CUs.

[0464] General claims

[0465] 20. The decision of the transformation matrix can be made at the CU / CB level or the TU level.

[0466] a. In one example, the decision is made at the CU level, where all TUs share the same transform matrix.

[0467] i. Alternatively, further, when a CU is divided into a plurality of TUs, coefficients in one TU (eg, the first or last TU) or a portion or all of the TUs may be used to determine the transform matrix.

[0468] b. Whether to use a CU-level solution or a TU-level solution may depend on the block size and / or the VPDU size and / or the maximum CTU size and / or the codec information of a block.

[0469] i. In one example, when the block size is larger than the VPDU size, a CU level determination method may be applied.

[0470] 21. In the method disclosed in this document, the coefficients or representative coefficients may be quantized or dequantized.

[0471] 22. Transform skipping can also be determined implicitly by coefficients or representative coefficients using any of the methods disclosed in this document.

[0472] 23. In the methods disclosed in this document, coefficients or representative coefficients may be modified before being used to derive the transform.

[0473] a. For example, coefficients or representative coefficients may be clipped before being used to derive the transform.

[0474] b. For example, the coefficients or representative coefficients may be scaled before being used to derive the transform.

[0475] c. For example, coefficients or representative coefficients may be offset before being used to derive the transform.

[0476] d. For example, coefficients or representative coefficients may be filtered before being used to derive the transform.

[0477] e. For example, coefficients or representative coefficients may be mapped to other values ​​(eg, via a lookup table) before being used to derive a transform.

[0478] 24. The methods disclosed in this document can also be used to derive other codec modes / information implicitly through coefficients or representative coefficients.

[0479] a. In one example, the disclosed method can be used to derive a secondary transform that can be applied to a sub-region of a block.

[0480] b. Alternatively, furthermore, the representative coefficients are from those corresponding to a sub-region rather than the entire block.

[0481] 25. In one example, whether and / or how to apply the above disclosed method can be at the sequence level / picture level / slice level / slice group level, such as at the sequence header / picture header / SPS / VPS / DPS / PPS / APS /

[0482] Signaling notification in the stripe header / slice group header.

[0483] 26. In one example, whether and / or how to apply the above disclosed method may depend on codec information, which may include:

[0484] a. Block size.

[0485] i. In one example, for blocks whose width and height are both not greater than a threshold (eg, 32), the implicit MTS method described above may be applied.

[0486] b.QP

[0487] c. Picture or stripe type (such as I frame or P / B frame, I stripe or P / B stripe)

[0488] i. In one example, the proposed method can be enabled on I frames, but disabled on P / B frames.

[0489] d. Structural partitioning method (single tree or dual tree)

[0490] i. In one example, for a slice / picture / tile / slice applied with a single tree partitioning, the implicit MTS method described above may be applied.

[0491] e. Codec mode (such as inter-frame mode / intra-frame mode / IBC mode, etc.)

[0492] i. In one example, for intra-frame coded blocks, the implicit MTS method described above may be applied.

[0493] f. Coding and decoding methods (such as intra-sub-block segmentation, derivative tree (DT) method, etc.)

[0494] i. In one example, for intra-frame codec blocks to which DT is applied, the implicit MTS method described above may be disabled.

[0495] ii. In one example, for an intra-frame codec block to which ISP is applied, the implicit MTS method described above may be disabled.

[0496] g. Color component

[0497] i. In one example, for luma blocks, the implicit MTS method described above may be applied, but for chroma blocks, it is not applied.

[0498] h. Intra-frame prediction mode (such as DC, vertical, horizontal, etc.)

[0499] i. Motion information (such as MV and reference index).

[0500] j. Profile / Level / Tier

[0501] Codec tools on chroma components

[0502] 27. The proposed codec tool X may be applied to one or more chroma components of a block, depending on whether it is applied to one or more corresponding luminance blocks. In the following discussion, "chroma component" may refer to "one or more chroma components".

[0503] a. In one example, for a chroma block, the usage of codec tool X is derived from the information of whether the codec tool is applied to the corresponding luma block. Therefore, no additional signaling of the usage of codec tool X for chroma blocks is required.

[0504] i. In one example, if codec tool X is applied to the corresponding luma block, it may be applied to the chroma components of the block; and if it is not applied to the corresponding luma block, it is not applied to the chroma components of the block.

[0505] ii. In one example, when codec X is applied to the corresponding luma block, it can be applied to luma and chroma components in the same way.

[0506] b. In one example, a message (such as a flag or index) may be conditionally signaled to indicate whether codec X is applied to the chroma components of a block. The condition may be defined as whether it is applied to the corresponding luma block. Alternatively, further, if it is not applied to the corresponding luma block, it may not be applied to the chroma components of the block without signaling.

[0507] i. In one example, when codec X is applied to the corresponding luma block and the message indicates that it is also applied to chroma components, codec X may be applied to the luma component and the chroma components in the same manner.

[0508] ii. In one example, codec tool X may be applied to luma components and chroma components in different ways.

[0509] 1) It is possible to signal how to apply codec X to the luminance component and the chrominance component separately.

[0510] c. In the above discussion, a "corresponding luma block" may refer to a luma block that covers at least one "corresponding sample" of a chroma block. The sample positions may be scaled according to the color format (such as 4:4:4 or 4:2:0). Assume that the top left corner position of the chroma block is (x0, y0), and the width and height of the chroma block are W and H, all of which are scaled to luma sampling units.

[0511] i. In one example, the corresponding sample point may be at (x0, y0);

[0512] ii. In one example, the corresponding sample point may be at (x0+W-1, y0+H-1);

[0513] iii. In one example, the corresponding sample point may be at (x0+W / 2-1, y0+H / 2-1);

[0514] iv. In one example, the corresponding sample point may be at (x0+W / 2, y0+H / 2);

[0515] v. In one example, the corresponding sample point may be at (x0+W / 2, y0+H / 2-1);

[0516] vi. In one example, the corresponding sample point may be at (x0+W / 2-1, y0+H / 2);

[0517] 28. The proposed codec tool X may be applied to one chroma component of a block, depending on whether it is applied to one or more corresponding blocks of other chroma components.

[0518] a. In one example, for a chroma block, the usage of codec tool X is derived from information on whether the codec tool is applied to corresponding blocks of other chroma components. Therefore, no additional signaling of the usage of codec tool X for chroma blocks is required.

[0519] b. In one example, a message (such as a flag) may be conditionally signaled to indicate whether codec tool X is applied to the chroma components of a block. The condition may be defined as whether it is applied to the corresponding blocks of other chroma components. Alternatively, further, if it is not applied to the corresponding blocks of other chroma components, it may not be applied to the chroma components of a block without signaling.

[0520] 29. The proposed codec tool X may be applied to the luma component of a block, depending on whether it is applied to one or more corresponding blocks of chroma components.

[0521] a. In one example, for a luma block, the usage of codec tool X is derived from the information of whether the codec tool is applied to the corresponding block of chroma components. Therefore, no additional signaling of the usage of codec tool X for luma blocks is required.

[0522] b. In one example, a message (such as a flag) may be conditionally signaled to indicate whether codec tool X is applied to the luma component of a block. The condition may be defined as whether it is applied to the corresponding block of the chroma component. Alternatively, furthermore, if it is not applied to the corresponding block of the chroma component, it will not be applied to the luma component of the block without signaling.

[0523] 30. The codec tool X mentioned above can be defined as follows.

[0524] a. In one example, codec tool X may be MTS.

[0525] b. In one example, codec tool X may be transform skip.

[0526] c. In one example, codec X may be RST.

[0527] d. In one example, codec X may be RBDPCM.

[0528] e. In one example, codec X may be BDPCM.

[0529] Signaling of MTS index and transition jump flag

[0530] 31. It is proposed that the MTS index and / or the transition skip flag may be signaled conditionally, depending on the use of BDPCM or QR-BDPCM or any variance of BDPCM.

[0531] a. In one example, when BDPCM or QR-BDPCM or any variation of BDPCM is enabled for a block (such as intra_bdpcm_flag equals "true"), the MTS index and / or transform skip flag may not be signaled in the bitstream for the block.

[0532] i. Alternatively, furthermore, when BDPCM or QR-BDPCM or any variation of BDPCM is enabled in the block, the transform skip flag of the block may be inferred to be "true".

[0533] b. In one example, when BDPCM or QR-BDPCM or any variation of BDPCM is enabled in a block, the MTS index of the block can be inferred to be 0.

[0534] 32. Fixed-length codecs can be used to encode and decode different MTS types (such as DST7-DST7, DCT8-DST7, DST7-DCT8, DCT8-DCT8 in the VVC specification), but excluding TS and DCT-2.

[0535] a. In one example, a fixed length of 2 binary bits may be applied.

[0536] b. In one example, each bin can be context encoded or decoded.

[0537] c. In one example, the first or last bin may be context decoded and the remaining bins bypass decoded.

[0538] d. In one example, all bins are bypassed for encoding and decoding.

[0539] 33. Context modeling of transform matrix indices (eg, TS, DCT-2, other transform matrices) may depend on the codec mode, transform block size and / or QT depth and / or MTT depth and / or BT depth and / or TT depth.

[0540] a. In one example, the context modeling of the transform matrix index may depend on the coding mode of the block, such as whether the block is coded in intra / inter / IBC mode.

[0541] b. In one example, context modeling of the transformation matrix index may depend on a function of multiple segmentation depths, which may include QT depth, MTT depth, BT depth, and TT depth.

[0542] c. In one example, context modeling of the transform matrix index may depend on the transform depth of the TU / TB relative to the CU / PU.

[0543] d. In one example, the context index increment may be set as a function of the TU / TB size.

[0544] i. In one example, the context index increment may be set to ((Log2(TbW)+Log2(TbH))>>1)−X, where TbW and TbH indicate the width and height of the transform block, and X is an integer (such as X=2).

[0545] ii. In one example, the context index increment may be set to Log2(max(TbW, TbH))−X, where TbW and TbH indicate the width and height of the transform block, X is an integer (such as X=2), and max(a, b) returns the larger value.

[0546] iii. In one example, the context index increment may be set to Log2(min(TbW, TbH))−X, where TbW and TbH indicate the width and height of the transform block, X is an integer (such as X=2), and min(a, b) returns a smaller value.

[0547] iv. The context index increment mentioned above can be further clipped to a range, such as [k0, k1], where k0 and k1 are integers.

[0548] e. In one example, the context index increment may be set as a function of the TU / TB width or height.

[0549] f. In one example, the context index increment may be set as a function of the MTT depth.

[0550] g. In one example, the context index increment can be set to min(K, quadtree depth), where the function min(a, b) returns the smaller value between a and b, and K is an integer such as 4 or 5.

[0551] h. In one example, the above method can be applied to encode and decode specific binary bits used in matrix index encoding and decoding.

[0552] i. In one example, the bit indicating whether it is DCT2 is context encoded and the context modeling is based on the above method, such as the first bit of tu_mts_idx.

[0553] 34. It is proposed that context modeling for encoding and decoding can be shared to indicate whether it is TS or DCT2.

[0554] a. In one example, the context modeling (ie, how to select the context index) for encoding and decoding transform_skip_flag and the first bin of tu_mts_idx may be the same.

[0555] b. Alternatively, furthermore, the contexts used for encoding and decoding the two bins may be different or partially shared.

[0556] i. In one example, the first set of contexts can be used to encode and decode transform_skip_flag, and the second set of contexts can be used to encode and decode the first binary bit of tu_mts_idx. And these two sets are not shared.

[0557] c. Alternatively, furthermore, the context used to encode and decode these two bins may be fully shared.

[0558] 35. It is proposed to use a single context for some or all context-coded bins of the syntax element tu_mts_idx.

[0559] a. For example, a single context may be used for the first binary bit of tu_mts_idx.

[0560] b. For example, a single context may be used for all bins except the first bin of tu_mts_idx.

[0561] i. Alternatively, in addition, the first binary bit of tu_mts_idx can be context encoded and decoded using the context modeling method mentioned in point 24.

[0562] 1. In one example, depending on the transform size, the first bin may be context-decoded with N contexts (e.g., the context index increment may be set to ((Log 2(TbW)+Log 2(TbH))>>1)–2, such that N=4), and all remaining bins may be context-decoded with a single context.

[0563] c. Alternatively, furthermore, the first and second bins of tu_mts_idx may be context coded, while all remaining bins may be bypass coded.

[0564] d. In one example, depending on the transform size (e.g., N=4), the first bin can be context-coded with N contexts, while the second bin can be context-coded with a single context, and the remaining bins can be bypass-coded. For example, all bins of tu_mts_idx can be bypass-coded.

[0565] 36.The binarization of the transformation matrix can be defined in the following way:

[0566] a. In one example, the following table shows the mapped bins and the corresponding matrix.

[0567] Transformation Matrix Binary bit string TS 0 DCT2-DCT2 1 0 DST7-DST7 1 1 0 DCT8-DST7 1 1 1 0 DST7-DCT8 1 1 1 1 0 DCT8-DCT8 1 1 1 1 1

[0568] b. In one example, the following table shows the mapped bins and the corresponding matrix.

[0569] Transformation Matrix Binary bit string TS 0 DCT2-DCT2 1 0 DST7-DST7 1 1 0 0 DCT8-DST7 1 1 0 1 DST7-DCT8 1 1 1 0 DCT8-DCT8 1 1 1 1

[0570] c. In one example, the following table shows the mapped bins and the corresponding matrix.

[0571]

[0572]

[0573] d. In one example, the following table shows the mapped bins and the corresponding matrix.

[0574] Transformation Matrix Binary bit string TS 0 DCT2-DCT2 10 DST7-DST7 11

[0575] e. In one example, the following table shows the mapped bins and the corresponding matrix.

[0576] Transformation Matrix Binary bit string TS 0 DCT2-DCT2 11 DST7-DST7 10

[0577] f. In one example, the following table shows the mapped bins and the corresponding matrix.

[0578] Transformation Matrix Binary bit string TS 1 DCT2-DCT2 00 DST7-DST7 01

[0579] g. In one example, the following table shows the mapped bins and the corresponding matrix.

[0580] Transformation Matrix Binary bit string TS 1 DCT2-DCT2 01 DST7-DST7 00

[0581] 37. The proposed MTS has only two candidate transform combinations: DCT2-DCT2 and DST7-DST7.

[0582] The examples described above may be combined in the context of the methods described below, such as methods 1745 , 1750 , 1755 , 1760 , 1765 , and 1770 , which may be implemented at a video encoder and / or decoder.

[0583] Fig.17A A flow chart of an exemplary method for video processing is shown. The method 1745 includes, at step 1746, selecting a common transform as both a vertical transform and a horizontal transform as part of a multiple transform selection (MTS) process.

[0584] The method 1745 includes, at step 1747, applying a vertical transform and a horizontal transform to the current block as part of performing a conversion between the current block of video and a bitstream representation of the video.

[0585] Fig. 17B A flow chart of an exemplary method for video processing is shown. Method 1750 includes, at step 1751, selecting, as part of a multiple transform selection (MTS) process, one or more transforms for a current block of video that do not include a discrete sine transform of type VIII (DST-VIII).

[0586] The method 1750 includes, at step 1752, applying one or more transforms to the current block as part of performing a conversion between the current block and a bitstream representation of the video based on the current block being decoded using a sub-block transform (SBT) codec.

[0587] Fig. 17CA flow chart of an exemplary method for video processing is shown. The method 1755 includes, at step 1756, selecting a vertical transform and a horizontal transform for a current block of the video as part of a multiple transform selection (MTS) process. In some embodiments, the current block is encoded and decoded using a sub-block transform (SBT) based on a transform block (TB) having a size that is smaller than a size of the current block, wherein the TB has a height (H) and a width (W), and wherein H and W are positive integers.

[0588] The method 1755 includes, at step 1757, performing a conversion between the current block and a bitstream representation of the video based on the selection.

[0589] Fig.17D A flow chart of an exemplary method for video processing is shown. The method 1760 includes, at step 1761, making a decision regarding applying a transform coefficient zeroing process for a current block of video based on one or more messages signaled in a bitstream representation of the video.

[0590] The method 1760 includes, at step 1762, performing a conversion between the current block and a bitstream representation based on the decision. In some embodiments, the one or more messages are signaled in a video parameter set (VPS), a sequence parameter set (SPS), a picture parameter set (PPS), an adaptation parameter set (APS), a decoder parameter set (DPS), a slice header, a picture header, a sequence header, a slice group header, a slice, a codec tree unit (CTU) row, a CTU, a codec unit (CU), a prediction unit (PU), or a transform unit (TU).

[0591] Fig.17E A flow chart of an exemplary method for video processing is shown. The method 1765 includes, at step 1766, making a decision regarding applying transform coefficient zeroing for a current block of video based on the size and type of transform.

[0592] The method 1765 includes, at step 1767, performing a conversion between the current block and a bitstream representation based on the decision.

[0593] Fig.17F A flow chart of an exemplary method for video processing is shown. The method 1770 includes, at step 1771, making a decision regarding applying transform coefficient zeroing based on an implicit transform of a multiple transform selection (MTS) process for a current block of video.

[0594] The method 1772 includes, at step 1772, performing a conversion between the current block and the bitstream representation based on the decision. In some embodiments, implicit MTS processing includes using characteristics of the current block to determine a transform to use during conversion.

[0595] 5 Example Implementations of the Disclosed Technology

[0596] In the following embodiments, additions are indicated using bold double brackets, for example, {{a}} indicates that "a" has been added, and deletions are indicated using bold double brackets, for example, [[a]] indicates that "a" has been deleted.

[0597] 5.1 Example #1

[0598] The working draft specified in JVET-N1001-v7 can be modified as follows.

[0599] 8.7.4 Transformation Processing of Scaling Transform Coefficients

[0600] 8.7.4.1 Overview

[0601] …

[0602] Table 8-17 – Specification of trTypeHor and trTypeVer depending on cu_sbt_horizontal_flag and cu_sbt_pos_flag

[0603] cu_sbt_horizontal_flag cu_sbt_pos_flag trTypeHor trTypeVer 0 0 {{nTbW>=8?0:}}2 1 0 1 1 1 1 0 1 {{nTbH>=8?0:}}2 1 1 1 1

[0604] …

[0605] 5.2 Example 2

[0606] The working draft specified in JVET-N1001-v8 can be modified as follows.

[0607] 7.3.7.10 Transformation unit syntax

[0608]

[0609] Alternatively, the following may apply:

[0610]

[0611] 5.3 Example 3

[0612] The working draft specified in JVET-N1001-v8 can be modified as follows.

[0613] 9.5.3.7 Fixed-length binarization

[0614] …

[0615] {{

[0616] 9.5.3.8 Binarization of tu_mts_idx

[0617] The input to this process is a request to binarize the syntax element tu_mts_idx.

[0618] The output of this process is the binarization of the syntax elements.

[0619] The binarization of the syntax element tu_mts_idx is specified in Table 9-14.

[0620] Table 0-14-binarization of tu_MTS_idx

[0621]

[0622] }}

[0623] 5.4 Example 4

[0624] The working draft specified in JVET-N1001-v8 can be modified as follows.

[0625] 9.5.4.2 Export process of ctxTable, ctxIdx and bypassFlag

[0626] 9.5.4.2.1 Overview

[0627] …

[0628] Table 0-17 - Assignment of ctxInc to syntax elements with context codec bits

[0629]

[0630] 5.5 Example 5

[0631] The working draft specified in JVET-N1001-v8 can be modified as follows.

[0632] 9.5.4.3 Derivation of ctxTable, ctxIdx and bypassFlag

[0633] 9.5.4.3.1 Overview

[0634] …

[0635] Table 0-17 - Assignment of ctxInc to syntax elements with context codec bits

[0636]

[0637] 5.6 Example 6

[0638] The working draft specified in JVET-N1001-v8 can be modified as follows.

[0639] 9.5.4.4 Derivation of ctxTable, ctxIdx and bypassFlag

[0640] 9.5.4.4.1 Overview

[0641] …

[0642] Table 0-17 - Assignment of ctxInc to syntax elements with context codec bits

[0643]

[0644] 5.7 Example 7

[0645] The working draft specified in JVET-N1001-v8 can be modified as follows.

[0646] 9.5.4.5 Derivation of ctxTable, ctxIdx and bypassFlag

[0647] 9.5.4.5.1 Overview

[0648] …

[0649] Table 0-17 - Assignment of ctxInc to syntax elements with context codec bits

[0650]

[0651] 5.8 Example 8

[0652] The working draft specified in JVET-N1001-v8 can be modified as follows.

[0653] 9.5.4.6 Derivation of ctxTable, ctxIdx and bypassFlag

[0654] 9.5.4.6.1 Overview

[0655] …

[0656] Table 0-17 - Assignment of ctxInc to syntax elements with context codec bits

[0657]

[0658] Alternatively, the following may apply:

[0659]

[0660] 5.9 Example 9

[0661] The working draft specified in JVET-O2001-vC may be modified as follows.

[0662] 8.7.4 Transformation Processing of Scaling Transform Coefficients

[0663] 8.7.4.1 Overview

[0664] …

[0665] The variable implicitMtsEnabled is derived as follows:

[0666] – implicitMtsEnabled is set equal to 1 if [[sps_mts_enabled_flag is equal to 1 and]] one of the following conditions is true:

[0667] –IntDraSubPartitionsSplitType is not equal to ISP_NO_SPLIT

[0668] –cu_sbt_flag is equal to 1, and Max(nTbW, nTbH) is less than or equal to 32

[0669] –sps_explicit_mts_intra_enabled_flag is equal to 0, CuPredMode[0][xTbY][yTbY] is equal to MODE_INTRA, lfnst_idx[x0][y0] is equal to 0, and intra_mip_flag[x0][y0] is equal to 0

[0670] – Otherwise, implicitMtsEnabled is set equal to 0.

[0671] 5.10 Example 10

[0672] The working draft specified in JVET-O2001-vC may be modified as follows.

[0673] 8.7.4 Transformation Processing of Scaling Transform Coefficients

[0674] 8.7.4.1 Overview

[0675] …

[0676] The variable implicitMtsEnabled is derived as follows:

[0677] – implicitMtsEnabled is set equal to 1 if [[sps_mts_enabled_flag is equal to 1 and]] one of the following conditions is true:

[0678] –IntDraSubPartitionsSplitType is not equal to ISP_NO_SPLIT

[0679] –cu_sbt_flag is equal to 1, and Max(nTbW, nTbH) is less than or equal to 32

[0680] – {{sps_mts_enabled_flag is equal to 1 and}}sps_explicit_mts_intra_enabled_flag is equal to 0 and CupredMode[0][xTbY][yTbY] is equal to MODE_INTRA and lfnst_idx[x0][y0] is equal to 0 and intra_mip_flag[x0][y0] is equal to 0

[0681] – Otherwise, implicitMtsEnabled is set to 0.

[0682] 5.11 Example 11

[0683] The working draft specified in JVET-O2001-vC may be modified as follows.

[0684] 7.3.2.3 Sequence parameter set RBSP syntax

[0685] …

[0686]

[0687] 5.12 Example 12

[0688] The working draft specified in JVET-O2001-vC may be modified as follows.

[0689] 7.3.2.3 Sequence parameter set RBSP syntax

[0690] …

[0691]

[0692] 1.4.3.3 Sequence Parameter Set RBSP Semantics

[0693] [[sps_mts_enabled_flag equal to 1 specifies that sps_explicit_mts_intra_enabled_flag is present in the sequence parameter set RBSP syntax, and sps_explicit_mts_inter_enabled_flag is present in the sequence parameter set RBSP syntax. sps_mts_enabled_flag equal to 0 specifies that sps_explicit_mts_intra_enabled_flag is not present in the sequence parameter set RBSP syntax, and sps_explicit_mts_inter_enabled_flag is not present in the sequence parameter set RBSP syntax. ]]

[0694] 8.7.4 Transformation process of scaled transform coefficients

[0695] 8.7.4.1 Overview

[0696] …

[0697] The variable implicitMtsEnabled is derived as follows:

[0698] – implicitMtsEnabled is set equal to 1 if [[sps_mts_enabled_flag is equal to 1 and]] one of the following conditions is true:

[0699] –IntDraSubPartitionsSplitType is not equal to ISP_NO_SPLIT

[0700] –cu_sbt_flag is equal to 1, and Max(nTbW, nTbH) is less than or equal to 32

[0701] –sps_explicit_mts_intra_enabled_flag is equal to 0, CuPredMode[0][xTbY][yTbY] is equal to MODE_INTRA, lfnst_idx[x0][y0] is equal to 0, and intra_mip_flag[x0][y0] is equal to 0

[0702] – Otherwise, implicitMtsEnabled is set equal to 0.

[0703] 5.13 Example 13

[0704] The working draft specified in JVET-O2001-vC may be modified as follows.

[0705] 8.7.4 Transformation Processing of Scaling Transform Coefficients

[0706] 8.7.4.1 Overview

[0707] …

[0708] The variable implicitMtsEnabled is derived as follows:

[0709] – implicitMtsEnabled is set equal to 1 if [[sps_mts_enabled_flag is equal to 1 and]] one of the following conditions is true:

[0710] –IntDraSubPartitionsSplitType is not equal to ISP_NO_SPLIT

[0711] –cu_sbt_flag is equal to 1, Max(nTbW, nTbH) is less than or equal to 32

[0712] – {{sps_mts_enabled_flag is equal to 1 and}}sps_explicit_mts_intra_enabled_flag is equal to 0 and CuPredMode[0][xTbY][yTbY] is equal to MODE_INTRA and lfnst_idx[x0][y0] is equal to 0 and intra_mip_flag[x0][y0] is equal to 0

[0713] – Otherwise, implicitMtsEnabled is set equal to 0.

[0714] 5.14 Example 14

[0715] The working draft specified in JVET-O2001-vC may be modified as follows.

[0716] 7.3.8.5 Codec unit syntax

[0717]

[0718]

[0719] 5.15 Example 15

[0720] This embodiment applies transform coefficient zeroing according to the SPS flag sps_mts_enabled_flag.

[0721] The working draft specified in JVET-O2001-v14 may be modified as follows.

[0722] 7.3.8.11 Residual Codec Syntax

[0723]

[0724] In some embodiments, the following technical solutions can be implemented:

[0725] B1. A method for video processing, comprising: selecting a common transform as a vertical transform and a horizontal transform as part of a multiple transform selection (MTS) process; and applying the vertical transform and the horizontal transform to the current block as part of performing a conversion between a current block of video and a bitstream representation of the video.

[0726] B2. The method of solution B1, wherein the common transformation is a transformation of the first type or a transformation of the second type.

[0727] B3. The method of solution B2, wherein the first type of transform is a discrete cosine transform of type II (DCT-II).

[0728] B4. The method of solution B2, wherein the second type of transform is a discrete sine transform of type VII (DST-VII).

[0729] B5. The method of solution B1, wherein the signaling for MTS processing includes at most one flag for the current block.

[0730] B6. The method of solution B5, wherein, when the flag is 0, the common transform is a discrete cosine transform of type II (DCT-II), and wherein when the flag is 1, the common transform is a discrete sine transform of type VII (DST-VII).

[0731] B7. The method of solution B5, wherein, when the flag is 1, the common transform is a discrete cosine transform of type II (DCT-II), and wherein when the flag is zero, the common transform is a discrete sine transform of type VII (DST-VII).

[0732] B8. The method of any of Solutions B1 to B7, wherein the current block has a height (H) and a width (W), and wherein H and W are positive integers.

[0733] B9. The method of solution B8, where W ≥ T1 and H ≥ T2, and T1 and T2 are integers.

[0734] B10. The method of solution B9, wherein T1=T2=8.

[0735] B11. The method of solution B8, where W≤T1 and H≤T2, and T1 and T2 are integers.

[0736] B12. The method of solution B11, where T1=T2=16.

[0737] B13. The method of solution B8, where min(W,H)≥T1, and T1 is an integer.

[0738] B14. The method of solution B13, wherein T1=8.

[0739] B15. The method of solution B8, where max(W, H)≤T1, and T1 is an integer.

[0740] B16. The method of solution B15, where T1=32.

[0741] B17. The method of solution B8, where W×H≥T1, and T1 is an integer.

[0742] B18. The method of solution B17, where T1=64.

[0743] B19. The method of solution B8, where W×H≤T1, and T1 is an integer.

[0744] B20. The method of solution B19, where T1=256.

[0745] B21. A method for video processing, comprising: as part of a multiple transform selection (MTS) process, selecting one or more transforms that do not include a discrete sine transform of type VIII (DST-VIII) for a current block of a video; and as part of performing a conversion between the current block and a bitstream representation of the video, applying the one or more transforms to the current block based on whether the current block is encoded using a sub-block transform (SBT).

[0746] B22. The method of solution B21, wherein the one or more transforms consist of a discrete cosine transform of type II (DCT-II) and a discrete sine transform of type VII (DST-VII).

[0747] B23. The method of solution B21, wherein the one or more transformations include a horizontal transformation and a vertical transformation.

[0748] B24. The method of solution B23, wherein SBT is applied in the vertical direction, wherein the horizontal transform comprises a discrete cosine transform of type II (DCT-II), and wherein the vertical transform comprises a discrete sine transform of type VII (DST-VII).

[0749] B25. The method of solution B23, wherein SBT is applied in the horizontal direction, wherein the vertical transform comprises a discrete cosine transform of type II (DCT-II), and wherein the horizontal transform comprises a discrete sine transform of type VII (DST-VII).

[0750] B26. A method for video processing, comprising: selecting a vertical transform and a horizontal transform for a current block of a video as part of a Multiple Transform Selection (MTS) process, wherein, based on the size of a Transform Block (TB) being smaller than the size of the current block, encoding and decoding the current block using a Sub-Block Transform (SBT), wherein the TB has a height and a width, and wherein H and W are positive integers; and performing a conversion between the current block and a bitstream representation of the video based on the selection.

[0751] B27. The method of solution B26, wherein the SBT is applied in the vertical direction, wherein when W≥T1, the vertical transform comprises a Discrete Sine Transform of type VII (DST-VII), and the horizontal transform comprises a Discrete Cosine Transform of type II (DCT-II), wherein when W<T1, the vertical transform comprises a Discrete Sine Transform of type VII (DST-VII), and the horizontal transform comprises a Discrete Cosine Transform of type VIII (DCT-VIII), and wherein T1 is a positive integer.

[0752] B28. The method of solution B26, wherein the SBT is applied in the horizontal direction, wherein when H≥T1, the horizontal transform comprises a Discrete Sine Transform of type VII (DST-VII), and the vertical transform comprises a Discrete Cosine Transform of type II (DCT-II), wherein when H<T1, the horizontal transform comprises a Discrete Sine Transform of type VII (DST-VII), and the vertical transform comprises a Discrete Cosine Transform of type VIII (DCT-VIII), and wherein T1 is a positive integer.

[0753] B29. The method of solution B27 or B28, wherein T1 = 8.

[0754] B30. A method for video processing, comprising: making a decision regarding the application of transform coefficient zeroing processing for a current block of a video based on one or more messages signaled in a bitstream representation of the video; and performing a conversion between the current block and the bitstream representation based on the decision, wherein the one or more messages are signaled in a Video Parameter Set (VPS), a Sequence Parameter Set (SPS), a Picture Parameter Set (PPS), an Adaptive Parameter Set (APS), a Decoder Parameter Set (DPS), a slice header, a picture header, a sequence header, a slice group header, a slice, a Coding Tree Unit (CTU) row, a CTU, a Coding Unit (CU), a Prediction Unit (PU), or a Transform Unit (TU).

[0755] B31. The method of solution B30, wherein the one or more messages include a flag controlling the use of Multiple Transform Selection (MTS) processing for the current block.

[0756] B32. The method of solution B30, wherein the one or more messages include a flag that controls the use of a sub-block transform (SBT) for the current block.

[0757] B33. The method of solution B30, wherein the decision is also based on the size of the transform block (TB).

[0758] B34. The method of solution B30, wherein transform coefficient zeroing is not applied to transform blocks (TBs) of a specified size when a multiple transform selection (MTS) process is not applied.

[0759] B35. The method of solution B30, wherein transform coefficient zeroing is applied to a transform block (TB) having a specified size when a multiple transform selection (MTS) process is applied.

[0760] B36. A method for video processing, comprising: for a current block of video, based on the size and type of the transform, making a decision about applying transform coefficient zeroing; and based on the decision, performing a conversion between the current block and a bitstream representation.

[0761] B37. The method of solution B36, wherein transform coefficient zeroing is applied when the transform is a discrete cosine transform of type II (DCT-II) and the size of the transform is M×64 or 64×N, and wherein M and N are positive integers.

[0762] B38. Solution B37, where M≤64, N≤64.

[0763] B39. The method of solution B36, wherein transform coefficient zeroing is applied when the transform is a discrete cosine transform of type VIII (DCT-VIII) or a discrete sine transform of type VII (DST-VII) and the size of the transform is M×32 or 32×N, and wherein M and N are positive integers.

[0764] B40. Method for solution B37, where M≤32, N≤32.

[0765] B41. The method of solution B36, wherein transform coefficient zeroing is not applied when the current block is encoded and decoded using transform skip mode.

[0766] B42. A method for video processing, comprising: for a current block of video, making a decision about applying transform coefficients to zero based on an implicit transform processed by multiple transform selection (MTS); and performing a conversion between the current block and a bitstream representation based on the decision, wherein the implicit MTS processing includes using characteristics of the current block to determine the transform to be used during the conversion.

[0767] B43. The method of solution B42, wherein transform coefficient zeroing is applied when encoding or decoding a transform block (TB) of size M×32 or 32×N using implicit transform, and wherein M and N are positive integers.

[0768] B44. Solution B43, where M≤32, N≤32.

[0769] B45. The method of any of solutions B1 to B44, wherein the conversion generates the current block from a bitstream representation.

[0770] B46. The method of any of solutions B1 to B44, wherein the transform generates a bitstream representation from the current block.

[0771] B47. An apparatus in a video system, comprising a processor and a non-transitory memory having instructions thereon, wherein the instructions, when executed by the processor, cause the processor to implement a method in any one of solutions B1 to B46.

[0772] B48. A computer program product stored on a non-transitory computer-readable medium, the computer program product comprising a program code for executing the method in any one of solutions B1 to B46.

[0773] Fig.18 1 is a block diagram of a video processing device 1800. Device 1800 may be used to implement one or more methods described herein. Device 1800 may be embodied in a smartphone, a tablet, a computer, an IoT receiver, etc. Device 1800 may include one or more processors 1802, one or more memories 1804, and video processing hardware 1806. Processor(s) 1802 may be configured to implement one or more methods described in this document (including but not limited to method 1700). Memory(s) 1804 may be used to store data and code for implementing the methods and techniques described herein. Video processing hardware 1806 may be used to implement some of the techniques described in this document in hardware circuits.

[0774] In some embodiments, the video encoding and decoding method can be implemented using a device implemented on a hardware platform, such as reference Fig.18 described.

[0775] Some embodiments of the disclosed technology include making a decision or determination to enable a video processing tool or mode. In an example, when a video processing tool or mode is enabled, the encoder will use or implement the tool or mode in the processing of a video block, but will not necessarily modify the resulting bitstream based on the use of the tool or mode. That is, when a video processing tool or mode is enabled based on a decision or determination, the conversion from a video block to a bitstream representation of a video will use the video processing tool or mode. In another example, when a video processing tool or mode is enabled, a decoder will process the bitstream using the knowledge that the bitstream has been modified based on the video processing tool or mode. That is, the conversion from the bitstream representation of a video to a video block will be performed using a video processing tool or mode enabled based on a decision or determination.

[0776] Some embodiments of the disclosed technology include making a decision or determination to disable a video processing tool or mode. In one example, when the video processing tool or mode is disabled, the encoder will not use the tool or mode in the conversion of video blocks to a bitstream representation of the video. In another example, when the video processing tool or mode is disabled, the decoder will process the bitstream with the knowledge that the bitstream has not been modified using the video processing tool or mode that was enabled based on the decision or determination.

[0777] Fig.19 1 is a block diagram illustrating an example video processing system 1900 in which various techniques disclosed herein may be implemented. Various implementations may include some or all of the components of system 1900. System 1900 may include an input 1902 for receiving video content. The video content may be received in a raw or uncompressed format, such as 8 or 10 bit multi-component pixel values, or may be in a compressed or encoded format. Input 1902 may represent a network interface, a peripheral bus interface, or a storage interface. Examples of network interfaces include wired interfaces (such as Ethernet, passive optical networks, etc.) and wireless interfaces (such as wireless networks or cellular interfaces).

[0778] System 1900 may include a codec component 1904, which may implement various codecs or encoding methods described in this document. Codec component 1904 may reduce the average bit rate of the video from the input 1902 of codec component 1904 to the output to generate a codec representation of the video. Therefore, codec technology is sometimes referred to as video compression or video code conversion technology. The output of codec component 1904 may be stored or transmitted by a connected communication (as represented by component 1906). Component 1908 may use the bitstream (or codec) representation of the storage or communication of the video received at input end 1902 to generate pixel values ​​or displayable video sent to display interface 1910. The process of generating user-visible video from bitstream representation is sometimes referred to as video decompression. In addition, although some video processing operations are referred to as "codec" operations or tools, it should be understood that codec tools or operations are used at encoders, and corresponding decoding tools or operations that reverse the codec results will be performed by decoders.

[0779] Examples of peripheral bus interfaces or display interfaces may include Universal Serial Bus (USB) or High Definition Multimedia Interface (HDMI) or Display Port, etc. Examples of storage interfaces include SATA (Serial Advanced Technology Attachment), PCI, IDE interfaces, etc. The technology described in this document may be embodied in various electronic devices, such as mobile phones, laptops, smartphones, or other devices capable of performing digital data processing and / or video display.

[0780] From the above, it will be appreciated that specific embodiments of the presently disclosed technology have been described herein for purposes of illustration, but that various modifications may be made without departing from the scope of the invention. Accordingly, the presently disclosed technology is not limited except as defined by the appended claims.

[0781] The implementation of the subject matter and functional operations described in this patent document can be implemented in various systems, digital electronic circuits, or in computer software, firmware or hardware (including the structures disclosed in this specification and their structural equivalents), or in a combination of one or more of them. The implementation of the subject matter described in this specification can be implemented as one or more computer program products, that is, one or more modules of computer program instructions encoded on a tangible and non-transitory computer-readable medium, for execution by a data processing device or controlling the operation of the data processing device. The computer-readable medium can be a machine-readable storage device, a machine-readable storage substrate, a storage device, a material combination that implements a machine-readable propagation signal, or a combination of one or more of them. The term "data processing unit" or "data processing device" includes all devices, equipment and machines for processing data, including, for example, a programmable processor, a computer or multiple processors or computers. In addition to hardware, the device may include code that creates an execution environment for the computer program in question, for example, code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

[0782] A computer program (also referred to as a program, software, software application, script, or code) may be written in any form of programming language, including compiled or interpreted languages, and it may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program may be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files storing one or more modules, subroutines, or portions of code). A computer program may be deployed to be executed on a single computer or on multiple computers located at one site or distributed across multiple sites and interconnected by a communications network.

[0783] The processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. These processes and logic flows can also be performed by special purpose logic circuits, and the device can also be implemented as a special purpose logic circuit, for example, an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit).

[0784] For example, processors suitable for executing computer programs include general and special purpose microprocessors, and any one or more processors of any type of digital computer. Typically, the processor will receive instructions and data from a read-only memory or a random access memory or both. The basic elements of a computer are a processor for executing instructions and one or more storage devices for storing instructions and data. Typically, a computer will also include or be operably coupled to one or more large-capacity storage devices for storing data, such as magnetic disks, magneto-optical disks, or optical disks, to receive data from or transmit data to, or both. However, a computer does not need to have such a device. Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media, and storage devices, including, for example, semiconductor storage devices, such as EPROM, EEPROM, and flash memory devices. The processor and memory can be supplemented or incorporated therein by dedicated logic circuits.

[0785] Although this patent document contains many details, these details should not be interpreted as limitations on any invention or the scope of the claimed protection, but rather as descriptions of features that may be specific to a particular embodiment of a particular invention. Certain features described in this patent document in the context of a separate embodiment may also be implemented in combination in a single embodiment. On the contrary, the various features described in the context of a single embodiment may also be implemented separately in multiple embodiments or in any suitable sub-combination. In addition, although features may be described above as working in certain combinations, and even initially claimed as such, in some cases, one or more features from the claimed combination may be deleted from the combination, and the claimed combination may point to a variant of a sub-combination or a sub-combination.

[0786] Similarly, while operations are described in a particular order in the drawings, this should not be understood as requiring that the operations be performed in the particular order or order shown, or that all of the illustrated operations be performed, in order to achieve the desired results. Furthermore, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all embodiments.

[0787] Only a few implementations and examples are described, and other implementations, enhancements, and variations may be made based on what is described and illustrated in this patent document.

Claims

1. A method for processing video data, comprising: For a current transform block of the video, making a decision regarding applying transform coefficient zeroing based on an implicitly selected transform of a multiple transform selection process of a primary transform; and Based on the decision, performing conversion between the current transform block and a bitstream of a video, wherein the implicitly selected transform of the multiple transform selection process does not have one or more transform indices, One or more transform matrices including at least one of a horizontal transform matrix or a vertical transform matrix applied to the current transform block are based on a representative coefficient set of the current transform block, The one or more transform matrices are based on a function of a representative set of coefficients for the current transform block, and an output of the function is the number of coefficients in the representative set of coefficients.

2. The method according to claim 1, wherein: When the size of the current transform block is M×32 or 32×N and the implicitly selected transform codec is used, transform coefficient zeroing is allowed to be applied, and wherein M and N are positive integers, and M≤32 and N≤32.

3. The method according to claim 2, wherein: In response to the transform coefficient zeroing being applied to the current transform block having a size of M×32, when M=32, only left 16 columns and upper 16 rows of transform coefficients of the current transform block have non-zero coefficients.

4. The method according to claim 2, wherein: In response to the transform coefficient zeroing being applied to the current transform block having a size of 32×N, when N=32, only left 16 columns and upper 16 rows of transform coefficients of the current transform block have non-zero coefficients.

5. The method according to claim 1, wherein: The representative coefficient set includes a portion of all coefficients of the current transform block.

6. The method according to claim 1, wherein: When the number is an even number, the horizontal transformation matrix includes a first transformation matrix and the vertical transformation matrix includes a second transformation matrix, wherein when the number is an odd number, the horizontal transformation matrix includes a third transformation matrix and the vertical transformation matrix includes a fourth transformation matrix.

7. The method according to claim 6, wherein: The first transformation matrix is ​​identical to the second transformation matrix, and the third transformation matrix is ​​identical to the fourth transformation matrix.

8. The method according to claim 6, wherein: Each of the first, second, third and fourth transform matrices is one of a discrete cosine transform (DCT) of type II (DCT-II) or a discrete sine transform (DST) of type VII (DST-VII).

9. The method according to claim 7, wherein: The first transformation matrix is ​​different from the third transformation matrix.

10. The method according to claim 8, wherein: The first transform matrix and the second transform matrix are discrete sine transform (DST) of type VII (DST-VII), and the third transform matrix and the fourth transform matrix are discrete cosine transform (DCT) of type II (DCT-II).

11. The method according to claim 1, wherein: The converting includes encoding the current transform block into the bitstream.

12. The method according to claim 1, wherein: The converting includes decoding the current transform block from the bitstream.

13. An apparatus for processing video data, comprising a processor and a non-transitory memory having instructions thereon, wherein: The instructions, when executed by the processor, cause the processor to: For a current transform block of the video, making a decision regarding applying transform coefficient zeroing based on an implicitly selected transform of a multiple transform selection process of a primary transform; and Based on the decision, performing conversion between the current transform block and a bitstream of a video, wherein the implicitly selected transform of the multiple transform selection process does not have one or more transform indices, One or more transform matrices including at least one of a horizontal transform matrix or a vertical transform matrix applied to the current transform block are based on a representative coefficient set of the current transform block, The one or more transform matrices are based on a function of a representative set of coefficients for the current transform block, and an output of the function is the number of coefficients in the representative set of coefficients.

14. The device according to claim 13, wherein: When the size of the current transform block is M×32 or 32×N and the implicitly selected transform codec is used, transform coefficient zeroing is allowed to be applied, and wherein M and N are positive integers, and M≤32 and N≤32.

15. A non-transitory computer-readable storage medium storing instructions that cause a processor to: For a current transform block of the video, making a decision regarding applying transform coefficient zeroing based on an implicitly selected transform of a multiple transform selection process of a primary transform; and Based on the decision, performing conversion between the current transform block and a bitstream of a video, in, The implicitly selected transform of the multiple transform selection process does not have one or more transform indices, One or more transform matrices including at least one of a horizontal transform matrix or a vertical transform matrix applied to the current transform block are based on a representative coefficient set of the current transform block, The one or more transform matrices are based on a function of a representative set of coefficients for the current transform block, and an output of the function is the number of coefficients in the representative set of coefficients.

16. The non-transitory computer-readable storage medium of claim 15, wherein: When the size of the current transform block is M×32 or 32×N and the implicitly selected transform codec is used, transform coefficient zeroing is allowed to be applied, and wherein M and N are positive integers, and M≤32 and N≤32.

17. A method for storing a bit stream of a video, comprising: For a current transform block of the video, making a decision regarding applying transform coefficient zeroing based on an implicitly selected transform of a multiple transform selection process of a primary transform; generating a bitstream of the video based on the decision; and storing the generated bit stream in a non-transitory computer-readable recording medium, wherein the implicitly selected transform of the multiple transform selection process does not have one or more transform indices, One or more transform matrices including at least one of a horizontal transform matrix or a vertical transform matrix applied to the current transform block are based on a representative coefficient set of the current transform block, The one or more transform matrices are based on a function of a representative set of coefficients for the current transform block, and an output of the function is the number of coefficients in the representative set of coefficients.

18. The method according to claim 17, wherein: When the size of the current transform block is M×32 or 32×N and the implicitly selected transform codec is used, transform coefficient zeroing is allowed to be applied, and wherein M and N are positive integers, and M≤32 and N≤32.

19. A method for video processing, comprising: For a current block of the video, a decision is made regarding applying transform coefficient zeroing based on an implicit transform processed by a multiple transform selection (MTS); and Based on the decision, performing a conversion between the current block and a bitstream, wherein implicit MTS processing comprises using characteristics of the current block to determine a transform to use during conversion, One or more transform matrices including at least one of a horizontal transform matrix or a vertical transform matrix applied to the current block are based on a representative coefficient set of the current block, The one or more transform matrices are based on a function of a representative set of coefficients for the current block, and an output of the function is the number of coefficients in the representative set of coefficients.

20. The method according to claim 19, wherein: When a transform block (TB) of size M×32 or 32×N is encoded or decoded using implicit transform, transform coefficient zeroing is applied, and where M and N are positive integers. The method of claim 20 , wherein M≤32 and N≤32.

22. The method according to claim 19, wherein: The conversion generates the current block from a bitstream.

23. The method according to claim 19, wherein: The conversion generates a bitstream from the current block.

24. An apparatus for processing video data, comprising a processor and a non-transitory memory having instructions thereon, wherein: The instructions, when executed by the processor, cause the processor to implement the method of any one of claims 3-12 and 19-23.

25. A non-transitory computer-readable storage medium storing instructions that cause a processor to perform the method of any one of claims 3-12 and 19-23.

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