An MCU chip integrated with a DSRC modem and its communication method

Abstract

The present invention relates to the field of chip design technology, and more particularly to an MCU chip integrated with a DSRC modem and a communication method thereof. The MCU chip internally integrates a CPU, a memory, an internal storage, and a DSRC modem, wherein the DSRC modem is connected to the internal storage via parallel communication. The DSRC modem is provided with a TX FIFO module and an RX FIFO module, and the DSRC modem is provided with a transmitter and a receiver, wherein the transmitter is communicatively connected to the TX FIFO module, the receiver is communicatively connected to the RX FIFO module, and both the transmitter and the receiver are communicatively connected to the internal storage. The present invention integrates the DSRC modem within the MCU chip to achieve parallel communication, thereby reducing data loss, increasing processing speed, and lowering power consumption. The CPU can also transmit data using software, while the transmitter and receiver are used to transmit dedicated data, thereby reducing the load on the CPU.

Description

Technical Field

[0001] The present invention relates to the technical field of chip design, and in particular to an MCU chip integrated with a DSRC modem and a communication method thereof. Background Art

[0002] At present, the environment in which OBU terminals are used is as follows: Figure 1 As shown, a DSRC modem is built into the radio frequency chip (RFChip). This RF chip communicates with a general-purpose MCU via serial communication to drive the application. Serial communication primarily uses SPI (4-wire interface) or I2C (2-wire interface). While these serial communication methods have fewer pins, they suffer from slower communication speeds. Furthermore, an external RF chip communicates with a general-purpose MCU, transmitting data via the RF chip's built-in DSRC modem. Because the MCU application and RF chip transmit and receive specified data via serial transmission, data loss may occur if various interruptions occur.

[0003] Therefore, for stable and fast data communication, parallel communication is an effective method. However, the increase in the number of pins required for communication and the increase in the chip packaging may become a disadvantage. Summary of the Invention

[0004] The object of the present invention is to provide an MCU chip integrated with a DSRC modem and a communication method thereof, so as to solve the problems existing in the above-mentioned prior art.

[0005] The above technical objectives of the present invention are achieved through the following technical solutions:

[0006] A MCU chip integrated with a DSRC modem, wherein a CPU, a storage, a memory and a DSRC modem are integrated inside the MCU chip, and the DSRC modem is connected to the memory in a parallel communication manner.

[0007] By adopting the above technical solution, the DSRC modem is built into the MCU chip, parallel communication can be achieved while reducing the number of external pins, thereby achieving the effect of increasing communication speed and reducing power consumption.

[0008] In a further embodiment, the DSRC modem is provided with a TX FIFO module and an RX FIFO module, the TX FIFO module is used to communicate with a transmitter module of an external RF chip, and the RX FIFO module is used to communicate with a receiver module of an external RF chip.

[0009] By adopting the above technical solution, the TX FIFO module and the RX FIFO module can be used as caches to ensure that data is not lost.

[0010] In a further embodiment, the DSRC modem is provided with a transmitter and a receiver, the transmitter is communicatively connected to the TX FIFO module, the receiver is communicatively connected to the RX FIFO module, and both the transmitter and the receiver are communicatively connected to the memory.

[0011] By adopting the above technical solution, the transmitter and the receiver are responsible for processing dedicated data, which helps to reduce CPU usage.

[0012] In a further embodiment, the RX FIFO module may serve as the receiver.

[0013] By adopting the above technical solution, the internal structure can be further simplified and the chip size can be reduced.

[0014] A communication method for an MCU chip with an integrated DSRC modem, including receiving data and sending data,

[0015] The steps for receiving data include:

[0016] The RX FIFO module receives data from the external RF chip;

[0017] The receiver identifies the status information of the RX FIFO module and controls the memory to write data according to the status information, waits for writing when the status information is Full, and writes when the status information is Empty;

[0018] After all data are written into the memory, the receiver will interrupt in the write completion status information, allowing the CPU to finish its work;

[0019] The steps to send data include:

[0020] The transmitter reads the data to be transmitted into the memory;

[0021] The transmitter identifies the status information of the TX FIFO module and automatically transmits according to the status information, waits for transmission when the status information is Full, and transmits when the status information is Empty;

[0022] When all transmissions are completed, the transmitter will interrupt in the status information of the transmission completion, allowing the CPU to finish its work.

[0023] In summary, the present invention has the following beneficial effects:

[0024] 1. The present invention integrates the DSRC modem into the MCU chip to achieve parallel communication, thereby reducing data loss, improving processing speed and reducing power consumption;

[0025] 2. By integrating a CPU into the MCU and designing the transmitter and receiver settings within the DSRC modem, the CPU can also use software to transmit data, while the transmitter and receiver are used to transmit dedicated data, which can reduce the CPU load. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a structural diagram of a general OBU terminal in the prior art;

[0027] Figure 2 This is a structural diagram of the MCU chip of the present invention connected to an external radio frequency chip;

[0028] Figure 3 It is a structural diagram used to reflect the transmitter and receiver in the present invention.

[0029] In the figure, 1. CPU; 2. DSRC modem; 21. TX FIFO module; 22. RX FIFO module; 23. Transmitter; 24. Receiver; 3. Memory. DETAILED DESCRIPTION

[0030] The present invention will be further described in detail below with reference to the accompanying drawings.

[0031] The same parts are denoted by the same reference numerals. It should be noted that the words "front", "rear", "left", "right", "upper" and "lower" used in the following description refer to the attached Figure 1 In the description, the terms "bottom" and "top," "inner" and "outer" refer to directions toward or away from a particular component geometry, respectively. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Thus, features defined as "first" or "second" may explicitly or implicitly include one or more of such features. Throughout this specification, "plurality" means two or more, unless otherwise specifically defined in terms of the center's direction.

[0032] Example 1:

[0033] To establish an efficient DSRC modem data communication environment, stable baseband-level transmit and receive data buffering can be performed internally regardless of the MCU application. In order to use the buffered data directly in the MCU through parallel communication, a method for establishing a stable communication environment is required. Therefore, the present invention designs an MCU chip with an integrated DSRC modem.

[0034] like Figure 2-3 As shown, an MCU chip with an integrated DSRC modem is integrated within the MCU chip. The MCU chip integrates CPU 1, memory 3, internal storage, and DSRC modem 2, which is connected to the internal storage via parallel communication. Compared to serial communication, which can suffer data loss due to various interruptions, integrating the DSRC modem 2 into the MCU chip enables parallel communication, allowing CPU 1 to rapidly communicate without data loss. Because parallel communication is faster than serial communication, appropriately reducing the parallel communication speed can still meet normal operating requirements. This reduces power consumption while maintaining a certain communication speed.

[0035] The DSRC modem 2 of the present invention is provided with a TX FIFO module 21 and an RX FIFO module 22. The TX FIFO module 21 is used to communicate with the transmitter module of the external RF chip, and the RX FIFO module 22 is used to communicate with the receiver module of the external RF chip. The TX FIFO module 21 and the RX FIFO module 22 are both dedicated cache memories with the property of first-in-first-out. When the DSRC modem 2 receives and sends data, the data is protected by the cache, which can reduce the risk of data loss.

[0036] To further ensure the integrity of data transmission, DSRC modem 2 is equipped with a transmitter 23 and a receiver 24. Transmitter 23 is communicatively connected to TX FIFO module 21, and receiver 24 is communicatively connected to RX FIFO module 22. Both transmitter 23 and receiver 24 are communicatively connected to memory. Transmitter 23 and receiver 24 are dedicated functional components configured for transmitting and receiving ETC data. The provision of transmitter 23 and receiver 24 can help reduce the load on CPU 1. RX FIFO module 22 can function as receiver 24, that is, RX FIFO module 22 carries the identification function of receiver 24. This configuration can reduce the internal structure of the MCU chip and reduce the chip size, thereby reducing manufacturing costs.

[0037] The present invention also provides a communication method for an MCU chip integrated with a DSRC modem, including receiving data and sending data.

[0038] The steps for receiving data include:

[0039] The RX FIFO module 22 receives data from the external RF chip;

[0040] The receiver 24 identifies the status information of the RX FIFO module 22 and controls the memory 3 to write data according to the status information. When the status information is Full, it waits for writing, and when the status information is Empty, it writes;

[0041] After all data are written into the memory 3, the receiver 24 will interrupt in the status information of writing completion, so that the CPU 1 can finish its work;

[0042] The steps to send data include:

[0043] The transmitter 23 reads the data to be transmitted into the memory;

[0044] The transmitter 23 identifies the status information of the TX FIFO module 21 and automatically transmits according to the status information. When the status information is Full, it waits for transmission, and when the status information is Empty, it transmits;

[0045] When all transmissions are completed, the transmitter 23 will interrupt in the status information of the transmission completion, allowing the CPU 1 to finish its work.

[0046] In the embodiments disclosed herein, terms such as "installed," "connected," "connected," and "fixed" should be understood broadly. For example, "connected" may refer to a fixed connection, a detachable connection, or an integral connection; and "connected" may refer to a direct connection or an indirect connection via an intermediary. Those skilled in the art will understand the specific meanings of the above terms in the embodiments disclosed herein based on specific circumstances.

[0047] This specific embodiment is merely an explanation of the present invention and is not intended to limit the present invention. After reading this specification, those skilled in the art may make non-creative modifications to this embodiment as needed. However, as long as such modifications are within the scope of the claims of the present invention, they are protected by patent law.

Claims

1. A communication method for an MCU chip integrated with a DSRC modem, characterized in that: The MCU chip is internally integrated with a CPU (1), a memory (3), a memory and a DSRC modem (2), and the DSRC modem (2) is connected to the memory in a parallel communication manner; the DSRC modem (2) is provided with a TX FIFO module (21) and an RX FIFO module (22), the TX FIFO module (21) is used for communicating with the sending module of the external radio frequency chip, and the RX FIFO module (22) is used for communicating with the receiving module of the external radio frequency chip; the DSRC modem (2) is provided with a transmitter (23) and a receiver (24), the transmitter (23) is communicatively connected to the TX FIFO module (21), the receiver (24) is communicatively connected to the RX FIFO module (22), and both the transmitter (23) and the receiver (24) are communicatively connected to the memory; the TX FIFO module (21) and the RX FIFO module (22) are both cache memories, and their nature is data first-in-first-out, and the data of the DSRC modem (2) is protected by the cache when receiving and sending data; Its communication methods include receiving data and sending data, The steps for receiving data include: The RX FIFO module (22) receives data from an external radio frequency chip; The receiver (24) identifies the status information of the RX FIFO module (22) and controls the memory (3) to write data according to the status information, waits for writing when the status information is Full, and writes when the status information is Empty; After all data are written into the memory (3), the receiver (24) will interrupt in the status information of writing completion, so that the CPU (1) can finish its work; The steps to send data include: The transmitter (23) reads the data to be transmitted into the memory; The transmitter (23) identifies the status information of the TX FIFO module (21) and automatically transmits according to the status information, waiting for transmission when the status information is Full, and transmitting when the status information is Empty; When all transmissions are completed, the transmitter (23) will interrupt in the status information of the transmission completion, allowing the CPU (1) to end its work.

2. The communication method of the MCU chip integrated with the DSRC modem according to claim 1, characterized in that: The RX FIFO module (22) serves as the receiver (24), and the RX FIFO module (22) carries the identification function of the receiver (24).

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