Electronic device
By using multi-cured adhesive layers and other reinforcing structures in electronic devices, the problems of insufficient reliability in sensing external inputs and poor folding performance are solved, achieving higher reliability and folding performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SAMSUNG DISPLAY CO LTD
- Filing Date
- 2021-08-24
- Publication Date
- 2026-07-03
AI Technical Summary
Existing electronic devices are not reliable enough when sensing external inputs and have poor folding performance.
The device employs a multi-curing adhesive layer structure, including first and second adhesive layers covering the sensing coil, and combining a shielding layer, a magnetic sheet, a buffer layer, and a light-blocking layer to enhance the reliability and folding performance of the electronic device.
It improves the reliability of electronic devices when sensing external inputs and enhances their folding performance, ensuring no damage during multiple folding processes.
Smart Images

Figure CN114120823B_ABST
Abstract
Description
[0001] Cross-reference to related applications
[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0110619, filed on August 31, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field
[0003] This disclosure relates to an electronic device with improved reliability and a method for manufacturing such an electronic device with improved reliability. Background Technology
[0004] In an information-driven society, the importance of electronic devices as a medium for transmitting visual information has become apparent. Electronic devices include liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diodes (OLEDs), field-effect displays (FEDs), and electrophoretic displays (EPDs).
[0005] The electronic device is activated by an electrical signal. The electronic device may include an input sensor for sensing external input and a display panel for displaying images.
[0006] Electronic devices may include electrode patterns that are activated by electrical signals. The areas of the electrode patterns that are activated may display information or respond to input signals applied from the outside.
[0007] It will be understood that the background section of this technical section is partly intended to provide useful context for understanding the technology. However, the background section may also include ideas, concepts, or knowledge that were not known or understood by a person skilled in the art prior to the relevant valid application date of the subject matter disclosed herein. Summary of the Invention
[0008] This disclosure provides an electronic device with a sensing sensor that senses external inputs and whose reliability is improved.
[0009] This disclosure also provides a method for manufacturing an electronic device with improved visibility and folding properties.
[0010] An embodiment provides an electronic device that may include a window, a display panel disposed below the window, and a digitizer disposed below the display panel. The digitizer may include a substrate layer having a first surface and a second surface opposite to the first surface, a first sensing coil disposed on the first surface of the substrate layer, a second sensing coil disposed on the second surface of the substrate layer, a first adhesive layer disposed on the first sensing coil, and a second adhesive layer disposed on the second sensing coil. The first adhesive layer and the second adhesive layer may be multi-cured adhesive layers.
[0011] In one embodiment, the first adhesive layer can completely cover the upper surface of the first sensing coil, and the second adhesive layer can completely cover the upper surface of the second sensing coil.
[0012] In one embodiment, the digitizer may further include a shielding layer disposed beneath the second adhesive layer. The shielding layer may include metal.
[0013] In an embodiment, the shielding layer may include at least one of permalloy, invar alloy, and stainless steel.
[0014] In some embodiments, the digitizer may further include a magnetic sheet disposed on a shielding layer. The magnetic sheet may include magnetic metal powder (MMP).
[0015] In one embodiment, the digitizer may further include a first sub-adhesive layer disposed on the first adhesive layer. The first sub-adhesive layer may have a lower energy storage modulus than the first adhesive layer.
[0016] In this embodiment, the energy storage modulus of the first sub-adhesive layer can be in the range of about 0.01 MPa to about 1 MPa at about -20°C.
[0017] In one embodiment, the digitizer may further include a second sub-adhesive layer disposed below the second adhesive layer. The second sub-adhesive layer may have a lower energy storage modulus than the second adhesive layer.
[0018] In this embodiment, the energy storage modulus of the second sub-adhesive layer can be in the range of about 0.01 MPa to about 1 MPa at about -20°C.
[0019] In one embodiment, the digitizer may further include a buffer layer disposed beneath the second adhesive layer.
[0020] In one embodiment, the digitizer may further include a light-blocking layer disposed on the first adhesive layer. The light-blocking layer may have a transmittance of about 50% or less.
[0021] In one embodiment, the light-blocking layer may include pigment particles dispersed in an adhesive, and the adhesive may be polyethylene terephthalate or polyimide.
[0022] In this embodiment, the first adhesive layer and the second adhesive layer may not include acidic components.
[0023] In an embodiment, the digitizer may further include a plating on the upper surface of each of the first sensing coil and the second sensing coil.
[0024] In one embodiment, the electronic device may include a foldable region that is foldable relative to a folding axis extending in one direction, a first non-foldable region extending toward one side of the foldable region, and a second non-foldable region extending toward the other side of the foldable region.
[0025] In an embodiment, a method for manufacturing an electronic device may include manufacturing a digitizer and disposing a display panel on the digitizer. Manufacturing the digitizer may include: forming a first sensing coil on a first surface of a substrate layer; forming a second sensing coil on a second surface of the substrate layer, the second surface opposite to the first surface; disposing a first adhesive layer in a semi-cured state on the first sensing coil; disposing a second adhesive layer in a semi-cured state on the second sensing coil; increasing the flatness of the first adhesive layer and the second adhesive layer; and applying light to the first adhesive layer and the second adhesive layer to substantially completely cure the first adhesive layer and the second adhesive layer.
[0026] In one embodiment, increasing the flatness of the first adhesive layer and the second adhesive layer may include applying heat to the first adhesive layer and the second adhesive layer.
[0027] In one embodiment, in the method of manufacturing an electronic device, a first adhesive layer can completely cover the upper surface of a first sensing coil, and a second adhesive layer can completely cover the upper surface of a second sensing coil.
[0028] In one embodiment, the method for manufacturing an electronic device may further include forming a first sub-adhesive layer on a first adhesive layer.
[0029] In one embodiment, the method for manufacturing an electronic device may further include forming a second sub-adhesive layer on the second adhesive layer. Attached Figure Description
[0030] The above and other aspects and features of this disclosure will become more apparent from the detailed description of embodiments thereof with reference to the accompanying drawings, in which:
[0031] Figure 1A This is a schematic perspective view of an electronic device according to an embodiment, in its unfolded state.
[0032] Figure 1B This is a schematic perspective view of an electronic device according to an embodiment.
[0033] Figure 1C This is a schematic plan view of an electronic device according to an embodiment, in a folded state.
[0034] Figure 1D This is a schematic perspective view of an electronic device according to an embodiment.
[0035] Figure 2AThis is a schematic cross-sectional view of an electronic device according to an embodiment.
[0036] Figure 2B This is a schematic cross-sectional view of an electronic device according to an embodiment.
[0037] Figure 2C This is a schematic cross-sectional view of an electronic device according to an embodiment.
[0038] Figure 3A This is a schematic plan view of the display panel according to the embodiment.
[0039] Figure 3B It is an equivalent circuit diagram of the pixel according to the implementation method.
[0040] Figure 4 This is a schematic plan view of the input sensing panel according to the implementation method.
[0041] Figure 5 This is a schematic plan view of a digitizer according to an implementation method.
[0042] Figure 6A and Figure 6B This is a schematic cross-sectional view of a digitizer according to an embodiment.
[0043] Figures 7 to 12 This is a schematic cross-sectional view of a digitizer according to an embodiment.
[0044] Figures 13A to 13E These are schematic cross-sectional views showing, in sequence, a method for manufacturing a digitizer according to an embodiment. Detailed Implementation
[0045] The present disclosure will now be described more fully below with reference to the accompanying drawings, in which embodiments are illustrated. However, the present disclosure may be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
[0046] In this disclosure, when an element (or region, layer, portion, etc.) is referred to as being "on," "connected to," or "attached to" another element, this means that the element may be directly disposed on / connected to / attached to the other element, or a third element may be disposed between them. Furthermore, when an element is referred to as being "in contact" or "contacted" with another element, the element may be in "electrical contact" or "physical contact" with the other element; or in "indirect contact" or "direct contact" with the other element.
[0047] The same reference numerals denote the same elements. Furthermore, in the accompanying drawings, the thickness, proportions, and dimensions of the elements are exaggerated for the purpose of effectively depicting the technical content.
[0048] The term "and / or" includes all combinations that can be defined by one or more associated configurations. For purposes of meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" can be used in a combined or disjunctive sense and can be understood as equivalent to "and / or".
[0049] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of the exemplary embodiments. Singular terms may include plural forms unless the context clearly indicates otherwise.
[0050] Furthermore, terms such as "below," "down," "above," and "up" are used to describe the relationships of the configurations shown in the accompanying drawings. These terms are used as relative concepts and are described with reference to the directions indicated in the accompanying drawings.
[0051] The terms “face” (or “oppose”) and “facing” (or “opposing”) mean that the first element can be directly or indirectly opposite the second element. When a third element is inserted between the first and second elements, the first and second elements can be understood as being indirectly opposite each other, although they are still facing each other (or “opposing”).
[0052] The phrase "in a plan view" refers to an object viewed from above, while the phrase "in a schematic sectional view" refers to a section of an object that has been vertically cut, viewed from the side.
[0053] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms defined in common dictionaries shall be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and shall not be interpreted in an ideal or overly formal sense unless expressly so defined herein.
[0054] It should be understood that the terms “comprising” or “having” are intended to specify the presence of the stated features, integrals, steps, operations, elements, components or combinations thereof in this disclosure, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components or combinations thereof.
[0055] In this disclosure, when “component B is directly disposed on component A”, it means that there is no separate adhesive layer and adhesive member between component A and component B.
[0056] As used herein, “about” or “approximately” includes the value and the average of the values within an acceptable range of deviations from the particular value, as determined by a person of ordinary skill in the art when considering the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, “about” may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the value.
[0057] In the specification and claims, for purposes of meaning and interpretation, the phrase “at least one of” is intended to include the meaning of “at least one selected from the group consisting of…”. For example, “at least one of A and B” can be understood to mean “A, B, or A and B”.
[0058] In the following description, embodiments will be described with reference to the accompanying drawings.
[0059] Figure 1A This is a schematic perspective view of an electronic device according to an embodiment, in its unfolded state. Figure 1B This is a schematic perspective view of an electronic device according to an embodiment. Figure 1C This is a schematic plan view of an electronic device according to an embodiment, in a folded state. Figure 1D This is a schematic perspective view of an electronic device according to an embodiment.
[0060] refer to Figure 1A An electronic device EA can be a device activated by an electrical signal. The electronic device EA can include various implementations. For example, an electronic device EA can include a tablet computer, a laptop computer, a desktop computer, a smart TV, etc. In one implementation, a smartphone is shown as an example of an electronic device EA.
[0061] Electronic device EA can display an image IM on a first display surface FS on a plane parallel to the plane formed by the first direction DR1 and the second direction DR2, in a third direction DR3. The first display surface FS on which the image IM is displayed can correspond to the front surface of electronic device EA. The image IM can include both moving images and still images. Figure 1A In the example of an image-based IM, an Internet search window and a clock window are shown.
[0062] In this implementation, the front (or upper) and rear (or lower) surfaces of each component are defined based on the orientation in which the image IM is displayed. The front and rear surfaces are opposite each other on a third direction DR3, and the normal direction of each of the front and rear surfaces may be parallel to the third direction DR3.
[0063] The spacing between the front and rear surfaces in the third direction DR3 can correspond to the thickness / height of the electronic device EA in the third direction DR3. The directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 are relative directions and can be defined differently.
[0064] The electronic device EA can sense external inputs applied from the outside. External inputs can include various forms of input provided from outside the electronic device EA.
[0065] For example, external input can include not only contact with a part of the user's body (such as a hand), but also external input applied from an object that is very close to or near the electronic device EA at a distance (e.g., hovering). Furthermore, external input can take various forms such as force, pressure, temperature, light, etc.
[0066] exist Figure 1A The diagram shows an external input via the pen SP. Although not shown, the pen SP can be mounted inside or outside the electronic device EA, or removed from the electronic device EA, and the electronic device EA can provide or receive signals corresponding to the mounting and dismounting of the pen SP.
[0067] An electronic device EA according to an embodiment may include a first display surface FS and a second display surface RS. The first display surface FS may include a first active area F-AA, a first peripheral area F-NAA, and an electronic module area EMA. The second display surface RS may be defined as a surface opposite to at least a portion of the first display surface FS.
[0068] The first effective area F-AA can be an area activated by an electrical signal. The first effective area F-AA can be an area in which an image IM is displayed and various forms of external input can be sensed. The first peripheral area F-NAA can be adjacent to the first effective area F-AA. The first peripheral area F-NAA can have a predetermined color. The first peripheral area F-NAA can surround the first effective area F-AA. Therefore, the shape of the first effective area F-AA can be substantially defined by the first peripheral area F-NAA. However, the implementation is not limited to this. The first peripheral area F-NAA can be configured to be adjacent only to one side of the first effective area F-AA, or it can be omitted. The electronic device EA can include other implementations and is not limited to any one of them.
[0069] The Electronic Module Area (EMA) can house various electronic modules. For example, an electronic module may include at least one of a camera, a speaker, a light sensor, and a thermal sensor. The EMA can sense external objects via display surfaces FS and RS, and / or can provide sound signals, such as speech, to the outside via display surfaces FS and RS. The EMA may include multiple components and is not limited to any single implementation.
[0070] The electronic module area EMA can be surrounded by a first effective area F-AA and a first peripheral area F-NAA. However, the implementation is not limited to this. The electronic module area EMA can be located inside the first effective area F-AA, and is not limited to any one implementation.
[0071] According to an embodiment, the electronic device EA may include at least one folded region FA, and non-folded regions NFA1 and NFA2 extending from the folded region FA. The non-folded regions NFA1 and NFA2 may be spaced apart from each other, and the folded region FA is located between them.
[0072] refer to Figure 1B The electronic device EA includes a hypothetical first folding axis AX1 extending in a second direction DR2. The first folding axis AX1 may extend on a first display surface FS in the second direction DR2. In an embodiment, non-folding regions NFA1 and NFA2 may extend from a folding region FA, with the folding region FA located between them. For example, the first non-folding region NFA1 may extend from one side of the folding region FA in the first direction DR1, and the second non-folding region NFA2 may extend from the other side of the folding region FA in the first direction DR1.
[0073] The electronic device EA can be folded relative to the first folding axis AX1 and converted to an inward folded state. In the inward folded state, the area of the first display surface FS that overlaps with the first non-folded area NFA1 faces another area of the first display surface FS that overlaps with the second non-folded area NFA2.
[0074] refer to Figure 1C According to an embodiment, in the inward-folded state, the second display surface RS of the electronic device EA can be visible to the user. The second display surface RS may include a second effective area R-AA for displaying images. The second effective area R-AA may be an area activated by an electrical signal. The second effective area R-AA may be an area in which images are displayed and various forms of external input can be sensed.
[0075] The second peripheral region R-NAA is adjacent to the second effective region R-AA. The second peripheral region R-NAA may be colored. The second peripheral region R-NAA may surround the second effective region R-AA. The second display surface RS may also include an electronic module region, which includes electronic modules with various components, and is not limited to any one embodiment.
[0076] refer to Figure 1D According to an embodiment, the electronic device EA includes a hypothetical second folding axis AX2 extending in a second direction DR2. The second folding axis AX2 may extend along the second direction DR2 on a second display surface RS.
[0077] The electronic device EA can be folded relative to the second folding axis AX2 and converted to an outward folded state. In the outward folded state, the area of the second display surface RS that overlaps with the first non-folded area NFA1 faces another area of the second display surface RS that overlaps with the second non-folded area NFA2.
[0078] However, the implementation is not limited to this. The electronic device EA can be folded relative to multiple folding axes, such that portions of the first display surface FS and / or the second display surface RS can be folded to face each other, and the number of folding axes and the number of non-folded areas are correspondingly not limited to any one implementation.
[0079] Figure 2A This is a schematic cross-sectional view of the electronic device EA according to an embodiment. Figure 2B This is a schematic cross-sectional view of the electronic device EA-1 according to an embodiment. Figure 2C This is a schematic cross-sectional view of the electronic device EA-2 according to an embodiment.
[0080] refer to Figure 2AThe electronic device EA according to the embodiments may include a window WM, an optical component OM, a display module DM, a lower film FM, a digitizer ZM, and a protective component PM. However, the embodiments are not limited thereto. The optical component OM and / or the lower film FM may be omitted.
[0081] A window (WM) is disposed on the display module (DM). The window WM provides the display surfaces (FS and RS) of the electronic device (EA) and protects the display module (DM). The window WM may include materials with high light transmittance. For example, the window WM may include a glass substrate, a sapphire substrate, or a plastic film. The window WM may have a multilayer structure or a single-layer structure. For example, the window WM may have a laminated structure in which multiple plastic films are adhered to each other by an adhesive, or a laminated structure in which a glass substrate and a plastic film are adhered to each other by an adhesive.
[0082] The area through which light generated from the display module DM passes through the window WM can be defined as the first effective area F-AA of the first display surface FS, and the border area of the window WM can be defined as the first peripheral area F-NAA. Furthermore, another area through which light generated from the display module DM passes through the window WM can be defined as the second effective area R-AA of the second display surface RS, and the border area of the window WM can be defined as the second peripheral area R-NAA.
[0083] Although not shown, the window WM may also include a functional layer to protect the window WM. For example, the functional layer may include at least one of a fingerprint prevention layer and an impact absorption layer, but is not limited thereto.
[0084] The optical component OM can be disposed on the lower part of the window WM. The optical component OM can reduce the external light reflectivity of the display module DM for light incident on it. For example, the optical component OM may include at least one of an anti-reflective film, a polarizing film, a color filter, and a gray color filter.
[0085] The display module DM can be used as an output device. For example, the display module DM can display an image on the effective areas F-AA and R-AA, and the user can obtain information through the image. The display module DM can also be used as an input device to sense external input applied to the effective areas F-AA and R-AA. According to an embodiment, the display module DM may include a display panel DP and an input sensing panel ISL.
[0086] The lower film FM is located on the lower part of the display module DM. The lower film FM can reduce the stress applied to the display module DM when the electronic device EA is folded. In addition, the lower film FM can prevent external moisture from penetrating the display module DM and absorb external impacts.
[0087] The lower membrane FM may include a plastic film as a base layer. The lower membrane FM may include a plastic film comprising any material selected from the group consisting of polyethersulfone (PES), polyacrylate, polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide, polycarbonate (PC), and poly(arylene ether sulfone).
[0088] The materials constituting the lower membrane FM are not limited to plastic resins, but may include organic / inorganic composite materials. The lower membrane FM may include a porous organic layer and inorganic materials filling the pores of the organic layer.
[0089] The lower membrane FM may also include a functional layer formed on the plastic film. The functional layer may include a resin layer. The functional layer may be formed by coating.
[0090] The digitizer ZM can be mounted on the lower part of the display module DM. The digitizer ZM can sense external input from the pen SP (see reference). Figure 1A The signal sent. The digitizer ZM will be described later.
[0091] A protective component PM may be disposed on the lower part of the display module DM. The protective component PM may include at least one functional layer for protecting the display module DM. The functional layer may be, for example, a heat dissipation layer, a light blocking layer, or a buffer layer. The light blocking layer and the buffer layer may perform the same functions as those performed by the light blocking layer and the buffer layer to be included in the digitizer ZM, as described below.
[0092] A heat dissipation layer can effectively dissipate heat generated in the display module (DM). The heat dissipation layer may include at least one of graphite, copper (Cu), and aluminum (Al), all of which have good heat dissipation properties, but are not limited to these. In addition to improving heat dissipation performance, the heat dissipation layer may also have electromagnetic wave shielding or electromagnetic wave absorption properties.
[0093] However, the implementation is not limited to this. Any one of the light-blocking layer, heat dissipation layer, and buffer layer may be omitted, or the multi-layer structure may be replaced with a single layer, but the implementation is not limited to any one of these embodiments.
[0094] According to the embodiment, the electronic device EA may have a structure in which the protective component PM, the digitizer ZM, the lower film FM, the display module DM, the optical component OM, and the window WM are stacked sequentially along the third direction DR3.
[0095] Although not shown, the connections between components included in the electronic device EA can be achieved through adhesive layers disposed between the components. In the embodiments described below, the adhesive layer may be an optically clear adhesive (OCA) film, an optically clear resin (OCR), or a pressure-sensitive adhesive (PSA) film. The adhesive layer may include a photocurable or a thermocurable adhesive material, but the material of the adhesive layer is not limited. However, separate adhesive layers may not be disposed on the upper and lower parts of the digitizer ZM, and the adhesive layer included inside the digitizer ZM will be described below.
[0096] Included Figure 2B Electronic device EA-1 and Figure 2C Components in the electronic device EA-2 and Figure 2A The components in the electronic device EA can be the same, and only the differences in stacking order will be described.
[0097] refer to Figure 2B According to the embodiment, the electronic device EA-1 may have a structure in which the digitizer ZM-1, the protective member PM-1, the lower film FM-1, the display module DM-1, the optical member OM-1, and the window WM-1 are stacked sequentially along the third direction DR3.
[0098] refer to Figure 2C According to the embodiment, the electronic device EA-2 may have a structure in which the protective component PM-2, the lower membrane FM-2, the digitizer ZM-2, the display module DM-2, the optical component OM-2, and the window WM-2 are stacked sequentially along the third direction DR3.
[0099] Figure 3A This is a schematic plan view of the display panel DP according to the embodiment. Figure 3B This is an equivalent circuit diagram of pixel PX according to the implementation method. Figure 4 This is a schematic plan view of the input sensing panel ISL according to an embodiment. The same reference numerals are used in conjunction with those in Figures 1 to 12. Figure 2C The components are the same as the components, and their redundant descriptions are omitted.
[0100] refer to Figure 3A The display panel DP can include pixels (PX), signal lines (GL, DL, PL and ECL), and display pads (PDD).
[0101] The display area DA of the display panel DP can be the area on which the image IM is displayed, and the non-display area NDA can be the area on which driving circuits, driving lines, etc., can be installed. The display area DA can overlap with at least a portion of the effective areas F-AA and R-AA of the electronic device EA. In addition, the non-display area NDA can overlap with the peripheral areas F-NAA and R-NAA of the electronic device EA.
[0102] Signal lines GL, DL, PL, and ECL are electrically connected to pixel PX and send electrical signals to pixel PX. Among the signal lines included in the display panel DP, the scan line GL, data line DL, power supply line PL, and light emission control line ECL are shown. However, the implementation is not limited to this. The signal lines may also include initialization voltage lines, and are not limited to any one embodiment.
[0103] Pixels PX can be spaced apart from each other along the first direction DR1 and the second direction DR2, and can have a matrix shape in a planar diagram.
[0104] refer to Figure 3B The equivalent circuit diagram of pixel PX is shown. Figure 3B The pixel PX is shown to be electrically connected to the i-th scan line GLi and the i-th emission control line ECLi.
[0105] A pixel (PX) may include a light-emitting element (EE) and a pixel circuit (CC). The pixel circuit (CC) may include transistors T1 to T7 and a capacitor (CP). Transistors T1 to T7 may be formed using a low-temperature polycrystalline silicon (LTPS) process or a low-temperature polycrystalline oxide (LTPO) process.
[0106] The pixel circuit CC controls the current flowing through the light-emitting element EE, corresponding to the data signal. The light-emitting element EE can emit light of a predetermined brightness corresponding to the current controlled by the pixel circuit CC. The level of the first power supply ELVDD can be set higher than the level of the second power supply ELVSS. The light-emitting element EE can include an organic light-emitting element or a quantum dot light-emitting element.
[0107] Each of transistors T1 to T7 may each include an input electrode (or source electrode), an output electrode (or drain electrode), and a control electrode (or gate electrode). In this disclosure, for convenience, either the input electrode or the output electrode may be referred to as the first electrode, and the other may be referred to as the second electrode.
[0108] The first electrode of the first transistor T1 is electrically connected to the first power supply ELVDD via the fifth transistor T5, and the second electrode of the first transistor T1 is electrically connected to the anode electrode of the light-emitting element EE via the sixth transistor T6. In this disclosure, the first transistor T1 may be referred to as the driving transistor.
[0109] The first transistor T1 controls the current flowing through the light-emitting element EE, and this current corresponds to the voltage applied to the control electrode of the first transistor T1.
[0110] The second transistor T2 is electrically connected between the data line DL and the first electrode of the first transistor T1. The control electrode of the second transistor T2 is electrically connected to the i-th scan line GLi. When the i-th scan signal is provided to the i-th scan line GLi, the second transistor T2 is turned on to electrically connect the data line DL and the first electrode of the first transistor T1.
[0111] The third transistor T3 is electrically connected between the second electrode of the first transistor T1 and the control electrode of the first transistor T1. The control electrode of the third transistor T3 is electrically connected to the i-th scan line GLi. When the i-th scan signal is provided to the i-th scan line GLi, the third transistor T3 is turned on to electrically connect the second electrode of the first transistor T1 and the control electrode of the first transistor T1. Therefore, when the third transistor T3 is turned on, the first transistor T1 becomes a diode-connected transistor.
[0112] The fourth transistor T4 is electrically connected between node ND and the initialization power generator (not shown). The initialization power generator generates the initialization voltage Vint. The control electrode of the fourth transistor T4 is electrically connected to the (i-1)th scan line GLi-1. When the (i-1)th scan signal is provided to the (i-1)th scan line GLi-1, the fourth transistor T4 is turned on to provide the initialization voltage Vint to node ND.
[0113] The fifth transistor T5 is electrically connected between the power supply line PL and the first electrode of the first transistor T1. The control electrode of the fifth transistor T5 is electrically connected to the i-th light-emitting control line ECLi.
[0114] The sixth transistor T6 is electrically connected between the second electrode of the first transistor T1 and the anode electrode of the light-emitting element EE. The control electrode of the sixth transistor T6 is electrically connected to the i-th light-emitting control line ECLi.
[0115] The seventh transistor T7 is electrically connected between the initialization power generator (not shown) and the anode electrode of the light-emitting element EE. The control electrode of the seventh transistor T7 is electrically connected to the (i+1)th scan line GLi+1. When the (i+1)th scan signal is provided to the (i+1)th scan line GLi+1, the seventh transistor T7 is turned on to provide the initialization voltage Vint to the anode electrode of the light-emitting element EE.
[0116] The seventh transistor T7 improves the ability of pixel PX to represent black. When the seventh transistor T7 is turned on, the parasitic capacitor (not shown) of the light-emitting element EE discharges. Therefore, the light-emitting element EE is prevented from emitting light due to leakage current from the first transistor T1, thus improving the ability to represent black.
[0117] Figure 3BThe diagram shows that the control electrode of the seventh transistor T7 is connected to the (i+1)th scan line GLi+1, but the implementation is not limited to this. In other embodiments, the control electrode of the seventh transistor T7 may be connected to the i-th scan line GLi or the (i-1)th scan line GLi-1.
[0118] A capacitor CP is positioned between the power supply line PL and node ND. The capacitor CP stores the voltage corresponding to the data signal. When the fifth transistor T5 and the sixth transistor T6 are turned on, the current flowing in the first transistor T1 can be determined based on the voltage stored in the capacitor CP.
[0119] In the implementation, the circuitry of pixel PX is not limited to... Figure 3B The equivalent circuit shown is illustrated. In other embodiments, the pixel PX can be implemented in various forms for causing the light-emitting element EE to emit light. Although... Figure 3B A PMOS is shown for reference, but the implementation is not limited thereto. In other embodiments, the pixel circuit CC may be formed of an NMOS. The pixel circuit CC may also include a combination of NMOS and PMOS.
[0120] refer to Figure 3A The power supply pattern VDD is disposed in the non-display area NDA. In this embodiment, the power supply pattern VDD is connected to the power supply line PL. The display panel DP includes the power supply pattern VDD, thereby providing the same first power signal to the pixels PX.
[0121] The display pad PDD may include a first pad D1 and a second pad D2. The first pad D1 may be electrically connected to at least one of the data lines DL. The second pad D2 is electrically connected to the power supply pattern VDD and to at least one of the power supply lines PL. The display panel DP may provide the pixel PX with electrical signals supplied externally via the display pad PDD. However, the implementation is not limited to this. In addition to the first pad D1 and the second pad D2, the display pad PDD may also include other pads for receiving other electrical signals, and is not limited to any one implementation.
[0122] refer to Figure 2A and Figure 4 The input sensing panel (ISL) can be disposed on the display panel (DP). The input sensing panel (ISL) can be attached to the display panel (DP) via a separate adhesive layer. However, the implementation is not limited to this. The input sensing panel (ISL) can be formed directly on the display panel (DP) through a continuous process, and is not limited to any one implementation.
[0123] The input sensing panel ISL may include a first sensing electrode TE1, a second sensing electrode TE2, traces TL1, TL2, and TL3, and sensing pads TP1, TP2, and TP3. A sensing area SA and a non-sensing area NSA may be defined on the input sensing panel ISL. The non-sensing area NSA may surround the sensing area SA. The sensing area SA may be a sensing area in which input applied from the outside is sensed. The sensing area SA may overlap with the display area DA of the display panel DP.
[0124] The input sensing panel ISL can sense external input using either a self-capacitance method or a mutual capacitance method. The first sensing electrode TE1 and the second sensing electrode TE2 can be modified, configured, and connected in various ways depending on the type of sensing method.
[0125] The first sensing electrode TE1 may include a first sensing pattern SP1 and a first bridging pattern BP1. The first sensing electrode TE1 may extend along a first direction DR1 and be arranged along a second direction DR2. The first sensing patterns SP1 may be spaced apart and arranged along the first direction DR1. At least one first bridging pattern BP1 may be disposed between two adjacent first sensing patterns SP1.
[0126] The second sensing electrode TE2 may include a second sensing pattern SP2 and a second bridging pattern BP2. The second sensing electrode TE2 may extend along a second direction DR2 and be arranged along a first direction DR1. The second sensing patterns SP2 may be spaced apart and arranged along the second direction DR2. At least one second bridging pattern BP2 may be disposed between two adjacent second sensing patterns SP2.
[0127] Traces TL1, TL2, and TL3 are positioned within the non-sensing area (NSA). Traces TL1, TL2, and TL3 may include a first trace TL1, a second trace TL2, and a third trace TL3.
[0128] The first trace TL1 can be electrically connected to one end of the first sensing electrode TE1. The second trace TL2 can be electrically connected to one end of the second sensing electrode TE2. The third trace TL3 can be electrically connected to the other end of the second sensing electrode TE2 in the portion opposite to the end of the second sensing electrode TE2 that is electrically connected to the second trace TL2.
[0129] According to one embodiment, the second sensing electrode TE2 can be connected to the second trace TL2 and the third trace TL3. Therefore, the sensitivity of the second sensing electrode TE2 can be maintained uniformly, and this sensitivity can be relatively greater than that of the first sensing electrode TE1. The embodiment is not limited to this. The third trace TL3 can be omitted, and it is not limited to any particular embodiment.
[0130] Sensing pads TP1, TP2, and TP3 are disposed in the non-sensing area (NSA). Sensing pads TP1, TP2, and TP3 may include a first sensing pad TP1, a second sensing pad TP2, and a third sensing pad TP3. The first sensing pad TP1 is electrically connected to a first trace TL1 to be electrically connected to a first sensing electrode TE1. The second sensing pad TP2 is electrically connected to a second trace TL2, and the third sensing pad TP3 is electrically connected to a third trace TL3. Therefore, the second sensing pad TP2 and the third sensing pad TP3 are electrically connected to their respective second sensing electrodes TE2.
[0131] Figure 5 This is a schematic plan view of the digitizer ZM according to the implementation method. Figure 6A and Figure 6B These are schematic cross-sectional views of digitizers ZM1-1 and ZM1-2 according to the embodiments. Figure 6A and Figure 6B It is along Figure 5 A schematic cross-sectional view taken along line I-I'. (Reference) Figures 5 to 6B This section will describe the basic structure of digitizers ZM, ZM1-1, and ZM1-2. The same reference numerals are used in conjunction with... Figures 1A to 4 The components are the same as the components, and their redundant descriptions are omitted.
[0132] The digitizer ZM according to the embodiment can sense external input via an electromagnetic resonance (EMR) method. According to the EMR method, a magnetic field is generated in a resonant circuit formed inside the pen SP (refer to Figure 1), and this magnetic field then induces a signal in a coil included in the digitizer ZM. The position of the pen SP can be detected based on the signal induced in the coil.
[0133] refer to Figure 5 The digitizer ZM may include a substrate layer PI, digitizer sensors CF1, CF2, RF1 and RF2, and digitizer pads TC1 and TC2.
[0134] The digitizer ZM may include digitizer sensors CF1, CF2, RF1, and RF2 disposed on a substrate PI. The substrate PI may be a substrate on which the digitizer sensors CF1, CF2, RF1, and RF2 are disposed. The substrate PI may include an organic material. For example, the substrate PI may include polyimide.
[0135] Each of the first digitizer sensors RF1 and RF2 may include first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3, and each of the second digitizer sensors CF1 and CF2 may include second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2, and CF2-3. The first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3, and the second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2, and CF2-3 may include metal. In an embodiment, the first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3, and the second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2, and CF2-3 may include copper (Cu).
[0136] The first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3 may extend in the second direction DR2. The first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3 may be arranged spaced apart from each other along the first direction DR1.
[0137] The second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2, and CF2-3 can extend along the first direction DR1. The second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2, and CF2-3 can be arranged spaced apart from each other along the second direction DR2.
[0138] The first digitizer sensors RF1 and RF2 can correspond to the input coil of the electromagnetic resonant digitizer ZM, and the second digitizer sensors CF1 and CF2 can correspond to the output coil of the electromagnetic resonant digitizer ZM.
[0139] The first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3, and the second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2, and CF2-3 can be disposed on the substrate layer PI insulated from each other. Each of the first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3 can be electrically connected to a corresponding first digitizer pad TC1, and each of the second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2, and CF2-3 can be electrically connected to a corresponding second digitizer pad TC2.
[0140] Each of the first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3 can receive one of the scan signals activated at different intervals. Each of the first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3 can generate a magnetic field in response to the corresponding scan signal.
[0141] When the pen SP (see Figure 1A When adjacent to the first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3, the magnetic field induced from the first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2, and RF2-3 can resonate with the resonant circuit of the pen SP. The pen SP can generate a resonant frequency. The pen SP can have an LC resonant circuit including an inductor and a capacitor.
[0142] The second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2, and CF2-3 can output sensing signals to the second digitizer pad TC2 according to the resonant frequency of the input device.
[0143] The assumed input point PP can be the central part of the region where the second coil RF2-2 of the first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2 and RF2-3 intersects with the second coil CF2-2 of the second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2 and CF2-3.
[0144] The sensing signal output from the second coil RF2-2 among the first sensing coils RF1-1, RF1-2, RF1-3, RF2-1, RF2-2 and RF2-3 can have a higher level than the sensing signals output from the other first sensing coils RF1-1, RF1-2, RF1-3, RF2-1 and RF2-3.
[0145] The sensing signal output from the second coil CF2-2 among the second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2 and CF2-3 can have a higher level than the sensing signals output from the other second sensing coils CF1-1, CF1-2, CF1-3, CF2-1 and CF2-3.
[0146] The sensing signals output from the first coil CF2-1 and the third coil CF2-3 among the second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, CF2-2 and CF2-3 may have a lower level than the sensing signal output from the second coil CF2-2, and may have a higher level than the sensing signals output from the remaining second sensing coils CF1-1, CF1-2 and CF1-3.
[0147] Based on the time when a high-level sensing signal is detected from the second coil CF2-2, and based on the relative position of the second coil CF2-2 with respect to the other second sensing coils CF1-1, CF1-2, CF1-3, CF2-1, and CF2-3, the pen SP (see [reference]) can be calculated. Figure 1A The input point PP has two-dimensional coordinate information.
[0148] refer to Figure 6A In an embodiment, the digitizer ZM1-1 may include a first adhesive layer AD1, first sensing coils RF1-1, RF1-2 and RF1-3, a base layer PI, second sensing coils CF1-1, CF1-2 and CF1-3, and a second adhesive layer AD2, which are stacked sequentially on a cross-section.
[0149] According to the embodiment, the substrate layer PI may include a first surface PI-U (front surface) and a second surface PI-B (rear surface) opposite to the first surface PI-U. The first surface PI-U may be positioned closer to the display module DM than the second surface PI-B. First sensing coils RF1-1, RF1-2, and RF1-3 may be disposed on the first surface PI-U (front surface), and second sensing coils CF1-1, CF1-2, and CF1-3 may be disposed on the second surface PI-B.
[0150] In this disclosure, the surface of each of the first sensing coils RF1-1, RF1-2, and RF1-3 and the second sensing coils CF1-1, CF1-2, and CF1-3 that can contact the substrate layer PI can be designated as the lower surface. Other surfaces besides the lower surfaces can be designated as the upper surfaces of the first sensing coils RF1-1, RF1-2, and RF1-3 and the second sensing coils CF1-1, CF1-2, and CF1-3.
[0151] In this embodiment, the first adhesive layer AD1 may be disposed on the first surface PI-U, and the second adhesive layer AD2 may be disposed on the second surface PI-B. The digitizer ZM1-1 can be adhered to the electronic device EA (see [reference]) via the first adhesive layer AD1 disposed on the first surface PI-U and / or the second adhesive layer AD2 disposed on the second surface PI-B. Figure 1A Other components of ).
[0152] A first adhesive layer AD1 is disposed on the first sensing coils RF1-1, RF1-2, and RF1-3, and can completely cover (or overlap with) the upper surfaces of the first sensing coils RF1-1, RF1-2, and RF1-3. A second adhesive layer AD2 is disposed on the second sensing coils CF1-1, CF1-2, and CF1-3, and can completely cover (or overlap with) the upper surfaces of the second sensing coils CF1-1, CF1-2, and CF1-3.
[0153] The opposing surface of the first adhesive layer AD1 may have a smaller surface roughness than the surface of the first adhesive layer AD1 that contacts the first surface PI-U. The surface roughness of the opposing surface of the second adhesive layer AD2, which contacts the second surface PI-B, may be even smaller. The opposing surface of the second adhesive layer AD2 may have a smaller surface roughness than the surface of the second adhesive layer AD2 that contacts the second surface PI-B. The flatness of the opposing surfaces of the first adhesive layer AD1 and the second adhesive layer AD2 may be greater than the surfaces of the first adhesive layer AD1 and the second adhesive layer AD2 that contact the substrate layer PI. Therefore, according to the embodiment, the electronic device EA (see...) Figure 1A The electronic device EA according to the embodiment may not include a separate upper cover layer or adhesive layer between the digitizer ZM1-1 and other components disposed on the upper part of the digitizer ZM1-1.
[0154] The first adhesive layer AD1 and the second adhesive layer AD2 can be multi-curing adhesive layers. In an embodiment, a multi-curing adhesive layer refers to an adhesive layer that has adhesive strength by being substantially fully cured (e.g., fully cured) through multiple separate curing processes (hereinafter referred to as "multi-curing processes"). A multi-curing adhesive layer may be an adhesive layer in which about 50% is cured by a first curing process and then about 100% is cured by a subsequent curing process. The first adhesive layer AD1 and the second adhesive layer AD2 may be layers formed from the same composition cured by the multi-curing process.
[0155] Each of the first adhesive layer AD1 and the second adhesive layer AD2 according to the embodiments may include a resin composition and an adhesive composition including a curing agent. The first adhesive layer AD1 and the second adhesive layer AD2 may be layers formed by curing the adhesive composition.
[0156] The resin composition according to the embodiments includes (meth)acrylate and a secondary initiator. In this disclosure, (meth)acrylate means acrylate or methacrylate. The type of (meth)acrylate included in the resin composition of the embodiments is not particularly limited, and may be, for example, methyl acrylate, ethyl acrylate, propyl acrylate, butyl acrylate, 2-ethylhexyl acrylate, 2-ethylpentyl acrylate, 2-ethylheptyl acrylate, 2-ethylnonyl acrylate, 2-propylhexyl acrylate, 2-propyloctyl acrylate, etc.
[0157] The secondary initiator included in the resin composition of the embodiments may be an initiator that may not decompose during the first curing process to undergo the second curing process. There are no particular limitations on the type of secondary initiator, as long as it is a material that does not decompose during the first curing process, and it may be, for example, a photoinitiator that initiates the photopolymerization of photocurable materials. The photoinitiator may be, for example, but not limited to, benzophenone, bis(acylphosphine oxide), phenylphosphine oxide, monoacylphosphine, α-hydroxy ketone, α-amino ketone, (o-ethoxycarboxyl)oxime, acetophenone, phenylglyoxylic acid, benzyl dimethyl ketal, michalcone, imidazole, methylenetri-dimethylaniline, iodonium, thymol, phosphonate, metallocene, oligomeric α-hydroketone, thioxanone, benzoyl sulfide, aminobenzoate, and hydroxycyclohexylphenyl ketone.
[0158] The first adhesive layer AD1 and the second adhesive layer AD2 may also include additives that are typically added as needed. Examples of additives may include, but are not limited to, photosensitizers, polymerization inhibitors, leveling agents, surfactants, adhesive agents, plasticizers, UV absorbers, antioxidants, storage stabilizers, antistatic agents, inorganic fillers, pigments, dyes, etc.
[0159] In this embodiment, the first adhesive layer AD1 and the second adhesive layer AD2 may not contain acidic components. When the first adhesive layer AD1 and the second adhesive layer AD2, which can directly contact the first sensing coils RF1-1, RF1-2 and RF1-3 and the second sensing coils CF1-1, CF1-2 and CF1-3, do not contain acidic components, corrosion of the first sensing coils RF1-1, RF1-2 and RF1-3 and the second sensing coils CF1-1, CF1-2 and CF1-3 can be prevented.
[0160] Each of the first adhesive layer AD1 and the second adhesive layer AD2 can have a thickness ranging from about 10 μm to about 50 μm. When the thickness of each of the first adhesive layer AD1 and the second adhesive layer AD2 is less than about 10 μm, the adhesive strength may be reduced. When the thickness of each of the first adhesive layer AD1 and the second adhesive layer AD2 is greater than about 50 μm, the overall electronic device EA (see...) Figure 1AThe increased thickness of the material may reduce its folding performance.
[0161] The first adhesive layer AD1 and the second adhesive layer AD2 can each have a storage modulus in the range of about 0.5 MPa to about 5 MPa at about -20°C. With the first adhesive layer AD1 and the second adhesive layer AD2 each having a storage modulus within the aforementioned range, the electronic device EA (see...) can be ensured. Figure 1A ) folding reliability.
[0162] refer to Figure 6B The digitizer ZM1-2 may further include a plating layer CL formed on the upper surfaces of the first sensing coils RF1-1, RF1-2, and RF1-3 and the second sensing coils CF1-1, CF1-2, and CF1-3. With the plating layer CL included, corrosion of the first sensing coils RF1-1, RF1-2, and RF1-3 and the second sensing coils CF1-1, CF1-2, and CF1-3 can be prevented even if they contain acidic components. The plating layer CL may include a material capable of preventing corrosion of the first sensing coils RF1-1, RF1-2, and RF1-3 and the second sensing coils CF1-1, CF1-2, and CF1-3. For example, the plating layer CL may include any material selected from Sn, Ag, Au, Ni, and their alloys.
[0163] Figures 7 to 12 A cross-section of the digitizer is schematically shown. The same reference numerals are used in conjunction with... Figures 1A to 6B The components are the same as the components, and their redundant descriptions are omitted.
[0164] refer to Figures 7 to 12 The digitizer according to the embodiments may further include at least one of a shielding layer MP, a magnetic sheet MMP, a buffer layer CSL, a light blocking layer BPI, a first sub-adhesive layer MAD1, and a second sub-adhesive layer MAD2. However, the embodiments are not limited thereto. Any one of the shielding layer MP, the magnetic sheet MMP, the buffer layer CSL, the light blocking layer BPI, the first sub-adhesive layer MAD1, and the second sub-adhesive layer MAD2 may be omitted or further included.
[0165] refer to Figure 7 The digitizer ZM2 may also include a shielding layer MP. The shielding layer MP may be disposed below the second adhesive layer AD2. The shielding layer MP may be part of a base layer used as a substrate during the process of forming the digitizer ZM2.
[0166] In this embodiment, the shielding layer MP may comprise a metal. For example, the shielding layer MP may comprise at least one of permalloy, invar alloy, and stainless steel. Permalloy and invar alloy are alloys of nickel (Ni) and iron (Fe).
[0167] refer to Figure 8 The digitizer ZM3 may also include a magnetic sheet MMP. The magnetic sheet MMP may be disposed below the second adhesive layer AD2. The magnetic sheet MMP may be disposed on the shielding layer MP. In some embodiments, the magnetic sheet MMP may be a layer comprising magnetic metal powder.
[0168] The shielding layer MP and the magnetic sheet MMP prevent electrical interference between the digitizers ZM2 and ZM3 and the components located on the lower part of the digitizers ZM2 and ZM3. Therefore, an electronic device with improved reliability can be provided.
[0169] refer to Figure 9 The digitizer ZM4 in this embodiment may further include a buffer layer CSL. The buffer layer CSL may be disposed below the second adhesive layer AD2. The buffer layer CSL may be disposed on the shielding layer MP. The buffer layer CSL may be a synthetic resin foam. The buffer layer CSL may include a matrix and pores. The buffer layer CSL may be elastic and may have a porous structure.
[0170] The matrix may include flexible materials. The matrix may include synthetic resins. For example, the matrix may include at least one of acrylonitrile-butadiene-styrene copolymer (ABS), polyurethane (PU), polyethylene (PE), ethylene-vinyl acetate copolymer (EVA), and polyvinyl chloride (PVC).
[0171] The pores readily absorb impacts applied to the buffer layer CSL. The pores can be defined by a buffer layer CSL with a porous structure.
[0172] refer to Figure 10 The digitizer ZM5 may also include a light-blocking layer BPI. The light-blocking layer BPI can be disposed on the first adhesive layer AD1. The light-blocking layer BPI can be used to address the placement of elements in the display module DM (see...). Figure 2A The components in ) are accessed through the effective regions F-AA and R-AA (see Figure 1A and Figure 1C The problem of projecting light onto a window WM. The light-blocking layer BPI can have a transmittance of about 50% or less, and for this purpose, it can include an adhesive and pigment particles dispersed in the adhesive. The pigment particles can include carbon black, etc. The type of adhesive constituting the light-blocking layer BPI is not particularly limited, but can be, for example, polyethylene terephthalate or polyimide. Electronic device EA according to the embodiment (see Figure 1AIt may include a digitizer ZM5, which includes a light-blocking layer BPI, and thus can achieve improved light-blocking performance.
[0173] refer to Figure 11 and Figure 12 The digitizers ZM6 and ZM7 according to the embodiments may further include a first sub-adhesive layer MAD1. The first sub-adhesive layer MAD1 may be an adhesive layer for controlling the modulus. The first sub-adhesive layer MAD1 may be disposed on the first adhesive layer AD1 and may have a lower storage modulus than the first adhesive layer AD1. The first sub-adhesive layer MAD1 may have a storage modulus in the range of about 0.01 MPa to about 1 MPa at about -20°C.
[0174] Electronic device EA according to the embodiment (see Figure 1A It may include digitizers ZM6 and ZM7, which include a first sub-adhesive layer MAD1 with a low energy storage modulus, and thus can improve folding performance.
[0175] In the case where the digitizers ZM6 and ZM7 also include a first sub-adhesive layer MAD1, the sum of the thicknesses of the first sub-adhesive layer MAD1 and the first adhesive layer AD1 can be in the range of about 10 μm to about 50 μm.
[0176] refer to Figure 12 The digitizer ZM7 according to the embodiment may further include a second sub-adhesive layer MAD2. The second sub-adhesive layer MAD2 may be an adhesive layer for controlling the modulus. The second sub-adhesive layer MAD2 may be disposed below the second adhesive layer AD2 to have a lower storage modulus than the second adhesive layer AD2. The second sub-adhesive layer MAD2 may have a storage modulus in the range of about 0.01 MPa to about 1 MPa at about -20°C.
[0177] Electronic device EA according to the embodiment (see Figure 1A It may include a digitizer ZM7, which includes a second sub-adhesive layer MAD2 with a low energy storage modulus, and thus can improve folding performance.
[0178] In the case where the digitizer ZM7 also includes a second sub-adhesive layer MAD2, the sum of the thicknesses of the second sub-adhesive layer MAD2 and the second adhesive layer AD2 can be in the range of about 10 μm to about 50 μm.
[0179] Figures 13A to 13E This is a schematic cross-sectional view illustrating a method for manufacturing a digitizer to be included in an electronic device, according to an embodiment. The same / similar reference numerals are used in conjunction with... Figures 1A to 12Components that are identical or similar to each other, and whose redundant descriptions are omitted. See below for reference. Figures 13A to 13E This section will describe a method for manufacturing an electronic device according to an embodiment.
[0180] A method for manufacturing an electronic device according to an embodiment may include manufacturing a digitizer and setting a display panel on the digitizer.
[0181] refer to Figure 13A and Figure 13B Manufacturing a digitizer may include: forming first sensing coils RF1-1, RF1-2 and RF1-3 on a first surface of a substrate PI, and forming second sensing coils CF1-1, CF1-2 and CF1-3 on a second surface of the substrate PI opposite to the first surface.
[0182] refer to Figure 13C Manufacturing a digitizer may include: providing a first adhesive layer AD1 in a semi-cured state on first sensing coils RF1-1, RF1-2, and RF1-3, and providing a second adhesive layer AD2 in a semi-cured state on second sensing coils CF1-1, CF1-2, and CF1-3. The first adhesive layer AD1 may be configured to completely cover the upper surfaces of the first sensing coils RF1-1, RF1-2, and RF1-3, and the second adhesive layer AD2 may be configured to completely cover (or overlap with) the upper surfaces of the second sensing coils CF1-1, CF1-2, and CF1-3.
[0183] However, the order in which the first adhesive layer AD1 and the second adhesive layer AD2 are applied is not limited. For example, the first adhesive layer AD1 and the second adhesive layer AD2 can be simultaneously stacked in a laminating manner using rollers. The first adhesive layer AD1 and the second adhesive layer AD2, which are in a semi-cured state, are approximately 50% cured and may have weak adhesive strength, and can be substantially fully cured (e.g., fully cured) later by irradiation with light such as ultraviolet light.
[0184] refer to Figure 13D Manufacturing a digitizer may include increasing the flatness of the first adhesive layer AD1 and the second adhesive layer AD2. Increasing the flatness of the first adhesive layer AD1 and the second adhesive layer AD2 may include heating the first adhesive layer AD1 and the second adhesive layer AD2. For example, heat in the range of about 120°C to about 170°C may be applied.
[0185] Because of the first sensing coils RF1-1, RF1-2, and RF1-3 and the second sensing coils CF1-1, CF1-2, and CF1-3, steps may form on the surfaces of the first adhesive layer AD1 and the second adhesive layer AD2 opposite to the surfaces that contact the first sensing coils RF1-1, RF1-2, and RF1-3 and the second sensing coils CF1-1, CF1-2, and CF1-3. When heat is applied to the first adhesive layer AD1 and the second adhesive layer AD2, thermal melting may occur in the first adhesive layer AD1 and the second adhesive layer AD2. Therefore, the steps formed on the surfaces of the first adhesive layer AD1 and the second adhesive layer AD2 may disappear, and the surfaces of the first adhesive layer AD1 and the second adhesive layer AD2 may become flat.
[0186] refer to Figure 13E Manufacturing a digitizer may include irradiating a first adhesive layer AD1 and a second adhesive layer AD2 with UV light. The first adhesive layer AD1 and the second adhesive layer AD2 may include a secondary initiator, and the secondary initiator absorbs the provided UV light to initiate a second curing process, such that the flat first adhesive layer AD1 and the second adhesive layer AD2 are substantially completely cured (e.g., fully cured), and the flat surface is fixed.
[0187] Although not shown, manufacturing the digitizer may also include: forming a first sub-adhesive layer on the first adhesive layer AD1. It may also include the step of forming a second sub-adhesive layer below the second adhesive layer AD2.
[0188] The implementation will be described in more detail below by way of performance values when the digitizers of the specific examples and comparative examples are applied to electronic devices. The following examples are for illustrative purposes only and are for understanding purposes only, and therefore the scope is not limited thereto.
[0189] (Comparison of electronic device performance)
[0190] Surface folding properties and visibility properties were measured for the electronic device. A digitizer from each of the example and comparative examples was applied to the electronic device, and the results are shown in Table 1 below. Apart from the digitizer, the electronic devices according to the example and comparative examples have the same configuration. The configurations of the digitizers in the example and comparative examples are shown in the table below. Example 4 includes a light-blocking layer in which carbon black is dispersed in polyimide, and Example 5 includes a light-blocking layer in which carbon black is dispersed in polyethylene terephthalate.
[0191] The ordinary adhesive layer used in each of Examples 1 through 3 is an adhesive layer that is substantially fully cured (e.g., fully cured) by a single curing process.
[0192] Folding performance is measured by the number of folding repetitions when defects occur in the electronic device. Visibility performance is measured by whether wiring is projected onto the first adhesive layer of the digitizer. High-temperature and high-humidity reliability is measured by the time until corrosion occurs in the sensing coil of the digitizer at approximately 60°C and approximately 90% humidity.
[0193] [Table 1]
[0194]
[0195] [Table 2]
[0196]
[0197] [Table 3]
[0198]
[0199]
[0200] [Table 4]
[0201]
[0202] [Table 5]
[0203]
[0204]
[0205] Referring to the results shown in Tables 1 to 5, the electronic device according to the embodiment includes a digitizer comprising a first adhesive layer and a second adhesive layer, which are multi-cured, and therefore have improved folding performance and improved visibility performance even without a separate cover layer. Furthermore, by providing a first sub-adhesive layer and / or a second sub-adhesive layer having a controlled energy storage modulus on the first and second adhesive layers, an electronic device with further improved folding performance can be provided.
[0206] Therefore, it can be confirmed that the electronic device according to the embodiment can provide excellent reliability by including multiple cured adhesive layers or by electroplating sensing coils.
[0207] According to the implementation method, the digitizer can be applied to foldable electronic devices, enabling the sensing of input such as pens, and further improving the folding reliability of the electronic devices.
[0208] Embodiments have been disclosed herein, and although terminology has been used, it is used and interpreted in a general and descriptive sense only, and not for limiting purposes. In some instances, as will be apparent to those skilled in the art, features, characteristics, and / or elements described in connection with embodiments may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise specifically indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of this disclosure as set forth in the appended claims.
Claims
1. An electronic device comprising: window; A display panel is located below the window; as well as The digitizer is located below the display panel. The digitizer includes: The base layer includes a first surface and a second surface opposite to the first surface; A first sensing coil is disposed on the first surface of the substrate layer; A second sensing coil is disposed on the second surface of the substrate layer; A first adhesive layer is disposed on and covers the first sensing coil; A second adhesive layer is disposed on and covers the second sensing coil; and The first sub-adhesive layer is disposed on the first adhesive layer. Wherein, the first sub-adhesive layer has a lower energy storage modulus than the first adhesive layer. Wherein, the energy storage modulus of the first sub-adhesive layer is in the range of 0.01 MPa to 1 MPa at -20°C, and The first adhesive layer and the second adhesive layer are multi-curing adhesive layers.
2. The electronic device according to claim 1, wherein: The first adhesive layer completely overlaps with the upper surface of the first sensing coil, and The second adhesive layer completely overlaps with the upper surface of the second sensing coil.
3. The electronic device according to claim 1, wherein the digitizer further comprises: A shielding layer is disposed below the second adhesive layer, the shielding layer comprising metal.
4. The electronic device according to claim 3, wherein, The shielding layer includes at least one of permalloy, invar alloy, and stainless steel.
5. The electronic device according to claim 4, wherein the digitizer further comprises: A magnetic sheet is disposed on the shielding layer, and the magnetic sheet comprises magnetic metal powder.
6. The electronic device according to claim 1, wherein the digitizer further comprises: The second sub-adhesive layer is disposed below the second adhesive layer. The second sub-adhesive layer has a lower energy storage modulus than the second adhesive layer.
7. The electronic device according to claim 6, wherein, The energy storage modulus of the second sub-adhesive layer is in the range of 0.01 MPa to 1 MPa at -20°C.
8. The electronic device according to claim 1, wherein the digitizer further comprises: A buffer layer is disposed below the second adhesive layer.
9. The electronic device according to claim 1, wherein the digitizer further comprises: A light-blocking layer is disposed on the first adhesive layer, the light-blocking layer having a transmittance of 50% or less.
10. The electronic device according to claim 9, wherein: The light-blocking layer comprises pigment particles dispersed in a binder, and The adhesive is polyethylene terephthalate or polyimide.
11. The electronic device according to claim 1, wherein, The first adhesive layer and the second adhesive layer do not contain acidic components.
12. The electronic device according to claim 1, wherein, The digitizer also includes a plating on the upper surface of each of the first sensing coil and the second sensing coil.
13. The electronic device according to claim 1, further comprising: The folding area can be folded relative to a folding axis extending in one direction; The first non-folded region extends toward one side of the folded region; as well as The second non-folded region extends toward the other side of the folded region.