Method of forming an image sensor
By forming a doped epitaxial layer in a deep trench and then planarizing it, the white noise problem in CMOS image sensors is solved, thus improving the performance of the image sensors.
Patent Information
- Application Number
- CN202111547475.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-16
- Publication Date
- 2026-02-10
- Estimated Expiration
- 2041-12-16
AI Technical Summary
Existing CMOS image sensors suffer from white noise during the manufacturing process, which leads to a decrease in image quality.
A doped epitaxial layer is formed in the deep trench, and the second region is removed by a first planarization process to reduce lattice dislocations and improve the performance of the image sensor.
It effectively reduces the generation of white noise and improves the performance of image sensors.
Smart Images

Figure CN114156298B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing technology, and more particularly to a method for forming an image sensor. Background Technology
[0002] Image sensors are semiconductor devices that convert optical images into electrical signals. Due to their advantages of low power consumption and high signal-to-noise ratio, CMOS image sensors (CIS) have been widely used in various fields.
[0003] The most commonly used pixel unit in CMOS image sensors contains a photodiode (PD) and four MOSFETs, including a transfer transistor (TX), a reset transistor (RST), a source follower transistor (SF), a row select transistor (RS), and a floating diffusion region (FD). This allows for the selection, reset, signal output, signal amplification, and readout control of the photodiode (PD). The principle is that when light shines on the photodiode (PD), photogenerated carriers accumulate within it. Then, an external control circuit turns on the transfer transistor (TX), allowing the photogenerated carriers to flow from the photodiode (PD) to the floating diffusion region (FD). The floating diffusion region (FD) acts as both the drain of the transfer transistor (TX) and the PN junction capacitance, converting the photogenerated carriers into a voltage signal output.
[0004] However, existing CMOS image sensors still have many problems in their fabrication process. Summary of the Invention
[0005] The technical problem solved by this invention is to provide a method for forming an image sensor that can effectively reduce white noise and improve image quality.
[0006] To address the aforementioned problems, the present invention provides a method for forming an image sensor, comprising: providing a substrate having a first ion within it; forming a plurality of deep trenches within the substrate; forming a doped epitaxial layer within the deep trenches, the doped epitaxial layer filling the deep trenches, the doped epitaxial layer having a second ion, the second ion having a different electrical type from the first ion, the doped epitaxial layer comprising a first region and a second region located on the first region, the sidewalls of the second region having an angle with the sidewalls of the first region; and performing a first planarization process to remove the second region.
[0007] Optionally, before forming the plurality of deep trenches, the method further includes: forming a mask material layer on the substrate; and during the process of forming the plurality of deep trenches, the method further includes: etching away a portion of the mask material layer to form a mask layer.
[0008] Optionally, the thickness of the mask material layer is 100 nanometers to 800 nanometers.
[0009] Optionally, the material of the mask layer is different from the material of the doped epitaxial layer; the material of the mask layer includes silicon oxide or silicon nitride.
[0010] Optionally, the method for forming the doped epitaxial layer includes: forming an epitaxial material layer in the deep trench and on the surface of the mask layer; performing a second planarization process on the epitaxial material layer until the surface of the mask layer is exposed, thereby forming the doped epitaxial layer.
[0011] Optionally, the second planarization process includes a chemical mechanical polishing process.
[0012] Optionally, before performing the first planarization process, the process further includes removing the mask layer.
[0013] Optionally, before forming the doped epitaxial layer, the method further includes forming an intrinsic epitaxial layer on the sidewall of the deep trench, wherein the doped epitaxial layer is located on the intrinsic epitaxial layer.
[0014] Optionally, the first ion is an N-type ion; the second ion is a P-type ion.
[0015] Optionally, the first planarization process includes a chemical mechanical polishing process.
[0016] Optionally, after the first planarization process, the method further includes forming a capping layer on the substrate.
[0017] Optionally, the method for forming the capping layer includes: forming a capping material layer on the substrate using an epitaxial growth process; and performing a third planarization treatment on the capping material layer to form the capping layer.
[0018] Optionally, the third planarization process includes a chemical mechanical polishing process.
[0019] Compared with the prior art, the technical solution of the present invention has the following advantages:
[0020] In the image sensor formation method of the present invention, a doped epitaxial layer is formed in a deep trench, the doped epitaxial layer fills the deep trench, and the doped epitaxial layer contains a second ion with a different electrical type than the first ion. The doped epitaxial layer includes a first region and a second region located on the first region, and the sidewalls of the second region and the sidewalls of the first region form an angle. A first planarization process is performed to remove the second region. By performing the first planarization process after forming the doped epitaxial layer, the second region where lattice dislocations occur is removed, thereby effectively reducing the generation of white noise and improving the performance of the final image sensor.
[0021] Furthermore, before forming the doped epitaxial layer, the method further includes forming an intrinsic epitaxial layer on the sidewall of the deep trench, wherein the doped epitaxial layer is located on the intrinsic epitaxial layer. The intrinsic epitaxial layer can be used to repair defects on the sidewall of the deep trench, thereby improving the performance of the final image sensor. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the structural steps in the formation of an image sensor;
[0023] Figures 2 to 8 This is a schematic diagram of the structure of each step in the method for forming an image sensor in an embodiment of the present invention. Detailed Implementation
[0024] As described in the background section, existing CMOS image sensors still have many problems in their fabrication process. These will be explained in detail below with reference to the accompanying drawings.
[0025] Figure 1 This is a schematic diagram of the structural steps in the formation of an image sensor.
[0026] Please refer to Figure 1 A substrate 100 is provided, wherein a first ion is present in the substrate 100; a plurality of deep trenches (not shown) are formed in the substrate 100, wherein the deep trenches include a first part A1 and a second part A2 located on the first part A1; a doped epitaxial layer 101 is formed in the deep trenches, wherein the doped epitaxial layer 102 fills the deep trenches, wherein the doped epitaxial layer 101 contains a second ion, the second ion having a different electrical type from the first ion, to form a photodiode; and a connection layer 102 is formed on the substrate 100.
[0027] In this embodiment, during the etching process to form the deep trench, due to limitations in the etching process, the morphology of the second part A2 of the deep trench is relatively complex, specifically exhibiting a conical structure. Subsequently, during the epitaxial growth process within the deep trench to form the doped epitaxial layer 101, the doped epitaxial layer 101 within the second part A2 will exhibit lattice growth of both the <111> and <100> planes. Because the lattice growth rates of the <111> and <100> planes are inconsistent, lattice dislocations are prone to occur (e.g., Figure 1(As shown in Part A). The phenomenon of lattice dislocations causes some pixels formed later to generate charges even without light, and the accumulation of charges will produce dark current. For a pixel unit, if its dark current value exceeds the photocurrent generated by capturing photoelectrons, the pixel unit will be considered white noise, thus affecting the performance of the final image sensor.
[0028] Based on this, the present invention provides a method for forming an image sensor, wherein a doped epitaxial layer is formed in a deep trench, the doped epitaxial layer fills the deep trench, the doped epitaxial layer contains a second ion, the second ion having a different electrical type from the first ion, the doped epitaxial layer includes a first region and a second region located on the first region, the sidewalls of the second region and the sidewalls of the first region having an angle; a first planarization process is performed to remove the second region. By performing the first planarization process after forming the doped epitaxial layer, the second region where lattice dislocations occur is removed, thereby effectively reducing the generation of white noise and improving the performance of the finally formed image sensor.
[0029] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0030] Figures 2 to 8 This is a schematic diagram of the structure of each step in the method for forming an image sensor in an embodiment of the present invention.
[0031] Please refer to Figure 2 A substrate 200 is provided, wherein the substrate 200 contains a first ion.
[0032] In this embodiment, the substrate 200 includes a substrate, a first P-type epitaxial layer on the substrate, a first intrinsic epitaxial layer on the first P-type epitaxial layer, and an N-type epitaxial layer (not shown) on the first intrinsic epitaxial layer.
[0033] It should be noted that the first ion present in the substrate 200 is the N-type ion doped in the N-type epitaxial layer.
[0034] The N-type ion includes either phosphorus ions or arsenic ions. In this embodiment, the N-type ion is a phosphorus ion.
[0035] In this embodiment, the substrate material is silicon doped with p-type ions. In other embodiments, the substrate material may also be germanium, silicon germanide, silicon carbide, gallium arsenide, or indium gallium ionide.
[0036] Please refer to Figure 3A mask material layer 201 is formed on the substrate 200.
[0037] In this embodiment, the mask material layer 201 is a single-layer structure, and the material of the mask material layer 201 is silicon oxide or silicon nitride.
[0038] In other embodiments, the mask material layer may also be a multilayer structure, specifically a first mask material layer, a second mask material layer located on the first mask material layer, and a third mask material layer located on the second mask material layer. The first and third mask material layers are made of silicon oxide, and the second mask material layer is made of silicon nitride.
[0039] In this embodiment, the thickness of the mask material layer 201 is 100 nanometers to 800 nanometers.
[0040] In this embodiment, the material of the mask material layer 201 is different from the material of the subsequently formed doped epitaxial layer. Its purpose is to serve as a grinding stop layer during the subsequent planarization process of the epitaxial material layer.
[0041] Please refer to Figure 4 A plurality of deep trenches 202 are formed in the substrate 200.
[0042] In this embodiment, the process of forming a plurality of deep trenches 202 further includes: etching away a portion of the mask material layer 201 to form a mask layer 203.
[0043] In this embodiment, the linewidth of the deep trench 202 is 0.2 micrometers to 0.5 micrometers.
[0044] In this embodiment, after forming the deep trench 202, the method further includes cleaning the deep trench 202 to remove residues formed in the deep trench 202 during the etching process.
[0045] In this embodiment, the process of etching to form the deep trench 202 is a wet etching process; in other embodiments, the process of etching to form the deep trench can also be a wet etching process.
[0046] In this embodiment, the deep trench 202 formed by etching is stationary between the first P-type epitaxial layers.
[0047] Please refer to Figure 5 An intrinsic epitaxial layer 204 is formed on the sidewall of the deep trench 202.
[0048] In this embodiment, the intrinsic epitaxial layer 204 can be used to repair defects on the sidewalls of the deep trench 202, thereby improving the performance of the final image sensor.
[0049] In this embodiment, the intrinsic epitaxial layer 204 is formed using an epitaxial growth process.
[0050] Please refer to Figure 6 A doped epitaxial layer 205 is formed within the deep trench 202, the doped epitaxial layer 205 fills the deep trench 202, the doped epitaxial layer 205 contains a second ion, the second ion having a different electrical type from the first ion, the doped epitaxial layer 205 includes a first region I and a second region II located on the first region I, the sidewall of the second region II having an angle with the sidewall of the first region I.
[0051] In this embodiment, the doped epitaxial layer 205 is located on the intrinsic epitaxial layer 204.
[0052] In this embodiment, the method for forming the doped epitaxial layer 205 includes: forming an epitaxial material layer (not shown) in the deep trench 202 and on the surface of the mask layer 203; performing a second planarization process on the epitaxial material layer until the surface of the mask layer 203 is exposed, thereby forming the doped epitaxial layer 205.
[0053] In this embodiment, the second planarization process employs a chemical mechanical polishing process.
[0054] In this embodiment, during the etching process to form the deep trench 202, due to limitations in the etching process, the opening morphology of the deep trench 202 is relatively complex, specifically exhibiting a conical structure. Therefore, the sidewall of the second region II of the doped epitaxial layer 205 formed within the deep trench 202 has an included angle with the sidewall of the first region I.
[0055] The reason for the angle between the sidewall of the second region II and the sidewall of the first region I is that during the epitaxial growth process of forming the doped epitaxial layer 205 in the deep trench 202, there will be lattice growth of the <111> and <100> planes in the doped epitaxial layer 205 of the second region II. Due to the inconsistent lattice growth rates of the <111> and <100> planes, lattice dislocations are prone to occur. The phenomenon of lattice dislocations will cause some pixels formed subsequently to generate charges even without light, and the accumulation of charges will generate dark current.
[0056] For a pixel, if its dark current value exceeds the photocurrent generated by capturing photoelectrons, the pixel is considered white noise, which in turn affects the performance of the final image sensor.
[0057] In this embodiment, since the first ion and the second ion have different electrical types, both the first ion and the second ion will diffuse to a certain extent, thus forming a photodiode structure within the intrinsic epitaxial layer 204. Subsequently, when light shines onto the substrate, electrons are excited in the substrate 200, and the photodiode structure is used to generate an electrical signal from the excited electrons.
[0058] In this embodiment, the second ion is a P-type ion.
[0059] The P-type ion includes boron ions or indium ions. In this embodiment, the P-type ion is a boron ion.
[0060] In this embodiment, please continue to refer to Figure 6 After the doped epitaxial layer 205 is formed, the mask layer 203 is removed.
[0061] Please refer to Figure 7 The first flattening process is used to remove the second region II.
[0062] In this embodiment, a doped epitaxial layer 205 is formed within the deep trench 202, filling the trench 202 completely. The doped epitaxial layer 205 contains second ions of a different electrical type than the first ions. The doped epitaxial layer 205 includes a first region I and a second region II located on the first region I, with an angle between the sidewall of the second region II and the sidewall of the first region I. A first planarization process is then performed to remove the second region II. By performing a first planarization process after forming the doped epitaxial layer 205, the second region II, which contains lattice dislocations, is removed, thereby effectively reducing white noise generation and improving the performance of the final image sensor.
[0063] In this embodiment, the first planarization process employs a chemical mechanical polishing process.
[0064] Please refer to Figure 8 After the first planarization process, a cover layer 206 is formed on the substrate 200.
[0065] In this embodiment, the method for forming the cover layer 206 includes: forming a cover material layer (not shown) on the substrate using an epitaxial growth process; and performing a third planarization process on the cover material layer to form the cover layer 206.
[0066] In this embodiment, the third planarization process employs a chemical mechanical polishing process.
[0067] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. A method for forming an image sensor, characterized in that, include: A substrate is provided, wherein the substrate contains a first ion; Several deep trenches are formed within the substrate; A doped epitaxial layer is formed within the deep trench, filling the trench completely. The doped epitaxial layer contains second ions of a different electrical type than the first ions. The doped epitaxial layer includes a first region and a second region located on the first region, with an angle between the sidewalls of the second region and the sidewalls of the first region. The opening of the deep trench has a conical structure, so that there are lattice growth of <111> and <100> planes in the doped epitaxial layer of the second region. The different growth rates of the <111> and <100> planes cause lattice dislocations in the lattice growth, which in turn makes the sidewall of the second region and the sidewall of the first region have an angle. The first planarization process is used to remove the second region of lattice dislocations and the opening portion of the deep trench that presents a conical structure.
2. The method for forming an image sensor as described in claim 1, characterized in that, Before forming the plurality of deep trenches, the method further includes: forming a mask material layer on the substrate; during the process of forming the plurality of deep trenches, the method further includes: etching away a portion of the mask material layer to form a mask layer.
3. The method for forming an image sensor as described in claim 2, characterized in that, The thickness of the mask material layer is 100 nanometers to 800 nanometers.
4. The method for forming an image sensor as described in claim 2, characterized in that, The material of the mask layer is different from the material of the doped epitaxial layer; the material of the mask layer includes silicon oxide or silicon nitride.
5. The method for forming an image sensor as described in claim 2, characterized in that, The method for forming the doped epitaxial layer includes: forming an epitaxial material layer in the deep trench and on the surface of the mask layer; performing a second planarization process on the epitaxial material layer until the surface of the mask layer is exposed, thereby forming the doped epitaxial layer.
6. The method for forming an image sensor as described in claim 5, characterized in that, The second planarization process includes a chemical mechanical polishing process.
7. The method for forming an image sensor as described in claim 2, characterized in that, Before the first planarization process, the method further includes: removing the mask layer.
8. The method for forming an image sensor as described in claim 1, characterized in that, Before forming the doped epitaxial layer, the method further includes: forming an intrinsic epitaxial layer on the sidewall of the deep trench, wherein the doped epitaxial layer is located on the intrinsic epitaxial layer.
9. The method for forming an image sensor as described in claim 1, characterized in that, The first ion is an N-type ion; the second ion is a P-type ion.
10. The method for forming an image sensor as described in claim 1, characterized in that, The first planarization process includes: chemical mechanical polishing.
11. The method for forming an image sensor as described in claim 1, characterized in that, Following the first planarization process, the method further includes forming a capping layer on the substrate.
12. The method for forming an image sensor as described in claim 11, characterized in that, The method for forming the capping layer includes: forming a capping material layer on the substrate using an epitaxial growth process; and performing a third planarization treatment on the capping material layer to form the capping layer.
13. The method for forming an image sensor as described in claim 12, characterized in that, The third planarization process includes: chemical mechanical polishing.
Citation Information
Patent Citations
Photoelectric diode and formation method thereof
CN110061100A