Magnetic storage device

Abstract

Embodiments of the present application provide a magnetic storage device having a magnetic resistance effect element with appropriate characteristics. The magnetic storage device of the embodiments has: a plurality of first wirings each extending in a first direction; a plurality of second wirings each extending in a second direction intersecting the first direction; a plurality of first storage units each including a first switching element and a first magnetic resistance effect element connected in series, the first switching element being connected to a corresponding one of the first wirings, the first magnetic resistance effect element being connected to a corresponding one of the second wirings, and the first switching element including a first lower electrode provided on the first wiring side, a first upper electrode provided on the first magnetic resistance effect element side, and a first switching material layer provided between the first lower electrode and the first upper electrode, and the first lower electrodes included in the first storage units adjacent to each other in the first direction are continuously provided on the first wirings connecting the first storage units adjacent to each other in the first direction.

Description

[0001] [Related Applications]

[0002] This application claims priority to Japanese Patent Application No. 2020-156164 (filed on September 17, 2020). This application incorporates the entire contents of that basic application by reference. Technical Field

[0003] Embodiments of the present invention relate to a magnetic storage device. Background Technology

[0004] One proposed magnetic storage device integrates storage cells containing magnetoresistive elements and switching elements on a semiconductor substrate.

[0005] However, as components become increasingly miniaturized, it becomes increasingly difficult to fabricate memory cells. Based on this situation, there is a demand for a magnetoresistive element that offers reliable component characteristics. Summary of the Invention

[0006] The problem to be solved by the present invention is to provide a magnetic storage device having a magnetoresistive element with appropriate characteristics.

[0007] The magnetic storage device of the embodiment includes: a plurality of first wirings extending in a first direction; a plurality of second wirings extending in a second direction intersecting the first direction; and a plurality of first storage cells disposed between the plurality of first wirings and the plurality of second wirings, each including a first switching element and a first magnetoresistive effect element connected in series, the first switching element being connected to a corresponding first wiring, and the first magnetoresistive effect element being connected to a corresponding second wiring; and the first switching element including: a first lower electrode disposed on the side of the first wiring; a first upper electrode disposed on the side of the first magnetoresistive effect element; and a first switching material layer disposed between the first lower electrode and the first upper electrode; and the first lower electrodes contained in the first storage cells adjacent to each other in the first direction are continuously disposed on the first wiring, the first wiring connecting the first storage cells adjacent to each other in the first direction. Attached Figure Description

[0008] Figure 1 This is a perspective view schematically showing the basic structure of the magnetic storage device according to the first embodiment.

[0009] Figure 2A and Figure 2B These are cross-sectional views schematically illustrating the configuration of the magnetic storage device according to the first embodiment.

[0010] Figure 3 This is a diagram schematically illustrating the current-voltage characteristics of the selector in the first embodiment.

[0011] Figure 4A and Figure 4B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the first embodiment.

[0012] Figure 5A and Figure 5B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the first embodiment.

[0013] Figure 6A and Figure 6B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the first embodiment.

[0014] Figure 7A and Figure 7B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the first embodiment.

[0015] Figure 8A and Figure 8B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the first embodiment.

[0016] Figure 9A and Figure 9B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the first embodiment.

[0017] Figure 10 This is a cross-sectional view schematically illustrating the configuration of a magnetic storage device in the first embodiment where alignment misalignment occurs.

[0018] Figure 11A and Figure 11B These are cross-sectional views schematically illustrating a portion of the manufacturing method of a magnetic storage device according to a variation of the first embodiment.

[0019] Figure 12A and Figure 12B These are cross-sectional views schematically illustrating a portion of the manufacturing method of a magnetic storage device according to a variation of the first embodiment.

[0020] Figure 13A and Figure 13B These are cross-sectional views schematically illustrating the configuration of the magnetic storage device according to the second embodiment.

[0021] Figure 14A and Figure 14BThese are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the second embodiment.

[0022] Figure 15A and Figure 15B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the second embodiment.

[0023] Figure 16A and Figure 16B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the second embodiment.

[0024] Figure 17A and Figure 17B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the second embodiment.

[0025] Figure 18 This is a cross-sectional view schematically illustrating the configuration of a magnetic storage device in the second embodiment where alignment misalignment occurs.

[0026] Figure 19 This is a cross-sectional view schematically showing the configuration of the magnetic storage device of the first variation of the second embodiment.

[0027] Figure 20 This is a cross-sectional view schematically showing the configuration of the magnetic storage device in the second variation of the second embodiment.

[0028] Figure 21A and Figure 21B These are cross-sectional views schematically illustrating a part of the manufacturing method of a magnetic storage device according to a third variation of the second embodiment.

[0029] Figure 22A and Figure 22B These are cross-sectional views schematically illustrating a part of the manufacturing method of a magnetic storage device according to a third variation of the second embodiment.

[0030] Figure 23A and Figure 23B These are cross-sectional views schematically illustrating a part of the manufacturing method of a magnetic storage device according to a third variation of the second embodiment.

[0031] Figure 24A and Figure 24B These are cross-sectional views schematically illustrating a part of the manufacturing method of a magnetic storage device according to a third variation of the second embodiment.

[0032] Figure 25A and Figure 25B These are cross-sectional views schematically illustrating a part of the manufacturing method of a magnetic storage device according to a third variation of the second embodiment.

[0033] Figure 26A and Figure 26B These are cross-sectional views schematically illustrating a part of the manufacturing method of a magnetic storage device according to a third variation of the second embodiment.

[0034] Figure 27A and Figure 27B These are cross-sectional views schematically illustrating a part of the manufacturing method of a magnetic storage device according to a third variation of the second embodiment.

[0035] Figure 28A and Figure 28B These are cross-sectional views schematically illustrating a part of the manufacturing method of a magnetic storage device according to a third variation of the second embodiment.

[0036] Figure 29A and Figure 29B These are cross-sectional views schematically illustrating the configuration of the magnetic storage device according to the third embodiment.

[0037] Figure 30A and Figure 30B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the third embodiment.

[0038] Figure 31A and Figure 31B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the third embodiment.

[0039] Figure 32A and Figure 32B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the third embodiment.

[0040] Figure 33A and Figure 33B These are cross-sectional views schematically illustrating a portion of the manufacturing method of the magnetic storage device according to the third embodiment.

[0041] Figure 34A and Figure 34B These are cross-sectional views schematically illustrating the configuration of a magnetic storage device in the third embodiment where alignment misalignment occurs. Detailed Implementation

[0042] The embodiments will now be described with reference to the accompanying drawings.

[0043] (Implementation Method 1)

[0044] Figure 1 This is a perspective view schematically illustrating the basic structure of the nonvolatile magnetic storage device of the first embodiment. Figure 2AThis is a schematic cross-sectional view (a cross-sectional view along the Y direction) showing the configuration of the non-volatile magnetic storage device of the first embodiment. Figure 2B This is a schematic cross-sectional view (a cross-sectional view along the X direction) illustrating the configuration of the non-volatile magnetic storage device according to the first embodiment. Furthermore, in each figure, the X direction (first direction), Y direction (second direction), and Z direction (third direction) intersect each other. Specifically, the X direction (first direction), Y direction (second direction), and Z direction (third direction) are orthogonal to each other.

[0045] The magnetic storage device of this embodiment includes: a plurality of first wirings 10 extending in the X direction; a plurality of second wirings 20 extending in the Y direction; and a plurality of storage cells 30 disposed between the plurality of first wirings 10 and the plurality of second wirings 20. These first wirings 10, second wirings 20, and storage cells 30 are surrounded by an interlayer insulating film 40. These first wirings 10, second wirings 20, storage cells 30, and interlayer insulating film 40 are disposed on a substrate region 100 including a semiconductor substrate 101.

[0046] The first wiring 10 and the second wiring 20 are formed of metals such as tungsten (W) and molybdenum (Mo). One of the first wiring 10 and the second wiring 20 functions as a word line, and the other of the first wiring 10 and the second wiring 20 functions as a bit line.

[0047] Each storage cell 30 includes a magnetoresistive element 31, a selector (switching element) 32, and a sidewall insulating layer 33. The magnetoresistive element 31 and the selector 32 are connected in series. One end of the magnetoresistive element 31 is connected to the second wiring 20, and the other end of the magnetoresistive element 31 is connected to the selector 32. One end of the selector 32 is connected to the first wiring 10, and the other end of the selector 32 is connected to the magnetoresistive element 31.

[0048] In this and other embodiments, the case where an MTJ (magnetic tunnel junction) element is used as the magnetoresistive effect element 31 will be described. The magnetoresistive effect element 31 includes a storage layer (first magnetic layer) 31a, a reference layer (second magnetic layer) 31b, and a tunnel barrier layer (nonmagnetic layer) 31c disposed between the storage layer 31a and the reference layer 31b. A hard mask layer 31d is provided on the reference layer 31b. Furthermore, a displacement cancellation layer may be provided in the magnetoresistive effect element 31 to cancel the magnetic field applied from the reference layer 31b to the storage layer 31a.

[0049] Storage layer 31a is a ferromagnetic layer with a variable magnetization direction, such as a CoFeB layer containing cobalt (Co), iron (Fe), and boron (B). Furthermore, the variable magnetization direction means that the magnetization direction changes relative to a specific write current.

[0050] Reference layer 31b is a strongly magnetic layer with a fixed magnetization direction, such as a CoFeB layer containing cobalt (Co), iron (Fe), and boron (B), or a superlattice layer containing cobalt (Co) and specific elements selected from platinum (Pt), nickel (Ni), and palladium (Pd). Furthermore, a fixed magnetization direction means that the magnetization direction does not change with a specific write current.

[0051] The tunnel barrier layer 31c is an insulating layer disposed between the storage layer 31a and the reference layer 31b, for example, formed of an MgO layer containing magnesium (Mg) and oxygen (O).

[0052] When the magnetization direction of the storage layer 31a is parallel to the magnetization direction of the reference layer 31b, the magnetoresistive element 31 is in a low-resistance state. When the magnetization direction of the storage layer 31a is antiparallel to the magnetization direction of the reference layer 31b, the magnetoresistive element 31 is in a high-resistance state. Therefore, binary data can be stored based on the resistance state of the magnetoresistive element 31. Furthermore, the magnetoresistive element 31 can be set to a low-resistance state or a high-resistance state based on the direction of the current flowing in the magnetoresistive element 31.

[0053] The aforementioned magnetoresistive element 31 is an STT (spin transfer torque) type magnetoresistive element with perpendicular magnetization. That is, the storage layer 31a has a magnetization direction perpendicular to its film surface, and the reference layer 31b has a magnetization direction perpendicular to its film surface.

[0054] The selector 32 includes: a bottom electrode 32a disposed on the side of the first wiring 10; a top electrode 32b disposed on the side of the magnetoresistive effect element 31; and a selector material layer (switch material layer) 32c disposed between the bottom electrode 32a and the top electrode 32b. The bottom electrode 32a and the top electrode 32b are formed of titanium nitride (TiN), tungsten nitride (WN), or carbon (C), etc. The selector material layer 32c is formed of a material containing an insulator, containing a group 15 element introduced through ion implantation. This selector material layer 32c contains, for example, arsenic (As) or germanium (Ge). The insulator contains nitrides and / or oxides, such as silicon nitride (SiN) or hafnium oxide (HfO). x ), silicon dioxide (SiO2) or materials substantially formed of SiO2.

[0055] Selector 32 is a 2-terminal switching element. It is in a high-resistance state when the voltage applied between the two terminals is below a threshold, for example, it is electrically non-conducting. It is in a low-resistance state when the voltage applied between the two terminals is above the threshold, for example, it is electrically conducting.

[0056] Figure 3 This is a schematic diagram illustrating the current-voltage characteristics of selector 32. Selector 32 has the following characteristic: when the voltage between the two terminals reaches the threshold voltage Vth, the voltage between the two terminals will decrease to the holding voltage Vhold, while the current increases sharply.

[0057] By applying a voltage greater than a certain voltage between the first wiring 10 and the second wiring 20, the selector 32 becomes in the ON state (conducting state), thereby enabling the writing (resistance state writing) or reading (resistance state reading) of the magnetoresistive effect element 31 connected in series with the selector 32.

[0058] like Figure 1 , Figure 2A and Figure 2B As shown, in this embodiment, the lower electrodes 32a of the selectors 32 contained in the memory cells 30 that are adjacent to each other in the X direction are continuously disposed on the first wiring 10, which connects the memory cells 30 that are adjacent to each other in the X direction. Specifically, viewed from the Z direction, the pattern of the lower electrodes 32a continuously disposed on the first wiring 10 is consistent with the pattern of the first wiring 10.

[0059] Furthermore, in this embodiment, the selector material layers 32c contained in the memory cells 30 that are adjacent to each other in the X direction are separated from each other in the region between the memory cells 30 that are adjacent to each other in the X direction, and the selector material layers 32c contained in the memory cells 30 that are adjacent to each other in the Y direction are separated from each other in the region between the memory cells 30 that are adjacent to each other in the Y direction.

[0060] A sidewall insulating layer 33 is provided on the sidewalls of the upper electrode 32b of the selector 32, the sidewalls of the selector material layer 32c, and the sidewalls of the magnetoresistive effect element 31. The sidewall insulating layer 33 is formed of silicon nitride (SiN) and has the function of protecting the magnetoresistive effect element 31 during RIE (reactive ion etching).

[0061] Next, refer to Figure 4A and Figures 4B to 9A and Figure 9B The manufacturing method of the magnetic storage device according to this embodiment will be described. Figures 4A to 9A It is a cross-sectional view along the Y direction. Figures 4B to 9B It is a cross-sectional view along the X direction.

[0062] First, such as Figure 4A and Figure 4B As shown, a layer for the first wiring 10 and a layer for the lower electrode 32a of the selector are formed on a base region 100 including a semiconductor substrate 101.

[0063] Next, as Figure 5A and Figure 5B As shown, a mask pattern (not shown) extending in the X direction is used as a mask, and the layer for the first wiring 10 and the layer for the lower electrode 32a are patterned into lines using a RIE. Then, the mask pattern is removed, thereby obtaining the pattern of the first wiring 10 and the pattern of the lower electrode 32a of the selector. Thus, since a common mask pattern is used to pattern the layer for the first wiring 10 and the layer for the lower electrode 32a, the patterns of the first wiring 10 and the lower electrode 32a are aligned. That is, when viewed from the Z direction, the patterns of the first wiring 10 and the lower electrode 32a are consistent.

[0064] Next, as Figure 6A and Figure 6B As shown, an interlayer insulating film 40a is formed across the entire surface, and then planarized using CMP (chemical mechanical polishing). Subsequently, on the planarized structure, a selector material layer 32c, a layer for the upper electrode 32b, a storage layer 31a, a tunnel barrier layer 31c, and a reference layer 31b are formed. Furthermore, a pattern of a hard mask layer 31d is formed on the reference layer 31b.

[0065] Next, as Figure 7A and Figure 7B As shown, the pattern of the hard mask layer 31d is used as a mask, and the reference layer 31b, tunnel barrier layer 31c, storage layer 31a, layer for upper electrode 32b and selector material layer 32c are etched by IBE (ion beam etching).

[0066] Next, as Figure 8A and Figure 8B As shown, along Figure 7A and Figure 7B The surface of the structure obtained in the step is formed with a sidewall insulating layer 33. Thus, the layer constituting the magnetoresistive effect element is protected by the sidewall insulating layer 33.

[0067] Next, as Figure 9A and Figure 9B As shown, the sidewall insulating layer 33 and the selector material layer 32c are etched using RIE. At this time, the layers constituting the magnetoresistive element 31 are protected by the sidewall insulating layer 33. Furthermore, regarding the selector, since the lower electrode 32a has already been patterned, it is essentially only necessary to etch the selector material layer 32c. Therefore, etching damage to the magnetoresistive element 31 due to over-etching of the sidewall insulating layer 33 can be prevented.

[0068] Subsequently, an interlayer insulating film and a second wiring 20 are formed, thereby as follows Figure 2A and Figure 2B The structure shown is such that the memory cell 30 is surrounded by an interlayer insulating film 40.

[0069] As described above, according to this embodiment, in Figure 5A and Figure 5B In this step, a common mask pattern is used to pattern the layer for the first wiring 10 and the layer for the lower electrode 32a of the selector 32, thereby obtaining the pattern of the first wiring 10 and the pattern of the lower electrode 32a of the selector. If, after forming the pattern of the first wiring 10, the layers for the selector 32 and the layers for the magnetoresistive effect element 31 are formed, then in... Figure 9A and Figure 9B In this process, in addition to etching the selector material layer 32c, it is also necessary to etch the layer used for the lower electrode 32a of the selector 32. Therefore, there is a concern that... Figure 9A and Figure 9B During the etching process, the sidewall insulating layer 33 is excessively etched, making it impossible to effectively protect the magnetoresistive element 31. As a result, there is a concern that the magnetoresistive element 31 may suffer etching damage and its characteristics may deteriorate.

[0070] In this embodiment, Figure 5A and Figure 5B In the process, the pattern of the first wiring 10 and the pattern of the lower electrode 32a of the selector are formed. Therefore, in Figure 9A and Figure 9B In this step, it is not necessary to etch the lower electrode 32a of the selector 32; essentially, only the selector material layer 32c needs to be etched. Therefore, the magnetoresistive element 31 can be reliably protected by the sidewall insulating layer 33, thereby preventing etching damage to the magnetoresistive element 31. As a result, in this embodiment, the deterioration of the characteristics of the magnetoresistive element 31 caused by etching damage can be prevented, thereby obtaining a magnetic storage device with a magnetoresistive element having appropriate characteristics.

[0071] in addition, Figure 2A and Figure 2B and Figure 4A and Figures 4B to 9A and Figure 9B In the example shown, the assumption is that no alignment offset occurs, but in actual manufacturing processes, alignment offset generally occurs. In this embodiment, when alignment offset occurs, such as... Figure 10 As shown, when viewed from the Z direction, the pattern of the magnetoresistive element 31 is offset in the Y direction relative to the pattern of the first wiring 10 and the pattern of the lower electrode 32a of the selector 32. However, in this embodiment, even if an alignment offset occurs, the pattern of the first wiring 10 and the pattern of the lower electrode 32a will match each other, and when viewed from the Z direction, the pattern of the first wiring 10 and the pattern of the lower electrode 32a are consistent with each other.

[0072] Next, variations of this embodiment will be described.

[0073] Figure 11A and Figure 11B and Figure 12A and Figure 12B This is a cross-sectional view schematically illustrating the manufacturing method of the magnetic storage device of this variation. Figure 11A and Figure 12A It is a cross-sectional view along the Y direction. Figure 11B and Figure 12B It is a cross-sectional view along the X direction.

[0074] First, proceed with the implementation method described above. Figure 4A and Figures 4B to 6A and Figure 6B The steps shown are the same as those steps.

[0075] Next, as Figure 11A and Figure 11BAs shown, the pattern of the hard mask layer 31d is used as a mask, and the reference layer 31b, tunnel barrier layer 31c, storage layer 31a, layer for upper electrode 32b, and selector material layer 32c are etched using IBE. In the above embodiment... Figure 7A and Figure 7B In the previous step, the etching of the selector material layer 32c was stopped midway, but in this variation, the selector material layer 32c is etched until the end.

[0076] Next, as Figure 12A and Figure 12B As shown, an interlayer insulating film and a second wiring 20 are formed, thereby obtaining a structure in which the memory cell 30 is surrounded by the interlayer insulating film 40.

[0077] In this variation, since the sidewall insulating layer 33 is not formed, there is a concern that the magnetoresistive element 31 may be damaged by etching. However, even in this variation, it is still consistent with the above-described embodiment. Figure 5A and Figure 5B The steps are the same, with the pattern of the first wiring 10 and the pattern of the lower electrode 32a of the selector pre-formed. Therefore, similar to the above embodiment, in Figure 11A and Figure 11B In this step, there is no need to etch the lower electrode 32a of the selector 32.

[0078] Therefore, even in this variation, etching damage to the magnetoresistive element 31 can be suppressed. As a result, the characteristic deterioration of the magnetoresistive element 31 caused by etching damage can be suppressed, thereby obtaining a magnetic storage device with a reliable magnetoresistive element.

[0079] (Implementation Method 2)

[0080] Next, the second embodiment will be described. Furthermore, the basic details are the same as in the first embodiment, and the descriptions of details already described in the first embodiment will be omitted.

[0081] Figure 13A This is a schematic cross-sectional view (a cross-sectional view along the Y direction) showing the configuration of the non-volatile magnetic storage device according to the second embodiment. Figure 13B This is a cross-sectional view (a cross-sectional view along the X direction) schematically showing the configuration of the non-volatile magnetic storage device of the second embodiment.

[0082] like Figure 13A and Figure 13BAs shown, even in this embodiment, similar to the first embodiment, the lower electrodes 32a of the selectors 32 included in the memory cells 30 adjacent to each other in the X direction are continuously disposed on the first wiring 10, which connects the memory cells 30 adjacent to each other in the X direction. Furthermore, in this embodiment, the selector material layer 32c included in the memory cells 30 adjacent to each other in the X direction is continuously disposed above the first wiring 10, which connects the memory cells 30 adjacent to each other in the X direction. Specifically, viewed from the Z direction, the patterns of the lower electrodes 32a and the selector material layer 32c continuously disposed on the first wiring 10 are consistent with the pattern of the first wiring 10.

[0083] Next, refer to Figure 14A and Figures 14B to 17A and Figure 17B The manufacturing method of the magnetic storage device according to this embodiment will be described. Figures 14A to 17A It is a cross-sectional view along the Y direction. Figures 17B-17B It is a cross-sectional view along the X direction.

[0084] First, such as Figure 14A and Figure 14B As shown, a layer for a first wiring 10 is formed on a substrate region 100 including a semiconductor substrate 101, and a layer for a lower electrode 32a of a selector, a selector material layer 32c, and a layer for an upper electrode 32b of a selector are formed on the layer for the first wiring 10.

[0085] Next, as Figure 15A and Figure 15B As shown, a mask pattern (not shown) extending in the X direction is used as a mask, and the layers for the first wiring 10, the lower electrode 32a, the selector material layer 32c, and the upper electrode 32b are patterned into lines using a RIE. Then, the mask pattern is removed.

[0086] Thus, since a common mask pattern is used to pattern the layers for the first wiring 10, the lower electrode 32a, the selector material layer 32c, and the upper electrode 32b, the patterns of the first wiring 10, the lower electrode 32a, the selector material layer 32c, and the upper electrode 32b of the selector are matched. That is, when viewed from the Z direction, the patterns of the first wiring 10, the lower electrode 32a, the selector material layer 32c, and the upper electrode 32b of the selector are identical.

[0087] Next, as Figure 16A and Figure 16BAs shown, an interlayer insulating film 40a is formed across the entire surface, and then planarized using CMP. Subsequently, a storage layer 31a for magnetoresistive elements, a tunnel barrier layer 31c, and a reference layer 31b are formed on the planarized structure. Furthermore, a pattern of a hard mask layer 31d is formed on the reference layer 31b.

[0088] Next, as Figure 17A and Figure 17B As shown, the pattern of the hard mask layer 31d is used as a mask, and the reference layer 31b, tunnel barrier layer 31c, storage layer 31a, layer for upper electrode 32b, and selector material layer 32c are etched using IBE. At this time, a portion of the selector material layer 32c remains unetched between adjacent patterns in the X direction. Furthermore, the lower electrode 32a of the selector has been patterned. Therefore, the amount of etching required for the selector layer can be reduced. This suppresses etching damage to the magnetoresistive element 31 during the etching of the selector layer.

[0089] Subsequently, an interlayer insulating film and a second wiring 20 are formed, thereby as follows Figure 13A and Figure 13B As shown, a structure is obtained in which the memory cell 30 is surrounded by an interlayer insulating film 40.

[0090] As described above, according to this embodiment, in Figure 15A and Figure 15B In this step, a common mask pattern is used to pattern the layer for the first wiring 10, the layer for the lower electrode 32a, the selector material layer 32c, and the layer for the upper electrode 32b, thereby obtaining the pattern of the first wiring 10, the pattern of the lower electrode 32a of the selector, the pattern of the selector material layer 32c, and the pattern of the upper electrode 32b of the selector. If, after forming the pattern of the first wiring 10, the layers for the selector 32 and the layers for the magnetoresistive effect element 31 are formed, then in... Figure 17A and Figure 17B In this step, the layer used for the lower electrode 32a of the selector 32 needs to be etched. Therefore, there is a concern that... Figure 17A and Figure 17B As the etching amount of the layer used in the selector increases, the magnetoresistive element 31 suffers greater etching damage, thereby deteriorating the characteristics of the magnetoresistive element 31.

[0091] In this embodiment, Figure 15A and Figure 15B The first wiring 10 and the lower electrode 32a of the selector are formed in the following steps. Therefore, the number of steps can be reduced. Figure 17A and Figure 17BThe amount of etching in the magnetoresistive element 31 is reduced, thereby suppressing etching damage. As a result, in this embodiment, the characteristics of the magnetoresistive element 31 caused by etching damage can be prevented, thereby obtaining a magnetic storage device having a magnetoresistive element with appropriate characteristics.

[0092] in addition, Figure 13A and Figures 13B to 17A and Figure 17B The design is configured to prevent alignment misalignment, but in actual manufacturing processes, alignment misalignment generally occurs. In this embodiment, when alignment misalignment occurs, such as... Figure 18 As shown, viewed from the Z direction, the pattern of the magnetoresistive element 31 is offset in the Y direction relative to the pattern of the first wiring 10 and the patterns of the lower electrode 32a, the selector material layer 32c, and the upper electrode 32b of the selector 32. However, in this embodiment, even if an alignment offset occurs, the pattern of the first wiring 10 will match the patterns of the lower electrode 32a and the selector material layer 32c of the selector 32, and viewed from the Z direction, the pattern of the first wiring 10 will be consistent with the patterns of the lower electrode 32a and the selector material layer 32c of the selector 32.

[0093] Next, refer to Figure 19 The cross-sectional view shown (a cross-sectional view along the X direction) illustrates the first variation of this embodiment.

[0094] In the above embodiments, such as Figure 13B As shown, a selector material layer 32c is continuously disposed in the region between adjacent memory cells 30 in the X direction. However, in this variation, the selector material layer 32c is separated in the region between adjacent memory cells 30 in the X direction. Figure 17A and Figure 17B The etching process continues until the selector material layer 32c separates, thereby obtaining... Figure 18 The structure shown.

[0095] Because the selector material layer 32c has a certain degree of insulation, even if the selector material layer 32c is continuously disposed between adjacent memory cells 30, there will basically be no major problems. However, there is a concern that some mutual interference may occur between the selectors 32 of adjacent memory cells 30. In this variation, with the above configuration, mutual interference between the selectors 32 of adjacent memory cells 30 can be effectively suppressed.

[0096] Next, refer to Figure 20 The cross-sectional view shown (a cross-sectional view along the X direction) illustrates the second variation of this embodiment.

[0097] In this variation, the selector material layer 32c is formed of a material containing an insulator, which is formed of silicon oxide containing a Group 15 element (e.g., at least one element selected from arsenic (As), antimony (Sb), and phosphorus (P)) introduced by ion implantation. In the portion 32cx between adjacent memory cells 30 in the X direction, the selector material layer 32c further contains a Group 13 element (e.g., at least one element selected from boron (B) and gallium (Ga)). That is, in the portion 32cx between adjacent memory cells 30 in the X direction, the selector material layer 32c is formed of silicon oxide containing both Group 15 and Group 13 elements.

[0098] exist Figure 17A and Figure 17B Following this step, group 13 element ions are implanted into the selector material layer 32c for portions between adjacent memory cells 30, thereby obtaining... Figure 19 The structure shown.

[0099] In the region where Group 13 elements are introduced, the effect of Group 15 elements is canceled out by Group 13 elements, thus improving the insulation of the selector material layer 32c. Therefore, in this variation, with the above configuration, mutual interference between selectors 32 of adjacent memory cells 30 can be effectively suppressed.

[0100] Next, a third variation of this embodiment will be described.

[0101] Figure 21A and Figures 21B to 28A and Figure 28B This is a cross-sectional view schematically illustrating the manufacturing method of the magnetic storage device in the third variation example. Figures 21A to 28A It is a cross-sectional view along the Y direction. Figures 21B to 28B It is a cross-sectional view along the X direction.

[0102] First, such as Figure 21A and Figure 21B As shown, a layer for the first wiring 10 and a layer for the selector (a layer for the lower electrode 32a, a selector material layer 32c, and a layer for the upper electrode 32b) are formed on a substrate region 100 including a semiconductor substrate 101.

[0103] Next, as Figure 22A and Figure 22B As shown, a mask pattern 35 extending in the X direction is used as a mask, and the layers for the selector (the layer for the lower electrode 32a, the selector material layer 32c, and the layer for the upper electrode 32b) are patterned into lines by a RIE.

[0104] Next, as Figure 23A and Figure 23BAs shown, a silicon nitride layer is formed over the entire surface as a sidewall insulating layer 36. Subsequently, a portion of the sidewall insulating layer 36 is removed by RIE, leaving only the sidewall insulating layer 36 on the sidewall of the pattern used for the selector.

[0105] Next, as Figure 24A and Figure 24B As shown, it will be through Figure 23A and Figure 23B The pattern obtained by the steps is used as a mask, and the pattern of the first wiring 10 is formed by etching the layer used for the first wiring 10 through RIE.

[0106] Next, as Figure 25A and Figure 25B As shown, an interlayer insulating layer 40a is formed on the entire surface, followed by planarization, thereby removing the mask pattern 35.

[0107] Next, as Figure 26A and Figure 26B As shown, in Figure 25A and Figure 25B On the planarized structure obtained in the next step, a storage layer 31a, a tunnel barrier layer 31c, and a reference layer 31b for a magnetoresistive element are formed. Then, a pattern of a hard mask layer 31d is formed on the reference layer 31b.

[0108] Next, as Figure 27A and Figure 27B As shown, the pattern of the hard mask layer 31d is used as a mask, and the reference layer 31b, tunnel barrier layer 31c, storage layer 31a, layer for upper electrode 32b, and selector material layer 32c are etched using IBE. At this time, in the region between adjacent patterns in the X direction, a portion of the selector material layer 32c remains unetched. Furthermore, the lower electrode 32a of the selector has been patterned. Therefore, the amount of etching required for the selector layer can be reduced. This suppresses etching damage to the magnetoresistive element 31 during the etching of the selector layer.

[0109] Subsequently, an interlayer insulating film and a second wiring 20 are formed, thereby as follows Figure 28A and Figure 28B As shown, a structure is formed in which the memory cell 30 is surrounded by an interlayer insulating film 40.

[0110] Even in this variation, the etching damage to the magnetoresistive element 31 can be suppressed, just as in the above-described embodiment, thereby preventing the deterioration of the characteristics of the magnetoresistive element 31 caused by etching damage.

[0111] (Implementation Method 3)

[0112] Next, the third embodiment will be described. Furthermore, the basic details are the same as in the first and second embodiments, and the descriptions of details already described in the first and second embodiments will be omitted.

[0113] Figure 29A This is a schematic cross-sectional view (a cross-sectional view along the Y direction) showing the configuration of the non-volatile magnetic storage device according to the third embodiment. Figure 29B This is a schematic cross-sectional view (a cross-sectional view along the X direction) showing the configuration of the non-volatile magnetic storage device according to the third embodiment.

[0114] The magnetic storage device of this embodiment has a structure in which multiple storage cells are arranged in the Z direction. Figure 29A and Figure 29B The example shown illustrates a structure with two layers of storage cells. The basic configuration of the first and second layers is the same as that shown in the first or second embodiment.

[0115] In this embodiment, in addition to the multiple first wirings 10 extending in the X direction and the multiple second wirings 20 extending in the Y direction, multiple third wirings 50 extending in the X direction are also provided. Multiple storage cells 60 are disposed between the multiple second wirings 20 and the multiple third wirings 50. The storage cells 60 are surrounded by an interlayer insulating film 70.

[0116] The storage unit 60 includes a magnetoresistive element 61 and a selector (switching element) 62 connected in series. One end of the magnetoresistive element 61 is connected to the third wiring 50, and the other end of the magnetoresistive element 61 is connected to the selector 62. One end of the selector 62 is connected to the second wiring 20, and the other end of the selector 62 is connected to the magnetoresistive element 61.

[0117] The basic structure of the magnetoresistive effect element 61 is the same as that of the magnetoresistive effect element 31 shown in the first and second embodiments, including a storage layer 61a, a reference layer 61b, and a tunnel barrier layer 61c disposed between the storage layer 61a and the reference layer 61b. A hard mask layer 61d is disposed on the reference layer 61b. A displacement cancellation layer may also be disposed on the magnetoresistive effect element 61 to eliminate the magnetic field applied from the reference layer 61b to the storage layer 61a.

[0118] The basic configuration of selector 62 is the same as that of selector 32 shown in the first and second embodiments, including: a lower electrode 62a disposed on the side of the second wiring 20; an upper electrode 62b disposed on the side of the magnetoresistive effect element 61; and a selector material layer (switch material layer) 62c disposed between the lower electrode 62a and the upper electrode 62b.

[0119] like Figure 29A and Figure 29BAs shown, the lower electrodes 62a of the selectors 62 contained in the memory cells 60 that are adjacent to each other in the Y direction are continuously disposed on the second wiring 20, which connects the memory cells 60 that are adjacent to each other in the Y direction. Specifically, when viewed from the Z direction, the pattern of the lower electrodes 62a continuously disposed on the second wiring 20 is consistent with the pattern of the second wiring 20.

[0120] Next, refer to Figure 30A and Figures 30B to 33A and Figure 33B and Figure 29A and Figure 29B The manufacturing method of the magnetic storage device according to this embodiment will be described.

[0121] First, such as Figure 30A and Figure 30B As shown, the procedure is the same as that shown in the second embodiment. Figure 14A and Figures 14B to 17A and Figure 17B The same steps as those used to form the same steps. Figure 17A and Figure 17B The structure shown is the same. Subsequently, after forming the interlayer insulating film 40, a layer for the second wiring 20 is formed on the entire surface, and a layer for the lower electrode 62a of the selector, a selector material layer 62c, and a layer for the upper electrode 62b of the selector are formed on the layer for the second wiring 20.

[0122] Next, as Figure 31A and Figure 31B As shown, a mask pattern (not shown) extending in the Y direction is used as a mask, and the layers for the second wiring 20, the lower electrode 62a, the selector material layer 62c, and the upper electrode 62b are patterned into lines using a RIE. Then, the mask pattern is removed.

[0123] Thus, since a common mask pattern is used to pattern the layers for the second wiring 20, the lower electrode 62a, the selector material layer 62c, and the upper electrode 62b, the patterns of the second wiring 20, the lower electrode 62a, the selector material layer 62c, and the upper electrode 62b of the selector are matched. That is, when viewed from the Z direction, the patterns of the second wiring 20, the lower electrode 62a, the selector material layer 62c, and the upper electrode 62b of the selector are identical.

[0124] Next, as Figure 32A and Figure 32BAs shown, an interlayer insulating film 70a is formed across the entire surface, and then planarized using CMP. Subsequently, a storage layer 61a for magnetoresistive elements, a tunnel barrier layer 61c, and a reference layer 61b are formed on the planarized structure. Furthermore, a pattern of a hard mask layer 61d is formed on the reference layer 61b.

[0125] Next, as Figure 33A and Figure 33B As shown, the pattern of the hard mask layer 61d is used as a mask, and the reference layer 61b, tunnel barrier layer 61c, storage layer 61a, layer for upper electrode 62b, and selector material layer 62c are etched using IBE. At this time, a portion of the selector material layer 62c remains unetched between adjacent patterns in the Y direction. Furthermore, the lower electrode 62a of the selector has been patterned. Therefore, the amount of etching required for the selector layer can be reduced. This suppresses etching damage to the magnetoresistive element 31 during the etching of the selector layer.

[0126] Subsequently, an interlayer insulating film and a third wiring 50 are formed, thereby... Figure 29A and Figure 29B As shown, a structure is obtained in which the memory cell 60 is surrounded by an interlayer insulating film 70.

[0127] As described above, even in this embodiment, the etching damage to the magnetoresistive element 31 can be suppressed in the same way as in the first and second embodiments. As a result, even in this embodiment, the deterioration of the characteristics of the magnetoresistive element 31 caused by etching damage can be prevented, thereby obtaining a magnetic storage device having a magnetoresistive element with appropriate characteristics.

[0128] in addition, Figure 29A and Figure 29B and Figure 30A and Figures 30B to 33A and Figure 33B In the design, the system is set to not produce alignment offsets, but in actual manufacturing processes, alignment offsets generally occur.

[0129] In this embodiment, when an alignment offset occurs, such as Figure 34A As shown, viewed from the Z direction, the pattern of the magnetoresistive element 31 is offset in the Y direction relative to the pattern of the first wiring 10 and the patterns of the lower electrode 32a, the selector material layer 32c, and the upper electrode 32b of the selector 32. However, in this embodiment, even if an alignment offset occurs, the pattern of the first wiring 10 will match the patterns of the lower electrode 32a and the selector material layer 32c of the selector 32, and viewed from the Z direction, the pattern of the first wiring 10 will be consistent with the patterns of the lower electrode 32a and the selector material layer 32c of the selector 32.

[0130] Furthermore, in this embodiment, in the case of alignment offset, such as Figure 34B As shown, viewed from the Z direction, the pattern of the magnetoresistive element 61 is offset in the X direction relative to the pattern of the second wiring 20 and the patterns of the lower electrode 62a, selector material layer 62c, and upper electrode 62b of the selector 62. However, in this embodiment, even if an alignment offset occurs, the pattern of the second wiring 20 will match the patterns of the lower electrode 62a and selector material layer 62c of the selector 62, and viewed from the Z direction, the pattern of the second wiring 20 will be consistent with the patterns of the lower electrode 62a and selector material layer 62c of the selector 62.

[0131] Furthermore, the above embodiments describe a structure with two layers of storage cells, but a structure with three or more layers of storage cells can also be formed using the same method.

[0132] Furthermore, a magnetic storage device having a structure in which multiple storage cells are arranged in the Z direction can be formed by using the structures described in the first and second embodiments or by combining the structures described in the first and second embodiments.

[0133] Several embodiments of the present invention have been described, but these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other ways and can be omitted, substituted, or modified in various ways without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, and are included in the invention as described in the claims and its equivalents.

[0134] [Explanation of Symbols]

[0135] 10: First wiring

[0136] 20: Second wiring

[0137] 30: Storage unit (first storage unit)

[0138] 31: Magnetoresistive effect element (first magnetoresistive effect element)

[0139] 31a: Storage layer

[0140] 31b: Reference Layer

[0141] 31c: Tunnel barrier layer

[0142] 31d: Hard mask layer

[0143] 32: Selector (First Switching Element)

[0144] 32a: Lower electrode (first lower electrode)

[0145] 32b: Upper electrode (first upper electrode)

[0146] 32c: Selector material layer (first switch material layer)

[0147] 33: Sidewall insulation layer

[0148] 35: Mask pattern

[0149] 36: Sidewall insulation layer

[0150] 40: Interlayer insulating film

[0151] 50: Third wiring

[0152] 60: Storage unit (second storage unit)

[0153] 61: Magnetoresistive effect element (second magnetoresistive effect element)

[0154] 61a: Storage layer

[0155] 61b: Reference Layer

[0156] 61c: Tunnel barrier layer

[0157] 61d: Hard mask layer

[0158] 62: Selector (Second Switching Element)

[0159] 62a: Lower electrode (second lower electrode)

[0160] 62b: Upper electrode (second upper electrode)

[0161] 62c: Selector material layer (second switch material layer)

[0162] 70: Interlayer insulating film

[0163] 100: Basal region

[0164] 101: Semiconductor substrate.

Claims

1. A magnetic storage device comprising: Multiple first-order wirings extend in the first direction respectively; Multiple second wirings extend in a second direction that intersects the first direction; A plurality of first storage cells are disposed between the plurality of first wirings and the plurality of second wirings, each comprising a first switching element and a first magnetoresistive effect element connected in series. The first switching element is connected to the corresponding first wiring, and the first magnetoresistive effect element is connected to the corresponding second wiring. The first switching element includes: a first lower electrode disposed on the first wiring side; a first upper electrode disposed on the first magnetoresistive effect element side; and a first switching material layer disposed between the first lower electrode and the first upper electrode; The first lower electrodes contained in the first memory cells that are adjacent to each other in the first direction are continuously disposed on the first wiring, and the first wiring connects the first memory cells that are adjacent to each other in the first direction. The first switching material layer contained in the first memory cells that are adjacent to each other in the first direction is continuously disposed above the first wiring that connects the first memory cells that are adjacent to each other in the first direction, and is formed of silicon oxide containing group 15 elements, and further contains group 13 elements in the portion between the first memory cells that are adjacent to each other in the first direction.

2. The magnetic storage device according to claim 1, wherein... Viewed from a third direction intersecting the first and second directions, the pattern of the first lower electrode is consistent with the pattern of the first wiring, the first wiring connects the first memory cells that are adjacent to each other in the first direction, and the first lower electrode is continuously disposed on the first wiring that connects the first memory cells that are adjacent to each other in the first direction.

3. The magnetic storage device according to claim 1, wherein... Viewed from a third direction intersecting the first and second directions, the pattern of the first switch material layer is consistent with the pattern of the first wiring, the first wiring connects the first memory cells that are adjacent to each other in the first direction, and the first switch material layer is continuously disposed above the first wiring that connects the first memory cells that are adjacent to each other in the first direction.

4. The magnetic storage device according to claim 1, wherein... Viewed from a third direction intersecting the first and second directions, the pattern of the first magnetoresistive element contained in any of the first memory cells is offset in the second direction relative to the pattern of the first switching material layer of the first switching element contained in any of the first memory cells.

5. The magnetic storage device according to claim 1, wherein... Viewed from a third direction intersecting the first and second directions, the pattern of the first magnetoresistive element contained in any of the first storage cells is offset in the second direction relative to the pattern of the first upper electrode of the first switching element contained in any of the first storage cells.

6. The magnetic storage device according to claim 1, wherein... The first storage cell further includes a sidewall insulating layer disposed on the sidewall of the first switching element.

7. The magnetic storage device according to claim 1, wherein... The first switching element is in a high-resistance state when the voltage applied between the two terminals is below a threshold, and in a low-resistance state when the voltage applied between the two terminals is above the threshold.

8. The magnetic storage device according to claim 1, further comprising: Multiple third wirings extend in the first direction, respectively; and Multiple second memory cells are disposed between the multiple second wirings and the multiple third wirings, each comprising a second switching element and a second magnetoresistive effect element connected in series. The second switching element is connected to the corresponding second wiring, and the second magnetoresistive effect element is connected to the corresponding third wiring. The second switching element includes: a second lower electrode disposed on the second wiring side; a second upper electrode disposed on the second magnetoresistive effect element side; and a second switching material layer disposed between the second lower electrode and the second upper electrode; The second lower electrodes contained in the second memory cells that are adjacent to each other in the second direction are continuously disposed on the second wiring, and the second wiring connects the second memory cells that are adjacent to each other in the second direction.

9. The magnetic storage device according to claim 8, wherein Viewed from a third direction intersecting the first and second directions, the pattern of the second lower electrode is consistent with the pattern of the second wiring, the second wiring connects the second memory cells that are adjacent to each other in the second direction, and the second lower electrode is continuously disposed on the second wiring that connects the second memory cells that are adjacent to each other in the second direction.

10. A method for manufacturing a magnetic storage device, comprising: The first wiring is formed above the substrate; A first switching element is formed above the first wiring, the first switching element comprising: a first lower electrode, a first switching material layer above the first lower electrode, and a first upper electrode above the first switching material layer; A first mask layer is formed above the first switching element, the first mask layer having a pattern extending in a first direction; The first wiring and the first switching element are etched using the first mask layer; After the first etching, the first mask layer is removed; A first magnetoresistive element is formed above the first switching element; A second mask layer is formed above the first magnetoresistive element; The first switching material layer, the first upper electrode, and the first magnetoresistive effect element are etched using the second mask layer in the second etching process. Through the second etching, a plurality of first memory cells are formed, each of the plurality of first memory cells comprising the first switching element and the first magnetoresistive effect element connected in series, and the first switching element is connected to the corresponding first wiring. Group 13 element ions are implanted into the portion of the first switching material layer between the first memory cells that are adjacent to each other in the first direction; and A second wiring is formed above the second mask layer. A second wiring is formed above the second mask layer.

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