Power switching control circuit, integrated circuit powered by multiple power supplies, and electronic equipment

Abstract

The present application relates to a power switching control circuit, an integrated circuit and an electronic device powered by multiple power supplies, and belongs to the field of electronic circuit technology. The power switching control circuit includes a switching circuit and a control signal generating circuit; the switching circuit is used to selectively connect the first power supply or the second power supply as an input power supply according to the control signal, and output an internal power supply, wherein the control signal is a first control signal or a second control signal; the control signal generating circuit is used to receive a detection signal characterizing the power-on status of the first power supply, and output the first control signal and the second control signal according to the detection signal, wherein the first control signal, the second control signal and the internal power supply are control signals of the same power domain, and only one of the first control signal and the second control signal is valid at the same time. It can support power-on in any order, and no leakage path will be generated between multiple power supplies.

Description

Technical Field

[0001] The present application belongs to the technical field of electronic circuits, and specifically relates to a power switching control circuit, an integrated circuit powered by multiple power supplies, and an electronic device. Background Art

[0002] With the development of integrated circuits, the application of SOC (System on Chip) chips such as CPU (Central Processing Unit) and MCU (MicroController Unit) is becoming more and more widespread. These chips often have multiple power supplies. In order to meet various application scenarios, the power-on sequence between the power supplies cannot be fixed, and it is necessary to support the power-on of each power supply at will, which requires the design of a reliable power switching control circuit. If the power switching control circuit of the multi-power supply power-on system is unstable, it is easy to form a leakage path between the powered power supply and the unpowered power supply, thereby raising the voltage of the unpowered power supply, and ultimately causing the chip system to misjudge and cause abnormal operation.

[0003] Figure 1 This is a commonly used power switching control circuit. In the figure, transistor MP3 and transistor MP4 are power switch tubes, VDD18 and VDD33 are two different system power supply voltages, LV18 is the internal power supply voltage of the chip, and PWROK is a detection signal for detecting that the VDD18 power supply voltage is powered on. When VDD18 is powered on, PWROK=1, and when VDD18 is not powered on, PWROK=0.

[0004] The power switching control circuit seems to support any power-on sequence in theory, but in fact it only supports VDD18 to be powered on first, and then VDD33 to be powered on. If VDD33 is powered on first and VDD18 is powered on later, a leakage path will be formed between the powered power supply and the unpowered power supply, thereby pulling up the voltage of the unpowered power supply, and finally causing the chip system to misjudge and cause abnormal operation. Furthermore, when only VDD33 is powered on, PWROK=0, transistor MN0 is turned off, transistor MP4 is turned on, LV18=local18, at this time, since the real state of VDD18 is floating (suspended) state, during the power-on process of VDD33, the floating voltage of VDD18 may cause transistor MP2 to be turned off, and the pg_ct voltage is also in the floating state at this time, which may turn on transistor MP3, thereby causing the voltage at VDD18 to rise, and finally maintain a stable state. If the system detects that the voltage at VDD18 is high enough, it will output PWROK=1, which will cause system misoperation. Summary of the invention

[0005] In view of this, the purpose of the present application is to provide a power switching control circuit, an integrated circuit and an electronic device powered by multiple power supplies, so as to improve the problem that in the existing power switching control circuit, under a specific power-on sequence, there is a leakage path between multiple power supplies, which may cause the voltage of the unpowered power supply to increase, and ultimately lead to misjudgment of the chip system and cause abnormal operation.

[0006] The embodiment of the present application is implemented as follows:

[0007] In the first aspect, the embodiment of the present application provides a power switching control circuit, including: a switching circuit, a control signal generating circuit; the switching circuit is used to connect a first power supply and a second power supply, the switching circuit is used to selectively connect the first power supply or the second power supply as an input power supply according to a control signal, and output an internal power supply, wherein the control signal is a first control signal or a second control signal; the control signal generating circuit is connected to the switching circuit, the control signal generating circuit is used to receive a detection signal characterizing the power-on status of the first power supply, and output the first control signal and the second control signal according to the detection signal, wherein the first control signal, the second control signal and the internal power supply are control signals of the same power domain, and at the same time, only one of the first control signal and the second control signal is valid. In the embodiment of the present application, since the first control signal and the second control signal are control signals of the same power domain and are both controlled by the detection signal, only one of the first control signal and the second control signal is valid at the same time, eliminating the influence of the VDD18 floating state on the control signal, so that the conduction path between the powered-on power supply and the unpowered power supply can be avoided, thereby supporting power-on in any order.

[0008] In combination with a possible implementation of the embodiment of the first aspect, the control signal generating circuit includes: a level conversion circuit and an inverting circuit; the level conversion circuit is connected to the switching circuit, and the level conversion circuit is used to receive the detection signal in the same power domain as the first power supply, and convert the detection signal into the first control signal in the same power domain as the internal power supply and opposite to the detection signal; the inverting circuit is connected to the level conversion circuit and the switching circuit, and is used to invert the first control signal to obtain the second control signal. In the embodiment of the present application, a level conversion circuit is used to convert the detection signal into a first control signal in the same power domain as the internal power supply and opposite to the detection signal, and then the inverting circuit is used to invert the first control signal, so that two control signals in the same power domain can be obtained, and only one control signal is valid at the same time.

[0009] In combination with a possible implementation of the first aspect of the embodiment, the level conversion circuit includes a first transistor and a first impedance device; the control end of the first transistor is used to receive the detection signal, the first end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply through the first impedance device, the second end of the first transistor is grounded, the first end of the first transistor is also connected to the inverter circuit and the first control end of the switching circuit, and the first control end is used to receive the first control signal; or, the control end of the first transistor is used to receive the detection signal, the second end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply, the first end of the first transistor is grounded through the first impedance device, and the first end of the first transistor is also connected to the inverter circuit and the first control end of the switching circuit. In the embodiment of the present application, the level conversion circuit is formed by using common devices such as transistors and impedance devices, which can not only save costs while achieving the purpose of the invention, but more importantly, it can reduce the volume of the circuit.

[0010] In combination with a possible implementation of the embodiment of the first aspect, if the first transistor is an NMOS tube, the first end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply via the first impedance device, the second end of the first transistor is grounded, and the first end of the first transistor is also connected to the inverter circuit and the first control end of the switching circuit; if the first transistor is a PMOS tube, the second end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply, the first end of the first transistor is grounded via the first impedance device, and the first end of the first transistor is also connected to the inverter circuit and the first control end of the switching circuit. In the embodiment of the present application, when the first transistor is a MOS tube of different types, the same function can be achieved by changing the connection method in the circuit, thereby improving the flexibility and applicability of the solution.

[0011] In combination with a possible implementation of the embodiment of the first aspect, the inverter circuit includes: a PMOS tube and an NMOS tube; the control end of the PMOS tube is connected to the first end of the first transistor, and the second end of the PMOS tube is connected to the output end of the switching circuit for outputting the internal power supply; the control end of the NMOS tube is connected to the first end of the first transistor, the first end of the NMOS tube is connected to the first end of the PMOS tube, and the second end of the NMOS tube is grounded. In the embodiment of the present application, since the PMOS tube and the NMOS tube are very common devices, the use of an inverter circuit of this structure can not only solve the cost, but also reduce the circuit volume, which is conducive to circuit integration.

[0012] In combination with a possible implementation of the first aspect, the inverting circuit includes: a second transistor and a second impedance device, the control end of the second transistor is connected to the first end of the first transistor; if the first end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply via the first impedance device, then the first end of the second transistor is connected to the output end of the switching circuit for outputting the internal power supply via the second impedance device, and the second end of the second transistor is grounded; if the second end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply, then the second end of the second transistor is connected to the output end of the switching circuit for outputting the internal power supply, and the first end of the second transistor is grounded via the second impedance device. In the embodiment of the present application, the inverting circuit can also be formed by using transistors and impedance devices, which further enhances the applicability of the solution.

[0013] In combination with a possible implementation of the embodiment of the first aspect, the first impedance device and the second impedance device include at least one of a resistor device and a transistor. In the embodiment of the present application, the impedance device can be a resistor device or a transistor, which further enhances the applicability of the solution.

[0014] In the second aspect, an embodiment of the present application also provides an integrated circuit powered by multiple power supplies, including a chip circuit and a power switching control circuit provided in the above-mentioned first aspect embodiment and / or any possible implementation method combined with the first aspect embodiment, wherein the power switching control circuit is used to provide different internal power supplies for the chip circuit.

[0015] In combination with a possible implementation manner of the embodiment of the second aspect, the integrated circuit is a processor.

[0016] In a third aspect, an embodiment of the present application further provides an electronic device, comprising: a first power supply, a second power supply, and an integrated circuit provided as described in the above-mentioned second aspect embodiment and / or a possible implementation method in combination with the second aspect embodiment, wherein the integrated circuit is connected to the first power supply and the second power supply, respectively.

[0017] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or understood by implementing the embodiments of the present application. The purpose and other advantages of the present application can be realized and obtained by the structures specifically pointed out in the written description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings without creative work. As shown in the drawings, the above and other purposes, features and advantages of the present application will be clearer. The same reference numerals indicate the same parts in all the drawings. The drawings are not deliberately scaled to the actual size, and the focus is on showing the main purpose of the present application.

[0019] Figure 1 It is a schematic diagram of the principle of an existing power switching control circuit.

[0020] Figure 2 A schematic structural diagram of a power switching control circuit provided in an embodiment of the present application is shown.

[0021] Figure 3 A structural schematic diagram showing the connection between a switching circuit and a control signal generating circuit provided in an embodiment of the present application is shown.

[0022] Figure 4 A circuit schematic diagram of a power switching control circuit provided in an embodiment of the present application is shown.

[0023] Figure 5 A circuit schematic diagram of another power switching control circuit provided in an embodiment of the present application is shown.

[0024] Figure 6 A circuit schematic diagram of another power switching control circuit provided in an embodiment of the present application is shown.

[0025] Figure 7 A circuit schematic diagram of another power switching control circuit provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0027] It should be noted that similar numbers and letters represent similar items in the following drawings, so once an item is defined in one drawing, it is not necessary to further define and explain it in the subsequent drawings. At the same time, in the description of this application, relational terms such as "first", "second", etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the term "include", "comprise" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes other elements that are not clearly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements limited by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.

[0028] Furthermore, the term "and / or" in this application is merely a term used to describe the association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B may represent three situations: A exists alone, A and B exist at the same time, and B exists alone.

[0029] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "connected" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can also be an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0030] In view of the fact that the existing power switching control circuit does not support any power-on sequence, and in a specific power-on sequence (such as VDD33 powered on first and VDD18 powered on later), there is a leakage path between multiple power supplies, which may cause the voltage of the unpowered power supply to be pulled up, and ultimately cause the chip system to misjudge and cause abnormal operation. The embodiment of the present application provides a power switching control circuit that can support arbitrary power-on. The power switching control circuit does not generate leakage paths between multiple power supplies, so that the voltage of the unpowered power supply will not be pulled up, and the situation that the chip system misjudges and causes abnormal operation due to the voltage of the unpowered power supply being pulled up will not occur.

[0031] For ease of understanding, the following Figure 2The power switching control circuit shown in the figure is described. The power switching control circuit includes a switching circuit and a control signal generating circuit. The switching circuit is connected to the control signal generating circuit, and the control signal generating circuit is used to control the switching circuit to selectively access the first power supply (such as VDD18) or the second power supply (such as VDD33) as the input power supply, and output the internal power supply.

[0032] Among them, the switching circuit is used to connect a first power supply (such as VDD18) and a second power supply (such as VDD33), and the switching circuit is used to selectively connect the first power supply or the second power supply as an input power supply according to a control signal, and output an internal power supply, wherein the control signal is a first control signal or a second control signal.

[0033] Optionally, the switching circuit includes: a first switch tube (such as MP3), a second switch tube (such as MP4) and a voltage divider circuit. Among them, the first end of the first switch tube is used to connect to the first power supply (VDD18), the second end of the first switch tube is connected to the second end of the second switch tube, and the first end of the first switch tube is connected to the voltage divider circuit. The control end of the first switch tube and the control end of the second switch tube are both connected to the control signal generating circuit. One end of the voltage divider circuit is used to connect to the second power supply (VDD33), and the other end of the voltage divider circuit is grounded. The voltage divider circuit is used to divide the second power supply and output a divided voltage (such as local18). In one implementation mode, the circuit schematic diagram of the switching circuit is as follows Figure 3 shown. Figure 3 The transistor MP3 is the first switch tube, the transistor MP4 is the second switch tube, the voltage divider circuit includes a resistor R1 and a resistor R0, LV18 is the output end of the switching circuit, and the internal power supply outputted by the LV18 can be represented by LV18.

[0034] The control signal generating circuit is connected to the switching circuit, and is used to receive a detection signal (such as PWROK) indicating the power-on status of the first power supply, and output a first control signal and a second control signal according to the detection signal. The first control signal, the second control signal and the internal power supply are control signals of the same power domain, and only one of the first control signal and the second control signal is valid at the same time. Figure 3 The transistor MP3 and the transistor MP4 are both PMOS tubes, which are turned on at a low level. Therefore, at the same time, only one of the first control signal and the second control signal is at a low level. Since the first control signal and the second control signal in the present application are control signals of the same power domain and are both controlled by the detection signal, only one of the first control signal and the second control signal is valid at the same time, eliminating the influence of the VDD18 floating state on the control signal, so that the conduction path between the powered power supply and the unpowered power supply can be avoided.

[0035] In one embodiment, the control signal generating circuit includes a level conversion circuit and an inverting circuit. The level conversion circuit is connected to the switching circuit, and the level conversion circuit is used to receive a detection signal in the same power domain as the first power supply, and convert the detection signal into a first control signal in the same power domain as the internal power supply and opposite to the detection signal. The inverting circuit is connected to the level conversion circuit and the switching circuit, and is used to invert the first control signal to obtain a second control signal.

[0036] Optionally, the level conversion circuit includes a first transistor and a first impedance device. The control end of the first transistor is used to receive a detection signal, the first end of the first transistor is connected to the output end of the switching circuit for outputting an internal power supply via the first impedance device, the second end of the first transistor is grounded, the first end of the first transistor is also connected to the inverter circuit and the first control end of the switching circuit, and the first control end is used to receive a first control signal. Alternatively, the control end of the first transistor is used to receive a detection signal, the second end of the first transistor is connected to the output end of the switching circuit for outputting an internal power supply, the first end of the first transistor is grounded via the first impedance device, and the first end of the first transistor is also connected to the inverter circuit and the first control end of the switching circuit.

[0037] Wherein, if the first transistor is an NMOS tube, the first end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply via the first impedance device, the second end of the first transistor is grounded, and the first end of the first transistor is also connected to the inverter circuit and the first control end of the switching circuit. If the first transistor is a PMOS tube, the second end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply, the first end of the first transistor is grounded via the first impedance device, and the first end of the first transistor is also connected to the inverter circuit and the first control end of the switching circuit.

[0038] Among them, the first impedance device can be a resistor device or a transistor. The transistor can be an NMOS tube or a PMOS tube. When connected, the drain and gate of the MOS tube can be used as one of the connection ends, and the source can be used as the other connection end. The MOS tube connected in this way can be called a MOS tube connected in the form of a diode. For example, when the first transistor is an NMOS tube and the first impedance device is a PMOS tube, the drain and gate of the PMOS tube are connected to the first end of the first transistor, and the source is connected to the output end of the switching circuit for outputting the internal power supply. For another example, when the first transistor is an NMOS tube and the first impedance device is an NMOS tube, the drain and gate of the first impedance device (which is an NMOS tube) are connected to the output end of the switching circuit for outputting the internal power supply, and the source of the first impedance device is connected to the first end of the first transistor.

[0039] In addition, the drain of the MOS tube can be used as one of the connection terminals and the source as the other connection terminal. The gate of the MOS tube can be grounded or connected to a power source to make it in a normally-on state. The MOS tube connected in this way can be called a MOS tube connected in a switch form. When the first impedance device is a PMOS tube, the gate of the PMOS tube is grounded, and when the first impedance device is an NMOS tube, the gate of the NMOS tube is connected to a power source.

[0040] In an optional implementation, the inverter circuit includes: a PMOS tube and an NMOS tube. The control end of the PMOS tube is connected to the first end of the first transistor, and the second end of the PMOS tube is connected to the output end of the switching circuit for outputting the internal power supply. The control end of the NMOS tube is connected to the first end of the first transistor, the first end of the NMOS tube is connected to the first end of the PMOS tube, and the second end of the NMOS tube is grounded.

[0041] In another optional implementation, the inverting circuit includes: a second transistor and a second impedance device. The control end of the second transistor is connected to the first end of the first transistor. If the first end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply via the first impedance device, the first end of the second transistor is connected to the output end of the switching circuit for outputting the internal power supply via the second impedance device, and the second end of the second transistor is grounded; if the second end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply, the second end of the second transistor is connected to the output end of the switching circuit for outputting the internal power supply, and the first end of the second transistor is grounded via the second impedance device.

[0042] Among them, the second transistor can be an NMOS tube or a PMOS tube. When it is an NMOS tube, the first end of the second transistor is connected to the output end of the switching circuit for outputting the internal power supply through the second impedance device, and the second end of the second transistor is grounded; when it is a PMOS tube, the second end of the second transistor is connected to the output end of the switching circuit for outputting the internal power supply, and the first end of the second transistor is grounded through the second impedance device.

[0043] The second impedance device is similar to the first impedance device and can be a resistor device or a transistor. The transistor can be an NMOS tube or a PMOS tube. When connected, the drain and gate of the MOS tube are used as one of the connection ends, and the source is used as the other connection end. The MOS tube connected in this way can be called a MOS tube connected in the form of a diode. In addition, it can also be connected in the form of a switch. For the specific connection method, refer to the description of the first impedance device above.

[0044] In order to facilitate understanding of the structure of the control signal generating circuit, the following describes its principle in conjunction with some schematic diagrams. When the first transistor is an NMOS tube, the first impedance device is a resistor device, such as represented by R2, and the inverter circuit includes a PMOS tube and an NMOS tube, the circuit principle diagram of the power switching control circuit is as follows: Figure 4 As shown. Transistor MP3 and transistor MP4 are switch tubes of the switching circuit, and the control signal generating circuit includes transistor MN0, resistor R2, transistor MP1, and transistor MN1, wherein transistor MN0 and resistor R2 constitute a level conversion circuit, and transistor MP1 and transistor MN1 constitute an inverter circuit. The substrate (source end) of all PMOS tubes is connected to LV18. When only VDD33 is powered on, PWROK=0, the drain end of transistor MP4 and the parasitic forward diode of the substrate will raise LV18 to local18-Vth (threshold voltage, also called turn-on voltage), at which time the control signal generating circuit starts to work, pg_ct=LV18, transistor MN1 is turned on, pgb_ct=0, at which time transistor MP4 is turned on, LV18=local18, and transistor MP3 is completely turned off. When only VDD18 is powered on, PWROK=1, transistor MN0 is turned on, pg_ct=0, at this time, transistor MP3 and transistor MP1 are turned on, transistor MN1 is turned off, LV18=VDD18, pgb_ct=LV18, and transistor MP4 is completely turned off. In order to eliminate the influence of the floating state of VDD18 on the control signal, the first control signal (pg_ct) is no longer controlled by the floating state of VDD18, and the second control signal (pgb_ct) of transistor MP4 is in the LV18 power domain, so that no conduction path is formed between the powered power supply and the unpowered power supply.

[0045] and Figure 1 The transistor MP4 of the conventional power switching control circuit shown is controlled by the PWROK signal, while the transistor MP3 is controlled by the pg_ct signal, and the pg_ct signal is controlled by LV18, PWROK, and VDD18. When only VDD33 is powered on, VDD18 is in a floating state, PWROK=0, the transistor MN0 is turned off, the transistor MP4 is turned on, LV18=local18, during the power-on process of VDD33, the floating voltage of VDD18 may cause the transistor MP2 to be turned off, and the pg_ct voltage is also in a floating state. If the floating voltage is less than LV18-Vth, the transistor MP3 will be turned on, causing the voltage at VDD18 to rise, and finally maintain a stable state. If the system detects that the voltage at VDD18 is high enough, it will output PWROK=1, causing the system to malfunction.

[0046] When the first transistor is an NMOS tube, the first impedance device is a PMOS tube, such as represented by P, and the inverting circuit includes a second transistor (which is an NMOS) and a second impedance device (which is a resistor device, such as represented by R3), at this time, the circuit principle diagram of the power switching control circuit is as follows: Figure 5 shown. Figure 5 The transistor MP3 and the transistor MP4 are the switch tubes of the switching circuit. The control signal generating circuit includes the transistor MN0, the transistor P (connected in the form of a diode in the figure), the transistor MN1, and the resistor R3. Among them, the transistor MN0 and the transistor P constitute a level conversion circuit, and the transistor MN1 and the resistor R3 constitute an inverting circuit. The substrate (source end) of all PMOS tubes is connected to LV18. When only VDD33 is powered on, PWROK=0, the transistor MN0 is turned off, the parasitic forward diode of the drain end of the transistor MP4 and the substrate will raise the LV18 to local18-Vth, at which time the control signal generating circuit starts to work, pg_ct=LV18, the transistor MN1 is turned on, pgb_ct=0, at which time the transistor MP4 is turned on, LV18=local18, and the transistor MP3 is completely turned off. When only VDD18 is powered on, PWROK=1, transistor MN0 is turned on, pg_ct=0, at this time transistor MP3 is turned on, LV18=VDD18, transistor MN1 is turned off, pgb_ct=LV18, and transistor MP4 is completely turned off.

[0047] When the first transistor is a PMOS tube, the first impedance device is an NMOS tube, such as represented by N, and the inverting circuit includes a PMOS tube and an NMOS tube, at this time, the circuit principle diagram of the power switching control circuit is as follows: Figure 6 shown. Figure 6The transistors MP3 and MP4 in the circuit are switch transistors of the switching circuit. The control signal generating circuit includes transistors MP0, transistor N (connected in the form of switches in the figure), transistors MP1 and transistor MN1, wherein transistors MP0 and transistor N constitute a level conversion circuit, and transistors MN1 and transistor MP1 constitute an inverting circuit. The substrates (source terminals) of all PMOS tubes are connected to LV18. When only VDD33 is powered on, PWROK=0, the drain terminal of transistor MP4 and the parasitic forward diode of the substrate will raise LV18 to local18-Vth, at which time the control signal generating circuit starts to work, transistor MP0 is turned on, pg_ct=LV18, transistor MP1 is turned off, transistor MN1 is turned on, pgb_ct=0, at which time transistor MP4 is turned on, LV18=local18, and transistor MP3 is completely turned off. When only VDD18 is powered on, PWROK=1, transistor MP0 is turned off, pg_ct=0, at this time transistor MP3 is turned on, LV18=VDD18, transistor MP1 is turned on, transistor MN1 is turned off, pgb_ct=LV18, and transistor MP4 is completely turned off.

[0048] When the first transistor is a PMOS tube, the first impedance device is a resistor device, such as represented by R2, and the inverting circuit includes a second transistor (PMOS) and a second impedance device (a resistor device, such as represented by R3), at this time, the circuit principle diagram of the power switching control circuit is as follows: Figure 7 shown. Figure 7 The transistor MP3 and the transistor MP4 are the switch tubes of the switching circuit, and the control signal generating circuit includes the transistor MP0, the resistor R2, the transistor MP1, and the resistor R3, wherein the transistor MP0 and the resistor R2 constitute a level conversion circuit, and the transistor MP1 and the resistor R3 constitute an inverting circuit. The substrate (source end) of all PMOS tubes is connected to LV18. When only VDD33 is powered on, PWROK=0, the drain end of the transistor MP4 and the parasitic forward diode of the substrate will raise LV18 to local18-Vth, at which time the control signal generating circuit starts to work, the transistor MP0 is turned on, pg_ct=LV18, the transistor MP1 is turned off, pgb_ct=0, at which time the transistor MP4 is turned on, LV18=local18, and the transistor MP3 is completely turned off. When only VDD18 is powered on, PWROK=1, transistor MP0 is turned off, pg_ct=0, at this time transistor MP3 is turned on, LV18=VDD18, transistor MP1 is turned on, pgb_ct=LV18, and transistor MP4 is completely turned off.

[0049] In another embodiment, the control signal generating circuit may not adopt the above-mentioned structure including the level conversion circuit and the inverter circuit, but the control signal generating circuit includes a processor. In this case, the processor is used to receive a detection signal representing the power-on status of the first power supply, and output a first control signal and a second control signal according to the detection signal. Among them, the first control signal, the second control signal and the internal power supply are control signals of the same power domain, and only one of the first control signal and the second control signal is valid at the same time. For example, when the detection signal (PWROK=0) indicates that the first power supply is not powered on, a high-level first control signal and a low-level second control signal are output; when the detection signal (PWROK=1) indicates that the first power supply is powered on, a low-level first control signal and a high-level second control signal are output. Therefore, the implementation method of the control signal generating circuit including the level conversion circuit and the inverter circuit shown above cannot be understood as a limitation on the control signal generating circuit.

[0050] Based on the same inventive concept, the embodiment of the present application also provides an integrated circuit powered by multiple power sources, which includes a chip circuit and a power switching control circuit as described above, and the power switching control circuit is used to provide different internal power sources for the chip circuit to meet the power requirements of different application scenarios. Among them, the integrated circuit powered by multiple power sources can be a processor, for example, the processor can be an integrated circuit such as a CPU (Central Processing Unit), an MCU (Micro Controller Unit), etc.

[0051] The power switching control circuit provided in the integrated circuit embodiment of multi-power supply has the same implementation principle and technical effects as those in the aforementioned power switching control circuit embodiment. For the sake of brief description, for parts not mentioned in the integrated circuit embodiment of multi-power supply, reference can be made to the corresponding contents in the aforementioned power switching control circuit embodiment.

[0052] Based on the same inventive concept, an embodiment of the present application further provides an electronic device, which includes a first power supply, a second power supply, and the above-mentioned multi-power supply integrated circuit, the multi-power supply integrated circuit is connected to the first power supply and the second power supply respectively, for example, the switching circuit in the power switching control circuit in the multi-power supply integrated circuit is connected to the first power supply and the second power supply. The electronic device can be a device with multi-power supply requirements, for example, it can be a mobile phone, a tablet, a computer, a server and other devices.

[0053] The power switching control circuit provided in the electronic device embodiment has the same implementation principle and technical effects as those in the aforementioned power switching control circuit embodiment. For the sake of brief description, for matters not mentioned in the electronic device embodiment, reference may be made to the corresponding contents in the aforementioned power switching control circuit embodiment.

[0054] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0055] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A power switching control circuit, characterized in that: include: A switching circuit, used to connect a first power supply and a second power supply, the switching circuit is used to selectively connect the first power supply or the second power supply as an input power supply according to a control signal, and output an internal power supply, wherein the control signal is a first control signal or a second control signal; A control signal generating circuit is connected to the switching circuit, and the control signal generating circuit is used to receive a detection signal characterizing the power-on status of the first power supply and the internal power supply, and output the first control signal and the second control signal according to the detection signal and the internal power supply, wherein the first control signal, the second control signal and the internal power supply are control signals of the same power domain, and only one of the first control signal and the second control signal is valid at the same time; the level of the first control signal is opposite to the level of the detection signal, and the level of the second control signal is opposite to the level of the first control signal.

2. The power switching control circuit according to claim 1, characterized in that: The control signal generating circuit comprises: a level conversion circuit connected to the switching circuit, the level conversion circuit being used to receive the detection signal in the same power domain as the first power supply, and convert the detection signal into the first control signal in the same power domain as the internal power supply and opposite to the detection signal; An inverting circuit is connected to the level conversion circuit and the switching circuit, and is used for inverting the first control signal to obtain the second control signal.

3. The power switching control circuit according to claim 2, characterized in that: The level conversion circuit includes a first transistor and a first impedance device, wherein the control end of the first transistor is used to receive the detection signal, the first end of the first transistor is also connected to the inverter circuit and the first control end of the switching circuit, and the first control end is used to receive the first control signal. The first end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply via the first impedance device, and the second end of the first transistor is grounded; or, the second end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply, and the first end of the first transistor is grounded via the first impedance device.

4. The power switching control circuit according to claim 3, characterized in that: If the first transistor is an NMOS transistor, the first end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply through the first impedance device, and the second end of the first transistor is grounded; If the first transistor is a PMOS transistor, the second end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply, and the first end of the first transistor is grounded via the first impedance device.

5. The power switching control circuit according to claim 3, characterized in that: The inverting circuit comprises: A PMOS tube, wherein a control end of the PMOS tube is connected to a first end of the first transistor, and a second end of the PMOS tube is connected to an output end of the switching circuit for outputting the internal power supply; An NMOS tube, wherein the control end of the NMOS tube is connected to the first end of the first transistor, the first end of the NMOS tube is connected to the first end of the PMOS tube, and the second end of the NMOS tube is grounded.

6. The power switching control circuit according to claim 3, characterized in that: The inverting circuit comprises: a second transistor and a second impedance device, wherein the control terminal of the second transistor is connected to the first terminal of the first transistor; If the first end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply via the first impedance device, the first end of the second transistor is connected to the output end of the switching circuit for outputting the internal power supply via the second impedance device, and the second end of the second transistor is grounded; If the second end of the first transistor is connected to the output end of the switching circuit for outputting the internal power supply, the second end of the second transistor is connected to the output end of the switching circuit for outputting the internal power supply, and the first end of the second transistor is grounded via the second impedance device.

7. The power switching control circuit according to claim 6, characterized in that: The first impedance device and the second impedance device include at least one of a resistor device and a transistor.

8. An integrated circuit powered by multiple power sources, characterized in that: It comprises a chip circuit and a power switching control circuit as claimed in any one of claims 1 to 7, wherein the power switching control circuit is used to provide different internal power supplies for the chip circuit.

9. The integrated circuit according to claim 8, characterized in that The integrated circuit is a processor.

10. An electronic device, characterized in that: include: A first power supply, a second power supply and the integrated circuit as claimed in claim 8 or 9, wherein the integrated circuit is connected to the first power supply and the second power supply respectively.

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