Video full-screen display method, device, system, computer device and storage medium

Abstract

The present application relates to a video screen expansion display method, device, system, computer device, storage medium, and computer program product, which receives an ARINC818 signal; performs frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data; obtains a pixel clock signal corresponding to the image after screen expansion; and fills and restores the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal. During the whole process, the received ARINC818 signal is sequentially subjected to frame parsing, pixel stitching, and pixel filling and restoration based on the clock signal, so as to convert the ARINC818 signal into a high-resolution RGB video signal, and high-resolution screen expansion display for the ARINC818 signal can be achieved.

Description

Technical Field

[0001] The present application relates to the technical field of image display, and in particular, to a video screen expansion display method, device, system, computer device, storage medium, and computer program product. Background Art

[0002] ARINC818 (Avionics Digital Video Bus) is abbreviated as ADVB. ARINC 818 is a serial audio and video transmission protocol with a point-to-point topology and 8B / 10B encoding. It is mainly used to develop video interfaces and protocols for low-latency, high-bandwidth, and uncompressed digital video transmission. It is formulated based on the Fiber Channel (FC) protocol and the FC-AV protocol standard, and is a simplification of the FC-AV protocol in terms of content. Therefore, the FC protocol and the FC-AV protocol are the basis of the ARINC818 bus protocol, which is an internationally unified standard specifically designed for avionics video systems.

[0003] At the same time, in current avionics systems, a very large amount of information is transmitted in the form of images and videos, and this information is transmitted to pilots and ground crew through complex airborne systems. Some conventional video systems include: flight recorders, map systems, video overlay systems, head-up displays (HUDs), infrared sensors, radars, optical cameras, multi-functional displays, and video integrated processors, etc. Video systems are used in aircraft taxiing and takeoff assistance systems, target tracking, anti-collision systems, cargo loading, navigation, and more stringent mission processing.

[0004] Currently, most display devices need to transmit high-resolution, 24-bit RGB, and frame refresh rate 60Hz images to support the complete and clear text display of video images. In some specific display environments, even 1920x1080@60Hz and 4K video images are required. The video display system must also support multiple video type interfaces, and the pixel clock, frame rate, bandwidth, resolution, pixel format, and synchronization type of each video source are different under the VESA (Video Electronics Standards Association) resolution standard. Therefore, there is an urgent need for a solution for ARINC818 that can convert low-resolution videos into high-resolution video screen expansion display outputs. Summary of the Invention

[0005] Based on this, in view of the above technical problems, it is necessary to provide a video screen expansion display method, device, computer device, storage medium, and computer program product for ARINC818 that can convert low-resolution videos into high-resolution video screen expansion display outputs.

[0006] In a first aspect, the present application provides a method for video extended screen display. The method includes:

[0007] Receiving an ARINC818 signal;

[0008] Performing frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data;

[0009] Obtaining a pixel clock signal corresponding to the image after extended screen;

[0010] Filling and restoring the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal.

[0011] In one embodiment, the performing frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data includes:

[0012] Parsing the ARINC818 signal into a data frame structure to obtain the parsed data;

[0013] Performing pixel stitching on the parsed data to obtain RGB signal data.

[0014] In one embodiment, the performing pixel stitching on the parsed data to obtain RGB signal data includes:

[0015] Performing bit width conversion on the parsed data;

[0016] Performing pixel stitching on the data after bit width conversion to obtain RGB signal data.

[0017] In one embodiment, the above video extended screen display method further includes:

[0018] Caching the RGB signal data.

[0019] In one embodiment, the receiving an ARINC818 signal includes:

[0020] Receiving an initial ARINC818 signal;

[0021] Performing bit conversion on the initial ARINC818 signal to obtain an ARINC818 signal.

[0022] In one embodiment, the filling and restoring the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal includes:

[0023] Comparing the resolutions of the two display interfaces before and after extended screen to determine the pixel data that needs to be added;

[0024] Based on the pixel data to be added, determine whether video needs to be displayed at different positions on the display interface, and obtain the set nwBlank status parameter;

[0025] Based on the nwBlank status parameter and the pixel clock signal, fill and restore the RGB signal data into a high-resolution RGB video signal.

[0026] In a second aspect, the present application also provides a video screen expansion display device. The device includes a signal receiving module, an ADVB frame parsing module, a timing generation module, and an RGB video resolution reconfiguration module;

[0027] The signal receiving module receives an ARINC818 signal and sends the ARINC818 signal to the ADVB frame parsing module; the ADVB frame parsing module performs frame parsing and pixel splicing on the ARINC818 signal to obtain RGB signal data; the timing generation module obtains the pixel clock signal corresponding to the image after screen expansion; and sends the pixel clock signal to the RGB video resolution reconfiguration module; the RGB video resolution reconfiguration module fills and restores the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal.

[0028] In a third aspect, the present application also provides a video screen expansion display system. The system includes:

[0029] A receiving module, configured to receive an ARINC818 signal;

[0030] A splicing module, configured to perform frame parsing and pixel splicing on the ARINC818 signal to obtain RGB signal data;

[0031] A timing module, configured to obtain the pixel clock signal corresponding to the image after screen expansion;

[0032] A reconfiguration and restoration module, configured to fill and restore the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal.

[0033] In a fourth aspect, the present application also provides a computer device. The computer device includes a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0034] Receive an ARINC818 signal;

[0035] Perform frame parsing and pixel splicing on the ARINC818 signal to obtain RGB signal data;

[0036] Obtain the pixel clock signal corresponding to the image after screen expansion;

[0037] Fill and restore the RGB signal data into a high - resolution RGB video signal according to the pixel clock signal.

[0038] In a fifth aspect, the present application also provides a computer - readable storage medium. On the computer - readable storage medium, there is a computer program stored, and when the computer program is executed by a processor, the following steps are implemented:

[0039] Receive an ARINC818 signal;

[0040] Perform frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data;

[0041] Obtain the pixel clock signal corresponding to the image after screen expansion;

[0042] Fill and restore the RGB signal data into a high - resolution RGB video signal according to the pixel clock signal.

[0043] In a sixth aspect, the present application also provides a computer program product. The computer program product includes a computer program, and when the computer program is executed by a processor, the following steps are implemented:

[0044] Receive an ARINC818 signal;

[0045] Perform frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data;

[0046] Obtain the pixel clock signal corresponding to the image after screen expansion;

[0047] Fill and restore the RGB signal data into a high - resolution RGB video signal according to the pixel clock signal.

[0048] The above - mentioned video screen - expansion display method, device, system, computer device, storage medium and computer program product receive an ARINC818 signal; perform frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data; obtain the pixel clock signal corresponding to the image after screen expansion; fill and restore the RGB signal data into a high - resolution RGB video signal according to the pixel clock signal. In the whole process, the received ARINC818 signal is successively subjected to frame parsing, pixel stitching, and pixel filling and restoration based on the clock signal, so as to convert the ARINC818 signal into a high - resolution RGB video signal, and high - resolution screen - expansion display for the ARINC818 signal can be realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 It is a schematic flowchart of the video screen - expansion display method in an embodiment;

[0050] Figure 2 It is a schematic diagram of the ARINC818 hierarchical architecture;

[0051] Figure 3 It is a schematic flowchart of the video screen expansion display method in another embodiment;

[0052] Figure 4 It is a schematic diagram of the RGB splicing process;

[0053] Figure 5 It is a schematic diagram of the 8B / 10B encoding process;

[0054] Figure 6 It is a schematic diagram of the screen expansion display effect;

[0055] Figure 7 It is a schematic structural diagram of the video screen expansion display device in one embodiment;

[0056] Figure 8 It is a schematic structural diagram of the video screen expansion display device in one application example;

[0057] Figure 9 It is a schematic block diagram of the video screen expansion display system in one embodiment;

[0058] Figure 10 It is an internal structure diagram of a computer device in one embodiment. Specific implementation manners

[0059] In order to make the objectives, technical solutions and advantages of the present application clearer and more understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0060] In one embodiment, as Figure 1 shown, a video screen expansion display method is provided, including the following steps:

[0061] S200: Receive the ARINC818 signal.

[0062] The main advantages of ARINC818 are reflected in high bandwidth, high reliability, low latency, uncompressed video transmission, resistance to electromagnetic interference, reduction of the weight of transmission cables, high flexibility, and strong compatibility and scalability. It has become the unified standard for the new generation of avionics digital video buses and has been widely used in some commercial and military projects. Since the ARINC818 protocol is equivalent to a simplified version of the FC-AV protocol, the ARINC818 protocol architecture is basically the same as that of FC and consists of five standard layers: FC-0 Physical (physical link layer), FC-1 Code (encoding and decoding layer), FC-2 Protocol (protocol control layer), FC-3 Management (general service layer), and FC-4 Mapping (high-level protocol mapping layer). Its specific architecture is as shown in Figure 2 shown. Here, an external input ARINC818 signal can be received through a signal receiving module, specifically through an optical signal receiving module.

[0063] S400: Perform frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data.

[0064] Frame parsing refers to parsing the ARINC818 signal into a data frame structure. Pixel stitching refers to stitching RGB signals of a certain number of bits into RGB signals of other numbers of bits. Specifically, since the minimum transmission unit of the FC protocol is 32 bits, while the video signal RGB is 24 bits, here specifically 32-bit RGB signals are stitched into 24-bit RGB signals.

[0065] S600: Obtain the pixel clock signal corresponding to the image after screen expansion.

[0066] The image after screen expansion refers to the target image of this video screen expansion display, that is, the target of this screen expansion display. For example, we need to expand the ARINC818 signal of 1280x768@60Hz and output the video data of the shaded part as an RGB video signal of 1280x1024@60Hz. This 1280x1024 image is the image after screen expansion. Images with different resolutions correspond to different pixel clock signals. In order to finally output the RGB signal corresponding to the image after screen expansion, the pixel clock signal corresponding to the image after screen expansion is obtained here.

[0067] S800: Fill and restore the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal.

[0068] Since RGB data needs to be filled in the extended screen area during extended screen display, the RGB signal data is filled and restored into a high-resolution RGB video signal according to the pixel clock signal here. The high-resolution RGB video signal can be directly output to the display device for display, thus obtaining a high-resolution RGB image.

[0069] The above video extended screen display method receives an ARINC818 signal; performs frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data; obtains the pixel clock signal corresponding to the image after extension; and fills and restores the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal. During the whole process, the received ARINC818 signal is successively subjected to frame parsing, pixel stitching, and pixel filling and restoration based on the clock signal, so as to convert the ARINC818 signal into a high-resolution RGB video signal, and high-resolution extended screen display for the ARINC818 signal can be realized.

[0070] As Figure 3 shown, in one embodiment, S400 includes:

[0071] S420: Parse the ARINC818 signal into a data frame structure to obtain the parsed data;

[0072] S440: Perform pixel stitching on the parsed data to obtain RGB signal data.

[0073] The data frame consists of a start of frame (SOF), a frame header, a data field, a cyclic redundancy check (CRC), and an end of frame (EOF). The SOF and EOF act as delimiters. In addition to this function, the SOF is also a marker indicating whether a frame is the first frame of a frame sequence. In addition, the ARINC818 protocol has command sets of Class 1, Class 2, and Class 3. The corresponding frame delimiters for different command sets are different. (Frame Delimiters) include the start of frame (SOF) and end of frame (EOF) command sets. Among them, the idle character: parameter bIDLE = 32'hBC95B5B5; Class 1 command set: the start character of the first frame parameter SOF1i = 32'hBCB55757; the start character except the first frame parameter SOF1n = 32'hBCB53737; the end character of the last frame parameter EOF1t = 32'hBC957575; the end character except the last frame parameter EOF1n = 32'hBC95D5D5. Class 3 command set: the start character of the first frame parameter SOF3i = 32'hBCB55656; the start character except the first frame parameter SOF3n = 32'hBCB53636; the end character of the last frame parameter EOF3t = 32'hBC957575; the end character except the last frame parameter EOF3n = 32'hBC95D5D5. As described above, since the minimum transmission unit of the FC protocol is 32 bits, while the video signal RGB is 24 bits, specifically here, 32-bit RGB signals are concatenated into 24-bit RGB signals. It can be understood that for other signals or different application scenarios, the concatenation and conversion between RGB signals of different bit widths are achieved. The specific concatenation process is as Figure 4 shown.

[0074] In one embodiment, pixel concatenation is performed on the parsed data to obtain RGB signal data, including: performing bit width conversion on the parsed data; performing pixel concatenation on the data after bit width conversion to obtain RGB signal data.

[0075] In practical applications, the bit width conversion of the parsed data can be performed through the ADVB frame buffer module. After the bit width conversion, 32-bit RGB data is concatenated into 24-bit RGB data and then further processed. Further, after the bit width conversion and pixel concatenation, the RGB signal data can be cached.

[0076] In one embodiment, receiving an ARINC818 signal includes:

[0077] Receiving an initial ARINC818 signal; performing bit conversion on the initial ARINC818 signal to obtain an ARINC818 signal.

[0078] Specifically, the initial ARINC818 signal is also an ARINC818 signal. Performing bit conversion on the initial ARINC818 signal here can obtain an ARINC818 signal with a certain number of bits. For example, an ARINC818 signal with 10 bits can be obtained. Bit conversion refers to converting the first bit data into the second bit data. For example, converting 10-bit data into 8-bit data; or converting 8-bit data into 10-bit data. Specifically, bit conversion can be implemented through an ADVB conversion module. In practical applications, by configuring the high-speed serial transceiver IP core in the ADVB conversion module, 1 byte of 8 bits is converted into a 10-bit transmission character, and then the bit stream is serially transmitted. At the receiving end, if it is a data character, the 10-bit transmission character is converted into an 8-bit standard byte, supporting all 8-bit standard bytes from 0 to 255. If it is a reserved special character, it will not be converted and will directly undergo functional processing. The 8B / 10B encoding is used to ensure that there are enough transitions in the data for the clock recovery circuit. The encoder also provides a method to align the data to a word, and at the same time, the line can maintain good DC balance. The specific process of 8B / 10B encoding is as Figure 5 shown.

[0079] In one embodiment, filling and restoring RGB signal data into a high-resolution RGB video signal according to a pixel clock signal includes:

[0080] Comparing the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added; based on the pixel data that needs to be added and whether video needs to be displayed at different positions on the display interface, obtaining the set nwBlank status parameter; filling and restoring the RGB signal data into a high-resolution RGB video signal according to the nwBlank status parameter and the pixel clock signal.

[0081] By comparing and calculating the VESA standard parameters between the resolutions of the two display interfaces before and after screen expansion, the row pixel data and column pixel data to be added are determined. Specifically, different resolutions have different parameters in the VESA standard. According to the video display principle, for example, for a resolution of 1280x1024@60Hz, there are 1280 pixel points per row and a total of 1024 rows. For 1280x768@60Hz, there are 1280 pixel points per row and a total of 768 rows. Different resolutions have different numbers of pixel points per row and different total numbers of rows. Based on the difference values between the rows and columns, it is calculated whether the position needs to be displayed after screen expansion. If so, nwBlank is set to high level, and the area to be displayed will be filled with a black video image later. A parameter nwBlank is set. According to the row and column values, it is calculated whether the position needs to display video. If video needs to be displayed, it is at high level. Specifically, in terms of rows, three other parameters X, Y, and Z are set; X is the number of rows, that is, any position in a row, Y is half of the length of the added row, and Z is the length of the originally displayed row; when ((X >= Y) && (X <= (Y + Z))), nwBlank is set to high level, and when outputting video, a black video image is set to be output at high level. In terms of columns, the processing is the same as that of rows.

[0082] According to the VESA (Video Electronics Standards Association) timing standard, each resolution within a VESA standard has its standard pixel clock. For example, the pixel clock for 1280x768@60Hz is 79.500MHz, and the pixel clock for 1280x1024@60Hz is 108.000MHz. Inside the timing generation module, by configuring the clock multiplication (Clocking Wizard) IP core provided by Vivado, the pixel clock of 108.000MHz for the standard VESA resolution of 1280x1024@60Hz is output. The pixel clock is passed to the RGB video resolution reconfiguration module. According to the status of the parameter nwBlank, the RGB video data is restored to the VESA standard video data, and the video data is sent to an external video output chip for display. The specific effect of screen expansion is as Figure 6 shown.

[0083] It should be understood that although the steps in the flowcharts involved in the above embodiments are sequentially shown according to the indications of the arrows, these steps are not necessarily executed sequentially in the order indicated by the arrows. Unless there is a clear indication in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or steps or stages in other steps.

[0084] As Figure 7 shown, the present application also provides a video screen expansion display device. The device includes a signal receiving module 710, an ADVB frame parsing module 720, a timing generation module 730, and an RGB video resolution reconfiguration module 740;

[0085] The signal receiving module 710 receives an ARINC818 signal and sends the ARINC818 signal to the ADVB frame parsing module 720; the ADVB frame parsing module 720 performs frame parsing and pixel splicing on the ARINC818 signal to obtain RGB signal data; the timing generation module 730 obtains the pixel clock signal corresponding to the expanded screen image; and sends the pixel clock signal to the RGB video resolution reconfiguration module 740; the RGB video resolution reconfiguration module 740 fills and restores the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal.

[0086] The above video screen expansion display device receives an ARINC818 signal; performs frame parsing and pixel splicing on the ARINC818 signal to obtain RGB signal data; obtains the pixel clock signal corresponding to the expanded screen image; fills and restores the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal. In the whole process, the received ARINC818 signal is sequentially subjected to frame parsing, pixel splicing, and pixel filling and restoration based on the clock signal, so as to realize the conversion of the ARINC818 signal into a high-resolution RGB video signal, and high-resolution screen expansion display for the ARINC818 signal can be realized.

[0087] As Figure 8 shown, the above signal receiving module can specifically be a GTX optical signal receiving module. After the RGB video resolution reconfiguration module restores the high-resolution RGB video signal, it can be sent to the RGB video signal output module, and then sent to an external display chip by the RGB video signal output module.

[0088] To elaborate on the technical solution of the video screen expansion display device of the present application in detail, specific application examples will be used below and described in conjunction with Figure 8 the structural block diagram shown. As shown in Figure 8 , the GTX optical signal receiving module receives the ARINC 818 signal and sends the received ARINC 818 signal to the ADVB conversion module. This GTX interface implements functions such as serial encoding and decoding, 8B / 10B encoding, error control, and special words defined by the FC protocol. By configuring the high-speed serial transceiver IP core in the ADVB conversion module, 1 byte of 8 bits is converted into a 10-bit transmission character, and then the bit stream is serially transmitted. At the receiving end, if it is a data character, the 10-bit transmission character is converted into an 8-bit standard byte, supporting all 8-bit standard bytes from 0 to 255. If it is a reserved special character, it will not be converted and will directly undergo functional processing. The ADVB frame parsing module parses the received data into a data frame structure. The data parsed by the ADVB frame parsing module is sent to the RxFIFO IP core in the ADVB frame buffer module, and after the data cache bit width conversion by RxFIFO, it is forwarded to the DDR buffer module. Since the minimum transmission unit of the FC protocol is 32 bits, while the video signal RGB is 24 bits, it is necessary to splice 32 bits into 24-bit RGB data through the ADVB frame buffer module before further processing. The RGB video resolution reconfiguration unit receives the auxiliary information data and pixel data of the video obtained after parsing. The auxiliary information data can correctly identify the format of the received video and provide a basis for the restored display of the video. The judgment of the frame state provides a basis for the auxiliary data and video data on the one hand, and is conducive to the restoration of the video line synchronization signal and field synchronization signal on the other hand. According to the requirement of increasing the output resolution and the standard VESA timing parameters, the RGB video resolution reconfiguration unit expands the video resolution by filling RGB data during the video process based on the input resolution parameters. For example, the following figure shows the output of the RGB video signal of 1280x1024@60Hz by expanding the video data in the shaded part of the input ARINC818 signal of 1280x768@60Hz.

[0089] Based on the same inventive concept, the embodiment of the present application also provides a video screen expansion display system for implementing the above-mentioned video screen expansion display method. The solution provided by this device to solve the problem is similar to the solution described in the above method. Therefore, the specific limitations in one or more embodiments of the video screen expansion display device provided below can refer to the limitations on the video screen expansion display method in the above text and will not be elaborated here.

[0090] As shown in Figure 9 , the present application also provides a video screen expansion display system. The system includes:

[0091] The receiving module 200 is used to receive ARINC818 signals.

[0092] The splicing module 400 is used to perform frame parsing and pixel splicing on the ARINC818 signal to obtain RGB signal data.

[0093] The timing module 600 is used to obtain the pixel clock signal corresponding to the image after screen expansion.

[0094] The reconfiguration and recovery module 800 is used to fill and recover the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal.

[0095] The above video screen expansion display system receives ARINC818 signals; performs frame parsing and pixel splicing on the ARINC818 signals to obtain RGB signal data; obtains the pixel clock signal corresponding to the image after screen expansion; fills and recovers the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal. In the whole process, the received ARINC818 signals are sequentially subjected to frame parsing, pixel splicing, and pixel filling and recovery based on the clock signal, so as to convert the ARINC818 signals into high-resolution RGB video signals, and high-resolution screen expansion display for ARINC818 signals can be realized.

[0096] In one embodiment, the splicing module 400 is further used to parse the ARINC818 signal into a data frame structure to obtain the parsed data; perform pixel splicing on the parsed data to obtain RGB signal data.

[0097] In one embodiment, the splicing module 400 is further used to perform bit-width conversion on the parsed data; perform pixel splicing on the data after bit-width conversion to obtain RGB signal data.

[0098] In one embodiment, the splicing module 400 is further used to cache RGB signal data.

[0099] In one embodiment, the receiving module 200 is further used to receive the initial ARINC818 signal; perform bit conversion on the initial ARINC818 signal to obtain the ARINC818 signal.

[0100] In one embodiment, the reconfiguration and recovery module 800 is further used to compare the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added; according to the pixel data that needs to be added and whether video needs to be displayed at different positions on the display interface, obtain the set nwBlank status parameter; fill and recover the RGB signal data into a high-resolution RGB video signal according to the nwBlank status parameter and the pixel clock signal.

[0101] Each module in the above video extended screen display system can be implemented in whole or in part by software, hardware, or a combination thereof. Each of the above modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to each of the above modules.

[0102] In one embodiment, a computer device is provided. The computer device can be a terminal, and its internal structure diagram can be as Figure 10 shown. The computer device includes a processor, a memory, a communication interface, a display screen, and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a video extended screen display method.

[0103] Those skilled in the art can understand that Figure 10 the structure shown in

[0104] is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the computer device to which the solution of this application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0105] Receive an ARINC818 signal;

[0106] Perform frame parsing and pixel splicing on the ARINC818 signal to obtain RGB signal data;

[0107] Obtain the pixel clock signal corresponding to the image after extended screen;

[0108] Fill and restore the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal.

[0109] In one embodiment, when the processor executes the computer program, the following steps are also implemented:

[0110] Parse the ARINC818 signal into a data frame structure to obtain the parsed data; perform pixel stitching on the parsed data to obtain RGB signal data.

[0111] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0112] Perform bit-width conversion on the parsed data; perform pixel stitching on the data after bit-width conversion to obtain RGB signal data.

[0113] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0114] Cache the RGB signal data.

[0115] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0116] Receive the initial ARINC818 signal; perform bit conversion on the initial ARINC818 signal to obtain the ARINC818 signal.

[0117] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0118] Compare the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added; according to the pixel data that needs to be added, whether video needs to be displayed at different positions on the display interface, obtain the set nwBlank status parameter; according to the nwBlank status parameter and the pixel clock signal, fill and restore the RGB signal data into a high-resolution RGB video signal.

[0119] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0120] Receive the ARINC818 signal;

[0121] Perform frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data;

[0122] Obtain the pixel clock signal corresponding to the image after screen expansion;

[0123] Fill and restore the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal.

[0124] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0125] Parse the ARINC818 signal into a data frame structure to obtain the parsed data; perform pixel stitching on the parsed data to obtain RGB signal data.

[0126] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0127] Perform bit-width conversion on the parsed data; perform pixel stitching on the data after bit-width conversion to obtain RGB signal data.

[0128] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0129] Cache the RGB signal data.

[0130] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0131] Receive an initial ARINC818 signal; perform bit conversion on the initial ARINC818 signal to obtain an ARINC818 signal.

[0132] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0133] Compare the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added; based on the pixel data that needs to be added and whether video needs to be displayed at different positions on the display interface, obtain the set nwBlank status parameter; based on the nwBlank status parameter and the pixel clock signal, fill and restore the RGB signal data into a high-resolution RGB video signal.

[0134] In one embodiment, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the following steps are implemented:

[0135] Receive an ARINC818 signal;

[0136] Perform frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data;

[0137] Obtain the pixel clock signal corresponding to the image after screen expansion;

[0138] Fill and restore the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal.

[0139] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0140] Parse the ARINC818 signal into a data frame structure to obtain the parsed data; perform pixel stitching on the parsed data to obtain RGB signal data.

[0141] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0142] Perform bit-width conversion on the parsed data; perform pixel stitching on the data after bit-width conversion to obtain RGB signal data.

[0143] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0144] Cache the RGB signal data.

[0145] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0146] Receive the initial ARINC818 signal; perform bit conversion on the initial ARINC818 signal to obtain the ARINC818 signal.

[0147] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0148] Compare the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added; based on the pixel data that needs to be added, determine whether video needs to be displayed at different positions on the display interface to obtain the set nwBlank status parameter; based on the nwBlank status parameter and the pixel clock signal, fill and restore the RGB signal data into a high-resolution RGB video signal.

[0149] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data that have been authorized by the user or fully authorized by all parties.

[0150] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memories. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in the present application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in the present application can be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, data processing logics based on quantum computing, etc., without limitation.

[0151] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0152] The above embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A video screen expansion display method, characterized in that, the method includes: Receiving an ARINC818 signal; Performing frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data; Obtaining a pixel clock signal corresponding to the expanded screen image; Filling and restoring the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal; The filling and restoring the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal includes: comparing the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added; according to the pixel data that needs to be added, whether the video needs to be displayed at different positions on the display interface, obtaining the set nwBlank status parameter; according to the nwBlank status parameter and the pixel clock signal, filling and restoring the RGB signal data into a high-resolution RGB video signal; the comparing the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added includes: determining the row pixel data and column pixel data that need to be added by comparing and calculating the VESA standard parameters between the resolutions of the two display interfaces before and after screen expansion; The performing frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data includes: parsing the ARINC818 signal into a data frame structure to obtain the parsed data; performing bit width conversion on the parsed data; performing pixel stitching on the data after bit width conversion to obtain RGB signal data; the bit width conversion is to convert 32-bit RGB data into 24-bit RGB data.

2. The method according to claim 1, characterized in that, further includes: Caching the RGB signal data.

3. The method according to claim 1, characterized in that, the receiving the ARINC818 signal includes: Receiving an initial ARINC818 signal; Performing bit conversion on the initial ARINC818 signal to obtain an ARINC818 signal.

4. A video screen expansion display device, characterized in that, the device includes a signal receiving module, an ADVB frame parsing module, a timing generation module, and an RGB video resolution reconfiguration module; The signal receiving module receives an ARINC818 signal and sends the ARINC818 signal to the ADVB frame parsing module; the ADVB frame parsing module performs frame parsing and pixel stitching on the ARINC818 signal to obtain RGB signal data; the timing generation module obtains a pixel clock signal corresponding to the expanded screen image; and sends the pixel clock signal to the RGB video resolution reconfiguration module; the RGB video resolution reconfiguration module fills and restores the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal; The filling and restoring of the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal includes: comparing the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added; based on the pixel data that needs to be added and whether video needs to be displayed at different positions on the display interface, obtaining the set nwBlank status parameter; according to the nwBlank status parameter and the pixel clock signal, filling and restoring the RGB signal data into a high-resolution RGB video signal; the comparing the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added includes: determining the row pixel data and column pixel data that need to be added by comparing and calculating the VESA standard parameters between the resolutions of the two display interfaces before and after screen expansion. The frame parsing and pixel splicing of the ARINC818 signal to obtain RGB signal data includes: parsing the ARINC818 signal into a data frame structure to obtain the parsed data; performing bit-width conversion on the parsed data; performing pixel splicing on the data after bit-width conversion to obtain RGB signal data; the bit-width conversion is to convert 32-bit RGB data into 24-bit RGB data.

5. A video screen expansion display system Characterized in that The system includes: A receiving module, configured to receive an ARINC818 signal; A splicing module, configured to perform frame parsing and pixel splicing on the ARINC818 signal to obtain RGB signal data; A timing module, configured to obtain the pixel clock signal corresponding to the image after screen expansion; A reconfiguration and restoration module, configured to fill and restore the RGB signal data into a high-resolution RGB video signal according to the pixel clock signal; The reconfiguration and restoration module is further configured to compare the resolutions of the two display interfaces before and after screen expansion to determine the pixel data that needs to be added; based on the pixel data that needs to be added and whether video needs to be displayed at different positions on the display interface, obtaining the set nwBlank status parameter; according to the nwBlank status parameter and the pixel clock signal, filling and restoring the RGB signal data into a high-resolution RGB video signal; The splicing module is further configured to parse the ARINC818 signal into a data frame structure to obtain the parsed data; perform bit-width conversion on the parsed data; perform pixel splicing on the data after bit-width conversion to obtain RGB signal data; the bit-width conversion is to convert 32-bit RGB data into 24-bit RGB data.

6. The system according to claim 5 Characterized in that The splicing module is further configured to cache RGB signal data.

7. The system according to claim 5 Characterized in that The receiving module is further configured to receive an initial ARINC818 signal; perform bit conversion on the initial ARINC818 signal to obtain an ARINC818 signal.

8. The system according to claim 6 Characterized in that The receiving module is further configured to receive an initial ARINC818 signal; perform bit conversion on the initial ARINC818 signal to obtain an ARINC818 signal.

9. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that, when the processor executes the computer program, the steps of the method according to any one of claims 1 to 3 are implemented.

10. A computer-readable storage medium, having a computer program stored thereon, characterized in that, when the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 3 are implemented.

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