Display panel and display device

Abstract

The present disclosure discloses a display panel and a display device. The display panel includes: a substrate, the substrate having a display area and a border area surrounding the display area; the border area includes a first power supply voltage line and a first planarization layer sequentially stacked on one side of the substrate; the border area has a first dam area surrounding the display area and a second dam area surrounding the first dam area; the orthographic projection of the first power supply voltage line on the substrate is located within the first dam area; the first planarization layer is at least located within the first dam area and the second dam area, and the first planarization layer located within the first dam area at least covers the side surface of the first power supply voltage line; the first planarization layer has a first groove and a second groove, the first groove is located between the first dam area and the display area, and the second groove is located between the first dam area and the second dam area.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to a display panel and a display device. Background Art

[0002] Currently, a flexible display panel using an organic light-emitting diode (OLED) as a light-emitting device and controlled by thin-film transistors has become the mainstream direction in the current OLED industry.

[0003] In a display panel, after the display substrate is formed, a chemical vapor deposition process is used for encapsulation to protect the light-emitting device and ensure that the light-emitting device and other structures inside the display panel do not undergo an oxidation reaction with the outside. Once the encapsulation fails, for example, the encapsulation film layer breaks or gaps are generated, water and oxygen will enter the inside of the display panel along the gaps, and the gaps in the organic layer or inorganic layer will become water and oxygen channels. After water and oxygen invade the organic light-emitting material of the OLED, the organic light-emitting material is oxidized and fails to emit light. As water and oxygen continue to invade, the failure area gradually expands, resulting in poor display of the display panel and affecting the lifespan of the display panel. Summary of the Invention

[0004] Embodiments of the present disclosure provide a display panel and a display device, and the specific solutions are as follows:

[0005] A display panel provided by an embodiment of the present disclosure includes: a substrate, the substrate having a display area and a border area surrounding the display area; the border area includes a first power voltage line and a first planarization layer sequentially stacked on one side of the substrate;

[0006] The border area has a first dam area surrounding the display area and a second dam area surrounding the first dam area;

[0007] A positive projection of the first power voltage line on the substrate is located within the first dam area;

[0008] A positive projection of the first planarization layer on the substrate is at least partially located within the first dam area and the second dam area, and the first planarization layer located within the first dam area at least covers the side surface of the first power voltage line;

[0009] The first planarization layer has a first groove and a second groove, the first groove is located between the first dam area and the display area, and the second groove is located between the first dam area and the second dam area.

[0010] Optionally, in the display panel provided in the embodiments of the present disclosure, the side surface of the first groove away from the display area is opposite to the side surface of the first power supply voltage line close to the display area and the end surface of the first power supply voltage line in its extending direction.

[0011] Optionally, in the display panel provided in the embodiments of the present disclosure, the top end of the first power supply voltage line in its extending direction has a stepped structure, and the stepped surface of the stepped structure is located on the side of the first power supply voltage line facing the display area;

[0012] The first groove has the same profile as the adjacent side of the first power supply voltage line.

[0013] Optionally, in the display panel provided in the embodiments of the present disclosure, the ratio of the total width of the stepped structure in the first direction to the total height of the stepped structure in the second direction is greater than or equal to 5 and less than or equal to 10, where the first direction is the extending direction of the first power supply voltage line, and the second direction is perpendicular to the first direction.

[0014] Optionally, in the display panel provided in the embodiments of the present disclosure, the angle between the side of the first power supply voltage line close to the top end in its extending direction and facing the display area and the boundary of the adjacent display area is greater than 0 degree and less than or equal to 30 degrees;

[0015] The first groove has the same profile as the adjacent side of the first power supply voltage line.

[0016] Optionally, in the display panel provided in the embodiments of the present disclosure, the first planarization layer has a third groove;

[0017] The orthographic projection of the third groove on the substrate is located within the orthographic projection of the first power supply voltage line on the substrate.

[0018] Optionally, in the display panel provided in the embodiments of the present disclosure, the pattern of the third groove is similar to the pattern of the first power supply voltage line.

[0019] Optionally, in the display panel provided in the embodiments of the present disclosure, the border area further includes:

[0020] A second power supply voltage line that is electrically connected to the first power supply voltage line and is located between the substrate and the first power supply voltage line;

[0021] A second planarization layer located between the film layer where the second power supply voltage line is located and the film layer where the first power supply voltage line is located;

[0022] The orthographic projection of the second planarization layer on the substrate is located within the first dam area and the second dam area.

[0023] Optionally, in the display panel provided by the embodiments of the present disclosure, the border area further includes:

[0024] An anode overlapping layer located on a side of the first planarization layer away from the substrate;

[0025] A pixel defining layer located on a side of the anode overlapping layer away from the substrate;

[0026] The orthographic projection of the anode overlapping layer on the substrate at least partially overlaps with the orthographic projection of the first power supply voltage line on the substrate;

[0027] The anode overlapping layer is electrically connected to the first power supply voltage line through the third groove.

[0028] Optionally, in the display panel provided by the embodiments of the present disclosure, the orthographic projection of the pixel defining layer on the substrate at least covers the boundary of the anode overlapping layer.

[0029] Correspondingly, the embodiments of the present disclosure further provide a display device, which includes any one of the above display panels provided by the embodiments of the present disclosure. Description of the Drawings

[0030] Figure 1 It is a schematic diagram of a partial structure of a display panel in the related art;

[0031] Figure 2 It is a schematic diagram of a structure of a pixel circuit provided by an embodiment of the present disclosure;

[0032] Figure 3 It is a schematic diagram of a sectional structure of a display area in a display panel provided by an embodiment of the present disclosure;

[0033] Figure 4 It is a schematic diagram of a top view structure of a display panel provided by an embodiment of the present disclosure;

[0034] Figure 5 For Figure 4 A partial top view structure schematic diagram of the shown display panel;

[0035] Figure 6 For Figure 5 A sectional structure schematic diagram of the shown display panel along the AA' direction;

[0036] Figure 7 It is a schematic diagram of a top view structure of a display panel provided by an embodiment of the present disclosure;

[0037] Figure 8 For Figure 7 A partial top view structure schematic diagram of the shown display panel;

[0038] Figure 9 A partial top-down structural schematic diagram of another display panel provided by an embodiment of the present disclosure;

[0039] Figure 10 A partial top-down structural schematic diagram of yet another display panel provided by an embodiment of the present disclosure;

[0040] Figure 11 A cross-sectional structural schematic diagram of yet another display panel provided by an embodiment of the present disclosure. Detailed implementation manners

[0041] In specific implementation, the water and oxygen channels can all be avoided through design or process. However, in the border area of the display panel, as Figure 1 shown, a power supply voltage line vss electrically connected to the cathode layer ( Figure 1 not visible in Figure 1 is provided. The power supply voltage line vss is generally of a Ti-Al-Ti structure. Among them, Al is easily eroded by the anode etching solution in subsequent process steps, forming side pits; on the other hand, the anode etching solution is prone to react with Ag in the anode, causing Ag ions to exist in the anode etching solution. Therefore, after the Al in the power supply voltage line reacts with the anode etching solution, elemental Ag can be displaced. If Ag diffuses into the display area, it will cause local dark spots and result in poor display. Therefore, in order to avoid the risk of further etching of the power supply voltage line vss by subsequent processes, it is necessary to use the planarization layer pln to coat the edge of the power supply voltage line vss. Therefore, at the cut-off end of the power supply voltage line vss ( Figure 1 within the dashed box in

[0042] ), the planarization layer pln in the first dam area dam1 and the second dam area dam2 is connected to form an unavoidable water and oxygen passage. In Figure 1 V represents the groove in the planarization layer pln.

[0042] In view of this, an embodiment of the present disclosure provides a display panel and a display device to reduce the risk of water and oxygen intrusion into the display panel.

[0043] To make the above objects, features, and advantages of the present disclosure more obvious and understandable, the present disclosure will be further described below in conjunction with the drawings and embodiments. However, the exemplary embodiments can be implemented in various forms and should not be construed as limited to the embodiments described herein; on the contrary, these embodiments are provided to make the present disclosure more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings represent the same or similar structures, and thus their repeated description will be omitted. The words expressing positions and directions described in the present disclosure are all illustrative with reference to the drawings, but can be changed according to needs, and all changes made are included in the protection scope of the present disclosure. The drawings of the present disclosure are only used to illustrate the relative positional relationship and do not represent the actual proportion.

[0044] It should be noted that specific details are set forth in the following description to facilitate a full understanding of the present disclosure. However, the present disclosure can be implemented in many other ways different from those described herein, and those skilled in the art can make similar generalizations without departing from the spirit of the present disclosure. Therefore, the present disclosure is not limited by the specific embodiments disclosed below. The subsequent description of the specification is a preferred embodiment for implementing the present disclosure, but the description is for the purpose of explaining the general principles of the present disclosure and is not intended to limit the scope of the present disclosure. The protection scope of the present disclosure shall be determined by the scope defined by the appended claims.

[0045] The following will specifically describe the display panel and the display device provided by the embodiments of the present disclosure with reference to the accompanying drawings.

[0046] As Figure 4 shown, a display panel provided by an embodiment of the present disclosure includes: a substrate, and the substrate has a display area A1 and a border area A2 surrounding the display area A1.

[0047] In a specific implementation, a light-emitting pixel array is included in the display area, and the light-emitting pixel array mainly includes a pixel circuit located on the substrate and an organic light-emitting diode connected to the pixel circuit. The pixel circuit is mainly composed of multiple transistors and capacitors, for example Figure 2 the pixel circuit shown.

[0048] In some embodiments, as Figure 3 shown, the display area sequentially includes an active layer 11, a first gate insulating layer 12, a gate layer 13, a second gate insulating layer 14, a storage electrode layer 15, a dielectric layer 16, a source-drain electrode layer 17, a second planarization layer 18, a power supply trace layer 19, a first planarization layer 20, an anode layer 21, a pixel defining layer 22, a light-emitting layer 23, and a cathode layer 24 located on the substrate 10. Figure 4 Taking the transistor as a bottom-gate transistor as an example, the present disclosure does not limit the specific structure of the transistor, which can be a bottom-gate structure, a top-gate structure, or other structures.

[0049] In the display panel provided by the embodiment of the present disclosure, as Figure 4 shown, the border area A2 includes a first power supply voltage line VSS1 and a first planarization layer 20 sequentially stacked on one side of the substrate ( Figure 4 not visible in the figure); the border area A2 has a first dam area DAM1 surrounding the display area A1 and a second dam area DAM2 surrounding the first dam area DAM1.

[0050] In specific implementation, the first dike area and the second dike area play a protective role for the display panel. The first power supply voltage line is used for electrical connection with the cathode layer. The smaller the resistance of the first power supply voltage line, the better the effect. Therefore, making the first power supply voltage line into an annular structure surrounding the display area can minimize the resistance of the first power supply voltage line. However, in practical applications, considering the overall design of the panel, an opening needs to be set in the first power supply voltage line. For example, an opening is set on the side of the display panel where the chip is set, so that the first power supply voltage line has two cut-off ends. To avoid the risk of the first power supply voltage line being further etched by subsequent processes, the edge of the first power supply voltage line needs to be coated with the first planarization layer. To avoid the first planarization layer at the cut-off end of the first power supply voltage line communicating with the organic layer in the dike area to form a water and oxygen passage. In the display panel provided by the embodiment of the present disclosure, as Figures 4 to 6 shown:

[0051] The orthographic projection of the first power supply voltage line VSS1 on the substrate 10 is located within the first dike area DAM1;

[0052] The orthographic projection of the first planarization layer 20 on the substrate 10 is at least partially located within the first dike area DAM1 and the second dike area DAM2, and the first planarization layer 20 located within the first dike area DAM1 at least coats the side surface of the first power supply voltage line VSS1;

[0053] The first planarization layer 20 has a first groove V11 and a second groove V12. The first groove V11 is located between the first dike area DAM1 and the display area A1, and the second groove V12 is located between the first dike area DAM1 and the second dike area DAM2.

[0054] In the above display panel provided by the embodiment of the present disclosure, the first planarization layer has a first groove and a second groove. The first groove is located between the first dike area and the display area, thereby forming a water and oxygen barrier between the first dike area and the display area. The second groove is located between the first dike area and the second dike area, avoiding the formation of a water and oxygen passage between the first dike area and the second dike area. The orthographic projection of the first power supply voltage line on the substrate is located within the first dike area, so that the side surface of the first power supply voltage line can be coated with the first planarization layer located within the first dike area, avoiding the risk of the first power supply voltage line being further etched by subsequent processes. On the other hand, by setting the first power supply voltage line within the first dike area, since the first planarization layer has a second groove between the first dike area and the second dike area, it can be avoided that the first planarization layer at the top of the first power supply voltage line communicates with the first planarization layer within the second dike area, thereby improving the water and oxygen barrier ability of the display panel.

[0055] Optionally, in the display panel provided by the embodiment of the present disclosure, as Figure 7 and Figure 8As shown, the side of the first groove V11 away from the display area A1 is opposite to the side of the first power supply voltage line VSS1 close to the display area A1 and the end face of the first power supply voltage line VSS1 in its line extension direction. That is, a part of the first groove V11 is located between the two end faces of the first power supply voltage line VSS1 and extends from one end of the first power supply voltage line VSS1 to the other, thereby increasing the length of the water and oxygen barrier path between the two ends of the first power supply voltage line VSS1 and improving the water and oxygen barrier ability of the display panel.

[0056] Optionally, in the display panel provided by the embodiments of the present disclosure, as Figure 9 shown, the top end of the first power supply voltage line VSS1 in its extension direction has a stepped structure, and the stepped surface of the stepped structure is located on the side of the first power supply voltage line VSS1 facing the display area; the contour of the adjacent side of the first groove V11 and the first power supply voltage line VSS1 is the same. Thereby, the path of water vapor intrusion at the end face of the first power supply voltage line VSS1 is extended, and the risk of water vapor intrusion into the display area is reduced.

[0057] In specific implementation, the longer the width of the stepped surface of the stepped structure, the longer the path of water vapor intrusion. Optionally, in the display panel provided by the embodiments of the present disclosure, as Figure 9 shown, the ratio of the total width L of the stepped structure in the first direction to the total height H of the stepped structure in the second direction is greater than or equal to 5 and less than or equal to 10, where the first direction is the extension direction of the first power supply voltage line VSS1, and the second direction is perpendicular to the first direction.

[0058] Further, in the embodiments of the present disclosure, the ratio of the total width L of the stepped structure in the first direction to the total height H of the stepped structure in the second direction is greater than 7 and less than 9. For example, in Figure 9 , H1 = 205.6 nm, H2 = 239.4 nm, L = 3567 nm, and the ratio of the total width L of the stepped structure in the first direction to the total height H of the stepped structure in the second direction is equal to 3567 / 445, which is not limited herein.

[0059] Optionally, in the display panel provided by the embodiments of the present disclosure, as Figure 10 shown, the included angle θ between the side of the first power supply voltage line VSS1 close to the top end in its extension direction and facing the display area and the boundary of the adjacent display area is greater than 0 degrees and less than 90 degrees; the contour of the adjacent side of the first groove V11 and the first power supply voltage line VSS1 is the same. Thereby, the path of water and oxygen intrusion at the end face of the first power supply voltage line VSS1 is extended, and the risk of water and oxygen intrusion into the display area is reduced.

[0060] In specific implementation, in Figure 10Among them, the smaller the included angle θ is, the longer the path of water vapor intrusion is, but the more difficult the process is. Therefore, considering the water vapor barrier effect and the process difficulty together, the included angle θ is set between 5 degrees and 30 degrees. For example, θ = 22 degrees, which is not limited herein.

[0061] Optionally, in the display panel provided by the embodiments of the present disclosure, as Figures 4 to 10 shown, the first planarization layer has a third groove V13; the orthographic projection of the third groove V13 on the substrate is located within the orthographic projection of the first power supply voltage line VSS1 on the substrate. Setting the third groove V13 can, on the one hand, facilitate the subsequent electrical connection between the first power supply voltage line VSS1 and the cathode layer, and on the other hand, increase the water and oxygen barrier ability of the area corresponding to the first power supply voltage line VSS1.

[0062] Optionally, in the display panel provided by the embodiments of the present disclosure, as Figures 4 to 10 shown, the pattern of the third groove V13 is similar to the pattern of the first power supply voltage line VSS1. In this way, the area of the third groove V13 can be made as large as possible.

[0063] Optionally, in the display panel provided by the embodiments of the present disclosure, as Figures 4 to 10 shown, the first planarization layer has a fourth groove V14. The fourth groove V14 is arranged around the second dam area DAM2, and the fourth groove V14 is used to prevent water and oxygen from entering the second dam area DAM2 from the outside.

[0064] Optionally, in the display panel provided by the embodiments of the present disclosure, as Figure 11 shown, the border area further includes:

[0065] a second power supply voltage line VSS2 that is electrically connected to the first power supply voltage line VSS1 and is located between the substrate 10 and the first power supply voltage line VSS1;

[0066] a second planarization layer 18 located between the film layer where the second power supply voltage line VSS2 is located and the film layer where the first power supply voltage line VSS1 is located;

[0067] The orthographic projection of the second planarization layer 18 on the substrate 10 is located within the first dam area DAM1 and the second dam area MAM2.

[0068] The above display panel has a double-layer power supply voltage line structure, and the overall resistance of the power supply voltage line can be reduced by two layers of power supply voltage lines.

[0069] In the present disclosure, the orthographic projection of the second planarization layer 18 on the substrate 10 does not overlap with the orthographic projection of the second power supply voltage line VSS2 on the substrate 10, so that the first power supply voltage line VSS1 and the second power supply voltage line VSS2 are in direct contact to achieve electrical connection.

[0070] Optionally, in the display panel provided in the embodiment of the present disclosure, Figure 11 As shown, the second planarization layer 18 has a fifth groove V21, and the orthographic projections of the first groove V11 and the third groove V13 on the base substrate 10 are both located within the orthographic projection of the fifth groove V21 on the base substrate 10. This prevents the second planarization layer 18 from forming a water-oxygen passage at the area corresponding to the first groove V11 and the third groove V13.

[0071] Optionally, in the display panel provided in the embodiment of the present disclosure, Figure 11 As shown, the second planarization layer 18 further has a sixth groove V22 and a seventh groove V23, the orthographic projection of the sixth groove V22 on the base substrate 10 overlaps with the orthographic projection of the second groove V12 on the base substrate 10, and the orthographic projection of the seventh groove V23 on the base substrate 10 overlaps with the orthographic projection of the fourth groove V14 on the base substrate 10. The sixth groove V22 is used to form a water- and oxygen-blocking barrier between the first dam area DAM1 and the second dam area DAM2. The seventh groove V23 is used to prevent water and oxygen from entering the second dam area DAM2 from the outside.

[0072] Optionally, in the display panel provided by the present disclosure, the first power supply voltage line is arranged in the same layer as the power supply wiring layer in the display area, and the second power supply voltage line is arranged in the same layer as the source-drain electrode layer in the display area.

[0073] Optionally, in the display panel provided in the embodiment of the present disclosure, the frame area further includes:

[0074] An anode overlap layer is located on the side of the first planarization layer away from the substrate, and the anode overlap layer is arranged in the same layer as the anode layer; a pixel defining layer is located on the side of the anode overlap layer away from the substrate; the orthographic projection of the anode overlap layer on the substrate substrate at least partially overlaps with the orthographic projection of the first power supply voltage line on the substrate substrate; the anode overlap layer is electrically connected to the first power supply voltage line through a third groove. The above-mentioned display panel provided by the embodiment of the present disclosure utilizes the anode overlap layer to overlap the first power supply voltage line with the cathode layer, which can reduce resistance on the one hand, and avoid the increase in process difficulty due to too deep a via hole when the first power supply voltage line is directly electrically connected to the cathode layer on the other hand.

[0075] Optionally, in the display panel provided by the embodiment of the present disclosure, the orthographic projection of the pixel defining layer on the base substrate at least covers the boundary of the anode bonding layer, so as to prevent static electricity from damaging the backplane circuit through the anode bonding layer with high conductivity at the cutoff point of the anode bonding layer.

[0076] Optionally, the display panel provided in the embodiment of the present disclosure is a display panel. The display panel also includes a thin film encapsulation layer, which is composed of a laminated structure of an organic layer and an inorganic layer, which is not limited here.

[0077] In specific implementation, in the display panel provided by the embodiments of the present disclosure, the substrate can be formed of any suitable flexible insulating material. For example, the substrate can be formed of polymer materials such as polyimide (PI), polycarbonate (PC), polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyarylate (PAR), or fiberglass reinforced plastic (FRP).

[0078] Based on the same inventive concept, the embodiments of the present disclosure also provide a display device, including a driving chip and any one of the above-mentioned display panels provided by the embodiments of the present disclosure. The display device can be any flexible product or component with a display function, such as a mobile phone, a tablet computer, etc. For the implementation of the display device, reference can be made to the embodiments of the above-mentioned display panel, and the repeated parts will not be described again.

[0079] In the display panel and the display device provided by the embodiments of the present disclosure, the first planarization layer has a first groove and a second groove. The first groove is located between the first dam area and the display area, so as to form a water and oxygen barrier between the first dam area and the display area. The second groove is located between the first dam area and the second dam area, avoiding the formation of a water and oxygen passage between the first dam area and the second dam area. The positive projection of the first power supply voltage line on the substrate is located in the first dam area, so that the side surface of the first power supply voltage line can be covered by the first planarization layer located in the first dam area, avoiding the risk of further etching of the first power supply voltage line by subsequent processes. On the other hand, by arranging the first power supply voltage line in the first dam area, since the first planarization layer has a second groove between the first dam area and the second dam area, it can be avoided that the first planarization layer at the top of the first power supply voltage line is connected to the first planarization layer in the second dam area, thereby improving the water and oxygen barrier ability of the display panel.

[0080] Obviously, those skilled in the art can make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalent technologies, the present disclosure also intends to include these changes and modifications.

Claims

1. A display panel, wherein, comprising: a substrate substrate having a display area and a border area surrounding the display area; the border area includes a first power supply voltage line and a first planarization layer sequentially stacked on one side of the substrate substrate; the border area has a first dike area surrounding the display area and a second dike area surrounding the first dike area; the positive projection of the first power supply voltage line on the substrate substrate is located within the first dike area; at least a part of the positive projection of the first planarization layer on the substrate substrate is located within the first dike area and the second dike area, and the first planarization layer located within the first dike area at least covers the side surface of the first power supply voltage line; the first planarization layer has a first groove and a second groove, the first groove is located between the first dike area and the display area, and the second groove is located between the first dike area and the second dike area; wherein, the side surface of the first groove away from the display area is opposite to the side surface of the first power supply voltage line close to the display area and the end surface of the first power supply voltage line in its extending direction; wherein, the included angle between the side edge of the first power supply voltage line close to the top along its extending direction and facing the display area side and the boundary of the adjacent display area is greater than 0 degree and less than or equal to 30 degrees; the contour of the first groove is the same as that of the adjacent side of the first power supply voltage line.

2. The display panel according to claim 1, wherein, the first planarization layer has a third groove; the positive projection of the third groove on the substrate substrate is located within the positive projection of the first power supply voltage line on the substrate substrate.

3. The display panel according to claim 1, wherein, the border area further includes: a second power supply voltage line electrically connected to the first power supply voltage line and located between the substrate substrate and the first power supply voltage line; a second planarization layer located between the film layer where the second power supply voltage line is located and the film layer where the first power supply voltage line is located; the positive projection of the second planarization layer on the substrate substrate is located within the first dike area and the second dike area.

4. The display panel according to claim 2, wherein, the border area further includes: an anode connection layer located on the side of the first planarization layer away from the substrate substrate; a pixel defining layer located on the side of the anode connection layer away from the substrate substrate; the positive projection of the anode connection layer on the substrate substrate at least partially overlaps with the positive projection of the first power supply voltage line on the substrate substrate; the anode connection layer is electrically connected to the first power supply voltage line through the third groove.

5. The display panel according to claim 4, wherein, the positive projection of the pixel defining layer on the substrate substrate at least covers the side surface of the anode connection layer.

6. A display device, wherein, comprising a driving chip and the display panel according to any one of claims 1-5.

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