Compiler performance optimization method, device and storage medium

Abstract

The present invention provides a compiler performance optimization method, device, and storage medium. These methods determine a test data range based on target machine attributes, then derive test parameters based on the test data range. Performance testing of the compiler under test is then performed based on the test parameters to derive a target performance optimization strategy. Finally, after verifying the target performance optimization strategy, the compiler under test is configured to apply the target performance optimization strategy. By optimizing the compiler based on the relevant attributes of the target machine, the compiler's compilation performance is further improved to adapt to target machines of various architectures and meet the compilation requirements of target machines of various architectures.

Description

Technical Field

[0001] The present invention relates to the technical field of software testing, and in particular to a compiler performance optimization method, device and storage medium. Background Art

[0002] A compiler is a program that translates one language (usually a high-level language) into another (usually a low-level language). It analyzes the source code written in a high-level programming language and converts it into an intermediate code. The intermediate code is then converted into target code that can be understood by the target machine. Compilers are also responsible for optimizing the target code to maximize its performance.

[0003] Currently, a large number of compiler optimization technologies have emerged to improve compiler performance. Most of these compiler optimization technologies are target-independent optimizations. The inventors have discovered that the existing technologies have at least the following problems:

[0004] Since the functional modules of the compiler backend are closely related to the target machine, with the continuous development of computer architecture, existing compilers need to be continuously improved to adapt to target machines of various architectures, and it is difficult to meet the compilation requirements of target machines of various architectures. Summary of the Invention

[0005] The present invention provides a compiler performance optimization method, device and storage medium, which are used to solve the problem that the performance of existing compilers needs to be continuously improved to adapt to target machines of various architectures.

[0006] In a first aspect, the present invention provides a compiler performance optimization method, comprising:

[0007] Determining a test data range based on target machine attributes, wherein the target machine attributes are related to a back-end functional module of the compiler to be tested;

[0008] Determine test parameters based on the test data range;

[0009] Perform performance testing on the compiler under test based on the test parameters and derive the target performance optimization strategy;

[0010] After the target performance optimization strategy is verified, configure the compiler to be tested to apply the target performance optimization strategy.

[0011] Furthermore, the target machine attribute includes any one of the following: storage space size of a storage device of the target machine, and structural characteristics of a storage device of the target machine.

[0012] Furthermore, the test parameters include at least one set of test parameters, and the test parameters are derived based on the test data range, including:

[0013] If n is equal to 1, when i=1, within the test data range, obtain the i-th n Test parameters; when i is greater than 1, according to the (i-1) n Test parameters and preset interval d n , get the i-th n Test parameters to obtain the nth set of test parameters; wherein the preset interval d n For the i n Test parameters and (i-1) n Difference of test parameters;

[0014] If n is greater than 1, according to the n-1th group of test parameters and the preset interval d n , obtain the nth group of test parameters;

[0015] Among them, the preset interval d n The preset interval d n-1 wherein n is used to represent the group number of the test parameter, i represents the number of each test parameter in each group of test parameters, and i, n, and d are all integers greater than 0.

[0016] Furthermore, after the test parameters are obtained according to the test data range, the following is also included:

[0017] Performing a performance test on the compiler to be tested using the nth set of test parameters to obtain an nth set of test results, wherein the nth set of test results includes a plurality of test results;

[0018] Perform data fitting on the nth group of test results;

[0019] Compare the nth group of test results after data fitting to obtain the target test results of the nth group, and derive the nth group of optimization strategies based on the target test results of the nth group.

[0020] Furthermore, according to the n-1th group of test parameters and the preset interval d n , get the nth group of test parameters, including:

[0021] Get the interval in the n-1th group of optimization strategies;

[0022] According to the interval and the preset interval d n , get the nth group of test parameters.

[0023] Furthermore, when the preset interval d n When it is not a positive integer, the n-1th group of optimization strategies is output as the target performance optimization strategy.

[0024] Furthermore, after the target performance optimization strategy is verified, the compiler to be tested is configured to apply the target performance optimization strategy, including:

[0025] Use pre-set performance testing tools to verify target performance optimization strategies;

[0026] After verification, configure the compiler to be tested to apply the target performance optimization strategy.

[0027] In a second aspect, the present invention provides a compiler performance optimization device, comprising:

[0028] An acquisition module is used to determine the test data range based on target machine attributes, wherein the target machine attributes are related to the back-end functional modules of the compiler to be tested;

[0029] A processing module, used for deriving test parameters according to the test data range;

[0030] The test module is used to perform performance testing on the compiler under test according to the test parameters and derive the target performance optimization strategy;

[0031] The configuration module is used to configure the compiler to be tested to apply the target performance optimization strategy after the target performance optimization strategy is verified.

[0032] Furthermore, the target machine attribute includes any one of the following: storage space size of the target machine storage device, and structural characteristics of the target machine storage device.

[0033] Furthermore, the test parameters include at least one set of test parameters, and the processing module is specifically configured to: if n is equal to 1, when i=1, obtain the i-th test parameter within the test data range. n Test parameters; when i is greater than 1, according to the (i-1) n Test parameters and preset interval d n , get the i-th n Test parameters to obtain the nth set of test parameters; wherein the preset interval d n For the i n Test parameters and (i-1) n Difference of test parameters;

[0034] If n is greater than 1, according to the n-1th group of test parameters and the preset interval d n , obtain the nth group of test parameters;

[0035] Among them, the preset interval d n The preset interval d n-1 wherein n is used to represent the group number of the test parameter, i represents the number of each test parameter in each group of test parameters, and i, n, and d are all integers greater than 0.

[0036] Furthermore, the test module is specifically configured to: perform a performance test on the compiler to be tested using the nth set of test parameters to obtain an nth set of test results, wherein the nth set of test results includes a plurality of test results;

[0037] Perform data fitting on the nth group of test results;

[0038] Compare the nth group of test results after data fitting to obtain the target test results of the nth group, and derive the nth group of optimization strategies based on the target test results of the nth group.

[0039] Furthermore, the processing module is specifically used to obtain the interval in the n-1th group of optimization strategies;

[0040] According to the interval and the preset interval d n , get the nth group of test parameters.

[0041] Furthermore, when the preset interval d n When it is not a positive integer, the n-1th group of optimization strategies is output as the target performance optimization strategy.

[0042] Furthermore, the configuration module is specifically used to: verify the target performance optimization strategy using a preset performance testing tool;

[0043] After verification, configure the compiler to be tested to apply the target performance optimization strategy.

[0044] In a third aspect, the present invention provides an electronic device, comprising:

[0045] a memory for storing program instructions;

[0046] The processor is used to call program instructions in the memory to execute the compiler performance optimization method as described in the first aspect of the present application.

[0047] In a fourth aspect, the present invention provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the compiler performance optimization method of the first aspect of the present application.

[0048] The present invention provides a compiler performance optimization method, device, and storage medium. These methods determine a test data range based on target machine attributes, then derive test parameters based on the test data range. Performance testing of the compiler under test is then performed based on the test parameters to derive a target performance optimization strategy. Finally, after verifying the target performance optimization strategy, the compiler under test is configured to apply the target performance optimization strategy. By optimizing the compiler based on the relevant attributes of the target machine, the compiler's compilation performance is further improved to adapt to target machines of various architectures and meet the compilation requirements of target machines of various architectures. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0050] Figure 1 This is an example diagram of an application scenario provided by an embodiment of the present application;

[0051] Figure 2 A flowchart of a compiler performance optimization method provided in one embodiment of the present application;

[0052] Figure 3 A flowchart of a compiler performance optimization method provided in another embodiment of the present application;

[0053] Figure 4 A flowchart of a compiler performance optimization method provided in yet another embodiment of the present application;

[0054] Figure 5 A schematic diagram of a result curve of test parameters and test time provided in an embodiment of the present application;

[0055] Figure 6 A schematic diagram of a result curve of the intervals of test parameters and test time provided in an embodiment of the present application;

[0056] Figure 7 A flowchart of a compiler performance optimization method provided in yet another embodiment of the present application;

[0057] Figure 8 A schematic diagram of the structure of a compiler performance optimization device provided in one embodiment of the present application;

[0058] Figure 9 A schematic diagram of the structure of an electronic device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0059] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0060] In the description of the present invention, it should be understood that the terms "upper," "upper," "lower," "front," "rear," and the like, indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They do not indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limiting the present invention. In the description of the present invention, "plurality" means two or more, unless otherwise specifically specified.

[0061] The terms "first", "second", etc. (if any) in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can, for example, be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or that are inherent to these products or devices.

[0062] The description includes reference to the accompanying drawings, which form a part of the detailed description. The accompanying drawings show diagrams according to exemplary embodiments. These embodiments, which may also be referred to herein as "examples," are described in sufficient detail to enable those skilled in the art to practice the embodiments of the claimed subject matter described herein. The embodiments may be combined, other embodiments may be used, or structural, logical, and electrical changes may be made without departing from the scope and spirit of the claimed subject matter. It should be understood that the embodiments described herein are not intended to limit the scope of the subject matter, but rather to enable those skilled in the art to practice, make, and / or use the subject matter.

[0063] Below, some terms in this application are explained to facilitate understanding by those skilled in the art:

[0064] Target machine: refers to an electronic device that can run the compiler completely. The electronic device at least contains a computer architecture chip and a system that can run the compiler.

[0065] Compiler: This is primarily used to analyze source code written in a high-level programming language, convert it into intermediate code, and then convert the intermediate code into target code that can be understood by the target machine. The compiler runs normally on the target machine and can compile source code in all languages supported by the compiler.

[0066] Compiler front end: refers to the stage of analyzing and converting source code to generate intermediate code.

[0067] Compiler backend: The stage where intermediate code is converted into target code that can be recognized by the target machine.

[0068] The compiler backend functional module may include the compiler's implementation of block transfers. Block transfers involve transferring a continuous stream of M bytes from a specified source address to a specified destination address. The performance of the compiler backend functional module can be measured by the block transfer time. For example, the faster the block transfer time, the better the performance of the compiler backend functional module.

[0069] In order to improve the compilation performance of the compiler, a large number of compiler optimization technologies have emerged. Most of these compiler optimization technologies are optimizations that are independent of the target machine, while some characteristics of the compiler backend are closely related to the target machine. With the continuous development of computer architecture, the compiler needs to be continuously improved to adapt to target machines of various architectures, which reduces the compilation efficiency of the compiler during the software development process.

[0070] Based on the above problems, the present application provides a compiler performance optimization method, which tests the compiler using different test parameters in combination with the properties of the target machine to help compiler developers quickly and accurately find the target performance optimization strategy suitable for the compiler, and configure the compiler to be tested to apply the target performance optimization strategy, thereby improving the compilation performance of the compiler to adapt to target machines of various architectures.

[0071] The technical solution of the present application is described below in conjunction with several specific embodiments.

[0072] The embodiments described below can be applied to the GNU Compiler Collection (GCC) or other compilers, and will not be described in detail here.

[0073] Figure 1 This is an example diagram of an application scenario provided by an embodiment of the present application, such as Figure 1 As shown. The embodiments of the present application can be applied to a target machine, wherein the target machine may include: a desktop computer, a laptop computer, and a server, etc., which is not limited by the present application. The compiler can be run on the target machine. It should be noted that the embodiments of the present application are described using the target machine as the execution subject, but the present application is not limited to this, and the present application does not specifically limit the type of compiler.

[0074] Figure 2 A flowchart of a compiler performance optimization method provided in one embodiment of the present application is shown in FIG. Figure 2As shown, the method of the embodiment of the present application may include:

[0075] S201. Determine the test data range according to the target machine attributes.

[0076] In one embodiment, the target machine's test data range, the target machine's cache and memory size, and its memory structure are all closely related to the compiler's back-end functional module. The target machine's memory structure may include the structural features and storage space sizes of registers, cache, main memory, and disk. For example, the target machine's L1 cache memory storage space is 64KB, the L2 cache memory storage space is 256KB, the L3 cache memory storage space is 8MB, and the target machine's memory size is 16018992KB. Therefore, based on the compiler's back-end functional module and the target machine's memory size, the test data range can be obtained. For example, the test data range may be: [1B, 16018992KB].

[0077] S202: Determine test parameters based on the test data range.

[0078] In one embodiment, test parameters are obtained within the above-mentioned test data range, and the size of each test data is different. It is understandable that this application does not specifically limit the method for obtaining test parameters. In one embodiment, test parameters can be obtained at the same interval within the data test range. For example, with an interval of 1024B, the obtained test parameters can be: 1024B, 2048B, and 3072B, etc. In another embodiment, test parameters can also be obtained at different intervals within the data test range. For example, the obtained test parameters can be: 512B, 1024B, 2048B, and 4096B, etc.

[0079] S203: Perform performance testing on the compiler to be tested according to the test parameters to obtain a target performance optimization strategy.

[0080] In practical applications, performance tests are performed on the compiler to be tested using different implementation methods according to the test parameters, and the test results corresponding to the test parameters are obtained. The target performance optimization strategy is derived based on the test results.

[0081] It should be noted that different compilers use different implementation methods, and this application does not specifically limit the specific implementation method.

[0082] Among them, the performance test implementation methods corresponding to the compiler can include the following:

[0083] 1) Using load / store instructions to implement the compiler's back-end functional module is the first implementation method;

[0084] 2) Using vector instructions to implement the back-end functional module of the compiler is the first implementation method;

[0085] 3) Calling the corresponding library function to implement the back-end functional module of the compiler is the third implementation method.

[0086] S204: After the target performance optimization strategy is verified, the compiler to be tested is configured to apply the target performance optimization strategy.

[0087] In one embodiment, after obtaining the target performance optimization strategy, the target performance optimization strategy is verified using a preset verification method.

[0088] Furthermore, when the target performance optimization strategy is verified to be successful, the compiler to be tested is configured to apply the target performance optimization strategy.

[0089] In this embodiment, the test data range is first determined based on the target machine's properties. Test parameters are then derived from this test data range. Performance testing of the compiler under test is then performed based on the test parameters to derive a target performance optimization strategy. Finally, after the target performance optimization strategy has been verified, the compiler under test is configured to apply the target performance optimization strategy. By optimizing the compiler based on the relevant properties of the target machine, the compiler's compilation performance is further improved, meeting the compilation requirements of target machines of various architectures.

[0090] Based on the above embodiment, in a specific implementation, S202, the test parameters are obtained according to the test data range. Figure 3 Provide explanation.

[0091] Figure 3 This is a flow chart of a compiler performance optimization method provided by another embodiment of the present application. Figure 3 As shown, the method of the embodiment of the present application may include:

[0092] S301. Determine whether n is 1.

[0093] Wherein, n is an integer greater than 0, and n is used to represent the number of test rounds. For example, n=1 represents: the first round of testing; correspondingly, n represents the group number of the test parameters.

[0094] It is understandable that each time a set of test parameters is obtained, a round of testing is required for the set of test parameters, that is, the nth round of testing is used to test the nth set of test parameters.

[0095] In some embodiments, after step S301, steps S302a-S302b are further included.

[0096] S302a: When it is determined that n=1, determine whether i is 1.

[0097] Wherein, i is an integer greater than 0, i represents the sequence number of each test parameter in each group of test parameters. For example, i=1 represents: the first test parameter. It can be understood that when a group of test parameters contains multiple test parameters, there are multiple methods for sorting the multiple test parameters in each group of test parameters, and the present invention does not specifically limit this. In one embodiment, the test parameters can be sorted from small to large according to the numerical value of each test parameter, that is, the first test parameter is the smallest number in a group of test parameters. In another embodiment, the test parameters can also be sorted from large to small according to the numerical value of each test parameter, that is, the first test parameter is the largest number in a group of test parameters.

[0098] In some embodiments, after step S302a, steps S303a-S303b are further included.

[0099] S303a, when i=1, obtain the i-th n Test parameters.

[0100] Among them, i n Represents the i-th parameter of the n-th round of testing. For example, in combination with the above, 11 represents the first test parameter of the first round of testing. Among them, 11 is within the test data range and can be set according to actual needs or historical experience, or it can also be a fixed value, which is not limited in this embodiment of the present invention. For example, still taking the test data range [1B, 16018992KB] as an example, 11 can be any value in the test data range [1B, 16018992KB], for example: 1B or 16018992KB.

[0101] S303b, when i>1, according to the (i-1) n Test parameters and preset interval d n Get the i-th n Test parameters to obtain the nth group of i-th test parameters.

[0102] Among them, d n is an integer greater than or equal to 0, used to represent the size of the preset interval, that is, d n Indicates the preset interval size of the nth group of test parameters. When n=1, the preset interval size d1 in the first round of testing can be set according to actual needs or historical experience, or can also be a fixed value, which is not limited in this embodiment of the present invention. For example, d1=1024B.

[0103] In practical applications, when n>1, d n The value of d n-1Related. Specific, d n The value is less than d n-1 The value of .

[0104] It is understandable that for d n The method of obtaining the value of is not particularly limited in the embodiment of the present invention. For example, d n The size can be d n-1 20%, 50%, 80% or other multiples of the size.

[0105] In one embodiment, the i n Test parameters and (i-1) n Test parameters and preset interval d n Related, for example: the i n The test parameter is equal to the (i-1)th n Test parameters and preset interval d n The sum of, or, the i-th n The test parameter is equal to the (i-1)th n Test parameters and preset interval d n Taking the above example again, test parameter 21 = 1B + 1024B, or test parameter 21 = 16018992KB - 1024B.

[0106] S302b, when it is determined that n>1, according to the n-1th group of test parameters and the preset interval d n , obtain the nth group of test parameters.

[0107] Among them, d n is an integer greater than or equal to 0, used to represent the size of the preset interval. For example, in combination with the above, d2 represents the size of the preset interval in the second round of testing. When it is determined that n>1, d n with d n-1 Related, with d1 = 1024B, d n d n-1 Taking 50% of the total size as an example, d2 can be 512 bytes. In this embodiment, test parameters are first obtained from the test data range based on the test progress. Then, multiple rounds of performance testing are performed on the compiler under test based on the test parameters. This further improves the compiler's compilation performance and meets the compilation requirements of target machines with various architectures. Furthermore, by using the test parameters from the previous round to obtain the test parameters for the next round, the accuracy of the test parameters can be gradually improved, thereby improving test efficiency.

[0108] Based on the above embodiment, in a specific implementation, S203 , a performance test is performed on the compiler to be tested according to the test parameters to obtain a target performance optimization strategy.

[0109] In some embodiments, different instructions are used to perform performance tests on the compiler to be tested, corresponding test results are obtained, and performance optimization strategies are derived based on the test results. Among them, using different instructions to perform performance tests on the compiler to be tested based on test parameters can speed up the performance test speed and improve the accuracy of the performance optimization strategy. Figure 3 The examples provided are based on the combination Figure 4 A detailed description of the method for obtaining performance optimization strategies is given.

[0110] Figure 4 This is a flow chart of a compiler performance optimization method provided by another embodiment of the present application. Figure 4 As shown, the method of the embodiment of the present application may include:

[0111] S401 , performing a performance test on a compiler to be tested according to an nth set of test parameters to obtain an nth set of test results.

[0112] The nth group of test results includes multiple test results, and the test results can be characterized by test time and test parameters.

[0113] In actual application, a performance test is performed using a test command corresponding to each test parameter in the nth group of test parameters to obtain a test result corresponding to each test parameter in the nth group of test parameters.

[0114] For each test parameter in the nth group of test parameters, the specific test method is as follows:

[0115] 1) Using a test command corresponding to a test parameter, a performance test is performed on the first implementation method to obtain a first test result of the parameter;

[0116] 2) Using the test command corresponding to the test parameter, perform a performance test on the second implementation method to obtain a second test result for the parameter;

[0117] 3) Using the test command corresponding to the test parameter, perform a performance test on the third implementation method to obtain a third test result of the parameter;

[0118] S402: Perform data fitting on the nth group of test results.

[0119] In actual applications, data fitting is performed on the nth group of test results according to different performance test implementation methods to obtain the nth group of test results after data fitting corresponding to each implementation method; wherein, data fitting is performed on the nth group of test results, and the data fitting method may include: least squares method.

[0120] Specifically, the corresponding relationship between the nth group of test parameters and the test time of each test parameter is obtained, and the least square method is used to perform data fitting to form a result curve related to the nth group of test parameters and test time.

[0121] For easier understanding, please refer to Figure 5 , Figure 5 This is a schematic diagram of the test parameters and test time results provided by an embodiment of the present application. Figure 5 As shown, taking the value range of the group of test parameters as [m1, m5] as an example, the horizontal axis represents the data size of the test parameters, and the vertical axis represents the test time used to test each parameter. Among them, curve 501 represents the test results of testing the nth group of test parameters using the first implementation method, curve 502 represents the test results of testing the nth group of test parameters using the second implementation method, and curve 503 represents the test results of testing the nth group of test parameters using the third implementation method.

[0122] S403 : Compare the result curves corresponding to the nth group of test parameters after data fitting, obtain the target test results of the nth group, and derive the nth group of optimization strategies based on the target test results of the nth group.

[0123] Based on step S402, the target test result of group n is obtained by comparing the result curves corresponding to each implementation method. The target test result of group n is the correspondence between the intervals of the test parameters of group n and the optimal implementation method for the intervals.

[0124] For easier understanding, please refer to Figure 6 , Figure 6 This is a schematic diagram of the result curve of the interval of the test parameters and the test time provided in an embodiment of the present application. Figure 6 As shown, when the test parameter is in interval 1 [m1, m2], the first implementation method is used for testing, and its test time is the shortest. Then the best implementation method corresponding to interval 1 is the first implementation method;

[0125] When the test parameter is in the interval 2[m2,m3], the second implementation method is used for testing, and its test time is the shortest. Then the best implementation method corresponding to interval 2 is the second implementation method;

[0126] When the test parameter is in interval 3 [m3, m4], the third implementation method is used for testing, and its test time is the shortest. Therefore, the best implementation method corresponding to interval 3 is the third implementation method.

[0127] It can be concluded that when the test parameter is in the interval k[m k ,m k+1], the pth implementation method is used for testing, and its test time is the shortest. Then the best implementation method corresponding to interval k is the pth implementation method, where the value of p can be 1, 2, or 3.

[0128] It is understandable that the interval [m1,m k+1 ] is the test data range.

[0129] Furthermore, an nth group of optimization strategies is formed according to the target test results of the nth group.

[0130] Correspondingly, the nth group of optimization strategies includes:

[0131] When the test parameter is in the interval 1[m1,m2], the load / store instruction is used to implement the compiler backend function module;

[0132] When the test parameter is in the interval 2[m2,m3], vector instructions are used to implement the compiler backend function module;

[0133] When the test parameter is in the interval 3[m3,m4], the corresponding library function is called to implement the compiler backend function module;

[0134] When the test parameter is in the interval k[m k ,m k+1 ], the compiler backend functional module is implemented using the instructions or library functions corresponding to the pth implementation method.

[0135] S405: Use a preset performance testing tool to verify the target performance optimization strategy.

[0136] In one embodiment, after obtaining the target performance optimization strategy, before configuring the compiler to be tested to apply the target performance optimization strategy, it is necessary to verify the target performance optimization strategy using a preset verification method, wherein the preset verification method may include: verifying the target performance optimization strategy by measuring the actual running time of the target machine to complete the test. Specifically, when the actual running time is less than the preset test time, it is determined that the target performance optimization strategy has passed the verification. The preset test time can be set according to actual needs or historical experience, or it can also be a fixed value, which is not limited in this embodiment of the present invention.

[0137] In actual application, the specific process of the preset verification method may include:

[0138] 1) Configure different performance testing tool configuration files for different optimization strategies according to the compiler and the compiler's compilation environment;

[0139] 2) Run the performance testing tools corresponding to the optimization strategies respectively, verify each optimization strategy, and obtain the test results;

[0140] 3) Determine the target performance optimization strategy based on the test results.

[0141] S406: After verification, configure the compiler to be tested to apply the target performance optimization strategy.

[0142] Furthermore, when the target performance optimization strategy is verified to be successful, the compiler to be tested is configured to apply the target performance optimization strategy.

[0143] In this embodiment, the compiler under test is first performance-tested using the nth set of test parameters to obtain the nth set of test results. Data fitting is then performed on the nth set of test results. Finally, the nth set of test results after data fitting is compared to obtain the target test results of the nth set that outperform the preset performance, forming the nth set of optimization strategies. This further improves the compiler's compilation performance, meeting the compilation requirements of target machines of various architectures. Furthermore, by invoking the corresponding implementation method based on the test parameters to perform performance testing on the compiler, testing efficiency can be improved.

[0144] In one implementation, the nth group of test parameters and the n-1th group of test parameters and the preset interval d n Related.

[0145] Based on the above embodiment, in a specific implementation, S303b, when i>1, according to the (i-1) n Test parameters and preset interval d n Get the i-th n Test parameters to obtain the nth set of test parameters. The following combination Figure 7 Provide explanation.

[0146] Figure 7 This is a flow chart of a compiler performance optimization method provided by another embodiment of the present application. Figure 7 As shown, the method of the embodiment of the present application may include:

[0147] S701. Obtain the intervals in the n-1th group of optimization strategies.

[0148] Specific, combined Figure 4 In the embodiment shown, the intervals in the n-1th group of optimization strategies may include: interval 1 [m1, m2], interval 2 [m2, m3], interval 3 [m3, m4] ···k [m k , m k+1 ], where k is an integer greater than 0.

[0149] S702, according to the interval and the preset interval d n , get the nth group of test parameters.

[0150] In one embodiment, in the n-1th test parameter set S n-1 Based on the endpoint value of the interval and the preset interval d n Get the nth set of test parameter set S n .

[0151] Specifically, the nth test parameter set S can be obtained according to the following formula: n :

[0152] S n-1 is the n-1th test parameter set, T n-1 For S n-1 If the sequence is arranged in ascending order of element size, then S n ={S n-1 , m1+d n , m1+2d n ,…,m1+q1d n , m2-p2d n ,…,m2-2d n , m2-d n , m2+d n , m2+2d n ,…,m2+q2d n , m3-p3d n ,…,m3-2d n , m3-d n , m3+d n , m3+2d n ,…,m3+q3d n ,…,m k-1 -p k-1 d n ,…,m k-1 -2d n , m k-1 -d n , m k-1 +d n , m k-1 +2d n ,…,m k-1 +q k-1 d n , m k -p k d n ,…,m k -2d n , m k -d n , m k +d n , m k +2d n ,…,m k +q k dn , m k+1 -p k+1 d n , …, m k+1 -2d n , m k+1 -d n}.

[0153] Among them, (m1 + d n , m1 + 2d n , …, m1 + q1d n , m2 - p2d n , …, m2 - 2d n , m2 - d n , m2 + d n , m2 + 2d n , …, m2 + q2d n , m3 - p3d n , …, m3 - 2d n , m3 - d n , m3 + d n , m3 + 2d n , …, m3 + q3d n , …, m k-1 -p k-1 d n , …, m k-1 -2d n , m k-1 -d n , m k-1 +d n , m k-1 +2d n , …, m k-1 +q k-1 d n , m k -p k d n , …, m k -2d n , m k -d n , m k +d n , m k +2d n , …, m k +q k d n , m k+1 -p k+1 d n , …, m k+1 -2d n , m k+1 -d n ), is an ordered sequence, k, p k,q k , are integers greater than 0, m k -p k d n Greater than T n-1 Zhong and m k The left adjacent test parameter, m k +q k d n Less than T n-1 Zhong and m k The adjacent test parameters on the right.

[0154] Figure 8 This is a schematic diagram of the structure of a compiler performance optimization device provided in one embodiment of the present application, such as Figure 8 As shown, the compiler performance optimization device 80 of the embodiment of the present application may include: an acquisition module 801, a processing module 802, a testing module 803 and a configuration module 804.

[0155] In one embodiment, the acquisition module 801 is used to determine the test data range based on the target machine attributes, wherein the target machine attributes are related to the back-end functional modules of the compiler to be tested.

[0156] The processing module 802 is used to obtain test parameters according to the test data range.

[0157] The testing module 803 is used to perform a performance test on the compiler to be tested according to the test parameters to obtain a target performance optimization strategy.

[0158] The configuration module 804 is used to configure the compiler to be tested to apply the target performance optimization strategy after the target performance optimization strategy is verified.

[0159] Furthermore, the target machine attribute includes any one of the following: the storage space size of the target machine storage device, and the structural characteristics of the target machine storage device.

[0160] Furthermore, the test parameters include at least one set of test parameters. The processing module 802 is specifically configured to: if n is equal to 1, when i=1, obtain the i-th test parameter within the test data range. n Test parameters; when i is greater than 1, according to the (i-1) n Test parameters and preset interval d n , get the i-th n Test parameters to obtain the nth set of test parameters; wherein the preset interval d n For the i n Test parameters and (i-1) n Difference of test parameters;

[0161] If n is greater than 1, according to the n-1th group of test parameters and the preset interval dn , obtain the nth group of test parameters;

[0162] Among them, the preset interval d n The preset interval d n-1 wherein n is used to represent the group number of the test parameter, i represents the number of each test parameter in each group of test parameters, and i, n, and d are all integers greater than 0.

[0163] Furthermore, the testing module 803 is specifically configured to: perform a performance test on the compiler to be tested using the nth set of test parameters to obtain an nth set of test results, wherein the nth set of test results includes a plurality of test results;

[0164] Perform data fitting on the nth group of test results;

[0165] Compare the nth group of test results after data fitting to obtain the target test results of the nth group, and derive the nth group of optimization strategies based on the target test results of the nth group.

[0166] Furthermore, the processing module 802 is further configured to obtain an interval in the (n-1)th optimization strategy;

[0167] According to the interval and the preset interval d n , get the nth group of test parameters.

[0168] Furthermore, when the preset interval d n When it is not a positive integer, the n-1th group of optimization strategies is output as the target performance optimization strategy.

[0169] Furthermore, the configuration module 804 is specifically used to: verify the target performance optimization strategy using a preset performance testing tool;

[0170] After verification, configure the compiler to be tested to apply the target performance optimization strategy.

[0171] Figure 9 This is a schematic diagram of the structure of an electronic device provided in one embodiment of the present application. Figure 9 As shown, the electronic device 90 described in this embodiment can be the target machine (or a component that can be used for the target machine) mentioned in the aforementioned method embodiment. The electronic device 90 can be used to implement the method corresponding to the target machine described in the aforementioned method embodiment. For details, please refer to the description of the aforementioned method embodiment.

[0172] The electronic device 90 may include one or more processors 901, also referred to as processing units, which may implement certain control or processing functions. The processor 901 may be a general-purpose processor or a dedicated processor. For example, it may be a baseband processor or a central processing unit. The baseband processor may be used to process data, while the central processing unit may be used to control the electronic device 90, execute software programs, and process data from the software programs.

[0173] In one possible design, the processor 901 may also store instructions 903 or data (e.g., test parameters). The instructions 903 may be executed by the processor 901, so that the electronic device 90 executes the method corresponding to the terminal device or network device described in the above method embodiment.

[0174] In another possible design, the electronic device 90 may include a circuit that can implement the functions of sending, receiving, or communicating in the aforementioned method embodiments.

[0175] In one possible implementation, the electronic device 90 may include one or more memories 902 , on which instructions 904 may be stored. The instructions may be executed on the processor 901 , so that the electronic device 90 performs the method described in the above method embodiment.

[0176] In a possible implementation, data may also be stored in the memory 902. The processor 901 and the memory 902 may be provided separately or integrated together.

[0177] In one possible implementation, the electronic device 90 may further include a transceiver 905 and / or an antenna 906. The processor 901 may be referred to as a processing unit, which controls the electronic device 9. The transceiver 905 may be referred to as a transceiver unit, a transceiver, a transceiver circuit, or a transceiver, etc., and is used to implement the transceiver function of the electronic device 90.

[0178] The specific implementation process of the processor 901 and the transceiver 905 can be found in the relevant descriptions of the above embodiments, which will not be repeated here.

[0179] The processor 901 and transceiver 905 described in this application can be implemented on an integrated circuit (IC), an analog IC, a radio frequency integrated circuit (RFIC), a mixed-signal IC, an application specific integrated circuit (ASIC), a printed circuit board (PCB), an electronic device, etc.

[0180] An embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, it is used to implement the optimization method described in any of the above embodiments.

[0181] In the above embodiments, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the module division is merely a logical functional division. In actual implementation, there may be other division methods, such as multiple modules can be combined or integrated into another system, or some features can be ignored or not implemented. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interface, device or module, which can be electrical, mechanical or other forms.

[0182] In addition, the functional modules in various embodiments of the present invention may be integrated into a single processing unit, each module may exist physically separately, or two or more modules may be integrated into a single unit. The aforementioned modular units may be implemented in the form of hardware or hardware plus software functional units.

[0183] The integrated modules implemented in the form of software functional modules can be stored in a computer-readable storage medium. The software functional modules stored in a storage medium include instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) or a processor to execute some of the steps of the methods described in various embodiments of the present invention.

[0184] It should be understood that the processor described above may be a central processing unit (CPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), etc. A general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in the present invention may be directly executed by a hardware processor or by a combination of hardware and software modules in the processor.

[0185] The memory may include a high-speed RAM memory, and may also include non-volatile storage NVM, such as at least one disk memory, and may also be a USB flash drive, a mobile hard disk, a read-only memory, a magnetic disk or an optical disk.

[0186] The above-mentioned storage medium can be implemented by any type of volatile or non-volatile memory device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk, etc. The storage medium can be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0187] Those skilled in the art will appreciate that all or part of the steps in the above-described method embodiments can be implemented using hardware associated with program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0188] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A compiler performance optimization method, characterized in that: include: Determining the test data range based on target machine attributes, wherein the target machine attributes are related to the back-end functional modules of the compiler to be tested; the target machine attributes include any one of the following: the storage space size of the target machine storage device, and the structural characteristics of the target machine storage device; Determining test parameters based on the test data range; Performing a performance test on the compiler to be tested according to the test parameters to obtain a target performance optimization strategy; After the target performance optimization strategy is verified, the compiler to be tested is configured to apply the target performance optimization strategy.

2. The method according to claim 1, characterized in that The test parameters include at least one group of test parameters, and the test parameters are derived according to the test data range, including: If n is equal to 1, when i=1, within the test data range, obtain the i-th n Test parameters; when i is greater than 1, according to the (i-1) n Test parameters and preset interval d n , get the i-th n Test parameters to obtain the nth group of test parameters; wherein the preset interval d n For the i n Test parameters and the (i-1) n Difference of test parameters; If n is greater than 1, according to the n-1th group of test parameters and the preset interval d n , obtain the nth group of test parameters; Among them, the preset interval d n The preset interval d n-1 wherein n is used to represent the group number of the test parameter, i represents the number of each test parameter in each group of test parameters, and i, n, and d are all integers greater than 0.

3. The method according to claim 2, characterized in that After the test parameters are obtained according to the test data range, the method further includes: Performing a performance test on the compiler to be tested using the nth set of test parameters to obtain an nth set of test results, wherein the nth set of test results includes a plurality of test results; Performing data fitting on the nth group of test results; Compare the nth group of test results after data fitting to obtain the target test results of the nth group; Determining an optimization strategy for the nth group based on the target test results of the nth group; According to the n-1th group of test parameters and the preset interval d n , get the nth group of test parameters, including: Obtaining the intervals in the n-1th group of optimization strategies; According to the interval and the preset interval d n , get the nth group of test parameters.

4. The method according to claim 3, characterized in that When the preset interval d n When it is not a positive integer, the n-1th group of optimization strategies is output as the target performance optimization strategy.

5. The method according to any one of claims 1 to 4, characterized in that After the target performance optimization strategy is verified, before configuring the compiler to be tested to apply the target performance optimization strategy, the method further includes: Use the preset performance testing tool to verify the target performance optimization strategy.

6. A compiler performance optimization device, characterized in that: include: An acquisition module is configured to determine a test data range based on target machine attributes, wherein the target machine attributes are related to a back-end functional module of the compiler to be tested; the target machine attributes include any one of the following: the storage space size of the target machine storage device, and the structural characteristics of the target machine storage device; A processing module, configured to derive test parameters according to the test data range; A testing module, configured to perform a performance test on the compiler to be tested according to the test parameters and obtain a target performance optimization strategy; A configuration module is used to verify the target performance optimization strategy and configure the compiler to be tested to apply the target performance optimization strategy.

7. The device according to claim 6, characterized in that The test parameters include at least one group of test parameters, and the processing module is specifically configured to: If n is equal to 1, when i=1, within the test data range, obtain the i-th n Test parameters; when i is greater than 1, according to the (i-1) n Test parameters and preset interval d n , get the i-th n Test parameters to obtain the nth group of test parameters; wherein the preset interval d n For the i n Test parameters and the (i-1) n Difference of test parameters; If n is greater than 1, according to the n-1th group of test parameters and the preset interval d n , obtain the nth group of test parameters; Among them, the preset interval d n The preset interval d n-1 wherein n is used to represent the group number of the test parameter, i represents the number of each test parameter in each group of test parameters, and i, n, and d are all integers greater than 0.

8. An electronic device, characterized in that: include: a memory for storing program instructions; A processor is configured to call and execute program instructions in the memory, and perform the compiler performance optimization method according to any one of claims 1 to 5.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and the computer program is executed by a processor to implement the compiler performance optimization method according to any one of claims 1 to 5.

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