Counting methods, reading methods, devices and electronic equipment for counting values

Abstract

This invention belongs to the field of monotonic counter technology, and specifically relates to a counting method, reading method, device, and electronic device for counting values. The counting method provided in this application divides a data bit of a conventional counter into two, four, or eight groups of storage units. Each time the flash memory corresponding to the monotonic counter performs a data read / write operation, the count value is incremented by one, and the bit data of these storage unit groups is programmed to 0. With the same number of storage units, this method achieves far more counts than conventional monotonic counters. The counting value reading method provided in this application is used to read the count value of a monotonic counter running the above counting method. By first reading a portion of the count value represented by byte values ​​and then reading another portion represented by bit data, compared to directly reading the bit data, this significantly reduces the number of reads and improves reading efficiency.

Description

Technical Field

[0001] This invention belongs to the field of monotonic counter technology, and specifically relates to counting methods, reading methods, devices and electronic equipment for counting values. Background Technology

[0002] A Replay Protection Monotonic Counter (RPMC) is a counter with a monotonic counting function. After data is entered into the Replay Protection Monotonic Counter, the Replay Protection Monotonic Counter will only monotonically increase as the count value changes.

[0003] Existing monotonic counters typically achieve the increment function by programming 8-bit memory cells. Since the number of cells in a memory block is limited, increasing the count value of a monotonic counter requires increasing the number of memory cells. Increasing the number of memory cells inevitably leads to an increase in the area occupied by the memory block, which in turn increases power consumption. Currently, there is no publicly available technical solution that can effectively increase the count value of a single data bit without changing the number of memory cells.

[0004] Therefore, existing technologies need to be improved and developed. Summary of the Invention

[0005] The purpose of this invention is to provide a counting method, reading method, device, and electronic device that can increase the counting value of a single data bit without changing the number of storage units.

[0006] In a first aspect, the present invention provides a counting method for counting a monotonic counter, wherein the monotonic counter includes a storage block, the storage block includes a counting base bit, an identifier bit, a parity bit, and a data bit, the data bit including an eight-bit storage unit, and the counting method includes the following steps:

[0007] Start counting for the storage block and select the unprogrammed data bit;

[0008] Each of the unprogrammed data bits is divided into N groups of storage units, where N is 2, 4, or 8;

[0009] Each time the count value increases by one, the bit data in one of the N sets of storage units is changed from 8 / N 1s to 8 / N 0s.

[0010] The data bits are split into multiple storage units to increase the count value.

[0011] Optionally, each data bit can be split into two groups of storage units;

[0012] Each time the count value increases by one, the bit data in one of the storage units is changed from 1111 to 0000.

[0013] The data bits are split into two groups of storage units, which takes into account both the count value and the complexity of the algorithm.

[0014] Optionally, each data bit can be divided into 4 groups of storage units;

[0015] Each time the count value increases by one, the bit data in one of the storage units is changed from 11 to 00.

[0016] The data bits are split into 4 groups of storage units, further increasing the count value of a single data bit.

[0017] The counting method provided in this application divides a data bit of a conventional counter into two, four, or eight groups of storage units. Each time the flash memory corresponding to the monotonic counter performs a data read / write operation, the count value is incremented by one, and the bit data of these storage unit groups is programmed to 0. With the same number of storage units, this method counts far more than conventional monotonic counters. Conversely, with the same number of counts, it saves on the number of storage units, thereby saving space.

[0018] Secondly, the present invention provides a counting value reading method, wherein the monotonic counter includes a storage block, the storage block includes a counting base bit, an identifier bit, a check bit, and a data bit, the data bit including an eight-bit storage unit, used to read the counting value of the monotonic counter running the above-described counting method, and the reading method includes the following steps:

[0019] Read all bytes of data from the data bits of the currently operating storage block;

[0020] For each byte of data read that is 0x00, the count value is incremented by N;

[0021] For each set of 8 / N zeros in a storage unit (excluding the storage unit for the data bit with byte data of 0x00), the count value is incremented by one.

[0022] The counting value reading method provided in this application is used to read the counting value of a monotonic counter running the above counting method. By first reading a part of the counting value represented by the byte value and then reading another part of the counting value represented by the bit data, the number of readings can be greatly reduced and the reading efficiency can be improved compared with directly reading the bit data of the data bits.

[0023] Optionally, the step of incrementing the count value by N includes: first reading the data bits of byte data that are 0x00 one by one; when the byte data is 0x00, incrementing the count value by N and switching to the next data bit; when the byte data is not 0x00, reading the bit data.

[0024] Optionally, each data bit can be split into two groups of storage units;

[0025] The counter is incremented by two for each 0x00 byte of data read;

[0026] The counter is incremented by one for each 0000 bit read.

[0027] Optionally, each data bit can be divided into 4 groups of storage units;

[0028] The counter increments by four for each 0x00 byte of data read.

[0029] The value is incremented by one for each 00 bit read.

[0030] Thirdly, the counting device provided by the present invention is used for counting a monotonic counter, wherein the monotonic counter includes a storage block, the storage block includes a counting base bit, an identifier bit, a check bit, and a data bit, the data bit including an eight-bit storage unit, characterized in that it includes:

[0031] A module is selected to begin counting the storage block and to select the unprogrammed data bits.

[0032] A splitting module is used to split each of the unprogrammed data bits into N groups of storage units, where N is 2, 4, or 8.

[0033] The programming module is used to change the bit data of one of the N sets of storage units from 8 / N 1s to 8 / N 0s for each increment of the count value.

[0034] Fourthly, the counting value reading device provided by the present invention is used to read the data bits of the storage block of a monotonic counter, wherein the monotonic counter includes a storage block, the storage block includes a counting base bit, an identifier bit, a parity bit, and data bits, and the data bits include an eight-bit storage unit, characterized in that it includes:

[0035] The read module is used to read all bytes of data from the data bits of the currently operating storage block;

[0036] The first counting module is used to increment the count value by N for each data bit read as 0x00 in a set of bytes, where N is 2, 4 or 8;

[0037] The second counting module is used to increment the count value by one for each storage unit that reads a group of 8 / N zeros of bit data, excluding the storage unit for the data bit with byte data of 0x00.

[0038] Fifthly, the electronic device provided by the present invention includes a processor and a memory, wherein the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the steps in the above-described counting method are performed.

[0039] Other features and advantages of the invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings. Attached Figure Description

[0040] Figure 1 This is a flowchart illustrating the steps of the counting method according to an embodiment of this application.

[0041] Figure 2 This is a schematic diagram of the counting process in the prior art.

[0042] Figure 3 This is a schematic diagram of the counting process in which data bits are split into two groups of storage units in an embodiment of this application.

[0043] Figure 4 This is a schematic diagram of the counting process in which data bits are split into 4 groups of storage units in an embodiment of this application.

[0044] Figure 5 This is a flowchart illustrating the steps of the reading method according to an embodiment of this application.

[0045] Figure 6 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application.

[0046] Labeling explanations: 1. Electronic device; 2. Processor; 3. Memory; 4. Communication bus. Detailed Implementation

[0047] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0048] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this invention, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0049] An acknowledgment-protected monotonic counter typically comprises two memory blocks: a first memory block and a second memory block. These two blocks can be located in the same memory and controlled by the same external circuit providing control selection and address signals, or they can be located in different memories. Both the first and second memory blocks have a counter flag, a parity bit, and data bits.

[0050] The counter base bit records the total number of records when the previous memory block was full during the switch. When switching memory blocks, the data from the previous block is saved to the new block. The flag bit indicates whether the corresponding memory block needs to be erased or reprogrammed.

[0051] A parity bit is a special bit used to ensure the validity of data in a storage block. Specifically, the radix bit is generated by a certain parity operation (such as addition, parity, or XOR), and this value is compared with the value in the parity bit. If the two values ​​are equal, the data in the storage block corresponding to the parity bit is valid and no anomaly has occurred; if the two values ​​are not equal, the data in the storage block corresponding to the parity bit is invalid and an anomaly has occurred.

[0052] Data bits are units used to store counting data. The counting data of a monotonic counter is stored in a storage array composed of multiple storage units. Each storage block includes multiple data bits. Whenever the flash memory corresponding to the monotonic counter performs a data read or write operation, one data bit in the storage block of the monotonic counter is written into the data.

[0053] The count value is the sum of all data bits in the current storage block, and the total value is the sum of the count values ​​of the data bits in the storage block and the total value of the storage block before the switch. Monotonic counters are typically used in conjunction with flash memory packages to ensure the confidentiality and integrity of read and write data during data storage. For example, after each read / write operation in the flash memory, a count value is incremented in the monotonic counter, providing a record of the number of read / write operations the flash memory has undergone. Each time the flash memory performs a read / write operation, data is written to the unwritten data bits in the current storage block of the monotonic counter. Each data bit byte represents one or more count values, and every 8 bits constitute a byte.

[0054] Assuming a storage block is a storage array consisting of 2048 bit lines (BL) and 16 word lines (WL) connected storage cells, with each word line connecting eight storage cells arranged sequentially to form a byte, this storage block can store 4096 bytes. (Refer to...) Figure 2The first 8 bytes (Byte[7:0]) are used to store the total value of the count flag and the check bit (Header[7:0]), so the remaining 4088 bytes are the data bits (Byte[4095:8]).

[0055] The counting process of a monotonic counter in the prior art is as follows: Figure 2 As shown, the byte data of the data bit is programmed as 0x00, the count value is incremented by one, and while the count value is incremented, the previous total value and the count value are summed to obtain a new total value and programmed into the first 8 bytes. Therefore, the monotonic counter of the prior art can store a maximum of 4088 data in a single programming without erasure, that is, a single storage block can count a maximum of 4088 times.

[0056] This application provides a counting method for a monotonic counter, comprising the following steps:

[0057] S01. Start counting the memory block and select the unprogrammed data bits;

[0058] In this step, for memory blocks that have not been written to or have been erased, the starting address is the first data bit, which is the 9th byte. All data bits from this starting address to the ending address are not programmed. First, the first data bit is selected according to the address order for programming, and then the programmed data bit is switched to the next data bit.

[0059] S02. Divide each unprogrammed data bit into N groups of storage units, where N is 2, 4, or 8;

[0060] To fully utilize the storage space of a memory block, more count values ​​can be written within the same storage space. The data bits are split into N groups of storage units to increase the count value stored in a single data bit.

[0061] S03. For each increment of the count value, the bit data in one of the N sets of storage units is changed from 8 / N ones to 8 / N zeros.

[0062] In some embodiments, it is assumed that N is 2, that is, each data bit is split into two groups of storage units, namely the first group of four-bit storage units and the second group of four-bit storage units.

[0063] In this embodiment, eight 1s (11111111) indicate that the data bit has not been written or has been erased, i.e., the byte data is 0xFF. This data bit is divided into two groups of four-bit storage units based on its high and low bits: the first group of four-bit storage units and the second group of four-bit storage units. Each group of four-bit storage units can store four bits of data. When the first group of four-bit storage units stores four 0s (0000), the count value is incremented by one. When the first group of four-bit storage units stores four 1s (1111), the data bit has not been written, and the count value remains unchanged.

[0064] For a clearer illustration of the counting process, see [link / reference]. Figure 3 The counting process is illustrated in the diagram. For example, when the count value is 0, the byte data of the 9th byte address (Byte[8]) is 0xFF, and the bit data of the first group of four-bit storage units and the second group of four-bit storage units of this byte address are 1111 and 1111 respectively. After the flash memory performs a read and write operation, the count value is incremented by one, and the count value is 1. The byte data of the 9th byte address (Byte[8]) is then programmed. By programming the bit data of the first group of the two groups of four-bit storage units from 4 ones to 4 zeros, the bit data of the first group of four-bit storage units and the second group of four-bit storage units of this byte address after programming are 0000 and 1111, and the corresponding byte data is 0x0F.

[0065] After the flash memory is read and written again, the count value is incremented by one. At this time, the count value is 2. The byte data of the 9th byte address (Byte[8]) is programmed. The bit data of the first group of four-bit storage units is already 0000. Only the bit data of the second group of four-bit storage units is programmed as 1111. The bit data of the first group of four-bit storage units and the second group of four-bit storage units of this byte address are 0000 and 0000 respectively. Therefore, the byte data of the 9th byte address (Byte[8]) is 0x00.

[0066] After the flash memory has performed three read and write operations, the count value is 3. Since the 9th byte address (Byte[8]) has already been written with byte data, the byte address jumps to the 10th byte address (Byte[9]) to start programming bit data. The data programming process repeats the corresponding steps with count values ​​of 1 and 2.

[0067] In some embodiments, it is assumed that N is 4, that is, each data bit is divided into 4 groups of storage units, namely the first group of two-bit storage units, the second group of two-bit storage units, the third group of two-bit storage units, and the fourth group of two-bit storage units.

[0068] To fully demonstrate the counting process, Figure 4For example, when the count value is 0, the byte data of the 9th byte address (Byte[8]) is 0xFF, then the bit data of the first two-bit storage unit, the second two-bit storage unit, the third two-bit storage unit, and the fourth two-bit storage unit of this byte address are all 11. After the flash memory performs a read / write operation, the count value is incremented by one, and the count value is 1. The bit data of the first two-bit storage unit to the fourth two-bit storage unit of this byte address is programmed as 00, 11, 11, 11, and the corresponding byte data of the 9th byte address (Byte[8]) is 0x3F. After the flash memory performs another read / write operation, the count value is incremented by one, and the count value is 2. The bit data of this byte address is programmed as 00, 00, 11, 11, and the corresponding byte data of the 9th byte address (Byte[8]) is 0x0F.

[0069] After the flash memory has been read and written three times, the count value is 3. The bit data of the first two-bit storage unit to the fourth two-bit storage unit of the byte address is programmed as 00, 00, 00, 11. The byte data corresponding to the 9th byte address (Byte[8]) is 0x03.

[0070] After the flash memory has been read and written four times, the count value is 4. The bit data of the first two-bit storage unit to the fourth two-bit storage unit of the byte address is 00, 00, 00, 00. The byte data corresponding to the 9th byte address (Byte[8]) is 0x00.

[0071] When the count value is 5, since the 9th byte address (Byte[8]) has already been written with byte data, the byte address jumps to the 10th byte address (Byte[9]) to start programming bit data. The data programming process repeats steps 1-4 with the count value.

[0072] In addition, the data bits can be divided into 8 groups of storage units. The specific programming process can be deduced from the division into 2 or 4 groups of storage units, and will not be elaborated here.

[0073] From the above, we can summarize that when a data bit is divided into 2 groups of storage units, it can increase its count by a maximum of 2; when divided into 4 groups, it can increase its count by a maximum of 4; and when divided into 8 groups, it can increase its count by a maximum of 8. The finer the data bit division, the more times programming and reading occur, undoubtedly increasing the algorithm's complexity. A more complex algorithm results in a slower counting speed per operation, impacting efficiency. To balance the number of counts and the algorithm's complexity, the preferred scheme is to divide it into two groups of four-bit storage units.

[0074] This application provides a counting method for a monotonic counter. By dividing a data bit of a conventional counter into two, four, or eight groups of storage cells, the count value is incremented by one each time the flash memory corresponding to the monotonic counter performs a data read or write operation, and the bit data of these storage cell groups is programmed to 0. With the same number of storage cells, this method achieves far more counts than conventional monotonic counters. Conversely, with the same number of counts, it saves on the number of storage cells, thereby saving space.

[0075] This application also provides a method for reading a monotonic counter, used to read the count value of the above-mentioned counting method, see [link to relevant documentation]. Figure 5 The reading method includes the following steps:

[0076] S11. Read all bytes of data from the data bits of the current storage block;

[0077] Taking the data bits split into two groups of storage units as an example, assuming that the byte data of the 9th byte of the storage block is 0x00, the byte data of the 10th byte is 0x0F, and the byte data of the 11th to 4096th bytes are all 0xFF, these bytes are read.

[0078] S12. For each byte of data read that is 0x00, increment the counter by N.

[0079] To speed up the read counter, the reading method first reads a portion of the count value represented by the byte value, and then reads the other portion of the count value represented by the bit data. That is, it first reads the data bits where the byte data is 0x00 one by one; when the byte data is 0x00, the count value is incremented by N and the process switches to the next data bit; when the byte data is not 0x00, the bit data is read. Compared to directly reading the bit data, this significantly reduces the number of reads and improves reading efficiency.

[0080] According to the description of the counting method above, there is one data bit with the byte data being 0x00, which means that the count value is increased by two, and this part of the count value is a total of 2.

[0081] S13. For each set of 8 / N zeros in a storage unit that is read, excluding the storage unit for the byte data of 0x00, increment the count by one.

[0082] Since there is some overlap between byte data 0x00 and bit data 0000, to avoid double counting, the data bits that have already been counted as 0x00 must be excluded. Therefore, at most one data bit will not simultaneously be byte data 0x00; in this embodiment, this data bit is the 10th byte. The byte data of the 10th byte is 0x0F, which is converted to bit data 00001111. The bit data has a storage unit of four 0s, so the count value is incremented by one, and this part of the count value totals 1. Finally, this is added to the partial count value from S12 to obtain the final count value, which is 3. The count value can then be read and retrieved.

[0083] This application provides a method for reading a monotonic counter, which is used to read the count value of a monotonic counter running the above-mentioned counting method. By first reading a part of the count value represented by the byte value and then reading another part of the count value represented by the bit data, the number of reads can be greatly reduced and the reading efficiency can be improved compared with directly reading the bit data of the data bits.

[0084] Select the module to begin counting the memory block and select the unprogrammed data bits;

[0085] The splitting module is used to split each unprogrammed data bit into N groups of storage units, where N is 2, 4, or 8.

[0086] The programming module is used to change the bit data of one of the N sets of storage units from 8 / N 1s to 8 / N 0s for each increment of the counter value.

[0087] This application also provides a counting value reading device for reading the counting value of a monotonic counter, including:

[0088] The read module is used to read all bytes of data from the data bits of the currently operating storage block;

[0089] The first counting module increments the count value by N for each byte of data read that is 0x00.

[0090] The second counting module is used to increment the count by one for each set of 8 / N zeros in a storage unit (excluding the storage unit for byte data of 0x00).

[0091] Figure 6 A schematic diagram of the structure of an electronic device according to an embodiment of this application is shown. This application provides an electronic device 1, including: a processor 2 and a memory 3. The processor 2 and the memory 3 are interconnected and communicate with each other through a communication bus 4 and / or other forms of connection mechanism (not shown). The memory 3 stores a computer program executable by the processor 2. When the computing device is running, the processor 2 executes the computer program to perform the method in any optional implementation of the above embodiments.

[0092] In the embodiments provided by this invention, it should be understood that the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0093] Furthermore, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0094] Furthermore, the functional modules in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0095] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.

[0096] The above description is merely an embodiment of the present invention and is not intended to limit the scope of protection of the present invention. For those skilled in the art, the present invention can have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for counting a value, for counting a monotonic counter, said monotonic counter comprising a memory block, said memory block comprising a counting base bit, an identification bit, a check bit and a data bit, said data bit comprising eight-bit memory cells, characterized in that, The counting method comprises the following steps: starting counting on the memory block, and selecting the unprogrammed data bit; splitting each of the unprogrammed data bits into N groups of memory cells, N being 2, 4 or 8; programming the bit data of one of the N groups of memory cells from 8 / N 1s to 8 / N 0s every time the counting value is increased by 1.

2. The count value counting method according to claim 1, characterized by, splitting each data bit into 2 groups of memory cells; programming the bit data of one of the groups of memory cells from 1111 to 0000 every time the counting value is increased by 1.

3. The count value counting method according to claim 1, wherein splitting each data bit into 4 groups of memory cells; programming the bit data of one of the groups of memory cells from 11 to 00 every time the counting value is increased by 1.

4. A method of reading a count value, said monotonic counter comprising a memory block, said memory block comprising a count radix bit, an identification bit, a check bit and a data bit, said data bit comprising eight bit memory cells, characterized in that, The reading method for reading the counting value of the monotonic counter of the counting method of any one of claims 1-3 comprises the following steps: reading all byte data of the data bit of the memory block currently operated; increasing the counting value by N every time a group of the data bit with byte data of 0x00 is read; increasing the counting value by 1 every time a group of memory cells with bit data of 8 / N 0s is read, the memory cells not including the memory cells of the data bit with byte data of 0x00.

5. The count value reading method according to claim 4, wherein The step of increasing the counting value by N comprises reading the data bit with byte data of 0x00 one by one, increasing the counting value by N when the byte data is 0x00 and switching to the next data bit, and reading the bit data when the byte data is not 0x00.

6. The count value reading method according to claim 4, wherein splitting each data bit into 2 groups of memory cells; increasing the counting value by 2 every time a byte data of 0x00 is read; increasing the counting value by 1 every time a bit data of 0000 is read.

7. The count value reading method according to claim 4, wherein splitting each data bit into 4 groups of memory cells; increasing the counting value by 4 every time a byte data of 0x00 is read; increasing the counting value by 1 every time a bit data of 00 is read.

8. A counter counting device for counting a monotonic counter, said monotonic counter comprising a memory block, said memory block comprising a counting base bit, an identification bit, a check bit and a data bit, said data bit comprising eight bit memory cells, characterized in that, The counting method comprises the following steps: a selecting module for starting counting on the memory block, and selecting the unprogrammed data bit; a splitting module for splitting each of the unprogrammed data bits into N groups of memory cells, N being 2, 4 or 8; a programming module for programming the bit data of one of the N groups of memory cells from 8 / N 1s to 8 / N 0s every time the counting value is increased by 1.

9. A count value reading device for reading data bits of a storage block of a monotonic counter, the monotonic counter comprising a storage block, the storage block comprising a count base bit, an identification bit, a check bit and data bits, the data bits comprising eight bit storage cells, characterized in that, The reading method for reading the counting value of the monotonic counter of the counting method of any one of claims 1-3 comprises the following steps: a reading module for reading all byte data of the data bit of the memory block currently operated; a first counting module for increasing the counting value by N every time a group of the data bit with byte data of 0x00 is read, N being 2, 4 or 8; a second counting module for increasing the counting value by 1 every time a group of memory cells with bit data of 8 / N 0s is read, the memory cells not including the memory cells of the data bit with byte data of 0x00.

10. An electronic device, characterized by The counting method comprises the following steps: a processor and a memory, the memory storing computer readable instructions, when the computer readable instructions are executed by the processor, the steps in the counting method of any one of claims 1-3 are run.

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