Data compensation circuit, display device including the same, and method of compensating data

Abstract

A data compensation circuit, a display apparatus including the same, and a method of compensating data are provided. The data compensation circuit includes a reference frame memory device storing reference frame data, an accumulated stress memory device storing accumulated stress data for each of pixels, a stress data generation block comparing output image data with the reference frame data to generate stress data for each of the pixels, a memory control block adding the stress data to the accumulated stress data to update the accumulated stress data, and a compensation block generating output image data by generating afterimage compensation data for each of the pixels based on the accumulated stress data and compensating the input image data based on the afterimage compensation data.

Description

Technical Field

[0001] Embodiments of the invention relate to a data compensation circuit. More specifically, embodiments of the invention relate to a data compensation circuit for performing momentary afterimage compensation, a display device including the data compensation circuit, and a method for compensating data using the data compensation circuit. Background Technology

[0002] A display device can display an image using multiple pixels included in the display device. Each pixel can include multiple transistors containing driving transistors and a light-emitting device electrically connected to the transistors. The driving transistors included in each pixel can generate a driving current, and the light-emitting device included in each pixel can emit light with a brightness corresponding to the magnitude of the driving current. However, the voltage-current characteristics of the driving transistors change depending on the operating state of the driving transistors in the previous display frame. In other words, the driving transistors included in the pixels exhibit hysteresis. Summary of the Invention

[0003] When the display area of ​​the display device is driven with a different grayscale in the previous display frame, due to the hysteresis of the driving transistor, even when the display area of ​​the display device is driven with the same grayscale in the next display frame, a transient afterimage will occur in which the display area emits light with different brightness within a predetermined time period.

[0004] Embodiments of the invention provide a data compensation circuit that can reduce the user's visual perception of brightness differences by reducing the transient afterimage of each pixel.

[0005] Embodiments of the invention also provide a display device that includes a data compensation circuit and is capable of reducing the user's visual perception of brightness differences by reducing the transient afterimage of each pixel within the display panel.

[0006] Embodiments of the invention also provide a method for reducing compensation data for a user's visual perception of brightness differences by reducing the transient afterimage of each pixel.

[0007] In an embodiment of the data compensation circuit for pixels according to the invention, the data compensation circuit includes: a reference frame memory device for storing reference frame data; an accumulated stress memory device for storing accumulated stress data for each pixel in the pixel; a stress data generation block for comparing output image data with the reference frame data to generate stress data for each pixel in the pixel; a memory control block for adding stress data to the accumulated stress data to update the accumulated stress data; and a compensation block for generating output image data by generating afterimage compensation data for each pixel in the pixel based on the accumulated stress data and compensating the input image data based on the afterimage compensation data.

[0008] In an embodiment, the stress data generation block can generate stress data by calculating the stress for each pixel in the pixel based on the difference between a first gray value of the output image data and a reference gray value of the reference frame data.

[0009] In this embodiment, the stress data can be calculated using the following Equation 1:

[0010] SD=A1*[(-MaxStress / ZeroStX)*A0*DDO+MaxStress],

[0011] Where SD represents stress data, A0 and A1 represent stress correction factors, DDO represents the difference between the first gray value and the reference gray value, MaxStress represents the maximum value of stress data, and ZeroStX represents the value of DDO when the stress data is 0.

[0012] In an embodiment, the stress data may have a maximum value when the first gray value and the reference gray value are equal to each other, and the stress data decreases as the difference between the first gray value and the reference gray value increases.

[0013] In an embodiment, the cumulative stress data can be increased proportionally to the duration during which the difference between the first gray value and the reference gray value is maintained.

[0014] In an embodiment, the compensation block can determine the brightness compensation amount of the afterimage compensation data based on the difference between a reference gray value and a second gray value based on the input image data, as well as the cumulative stress data.

[0015] In an embodiment, when the second gray value is larger than the reference gray value, the compensation block can generate afterimage compensation data that performs compensation to reduce the brightness of the input image data.

[0016] In an embodiment, when the second grayscale value is smaller than the reference grayscale value, the compensation block can generate afterimage compensation data that performs compensation to increase the brightness of the input image data.

[0017] In this embodiment, when the brightness compensation amount of the afterimage compensation data becomes 0, the compensation block can use the input image data to update the reference frame data.

[0018] In an embodiment, the stress data generation block can calculate the brightness correction constant using brightness data that reflects the input image data, and generate brightness correction stress data based on the brightness correction constant.

[0019] In an embodiment of the display device according to the invention, the display device includes: a display panel including pixels; a data driving circuit providing data signals to the display panel; a scan driving circuit providing scan signals to the display panel; a data compensation circuit compensating input image data to generate output image data corresponding to the data signals; and a timing control circuit controlling the data driving circuit, the scan driving circuit, and the data compensation circuit. Here, the data compensation circuit includes: a reference frame memory device storing reference frame data; an accumulated stress memory device storing accumulated stress data for each pixel; a stress data generation block comparing the output image data with the reference frame data to generate stress data for each pixel; a memory control block adding stress data to the accumulated stress data to update the accumulated stress data; and a compensation block generating output image data by generating afterimage compensation data for each pixel based on the accumulated stress data and compensating the input image data based on the afterimage compensation data.

[0020] In an embodiment, the stress data generation block can generate stress data by calculating the stress for each pixel in the pixel based on the difference between a first gray value of the output image data and a reference gray value of the reference frame data.

[0021] In an embodiment, the stress data may have a maximum value when the first gray value and the reference gray value are equal to each other, and the stress data decreases as the difference between the first gray value and the reference gray value increases.

[0022] In an embodiment, the cumulative stress data can be increased proportionally to the duration during which the difference between the first gray value and the reference gray value is maintained.

[0023] In an embodiment, the compensation block can determine the brightness compensation amount of the afterimage compensation data based on the difference between a reference gray value and a second gray value based on the input image data, as well as the cumulative stress data.

[0024] In this embodiment, when the brightness compensation amount of the afterimage compensation data becomes 0, the compensation block can use the input image data to update the reference frame data.

[0025] In an embodiment, the stress data generation block can calculate the brightness correction constant using brightness data that reflects the input image data, and generate brightness correction stress data based on the brightness correction constant.

[0026] In an embodiment of the method for compensating data according to the invention, the method may include: storing reference frame data; storing cumulative stress data for each pixel in the pixel set; comparing output image data with the reference frame data to generate stress data for each pixel in the pixel set; adding stress data to the cumulative stress data to update the cumulative stress data; generating afterimage compensation data for each pixel in the pixel set based on the cumulative stress data; and generating output image data by compensating for the brightness of the input image data based on the afterimage compensation data.

[0027] In one embodiment, the step of generating stress data includes: calculating the stress for each pixel based on the difference between a first grayscale value of the output image data and a reference grayscale value of the reference frame data.

[0028] In an embodiment, the step of generating afterimage compensation data may include: determining the brightness compensation amount of the afterimage compensation data based on the difference between a reference gray value and a second gray value based on the input image data and the cumulative stress data; and updating the reference frame data using the input image data when the brightness compensation amount of the afterimage compensation data becomes 0.

[0029] In an embodiment of the data compensation circuit for pixels according to the invention, the data compensation circuit includes: a reference frame data generation block, which generates i-th reference frame data based on i-1 reference frame data generated in the (i-1)th display frame and i-th output image data generated in the i-th display frame based on the i-1 reference frame data, wherein i is an integer greater than or equal to 2; a reference frame memory device, which stores the i-th reference frame data when it is generated in the i-th display frame and provides the i-th reference frame data in the (i+1)th display frame; a memory control block, which controls the reference frame memory device; and a compensation block, which generates i-th converted image data by generating i-th converted image data based on i-th input image data input in the i-th display frame, generates afterimage compensation data for each pixel in the pixel by generating afterimage compensation data based on the i-th converted image data and the (i-1)th reference frame data, and generates i-th output image data by compensating the i-th input image data based on the afterimage compensation data.

[0030] In this embodiment, the i-th transformed image data can be calculated using the following Equation 2:

[0031] CND[i] = M1 * IND[i],

[0032] Where CND[i] represents the i-th transformed image data, IND[i] represents the i-th input image data, and M1 represents the data correction factor.

[0033] In this embodiment, the i-th reference frame data can be calculated using the following Equation 3:

[0034] RFD[i]=M2*RFD[i-1]+M3*OUTD[i],

[0035] Wherein, RFD[i] represents the i-th reference frame data generated in the i-th display frame, RFD[i-1] represents the i-1 reference frame data generated in the (i-1)-th display frame, OUTD[i] represents the i-th output image data generated in the i-th display frame, M2 represents the cumulative correction factor, and M3 represents the brightness correction factor.

[0036] In an embodiment, the compensation block can determine the brightness compensation amount of the afterimage compensation data based on the difference between the reference gray value of the (i-1)th reference frame data and the gray value of the i-th converted image data.

[0037] In this embodiment, when the grayscale value is greater than the reference grayscale value, the compensation block can generate afterimage compensation data that performs compensation to reduce the brightness of the i-th input image data. Furthermore, when the grayscale value is smaller than the reference grayscale value, the compensation block can generate afterimage compensation data that performs compensation to increase the brightness of the i-th input image data. Additionally, when the grayscale value is equal to the reference grayscale value, the compensation block can generate afterimage compensation data that does not perform compensation to adjust the brightness of the i-th input image data.

[0038] In this embodiment, the afterimage compensation data can be generated using the following equations 4 to 6, set sequentially:

[0039] CD[i]=B*MaxCompN*DDI[i],DDI[i]>0,

[0040] CD[i]=C*MaxCompP*DDI[i], DDI[i]<0, and

[0041] CD[i] = 0, DDI[i] = 0,

[0042] Where CD[i] represents the afterimage compensation data, DDI[i] represents the difference between the reference gray value based on the (i-1)th reference frame data and the gray value based on the i-th converted image data, MaxcompN represents the maximum value of the afterimage compensation data when DDI[i]>0, MaxcompP represents the maximum value of the afterimage compensation data when DDI[i]<0, B represents the afterimage compensation correction factor when DDI[i]>0, and C represents the afterimage compensation correction factor when DDI[i]<0.

[0043] In an embodiment of the display device according to the invention, the display device includes: a display panel including pixels; a data driving circuit providing data signals to the display panel; a scan driving circuit providing scan signals to the display panel; a data compensation circuit compensating for input image data and generating output image data corresponding to the data signals; and a timing control circuit controlling the data driving circuit, the scan driving circuit, and the data compensation circuit. Here, the data compensation circuit includes: a reference frame data generation block, which generates i-th reference frame data based on i-1 reference frame data generated in i-1 display frame and i-th output image data generated in i display frame based on i-1 reference frame data, where i is an integer greater than or equal to 2; a reference frame memory device, which stores i-th reference frame data when i-th reference frame data is generated in i display frame and provides i-th reference frame data in i+1 display frame; a memory control block, which controls the reference frame memory device; and a compensation block, which generates i-th converted image data by generating i-th converted image data based on i-th input image data input in i display frame, generates afterimage compensation data for each pixel in the pixel by generating afterimage compensation data based on i-th converted image data and i-1 reference frame data, and generates i-th output image data by compensating i-th input image data based on afterimage compensation data.

[0044] In this embodiment, the i-th transformed image data can be calculated using the following Equation 2:

[0045] CND[i] = M1 * IND[i],

[0046] Where CND[i] represents the i-th transformed image data, IND[i] represents the i-th input image data, and M1 represents the data correction factor.

[0047] In this embodiment, the i-th reference frame data can be calculated using the following Equation 3:

[0048] RFD[i]=M2*RFD[i-1]+M3*OUTD[i],

[0049] Wherein, RFD[i] represents the i-th reference frame data generated in the i-th display frame, RFD[i-1] represents the i-1 reference frame data generated in the (i-1)-th display frame, OUTD[i] represents the i-th output image data generated in the i-th display frame, M2 represents the cumulative correction factor, and M3 represents the brightness correction factor.

[0050] In this embodiment, the afterimage compensation data can be generated using the following equations 4 to 6, set sequentially:

[0051] CD[i]=B*MaxCompN*DDI[i],DDI[i]>0,

[0052] CD[i]=C*MaxCompP*DDI[i], DDI[i]<0, and

[0053] CD[i] = 0, DDI[i] = 0,

[0054] Where CD[i] represents the afterimage compensation data, DDI[i] represents the difference between the reference gray value based on the (i-1)th reference frame data and the gray value based on the i-th converted image data, MaxcompN represents the maximum value of the afterimage compensation data when DDI[i]>0, MaxcompP represents the maximum value of the afterimage compensation data when DDI[i]<0, B represents the afterimage compensation correction factor when DDI[i]>0, and C represents the afterimage compensation correction factor when DDI[i]<0.

[0055] Therefore, the data compensation circuit 1) may include: a reference frame memory device for storing reference frame data; an accumulated stress memory device for storing accumulated stress data for each pixel in the pixel; a stress data generation block for comparing the output image data with the reference frame data to generate stress data for each pixel in the pixel; a memory control block for adding stress data to the accumulated stress data to update the accumulated stress data; and a compensation block for generating output image data by generating afterimage compensation data for each pixel in the pixel based on the accumulated stress data and compensating the input image data based on the afterimage compensation data; or the data compensation circuit 2) may include: a reference frame data generation block based on the (i-1)th reference frame generated in the (i-1)th display frame. The system generates i-th reference frame data by combining data and i-th output image data generated in the i-th display frame based on the (i-1)-th reference frame data, where i is an integer greater than or equal to 2; a reference frame memory device that stores the i-th reference frame data when it is generated in the i-th display frame and provides it in the (i+1)-th display frame; a memory control block that controls the reference frame memory device; and a compensation block that generates i-th converted image data based on the i-th input image data input in the i-th display frame, generates afterimage compensation data for each pixel based on the i-th converted image data and the (i-1)-th reference frame data, and compensates the i-th input image data based on the afterimage compensation data to generate i-th output image data. Therefore, the data compensation circuit can improve the hysteresis of the first transistor included in each pixel through the above data compensation, thereby improving the instantaneous afterimage of the display device caused by the hysteresis of the first transistor.

[0056] Furthermore, the display device in the embodiments of the invention may include a data compensation circuit, which can improve the hysteresis of the first transistor included in each pixel, thereby improving the transient afterimage of the display device caused by the hysteresis of the first transistor. Attached Figure Description

[0057] The above and other embodiments, advantages and features of this disclosure will become clearer by referring to the accompanying drawings and further describing the embodiments of this disclosure in more detail.

[0058] Figure 1 This is a circuit diagram showing the pixels.

[0059] Figure 2 It shows that it is applied to Figure 1 The timing diagram of the input signal of the pixel.

[0060] Figure 3 This is a block diagram illustrating an embodiment of a data compensation circuit according to the invention.

[0061] Figure 4A and Figure 4B It is used for comparison Figure 3 The diagram shows the data compensation circuit before and after data compensation.

[0062] Figure 5 It is shown Figure 3 The flowchart shows the operation of the data compensation circuit.

[0063] Figure 6 This is a graph illustrating an embodiment of stress data according to the invention.

[0064] Figure 7 This is a graph illustrating an embodiment of the afterimage compensation data according to the invention.

[0065] Figure 8 This is a block diagram illustrating an embodiment of a data compensation circuit according to the invention.

[0066] Figure 9A It is used to describe Figure 8 The data compensation circuit generates (i.e., updates) a graph of the reference frame data.

[0067] Figure 9B It is used to describe Figure 8 The data compensation circuit compensates the input image data to generate the output image data.

[0068] Figure 10 This is a block diagram illustrating an embodiment of the display device in an embodiment of the invention.

[0069] Figure 11 This is a block diagram illustrating an embodiment of the electronic device in an embodiment of the invention.

[0070] Figure 12 It is shown that Figure 11 The diagram shows an example of an electronic device implemented as a smartphone. Detailed Implementation

[0071] The invention will be explained in detail below with reference to the accompanying drawings.

[0072] What will be understood is that when an element is referred to as being "on" another element, it can be directly on said other element, or there can be an intermediate element between them. Conversely, when an element is referred to as being "directly on" another element, there is no intermediate element.

[0073] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another. Therefore, without departing from the teaching herein, “first element,” “first component,” “first region,” “first layer,” or “first part” discussed below may be referred to as a second element, second component, second region, second layer, or second part.

[0074] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are also intended to include the plural forms (including “at least one”). “Or” means “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. It will also be understood that when the terms “comprising” and / or “including” are used in this specification, the presence of the stated features, areas, integrals, steps, operations, elements, and / or components is specified, but the presence or addition of one or more other features, areas, integrals, steps, operations, elements, components, and / or combinations thereof is not excluded.

[0075] Furthermore, relative terms such as “lower” or “bottom” and “upper” or “top” may be used here to describe the relationship between one element and another as shown in the accompanying drawings. It will be understood that, in addition to the orientations depicted in the drawings, the relative terms are intended to cover different orientations of the device. In an embodiment, when the device in one of the drawings is flipped, an element described as being “below” the other element will subsequently be positioned “above” the other element. Thus, depending on the specific orientation of the drawing, the exemplary term “lower” can include both “lower” and “upper” orientations. Similarly, when the device in one of the drawings is flipped, an element described as being “below” or “under” the other element will subsequently be positioned “above” the other element. Thus, the exemplary terms “below” or “under” can cover both upper and lower orientations.

[0076] As used herein, “about” or “approximately” includes the stated value and indicates an acceptable deviation from the particular value as determined by a person of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, “about” may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0077] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will also be understood that terms (such as those defined in a general dictionary) shall be interpreted as having the meaning consistent with their meaning in the relevant field and in the context of the invention, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein. For example, terms such as “device” and “block” may refer to a circuit or processor.

[0078] The embodiments are described herein with reference to sectional views that are schematic illustrations of idealized embodiments. Thus, variations in the shapes illustrated are expected due to, for example, manufacturing techniques and / or tolerances. Therefore, the embodiments described herein should not be construed as limited to the specific shapes of the areas shown herein, but rather include deviations in shape due to, for example, manufacturing processes. In the embodiments, areas shown or described as flat may generally have rough and / or non-linear characteristics. Furthermore, sharp corners shown may be rounded. Therefore, the areas shown in the figures are schematic in nature, and their shapes are not intended to show the precise shapes of the areas, nor are they intended to limit the scope of the claims.

[0079] Figure 1 This is a circuit diagram showing the pixels. Figure 2 It shows that it is applied to Figure 1The timing diagram of the input signal of the pixel.

[0080] Reference Figure 1 and Figure 2 Each of the multiple pixels can include an organic light-emitting element (OLED).

[0081] The pixel can receive the data write gate signal GW, the data initialization gate signal GI, the organic light-emitting device initialization gate signal GB, the data voltage VDATA, and the emission signal EM, and emit light through the organic light-emitting element OLED according to the level of the data voltage VDATA, so that an image can be displayed.

[0082] At least one of the pixels may include a first transistor T1 to a seventh transistor T7, a storage capacitor CST, and an organic light-emitting element OLED.

[0083] The first transistor T1 may include a control electrode connected to the first node N1, a first electrode (or input electrode) connected to the second node N2, and a second electrode (or output electrode) connected to the third node N3.

[0084] In an embodiment, for example, the first transistor T1 may be a P-type thin-film transistor (“TFT”). The control electrode of the first transistor T1 may be the gate electrode, the input electrode of the first transistor T1 may be the source electrode, and the output electrode of the first transistor T1 may be the drain electrode.

[0085] The second transistor T2 may include a control electrode to which a data write gate signal GW is applied, a first electrode (or input electrode) to which a data voltage VDATA is applied, and a second electrode (or output electrode) connected to the second node N2.

[0086] In an embodiment, for example, the second transistor T2 may be a P-type TFT. The control electrode of the second transistor T2 may be the gate electrode, the input electrode of the second transistor T2 may be the source electrode, and the output electrode of the second transistor T2 may be the drain electrode.

[0087] The third transistor T3 may include a control electrode to which a data write gate signal GW is applied, a first electrode (or input electrode) connected to the first node N1, and a second electrode (or output electrode) connected to the third node N3.

[0088] In an embodiment, for example, the third transistor T3 can be a P-type TFT. The control electrode of the third transistor T3 can be the gate electrode, the input electrode of the third transistor T3 can be the source electrode, and the output electrode of the third transistor T3 can be the drain electrode.

[0089] The fourth transistor T4 may include a control electrode to which a data initialization gate signal GI is applied, a first electrode (or input electrode) to which an initialization signal VI is applied, and a second electrode (or output electrode) connected to the first node N1.

[0090] In an embodiment, for example, the fourth transistor T4 may be a P-type TFT. The control electrode of the fourth transistor T4 may be the gate electrode, the input electrode of the fourth transistor T4 may be the source electrode, and the output electrode of the fourth transistor T4 may be the drain electrode.

[0091] The fifth transistor T5 may include a control electrode to which a transmit signal EM is applied, a first electrode (or input electrode) to which a high power voltage ELVDD is applied, and a second electrode (or output electrode) connected to the second node N2.

[0092] In an embodiment, for example, the fifth transistor T5 can be a P-type TFT. The control electrode of the fifth transistor T5 can be the gate electrode, the input electrode of the fifth transistor T5 can be the source electrode, and the output electrode of the fifth transistor T5 can be the drain electrode.

[0093] The sixth transistor T6 may include a control electrode to which an emission signal EM is applied, a first electrode (or input electrode) connected to the third node N3, and a second electrode (or output electrode) connected to the anode electrode of the organic light-emitting element OLED.

[0094] In an embodiment, for example, the sixth transistor T6 can be a P-type TFT. The control electrode of the sixth transistor T6 can be the gate electrode, the input electrode of the sixth transistor T6 can be the source electrode, and the output electrode of the sixth transistor T6 can be the drain electrode.

[0095] The seventh transistor T7 may include a control electrode to which an organic light-emitting device initialization gate signal GB is applied, a first electrode (or input electrode) to which an initialization signal VI is applied, and a second electrode (or output electrode) connected to the anode electrode of the organic light-emitting element OLED.

[0096] In an embodiment, for example, the seventh transistor T7 can be a P-type TFT. The control electrode of the seventh transistor T7 can be the gate electrode, the input electrode of the seventh transistor T7 can be the source electrode, and the output electrode of the seventh transistor T7 can be the drain electrode.

[0097] The first to seventh transistors T1, T2, T3, T4, T5, T6, and T7 can be transistors of the same type. As mentioned above, each of the first to seventh transistors T1, T2, T3, T4, T5, T6, and T7 can be a P-type TFT. However, the invention is not limited thereto. In another embodiment, each of the first to seventh transistors T1, T2, T3, T4, T5, T6, and T7 can be an N-type TFT.

[0098] The storage capacitor CST may include a first electrode to which a high electrical voltage ELVDD is applied and a second electrode connected to a first node N1.

[0099] An organic light-emitting element (OLED) may include an anode electrode and a cathode electrode. A low power voltage (ELVSS) is applied to the cathode electrode of the OLED.

[0100] Reference Figure 2 During the first segment DU1 (e.g., in), the first node N1 and the storage capacitor CST are initialized by the data initialization gate signal GI. During the second segment DU2, the threshold voltage |VTH| of the first transistor T1 is compensated by the data write gate signal GW, and the threshold voltage |VTH| is written to the first node N1 by the compensated data voltage VDATA. During the third segment DU3, the anode electrode of the organic light-emitting element OLED is initialized by the organic light-emitting device initialization gate signal GB. During the fourth segment DU4, the organic light-emitting element OLED emits light by the emission signal EM[N], causing the display panel (e.g., Figure 10 The 610 in the middle can display images.

[0101] The data initialization gate signal GI can have an activation level (also referred to as an "active level") in the first segment DU1. In an embodiment, for example, the activation level of the data initialization gate signal GI can be a low level. When the data initialization gate signal GI has an activation level, the fourth transistor T4 is turned on, allowing the initialization signal VI to be applied to the first node N1. The current stage's data initialization gate signal GI[N] can be the scan signal SCAN[N-1] of the previous stage.

[0102] In the second segment DU2, the data write gate signal GW can have an active level. In an embodiment, for example, the active level of the data write gate signal GW can be a low level. When the data write gate signal GW has an active level, the second transistor T2 and the third transistor T3 are turned on. In addition, the first transistor T1 is also turned on by the initialization signal VI. The current stage's data write gate signal GW[N] can be the current stage's scan signal SCAN[N].

[0103] The voltage of the first node N1 can be set along the path formed by the first conducting transistor to the third transistors T1, T2 and T3 by subtracting the absolute value of the threshold voltage of the first transistor T1, |VTH|, from the data voltage VDATA.

[0104] In the third segment DU3, the organic light-emitting device (OLED) initialization gate signal GB can have an active level. In an embodiment, for example, the active level of the OLED initialization gate signal GB can be a low level. When the OLED initialization gate signal GB has an active level, the seventh transistor T7 is turned on, allowing the initialization signal VI to be applied to the anode electrode of the OLED. The current stage's OLED initialization gate signal GB[N] can be the subsequent stage's scan signal SCAN[N+1].

[0105] In the fourth segment DU4, the transmit signal EM[N] can have an active level. In an embodiment, for example, the active level of the transmit signal EM[N] can be a low level. When the transmit signal EM[N] has an active level, the fifth transistor T5 and the sixth transistor T6 are turned on. In addition, the first transistor T1 is also turned on by the data voltage VDATA.

[0106] The drive current ISD can flow sequentially to the fifth transistor T5, the first transistor T1, and the sixth transistor T6 to drive the organic light-emitting element (OLED). The intensity of the drive current ISD can be determined by the level of the data voltage VDATA. The brightness of the OLED can be determined by the intensity of the drive current ISD. The drive current ISD flowing along the path from the input electrode to the output electrode of the first transistor T1 can be expressed as Equation 1 below.

[0107] [Equation 1]

[0108]

[0109] In Equation 1, μ is the mobility of the first transistor T1, Cox is the capacitance per unit area of ​​the first transistor T1, W / L represents the ratio of the width to the length of the first transistor T1, VSG refers to the voltage between the input electrode and the control electrode of the first transistor T1, and |VTH| refers to the threshold voltage of the first transistor T1.

[0110] In the second section DU2, the threshold voltage |VTH| is compensated for the voltage VG of the first node N1, which can be expressed as Equation 2.

[0111] [Equation 2]

[0112] VG = VDATA - |VTH|

[0113] When the organic light-emitting element (OLED) emits light in the fourth segment DU4, the driving voltage VOV and driving current ISD can be expressed as Equations 3 and 4 below. In Equation 3, VS refers to the voltage of the second node N2.

[0114] [Equation 3]

[0115] VOV=VS-VG-|VTH|=ELVDD-(VDATA-|VTH|)-|VTH|=ELVDD-VDATA

[0116] [Equation 4]

[0117]

[0118] Since the threshold voltage |VTH| is compensated in the second segment DU2, the drive current ISD can be determined when the organic light-emitting element OLED emits light in the fourth segment DU4, regardless of the component of the threshold voltage |VTH| of the first transistor T1.

[0119] Therefore, the first transistor T1 included in each pixel allows the drive current ISD to flow, and the organic light-emitting element (OLED) included in each pixel can emit light with a brightness corresponding to the magnitude of the drive current ISD. The voltage-current characteristics of the first transistor T1 can vary depending on the operating state of the first transistor T1 in the previous display frame. In other words, the first transistor T1 included in the pixel exhibits hysteresis.

[0120] Due to the hysteresis of the first transistor T1, when the pixels of the display panel are driven with different gray levels in the previous display frame, even if the pixels of the display panel are driven with the same gray level in the subsequent display frame, a transient afterimage occurs in which the pixels emit light with different brightness within a predetermined time period. This transient afterimage can be improved by reducing the brightness difference between pixels through data compensation. Hereinafter, a data compensation circuit according to the invention for improving transient afterimages will be described.

[0121] Figure 3 This is a block diagram illustrating an embodiment of the data compensation circuit 10 according to the invention. Figure 4A and Figure 4B It is used for comparison Figure 3 The diagram shows the data compensation circuit 10 before and after data compensation.

[0122] Reference Figure 3 The data compensation circuit 10 may include a reference frame memory device 100, an accumulated stress memory device 400, a stress data generation block 200, a memory control block 300, and a compensation block 500.

[0123] The reference frame memory device 100 can store reference frame data RFD. The reference frame data RFD can be used to generate stress data SD and afterimage compensation data CD (refer to Equation 7 below). Figure 7 The reference frame data RFD can be, for example, the starting frame data of the input image data IND. The reference frame data RFD stored in the reference frame memory device 100 can be transferred to the stress data generation block 200 via the memory control block 300. The reference frame data RFD stored in the reference frame memory device 100 can be transferred to the compensation block 500 via the memory control block 300. The reference frame memory device 100 can receive new reference frame data UD-RFD updated by the compensation block 500 via the memory control block 300, and store the new reference frame data UD-RFD to replace the existing reference frame data RFD.

[0124] The accumulated stress memory device 400 can store accumulated stress data ASD for each pixel. When the memory control block (also referred to as the memory controller) 300 transfers stress data SD to the accumulated stress memory device 400, the accumulated stress memory device 400 can store updated accumulated stress data ASD. The accumulated stress data ASD stored in the accumulated stress memory device 400 can be transferred to the compensation block 500 through the memory control block 300.

[0125] The stress data generation block 200 generates stress data SD for each pixel by comparing output image data OUTD with reference frame data RFD. Each of the output image data OUTD and the reference frame data RFD can have a grayscale value from 0 to 255. The stress data generation block 200 generates stress data SD by calculating the luminance stress for each pixel based on a first parameter DDO (refer to Equation 5 below), where the first parameter DDO represents the difference between a first grayscale value based on the output image data OUTD and a reference grayscale value based on the reference frame data RFD. In an embodiment, the stress data generation block 200 may store predetermined equations for calculating the stress data SD. The stress data generation block 200 can calculate the stress data SD based on the above equations.

[0126] The stress data generation block 200 can calculate the brightness correction constant by reflecting (feedback) the brightness data DBV of the input image data IND, and generate brightness correction stress data based on the brightness correction constant.

[0127] Reference Figure 4AWhen multiple pixels included in the display panel are driven to have different gray levels (e.g., black and white) as shown in IMG(A) in the previous display frame, the stress data generation block 200 can calculate stress data SD for each pixel. The aforementioned stress data SD is added to and accumulated in the accumulated stress memory device 400. Therefore, even when a pixel is driven to have the same gray level (e.g., gray) as shown in IMG(B) in a subsequent display frame, the pixel will emit light with mutually different brightness over a predetermined time period. In other words, when data correction is not performed, transient afterimages as shown in IMG(C) occur, and the brightness difference between the pixels will be visually perceptible to the user.

[0128] The memory control block 300 can update the accumulated stress data ASD for each pixel by adding stress data SD for each pixel to the accumulated stress memory device 400. The memory control block 300 can accumulate the stress data SD for each pixel into the accumulated stress memory device 400 at an accumulation rate corresponding to the operating speed of the accumulated stress memory device 400. The memory control block 300 can receive new reference frame data UD-RFD from the compensation block 500. The memory control block 300 can update the existing reference frame data RFD with the new reference frame data UD-RFD updated from the compensation block 500, and transmit the new reference frame data UD-RFD (e.g., the updated reference frame data RFD) to the stress data generation block 200. The stress data generation block 200 can generate stress data SD based on the new reference frame data UD-RFD.

[0129] Compensation block 500 can generate output image data OUTD by generating afterimage compensation data CD for each pixel based on accumulated stress data ASD and compensating input image data IND based on afterimage compensation data CD. Specifically, compensation block 500 can read accumulated stress data ASD for each pixel from accumulated stress memory device 400 through memory control block 300, and generate a brightness compensation amount for afterimage compensation data CD based on the difference between a second grayscale value and a reference grayscale value of the input image data IND and accumulated stress data ASD for each pixel. In an embodiment, for example, compensation block 500 can perform afterimage compensation by applying the difference between the second grayscale value and the reference grayscale value and accumulated stress data ASD for each pixel to an equation or lookup table to output a brightness decrease amount for each pixel and generating afterimage compensation data CD for each pixel by calculating a brightness compensation amount for each pixel corresponding to the brightness decrease amount for each pixel. Compensation block 500 can store a predetermined equation for calculating afterimage compensation data CD. Specifically, compensation block 500 can store a second parameter DDI (refer to Equation 7 below) based on the difference between the second grayscale value and the reference grayscale value. Figure 7 The equation for generating the afterimage compensation data CD is used.

[0130] Reference Figure 4A and Figure 4B When multiple pixels included in the display panel are driven to have different gray levels (e.g., black and white) as shown in IMG(A) in the previous display frame, stress data SD is accumulated in the accumulated stress memory device 400. Therefore, even when a pixel is driven to have the same gray level (e.g., gray) as shown in IMG(B) in the subsequent display frame, the pixel will emit light with different brightness over a predetermined time period. When data correction is performed in the compensation block 500, each pixel can display an output image with the same brightness as the target image. Specifically, the compensation block 500 generates afterimage compensation data CD for each pixel based on the accumulated stress data ASD and compensates the input image data IND based on the afterimage compensation data CD, so that an output image with the same brightness as the target image IMG(B) can be displayed as shown in IMG(D). The data compensation circuit 10 can improve the hysteresis of the first transistor T1 through the above data compensation, and therefore, the instantaneous afterimage of the display device caused by the hysteresis of the first transistor T1 can be improved.

[0131] When the brightness compensation amount of the afterimage compensation data CD becomes 0, the compensation block 500 can update the reference frame data RFD, so that the new reference frame data UD-RFD can be transmitted to the memory controller 300. In the following text, the reference... Figures 5 to 7Describe the detailed operation of the data compensation circuit 10.

[0132] Figure 5 It is shown Figure 3 A flowchart illustrating an embodiment of the operation of the data compensation circuit 10. Figure 6 This is a graph illustrating an embodiment of stress data SD according to the invention. Figure 7 This is a graph illustrating an embodiment of the afterimage compensation data CD according to the invention.

[0133] Reference Figures 5 to 7 In this embodiment, the reference frame memory device 100 can store reference frame data RFD (S100). The stress data generation block 200 can generate stress data SD by comparing the output image data OUTD with the reference frame data RFD (S200). The accumulated stress memory device 400 can store accumulated stress data ASD for each pixel (S300). The memory control block 300 can update the accumulated stress data ASD by adding the stress data SD to the accumulated stress data ASD (S400). The compensation block 500 can generate afterimage compensation data CD based on the accumulated stress data ASD and the input image data IND (S500). The compensation block 500 can determine whether the brightness compensation amount of the afterimage compensation data CD is 0 (S600). When the brightness compensation amount of the afterimage compensation data CD is not 0, the compensation block 500 can generate output image data OUTD by compensating for the brightness of the input image data IND (S700). When the brightness compensation amount of the afterimage compensation data CD is 0, the compensation block 500 can update the reference frame data RFD using the input image data IND to obtain the new reference frame data UD-RFD (S800).

[0134] The reference frame memory device 100 can store reference frame data RFD (S100). The reference frame data RFD can be used as a reference for generating stress data SD and afterimage compensation data CD. In an embodiment, for example, the reference frame data RFD can be the starting frame data of the input image data IND. The reference frame data RFD stored in the reference frame memory device 100 can be transmitted to the stress data generation block 200. Specifically, when the stress data generation block 200 generates stress data SD, the stress data generation block 200 can receive the reference frame data RFD stored in the reference frame memory device 100 and compare the output image data OUTD with the reference frame data RFD. The memory control block 300 can transmit the reference frame data RFD to the compensation block 500. Specifically, when the compensation block 500 generates afterimage compensation data CD, the compensation block 500 can receive the reference frame data RFD stored in the reference frame memory device 100 from the memory control block 300 and compare the input image data IND with the reference frame data RFD. The memory control block 300 can receive the new reference frame data UD-RFD updated by the compensation block 500, and update the existing reference frame data RFD with the new reference frame data UD-RFD.

[0135] The stress data generation block 200 can generate stress data SD (S200) by comparing the output image data OUTD with the reference frame data RFD. The stress data generation block 200 can generate stress data SD for each pixel at a frame rate (or display rate) (e.g., approximately 60 Hz to approximately 120 Hz) by comparing the output image data OUTD with the reference frame data RFD. Each of the output image data OUTD and the reference frame data RFD can have a grayscale value from 0 to 255. Specifically, the stress data generation block 200 can generate stress data SD by calculating the luminance stress for each pixel based on a first parameter DDO, where DDO represents the difference between a first grayscale value according to the output image data OUTD and a reference grayscale value according to the reference frame data RFD. In an embodiment, for example, the stress data SD for each pixel can be a value corresponding to the luminance of the output image data OUTD for each pixel, and the cumulative stress data ASD for each pixel can be a value generated by accumulating the value corresponding to the luminance of the output image data OUTD for each pixel. In another embodiment, for example, the stress data SD for each pixel may be a value corresponding to the grayscale of the output image data OUTD for each pixel, and the cumulative stress data ASD for each pixel may be a value generated by accumulating the value corresponding to the grayscale of the output image data OUTD for each pixel. In embodiments, for example, various conditions such as time, temperature, brightness, and current may be taken into account to generate the stress data SD for each pixel and the cumulative stress data ASD for each pixel.

[0136] Reference Figure 6 In an embodiment, the stress data generation block 200 may store a predetermined equation for calculating stress data SD. Specifically, the stress data generation block 200 may store an equation for generating stress data SD based on a first parameter DDO, where the first parameter DDO represents the difference between a reference grayscale value and a first grayscale value based on output image data OUTD. In an embodiment, for example, the stress data generation block 200 may calculate the stress data SD according to Equation 5 below.

[0137] [Equation 5]

[0138] SD=A1*[(-MaxStress / ZeroStX)*A0*DDO+MaxStress]

[0139] In Equation 5, DDO represents the first parameter DDO, A0 and A1 represent stress correction factors, MaxStress represents the maximum value of the stress data SD, and ZeroStX represents the value of the first parameter DDO when the stress data SD is 0. When the output image data OUTD and the reference frame data RFD have the same value (e.g., first grayscale value = reference grayscale value), the value of the first parameter DDO becomes 0, so the stress data SD can have its maximum value. In other words, the same grayscale value between the output image data OUTD and the reference frame data RFD can indicate that electrical stress is applied to the first transistor T1. Conversely, an increase in the difference between the grayscale value of the output image data OUTD and the grayscale value of the reference frame data RFD can indicate a decrease in the electrical stress applied to the first transistor T1.

[0140] In an embodiment, the stress data generation block 200 can calculate a luminance correction constant using luminance data DBV reflecting the input image data IND, and generate luminance correction stress data based on the luminance correction constant. Specifically, the luminance correction stress data can be a value obtained by multiplying the stress data SD by the luminance correction constant. The luminance correction constant can be a parameter representing the difference in luminance between the output image data OUTD based on the luminance of the reference frame data RFD. In other words, when calculating the output stress data SD, the luminance correction constant can be a parameter used to reflect the luminance difference between the reference frame data RFD and the output image data OUTD. In an embodiment, for example, the stress data SD can be different when the luminance of the reference frame data RFD is approximately 400 nits and when the luminance of the reference frame data RFD is approximately 700 nits. Therefore, when calculating the output stress data SD, the luminance correction stress data can reflect not only the difference in grayscale values ​​between the output image data OUTD and the reference frame data RFD, but also the difference in luminance values ​​between the output image data OUTD and the reference frame data RFD. The stress data generation block 200 can transmit the luminance correction stress data to the accumulated stress memory device 400. The accumulated stress memory device 400 can add and store luminance correction stress data into accumulated stress data ASD. The compensation block 500 can receive the accumulated stress data ASD, in which the luminance correction stress data stored in the accumulated stress memory device 400 is accumulated, from the memory control block 300, and based on this, the compensation block 500 can generate afterimage compensation data CD, which reflects the luminance difference between the reference frame data RFD and the output image data OUTD.

[0141] When the difference between the grayscale value of the output image data OUTD and the grayscale value of the reference frame data RFD increases beyond a predetermined value (e.g., when the value of the first parameter DDO in Equation 5 becomes larger than ZeroStX), the stress data SD can have a negative value. In this case, since the electrical stress applied to the first transistor T1 is released, the cumulative stress for each pixel can be reduced.

[0142] The accumulated stress memory device 400 can store accumulated stress data ASD for each pixel (S300). Specifically, when stress data SD generated by the stress data generation block 200 is added over time, the accumulated stress data ASD can be updated in the memory control block 300. When the memory controller 300 transmits the accumulated stress data ASD to the accumulated stress memory device 400, the accumulated stress memory device 400 can store the updated accumulated stress data ASD. The accumulated stress data ASD stored in the accumulated stress memory device 400 can be transmitted to the compensation block 500. Specifically, when the compensation block 500 generates afterimage compensation data CD, the compensation block 500 can receive the accumulated stress data ASD stored in the accumulated stress memory device 400 from the memory control block 300, and generate afterimage compensation data CD proportional to the accumulated stress data ASD according to an equation or lookup table.

[0143] In an embodiment, the accumulated stress data ASD can be increased proportionally to the duration during which the difference between the first grayscale value and the reference grayscale value is maintained. Specifically, as the duration during which the difference between the grayscale value of the output image data OUTD and the grayscale value of the reference frame data RFD is maintained increases, the electrical stress applied to the first transistor T1 increases. Therefore, when the duration for maintaining the difference between the first grayscale value and the reference grayscale value becomes longer, the luminance compensation amount of the afterimage compensation data CD generated by the compensation block 500 increases. In an embodiment, for example, the accumulated stress data ASD can be calculated as the sum of the products of the stress data SD and the unit duration (e.g., about 1 / 120 of a second to about 1 / 60 of a second). The accumulated stress data ASD can be expressed as Equation 6 below.

[0144] [Equation 6]

[0145] ASD = ∑(SD*Δt - SD_Release)

[0146] In Equation 6, Δt represents the unit duration, and SD_Release represents the release value of the stress data SD over time. In other words, the cumulative stress data ASD can increase proportionally with the stress data SD and time, and decreases as the stress data SD is released.

[0147] The memory control block 300 can update the accumulated stress data ASD for each pixel by adding the stress data SD for each pixel to the accumulated stress data ASD (S400). Specifically, the memory control block 300 can receive the stress data SD for each pixel from the stress data generation block 200 at a frame rate (or display rate). The memory control block 300 can accumulate the stress data SD for each pixel into the accumulated stress memory device 400 at an accumulation rate corresponding to the operating speed of the accumulated stress memory device 400 (e.g., less than about 1 Hz).

[0148] The memory control block 300 can receive new reference frame data UD-RFD from the compensation block 500. The memory control block 300 can update the existing reference frame data RFD using the new reference frame data UD-RFD updated from the compensation block 500, and transmit the new reference frame data UD-RFD (e.g., the updated reference frame data RFD) to the stress data generation block 200. The stress data generation block 200 can generate stress data SD based on the new reference frame data UD-RFD.

[0149] The compensation block 500 can generate afterimage compensation data CD based on the accumulated stress data ASD and the input image data IND (S500). The compensation block 500 can determine whether the brightness compensation amount of the afterimage compensation data CD is 0 (S600). When the brightness compensation amount of the afterimage compensation data CD is not 0, the compensation block 500 can generate output image data OUTD by compensating for the brightness of the input image data IND (S700). Specifically, the compensation block 500 can read the accumulated stress data ASD for each pixel from the accumulated stress memory device 400 through the memory control block 300, and generate the brightness compensation amount of the afterimage compensation data CD based on the difference between the second gray value and the reference gray value of the input image data IND and the accumulated stress data ASD for each pixel. In an embodiment, for example, compensation block 500 may perform afterimage compensation by applying cumulative stress data ASD for each pixel to an equation or lookup table to output a luminance drop for each pixel and generating afterimage compensation data CD for each pixel by calculating a luminance compensation amount for each pixel corresponding to the luminance drop for each pixel.

[0150] In an embodiment, compensation block 500 can determine the amount of brightness compensation for the afterimage compensation data CD for each pixel at a frame rate (or display rate) (e.g., about 60 Hz to about 120 Hz) by comparing the input image data IND with the reference frame data RFD. Each of the input image data IND and the reference frame data RFD can have a grayscale value from 0 to 255. Specifically, compensation block 500 can generate the afterimage compensation data CD based on a second parameter DDI representing the difference between a reference grayscale value and a second grayscale value according to the input image data IND, and can generate output image data OUTD by compensating the input image data IND based on the afterimage compensation data CD.

[0151] Reference Figure 7 In an embodiment, compensation block 500 may store a predetermined equation for calculating the afterimage compensation data CD. Specifically, compensation block 500 may store an equation for generating the afterimage compensation data CD based on a second parameter DDI, which represents the difference between a second grayscale value and a reference grayscale value. In an embodiment, for example, compensation block 500 may calculate the afterimage compensation data CD based on equation 7 below.

[0152] [Equation 7]

[0153] CD = A2 * ASD * MaxComp * DDI

[0154] In Equation 7, DDI represents the second parameter DDI, A2 represents the afterimage compensation correction factor, MaxComp represents the maximum value of the afterimage compensation data CD, and ASD represents the value of the cumulative stress data ASD. In the embodiment, refer to Figure 7 When the value of the second parameter DDI is -255, the afterimage compensation data CD can have a positive maximum value MaxCompP, and when the value of the second parameter DDI is 255, the afterimage compensation data CD can have a negative maximum value MaxCompN. Regarding the afterimage compensation correction factor, brightness increase compensation or brightness decrease compensation can be determined based on the bias conditions of the accumulated stress data ASD. Furthermore, regarding the maximum value of the afterimage compensation data CD, brightness increase compensation or brightness decrease compensation can be determined based on the bias conditions of the accumulated stress data ASD.

[0155] In one embodiment, when the second grayscale value is larger than the reference grayscale value, the compensation block 500 can generate afterimage compensation data CD that performs compensation to reduce the brightness of the input image data IND. In another embodiment, when the second grayscale value is smaller than the reference grayscale value, the compensation block 500 can generate afterimage compensation data CD that performs compensation to increase the brightness of the input image data IND. In one embodiment, for example, it can be assumed that when the second parameter DDI is greater than 0, the accumulated stress data ASD remains under a bias condition with low brightness. The output image data OUTD can be expressed as having a brightness higher than that of the input image data IND. Therefore, in this case, the afterimage compensation data CD can perform data compensation to reduce the brightness of the input image data IND. In another embodiment, for example, it can be assumed that when the second parameter DDI is less than 0, the accumulated stress data ASD remains under a bias condition with high brightness. The output image data OUTD can be expressed as having a brightness lower than that of the input image data IND. Therefore, in this case, the afterimage compensation data CD can perform data compensation to increase the brightness of the input image data IND.

[0156] When the brightness compensation amount of the afterimage compensation data CD becomes 0, the compensation block 500 can update the reference frame data RFD using the input image data IND to obtain a new reference frame data UD-RFD (S800), so that the new reference frame data UD-RFD can be transmitted to the memory controller 300. Specifically, when the input image data IND and the reference frame data RFD have the same value (e.g., the second grayscale value = the reference grayscale value), the value of the second parameter DDI becomes 0, so the afterimage compensation data CD can have a minimum value (e.g., 0). When the afterimage compensation data CD becomes the minimum value, the compensation block 500 can update the reference frame data RFD using the input image data IND to obtain a new reference frame data UD-RFD. The memory control block 300 can receive the new reference frame data UD-RFD from the compensation block 500 and update the reference frame data RFD with the new reference frame data UD-RFD. The data compensation circuit 10 can repeat the subsequent data compensation operation using the new reference frame data UD-RFD. The data compensation circuit 10 can improve the hysteresis of the first transistor T1 through the aforementioned data compensation. Therefore, the transient afterimage of the display device caused by the hysteresis of the first transistor T1 can be improved.

[0157] Figure 8 This is a block diagram illustrating an embodiment of the data compensation circuit 11 according to the invention. Figure 9A It is used to describe Figure 8 The data compensation circuit 11 generates (i.e., updates) a graph of the reference frame data RFD. Figure 9B It is used to describe Figure 8The data compensation circuit 11 compensates the input image data IND to generate the output image data OUTD.

[0158] Reference Figures 8 to 9B The data compensation circuit 11 may include a reference frame memory device 110, a reference frame data generation block 210, a memory control block 310, and a compensation block 510. Figure 3 Unlike the data compensation circuit 10, the data compensation circuit 11 may not generate stress data SD for each pixel. Therefore, the data compensation circuit 11 may not include components corresponding to the stress data generation block 200 and the accumulated stress memory device 400. Instead, because the data compensation circuit 11 needs to generate (i.e., update) the reference frame data RFD by accumulating the reference frame data RFD in each display frame, the data compensation circuit 11 may include a reference frame data generation block 210 that performs this operation.

[0159] Reference frame memory device 110 can store reference frame data RFD. The reference frame data RFD can be used as a reference for generating afterimage compensation data CD and generating output image data OUTD. The reference frame data RFD can be generated (i.e., updated) by accumulating the reference frame data RFD in each display frame through the reference frame data generation block 210. Specifically, when the i-th reference frame data RFD[i] (where i is an integer greater than or equal to 2) is generated in the i-th display frame, the reference frame memory device 110 can store the i-th reference frame data RFD[i] to replace the (i-1)-th reference frame data RFD[i-1] that exists (or is stored) in the reference frame memory device 110, and the i-th reference frame data RFD[i] can be provided in the (i+1)-th display frame. For example, when a second reference frame data RFD[2] is generated in the second display frame based on the second output image data OUTD[2] and the first reference frame data RFD[1] (wherein the second reference frame data RFD[2] is used to generate the third output image data OUTD[3] in the third display frame), the reference frame memory device 110 can store the second reference frame data RFD[2] instead of the first reference frame data RFD[1] stored in the reference frame memory device 110, and can provide the second reference frame data RFD[2] to the compensation block 510 via the memory control block 310 in the third display frame. Furthermore, when a third reference frame data RFD[3] is generated in the third display frame based on the third output image data OUTD[3] and the second reference frame data RFD[2] (wherein, the third reference frame data RFD[3] is used to generate the fourth output image data OUTD[4] in the fourth display frame), the reference frame memory device 110 can store the third reference frame data RFD[3] instead of the second reference frame data RFD[2] stored in the reference frame memory device 110, and can provide the third reference frame data RFD[3] to the compensation block 510 via the memory control block 310 in the fourth display frame. In an embodiment, the initial reference frame data RFD can be set to 0.

[0160] The reference frame data generation block 210 can generate the i-th reference frame data RFD[i] based on the i-th reference frame data RFD[i-1] generated in the i-th display frame and the i-th output image data OUTD[i] generated in the i-th display frame based on the i-th reference frame data RFD[i-1]. That is, the reference frame data generation block 210 can generate the next reference frame data RFD used in the next display frame based on the current reference frame data RFD used in the current display frame and the current output image data OUTD generated in the current display frame, wherein the current reference frame data RFD was generated in the previous display frame. For example, the second reference frame data RFD[2] can be generated in the second display frame based on the second output image data OUTD[2] and the first reference frame data RFD[1] (and the second reference frame data RFD[2] can be stored in the reference frame memory device 110). Here, the second reference frame data RFD[2] can be used to generate afterimage compensation data CD[3] in the third display frame (and thus generate the third output image data OUTD[3]). Furthermore, the third reference frame data RFD[3] can be generated in the third display frame based on the third output image data OUTD[3] and the second reference frame data RFD[2] (and the third reference frame data RFD[3] can be stored in the reference frame memory device 110). Here, the third reference frame data RFD[3] can be used to generate afterimage compensation data CD[4] in the fourth display frame (and thus generate the fourth output image data OUTD[4]). As described above, the initial reference frame data RFD can be set to 0.

[0161] like Figure 9A As shown, the reference frame data generation block 210 can generate the i-th reference frame data RFD[i] based on the i-1th reference frame data RFD[i-1] generated in the i-1th display frame (i.e., used in the i-th display frame) and the i-th output image data OUTD[i] generated in the i-th display frame based on the i-1th reference frame data RFD[i-1]. Furthermore, the i-th reference frame data RFD[i] generated in the i-th display frame can be stored in the reference frame memory device 110. In an embodiment, for example, in the i-th display frame, the reference frame data generation block 210 can generate the i-th reference frame data RFD[i] according to Equation 8 below.

[0162] [Equation 8]

[0163] RFD[i]=M2*RFD[i-1]+M3*OUTD[i]

[0164] In Equation 8, RFD[i] represents the i-th reference frame data generated in the i-th display frame, RFD[i-1] represents the (i-1)-th reference frame data generated in the (i-1)-th display frame, OUTD[i] represents the i-th output image data generated in the i-th display frame, M2 represents the cumulative correction factor, and M3 represents the brightness correction factor. The cumulative correction factor M2 can be used to determine how much of the (i-1)-th reference frame data RFD[i-1] is reflected when calculating the i-th reference frame data RFD[i]. For example, the cumulative correction factor M2 can be a value less than or equal to 1. Furthermore, the brightness correction factor M3 can be multiplied by the value of the i-th output image data OUTD[i]. For example, various factors affecting brightness (such as emission duty cycle, emission cutoff ratio (e.g., AMOLED pulse drive (AID) cutoff ratio in AID dimming technology)) can be considered to determine the brightness correction factor M3.

[0165] The memory control block 310 can control the reference frame memory device 110. For example, in the i-th display frame, when the reference frame data generation block 210 generates the i-th reference frame data RFD[i], the memory control block 310 can transmit the i-th reference frame data RFD[i] to the reference frame memory device 110, and the reference frame memory device 110 can store the i-th reference frame data RFD[i] to replace the (i-1)-th reference frame data RFD[i-1] stored in the reference frame memory device 110. Furthermore, when the (i+1)-th display frame begins, the memory control block 310 can provide the i-th reference frame data RFD[i] used in the (i+1)-th display frame to the compensation block 510 and the reference frame data generation block 210.

[0166] The compensation block 510 can generate the i-th converted image data CND[i] based on the i-th input image data IND[i] input in the i-th display frame, generate the brightness compensation amount of the afterimage compensation data CD[i] for each pixel based on the i-th converted image data CND[i] and the (i-1)-th reference frame data RFD[i-1], and compensate the brightness of the i-th input image data IND[i] based on the brightness compensation amount of the afterimage compensation data CD[i] to generate the i-th output image data OUTD[i]. For example, the compensation block 510 can derive the brightness decrease amount for each pixel based on the i-th converted image data CND[i] and the (i-1)-th reference frame data RFD[i-1] and generate the afterimage compensation data CD[i] for each pixel by calculating the brightness compensation amount for each pixel corresponding to the brightness decrease amount for each pixel, so as to perform afterimage compensation. Here, when the brightness compensation amount of the afterimage compensation data CD[i] is not 0, the compensation block 510 can compensate the brightness of the i-th input image data IND[i] to generate the i-th output image data OUTD[i]. Specifically, in the i-th display frame, the compensation block 510 can receive the (i-1)-th reference frame data RFD[i-1] from the reference frame memory device 110, generate the i-th converted image data CND[i] based on the i-th input image data IND[i], and generate afterimage compensation data CD[i] for each pixel based on the difference between the reference gray value of the (i-1)-th reference frame data RFD[i-1] and the gray value of the i-th converted image data CND[i]. In an embodiment, for example, compensation block 510 may generate redundant image compensation data CD for each pixel by including an equation or lookup table for calculating redundant image compensation data CD for each pixel, deriving the brightness reduction amount for each pixel by using the equation or lookup table, and calculating the brightness compensation amount for each pixel corresponding to the brightness reduction amount for each pixel, in order to perform redundant image compensation.

[0167] In an embodiment, for example, compensation block 510 can generate the i-th converted image data CND[i] according to Equation 9 below.

[0168] [Equation 9]

[0169] CND[i] = M1 * IND[i]

[0170] In Equation 9, CND[i] represents the i-th converted image data, IND[i] represents the i-th input image data, and M1 represents the data correction factor. For example, the data correction factor M1 can be the value multiplied by the i-th input image data IND[i]. For example, the data correction factor M1 can be proportional to the brightness correction factor M3, which is determined taking into account various factors affecting brightness (such as transmit duty cycle, transmit cutoff ratio, etc.). The brightness correction factor M3 is the value multiplied by the i-th output image data OUTD[i] to generate the i-th reference frame data RFD[i].

[0171] In an embodiment, in the i-th display frame, when the grayscale value of the i-th converted image data CND[i] is greater than the reference grayscale value of the (i-1)-th reference frame data RFD[i-1], the compensation block 510 can generate afterimage compensation data CD[i] that performs compensation to reduce the brightness of the i-th input image data IND[i]. When the grayscale value of the i-th converted image data CND[i] is smaller than the reference grayscale value of the (i-1)-th reference frame data RFD[i-1], the compensation block 510 can generate afterimage compensation data CD[i] that performs compensation to increase the brightness of the i-th input image data IND[i]. And when the grayscale value of the i-th converted image data CND[i] is equal to the reference grayscale value of the (i-1)-th reference frame data RFD[i-1], the compensation block 510 can generate afterimage compensation data CD[i] that does not perform compensation to adjust the brightness of the i-th input image data IND[i]. For example, when the grayscale value of the i-th converted image data CND[i] is greater than the reference grayscale value of the (i-1)-th reference frame data RFD[i-1], the i-th output image data OUTD[i] can be expressed as having a brightness higher than that of the i-th input image data IND[i]. Therefore, in this case, the afterimage compensation data CD[i] can perform data compensation that reduces the brightness of the i-th input image data IND[i]. Furthermore, when the grayscale value of the i-th converted image data CND[i] is smaller than the reference grayscale value of the (i-1)-th reference frame data RFD[i-1], the i-th output image data OUTD[i] can be expressed as having a brightness lower than that of the i-th input image data IND[i]. Therefore, in this case, the afterimage compensation data CD[i] can perform data compensation that increases the brightness of the i-th input image data IND[i]. Furthermore, when the grayscale value of the i-th converted image data CND[i] is equal to the reference grayscale value of the (i-1)-th reference frame data RFD[i-1], the i-th output image data OUTD[i] can be expressed as having a brightness equal to that of the i-th input image data IND[i]. Therefore, in this case, the afterimage compensation data CD[i] does not need to perform data compensation to adjust (i.e., increase or decrease) the brightness of the i-th input image data IND[i].

[0172] In an embodiment, for example, compensation block 510 can generate residual image compensation data CD[i] for each pixel according to equations 10 to 12 below.

[0173] [Equation 10]

[0174] CD[i]=B*MaxCompN*DDI[i],DDI[i]>0

[0175] [Equation 11]

[0176] CD[i]=C*MaxCompP*DDI[i],DDI[i]<0

[0177] [Equation 12]

[0178] CD[i] = 0, DDI[i] = 0

[0179] In Equations 10 to 12, CD[i] represents the afterimage compensation data for each pixel, DDI[i] represents the difference between the reference gray value based on the (i-1)th reference frame data RFD[i-1] and the gray value based on the i-th transformed image data CND[i], and MaxcompN represents the maximum value of the afterimage compensation data CD[i] when DDI[i] > 0 (i.e., Figure 7 As shown in the figure, MaxcompN), MaxcompP represents the maximum value of the superimposed image compensation data CD[i] when DDI[i] < 0 (i.e., Figure 7 In the diagram, MaxcompP represents the afterimage compensation correction factor when DDI[i] > 0, and C represents the afterimage compensation correction factor when DDI[i] < 0. Here, each of the afterimage compensation correction factors B and C can be determined as a value used to perform brightness increase compensation or brightness decrease compensation. Furthermore, each of the maximum values ​​MaxcompN and MaxcompP of the afterimage compensation data CD[i] can be determined as a value used to perform brightness increase compensation or brightness decrease compensation. The compensation block 510 can generate the i-th output image data OUTD[i] by compensating the i-th input image data IND[i] based on the afterimage compensation data CD[i].

[0180] As described above, the data compensation circuit 11 can improve the hysteresis of the first transistor T1 through the aforementioned data compensation. Therefore, the transient afterimage of the display device caused by the hysteresis of the first transistor T1 can be improved. Furthermore, with... Figure 3 The data compensation circuit 11 differs from the data compensation circuit 10 because it does not generate stress data SD for each pixel. Therefore, the data compensation circuit 11 may not include components for generating stress data SD for each pixel, making it more efficient than the data compensation circuit 10.Figure 3 The structure of the data compensation circuit 10 simplifies the structure of the data compensation circuit 11. Furthermore, because the data compensation circuit 11 does not have the load for operating the components used to generate stress data SD for each pixel, the operation of the data compensation circuit 11 is relatively simpler compared to… Figure 3 The operation of the data compensation circuit 10 can be relatively fast.

[0181] Figure 10 This is a block diagram illustrating an embodiment of a display device 600 according to the invention.

[0182] Reference Figure 10 The display device 600 may include a display panel 610 and a display panel driving circuit 620. The display device 600 may be an organic light-emitting display device; however, the display device 600 is not limited thereto.

[0183] Display panel 610 may include pixels P. Pixel P may include red display pixels, green display pixels, and blue display pixels. Display panel driving circuit 620 can drive display panel 610. Display panel driving circuit 620 may include data driving circuit (DDC) 621, scan driving circuit (SDC) 622, data compensation circuit (DCC) 623, and timing control circuit (TCON) 624. Display panel 610 can be connected to data driving circuit 621 via data lines and to scan driving circuit 622 via scan lines. Data driving circuit 621 can provide data signal DS to display panel 610 via data lines. In other words, data driving circuit 621 can provide data signal DS to pixel P. Scan driving circuit 622 can provide scan signal SS to display panel 610 via scan lines. In other words, scan driving circuit 622 can provide scan signal SS to pixel P. Data compensation circuit 623 can generate output image data OUTD corresponding to data signal DS by compensating the input image data IND. The data compensation circuit 623 can perform instantaneous afterimage compensation on the input image data IND. In an embodiment, such as... Figure 10 As shown, the data compensation circuit 623 can be implemented independently outside of the timing control circuit 624, and receives input image data IND generated by an external component (such as a graphics processing unit (“GPU”) through the timing control circuit 624. In another embodiment, the data compensation circuit 623 can be implemented inside the timing control circuit 624, and directly receive the input image data IND generated from the external component. The timing control circuit 624 can control the data driving circuit 621, the scan driving circuit 622, and the data compensation circuit 623 by generating a plurality of control signals CTL1, CTL2, and CTL3 and providing the control signals to the data driving circuit 621, the scan driving circuit 622, and the data compensation circuit 623.

[0184] In an embodiment, the data compensation circuit 623 may include: a reference frame memory device for storing reference frame data; an accumulated stress memory device for storing accumulated stress data for each pixel P; a stress data generation block for comparing output image data OUTD with the reference frame data to generate stress data for each pixel P; a memory control block for adding stress data to the accumulated stress data to update the accumulated stress data; and a compensation block for generating output image data OUTD by generating afterimage compensation data for each pixel P based on the accumulated stress data and compensating the input image data IND based on the afterimage compensation data. The data compensation circuit 623 can improve the hysteresis of the first transistor T1 included in each pixel P through the above data compensation. Therefore, the instantaneous afterimage of the display device 600 caused by the hysteresis of the first transistor T1 can be improved. However, since the reference has been... Figures 3 to 7 These have been described, so repeated descriptions will be omitted.

[0185] In another embodiment, the data compensation circuit 623 may include: a reference frame data generation block that generates i-th reference frame data based on i-th reference frame data generated in the (i-1)th display frame (i.e., used in the i-th display frame) and i-th output image data OUTD generated in the i-th display frame based on the i-th reference frame data; a reference frame memory device that stores the i-th reference frame data when it is generated in the i-th display frame and provides the i-th reference frame data in the i+1th display frame; a memory control block that controls the reference frame memory device; and a compensation block that generates i-th converted image data by generating i-th input image data IND input in the i-th display frame, generating afterimage compensation data for each pixel P by generating afterimage compensation data for each pixel P based on the i-th converted image data and the i-th reference frame data, and compensating the i-th input image data IND based on the afterimage compensation data to generate i-th output image data OUTD. The data compensation circuit 623 can improve the hysteresis of the first transistor T1 included in each pixel P through the above data compensation. Therefore, the transient afterimage of the display device 600 caused by the hysteresis of the first transistor T1 can be improved. However, since it has already been referenced Figures 8 to 9B These have been described, so repeated descriptions will be omitted.

[0186] Figure 11 This is a block diagram illustrating an embodiment of the electronic device 1000 according to the invention. Figure 12 It is shown that Figure 11 The diagram shows an example of an electronic device 1000 implemented as a smartphone.

[0187] Reference Figure 11 and Figure 12Electronic device 1000 may include a processor 1010, a memory device 1020, a storage device 1030, an input / output (“I / O”) device 1040, a power supply 1050, and a display device 1060. In embodiments, for example, electronic device 1000 may also include multiple ports for communicating with video cards, sound cards, memory cards, universal serial bus (“USB”) devices, other electronic devices, etc. In embodiments, such as... Figure 12 As shown, electronic device 1000 can be implemented as a smartphone. However, electronic device 1000 is not limited to this. In embodiments, for example, electronic device 1000 can be implemented as a cellular phone, video phone, smart tablet, smartwatch, tablet personal computer (“PC”), car navigation system, computer monitor, laptop computer, head-mounted display (“HMD”) device, etc.

[0188] Processor 1010 can perform various computing functions. In embodiments, processor 1010 may be, for example, a microprocessor, a central processing unit (“CPU”), an application processor (“AP”), etc. Processor 1010 may be integrated with other components via address buses, control buses, data buses, etc. Furthermore, processor 1010 may be integrated with an expansion bus such as a peripheral component interconnect (“PCI”) bus. Memory device 1020 may store data for the operation of electronic device 1000. In embodiments, for example, memory device 1020 may include at least one non-volatile memory device (such as an erasable programmable read-only memory (“EPROM”) device, an electrically erasable programmable read-only memory (“EEPROM”) device, a flash memory device, a phase-change random access memory (“PRAM”) device, a resistive random access memory (“RRAM”) device, a nanofloating gate memory (“NFGM”) device, a polymer random access memory (“PoRAM”) device, a magnetic random access memory (“MRAM”) device, a ferroelectric random access memory (“FRAM”) device, etc.) and / or at least one volatile memory device (such as a dynamic random access memory (“DRAM”) device, a static random access memory (“SRAM”) device, a mobile DRAM device, etc.). In embodiments, for example, storage device 1030 may include a solid-state drive (“SSD”) device, a hard disk drive (“HDD”) device, a CD-ROM device, etc. In some embodiments, for example, I / O device 1040 may include input devices such as a keyboard, keypad, mouse, touchpad, touchscreen, etc., and output devices such as a printer, speaker, etc. In some embodiments, I / O device 1040 may include display device 1060. Power supply 1050 can provide power for the operation of electronic device 1000.

[0189] The display device 1060 can display an image corresponding to the visual information of the electronic device 1000. The display device 1060 may include: a display panel having a plurality of pixels; a data driving circuit (or data driver) for providing data signals to the display panel; a scan driving circuit (or scan driver) for providing scan signals to the display panel; a data compensation circuit for compensating the input image data to generate output image data corresponding to the data signals; and a timing control circuit (or timing controller) for controlling the data driving circuit, the scan driving circuit, and the data compensation circuit.

[0190] In an embodiment, the data compensation circuit may include: a reference frame memory device for storing reference frame data; an accumulated stress memory device for storing accumulated stress data for each pixel; a stress data generation block for comparing output image data with the reference frame data to generate stress data for each pixel; a memory control block for adding stress data to the accumulated stress data to update the accumulated stress data; and a compensation block for generating output image data by generating afterimage compensation data for each pixel based on the accumulated stress data and compensating the input image data based on the afterimage compensation data. In another embodiment, the data compensation circuit may include: a reference frame data generation block that generates i-th reference frame data based on i-th reference frame data generated in the (i-1)th display frame (i.e., used in the i-th display frame) and i-th output image data generated in the i-th display frame based on the i-th reference frame data; a reference frame memory device that stores the i-th reference frame data when it is generated in the i-th display frame and provides the i-th reference frame data in the (i+1)th display frame; a memory control block that controls the reference frame memory device; and a compensation block that generates i-th converted image data by generating i-th input image data based on i-th input image data input in the i-th display frame, generating afterimage compensation data for each pixel based on the i-th converted image data and the i-th reference frame data, and compensating the i-th input image data based on the afterimage compensation data to generate i-th output image data. The display device 1060 in the embodiments of the invention may include a data compensation circuit that can improve the hysteresis of the first transistor included in each pixel, thereby improving the transient afterimage of the display device 1060 caused by the hysteresis of the first transistor. However, since these have been described above, there will be no further repetition of related descriptions.

[0191] This invention can be applied to display devices and electronic devices that include display devices. For example, the invention can be applied to cellular phones, smartphones, video phones, smart tablets, smartwatches, tablet PCs, car navigation systems, televisions, computer monitors, laptop computers, head-mounted display (HMD) devices, MP3 players, etc.

[0192] The foregoing is illustrative of the invention and should not be construed as limiting it. Although some embodiments of the invention have been described, it will be readily understood by those skilled in the art that many modifications are possible in the embodiments without substantially departing from the novel teachings and advantages of the invention. Therefore, all such modifications are intended to be included within the scope of the invention as defined in the claims. It should therefore be understood that the foregoing is illustrative of the invention and should not be construed as limiting it to the disclosed predetermined embodiments, and modifications can be made to the disclosed embodiments as well as other embodiments.

Claims

1. A data compensation circuit for a pixel, the data compensation circuit comprising: Reference frame memory device for storing reference frame data; An accumulated stress memory device for storing accumulated stress data for each of the pixels; The stress data generation block compares the output image data with the reference frame data and generates stress data for each pixel in the pixel. The memory control block adds the stress data to the accumulated stress data and updates the accumulated stress data. as well as The compensation block generates the output image data by generating afterimage compensation data for each pixel in the pixel based on the accumulated stress data and compensating the input image data based on the afterimage compensation data. The stress data was generated taking into account conditions including time, temperature, brightness, and current. The stress data generation block generates stress data by calculating the stress for each pixel in the pixel based on the difference between a first grayscale value of the output image data and a reference grayscale value of the reference frame data. The stress data decreases as the difference between the first gray value and the reference gray value increases.

2. The data compensation circuit according to claim 1, wherein, The stress data is calculated using the following Equation 1: SD=A1 [(-MaxStress / ZeroStX) A0 DDO+MaxStress], Wherein, SD represents the stress data, A0 and A1 represent stress correction factors, DDO represents the difference between the first gray value and the reference gray value, MaxStress represents the maximum value of the stress data, and ZeroStX represents the value of DDO when the stress data is 0.

3. The data compensation circuit according to claim 1, wherein, The stress data has a maximum value when the first gray value and the reference gray value are equal to each other.

4. The data compensation circuit according to claim 1, wherein, The cumulative stress data increases proportionally to the duration during which the difference between the first grayscale value and the reference grayscale value is maintained.

5. The data compensation circuit according to claim 4, wherein, The compensation block determines the brightness compensation amount of the afterimage compensation data based on the difference between the reference gray value and the second gray value according to the input image data and the cumulative stress data.

6. The data compensation circuit according to claim 5, wherein, When the second gray value is greater than the reference gray value, the compensation block generates the afterimage compensation data to perform compensation that reduces the brightness of the input image data.

7. The data compensation circuit according to claim 5, wherein, When the second gray value is smaller than the reference gray value, the compensation block generates afterimage compensation data that performs compensation to increase the brightness of the input image data.

8. The data compensation circuit according to claim 5, wherein, When the brightness compensation amount of the afterimage compensation data becomes 0, the compensation block updates the reference frame data using the input image data.

9. The data compensation circuit according to claim 5, wherein, The stress data generation block calculates a brightness correction constant by using brightness data that reflects the input image data, and generates brightness correction stress data based on the brightness correction constant.

10. A display device, the display device comprising: Display panel, including pixels; The data driving circuit provides data signals to the display panel; A scan drive circuit provides a scan signal to the display panel; A data compensation circuit compensates input image data and generates output image data corresponding to the data signal. The data compensation circuit includes: a reference frame memory device for storing reference frame data; an accumulated stress memory device for storing accumulated stress data for each pixel; a stress data generation block for comparing the output image data with the reference frame data and generating stress data for each pixel; a memory control block for adding the stress data to the accumulated stress data and updating the accumulated stress data; and a compensation block for generating the output image data by generating afterimage compensation data for each pixel based on the accumulated stress data and compensating the input image data based on the afterimage compensation data. The timing control circuit controls the data driving circuit, the scan driving circuit, and the data compensation circuit. The stress data was generated taking into account conditions including time, temperature, brightness, and current. The stress data generation block generates stress data by calculating the stress for each pixel in the pixel based on the difference between a first grayscale value of the output image data and a reference grayscale value of the reference frame data. The stress data decreases as the difference between the first gray value and the reference gray value increases.

11. The display device according to claim 10, wherein, The stress data has a maximum value when the first gray value and the reference gray value are equal to each other.

12. The display device according to claim 10, wherein, The cumulative stress data increases proportionally to the duration during which the difference between the first grayscale value and the reference grayscale value is maintained.

13. The display device according to claim 12, wherein, The compensation block determines the brightness compensation amount of the afterimage compensation data based on the difference between the reference gray value and the second gray value according to the input image data and the cumulative stress data.

14. The display device according to claim 13, wherein, When the brightness compensation amount of the afterimage compensation data becomes 0, the compensation block updates the reference frame data using the input image data.

15. The display device according to claim 13, wherein, The stress data generation block calculates a brightness correction constant by using brightness data that reflects the input image data, and generates brightness correction stress data based on the brightness correction constant.

16. A method for compensating data, the method comprising: Store reference frame data; Stores cumulative stress data for each pixel in the pixel array; The output image data is compared with the reference frame data; Generate stress data for each pixel in the pixel array; Add the stress data to the accumulated stress data; Update the accumulated stress data; Based on the accumulated stress data, afterimage compensation data is generated for each pixel in the pixel; as well as The output image data is generated by compensating for the brightness of the input image data based on the afterimage compensation data. The stress data was generated taking into account conditions including time, temperature, brightness, and current. The step of generating the stress data includes: calculating the stress for each pixel in the pixel based on the difference between a first grayscale value of the output image data and a reference grayscale value of the reference frame data, and generating the stress data. The stress data decreases as the difference between the first gray value and the reference gray value increases.

17. The method according to claim 16, wherein, The steps for generating the afterimage compensation data include: The brightness compensation amount of the afterimage compensation data is determined based on the difference between the reference gray value and the second gray value according to the input image data, and the cumulative stress data; and When the brightness compensation amount of the afterimage compensation data becomes 0, the reference frame data is updated using the input image data.

18. A data compensation circuit for a pixel, the data compensation circuit comprising: The reference frame data generation block generates the i-th reference frame data based on the i-th reference frame data generated in the i-th display frame and the i-th output image data generated in the i-th display frame based on the i-th reference frame data, where i is an integer greater than or equal to 2; A reference frame memory device that stores the i-th reference frame data when the i-th reference frame data is generated in the i-th display frame, and provides the i-th reference frame data in the (i+1)-th display frame; The memory control block controls the reference frame memory device; and The compensation block generates the i-th output image data by generating i-th transformed image data based on i-th input image data input in the i-th display frame, generating afterimage compensation data for each pixel in the pixel based on the i-th transformed image data and the (i-1)-th reference frame data, and compensating the i-th input image data based on the afterimage compensation data. The residual image compensation data decreases as the difference between the reference gray value based on the (i-1)th reference frame data and the gray value based on the i-th converted image data increases.

19. The data compensation circuit according to claim 18, wherein, The i-th transformed image data is calculated using the following Equation 2: CND[i]=M1 IND[i], Where CND[i] represents the i-th converted image data, IND[i] represents the i-th input image data, and M1 represents the data correction factor.

20. The data compensation circuit according to claim 18, wherein, The i-th reference frame data is calculated using the following equation 3: RFD[i]=M2 RFD[i-1]+M3 OUTD[i], Wherein, RFD[i] represents the i-th reference frame data generated in the i-th display frame, RFD[i-1] represents the (i-1)-th reference frame data generated in the (i-1)-th display frame, OUTD[i] represents the i-th output image data generated in the i-th display frame, M2 represents the cumulative correction factor, and M3 represents the brightness correction factor.

21. The data compensation circuit according to claim 18, wherein, The compensation block determines the brightness compensation amount of the afterimage compensation data based on the difference between the reference gray value of the (i-1)th reference frame data and the gray value of the i-th converted image data.

22. The data compensation circuit according to claim 21, wherein: When the grayscale value is greater than the reference grayscale value, the compensation block generates afterimage compensation data that reduces the brightness of the i-th input image data. When the grayscale value is smaller than the reference grayscale value, the compensation block generates afterimage compensation data that performs compensation to increase the brightness of the i-th input image data, and When the grayscale value is equal to the reference grayscale value, the compensation block generates the afterimage compensation data without performing compensation to adjust the brightness of the i-th input image data.

23. The data compensation circuit according to claim 22, wherein, The afterimage compensation data is generated by Equations 4 to 6 as set in sequence below: CD[i]=B MaxCompN DDI[i], DDI[i]>0, CD[i]=C MaxCompP DDI[i], DDI[i]<0, and so on CD[i]=0, DDI[i]=0, Wherein, CD[i] represents the afterimage compensation data, DDI[i] represents the difference between the reference gray value based on the (i-1)th reference frame data and the gray value based on the i-th converted image data, MaxcompN represents the maximum value of the afterimage compensation data when DDI[i]>0, MaxcompP represents the maximum value of the afterimage compensation data when DDI[i]<0, B represents the afterimage compensation correction factor when DDI[i]>0, and C represents the afterimage compensation correction factor when DDI[i]<0.

24. A display device, the display device comprising: Display panel, including pixels; The data driving circuit provides data signals to the display panel; A scan drive circuit provides a scan signal to the display panel; A data compensation circuit compensates input image data and generates output image data corresponding to the data signal. The data compensation circuit includes: a reference frame data generation block, which generates i-th reference frame data based on i-th reference frame data generated in the (i-1)th display frame and i-th output image data generated in the i-th display frame based on the i-th reference frame data, where i is an integer greater than or equal to 2; a reference frame memory device, which stores the i-th reference frame data when it is generated in the i-th display frame and provides it in the (i+1)th display frame; a memory control block, which controls the reference frame memory device; and a compensation block, which generates i-th converted image data based on i-th input image data input in the i-th display frame, generates afterimage compensation data for each pixel based on the i-th converted image data and the (i-1)th reference frame data, and generates the i-th output image data by compensating the i-th input image data based on the afterimage compensation data; and... The timing control circuit controls the data driving circuit, the scan driving circuit, and the data compensation circuit. The residual image compensation data decreases as the difference between the reference gray value based on the (i-1)th reference frame data and the gray value based on the i-th converted image data increases.

25. The display device according to claim 24, wherein, The i-th transformed image data is calculated using the following Equation 2: CND[i]=M1 IND[i], Where CND[i] represents the i-th converted image data, IND[i] represents the i-th input image data, and M1 represents the data correction factor.

26. The display device according to claim 24, wherein, The i-th reference frame data is calculated using the following equation 3: RFD[i]=M2 RFD[i-1]+M3 OUTD[i], Wherein, RFD[i] represents the i-th reference frame data generated in the i-th display frame, RFD[i-1] represents the i-1 reference frame data generated in the (i-1)-th display frame, OUTD[i] represents the i-th output image data generated in the i-th display frame, M2 represents the cumulative correction factor, and M3 represents the brightness correction factor.

27. The display device according to claim 24, wherein, The afterimage compensation data is generated by Equations 4 to 6 as set in sequence below: CD[i]=B MaxCompN DDI[i], DDI[i]>0, CD[i]=C MaxCompP DDI[i], DDI[i]<0, and so on CD[i]=0, DDI[i]=0, Wherein, CD[i] represents the afterimage compensation data, DDI[i] represents the difference between the reference gray value based on the (i-1)th reference frame data and the gray value based on the i-th converted image data, MaxcompN represents the maximum value of the afterimage compensation data when DDI[i]>0, MaxcompP represents the maximum value of the afterimage compensation data when DDI[i]<0, B represents the afterimage compensation correction factor when DDI[i]>0, and C represents the afterimage compensation correction factor when DDI[i]<0.

Images