Display panel and display device comprising the same

Abstract

The present disclosure relates to a display panel and a display device including the same. A display panel is provided, including a display area including a first pixel area in which a plurality of pixels are disposed, and an image capturing area including a second pixel area in which a plurality of pixel groups are disposed, and a plurality of light-transmissive portions disposed between the pixel groups. The light-transmissive portions are disposed along a virtual spiral reference line extending outwardly from a center of the image capturing area, and a size of the light-transmissive portions increases as a distance from the center of the image capturing area increases.

Description

Technical Field

[0001] This disclosure relates to a display panel and a display device including the display panel, the display panel including an image capture area having pixels disposed therein for displaying an image. Background Technology

[0002] Based on the material of the light-emitting layer, light-emitting display devices are classified into inorganic light-emitting display devices and organic light-emitting display devices. Active-matrix organic light-emitting display devices include organic light-emitting diodes (OLEDs) that emit their own light, and possess advantages such as high response speed, high brightness, and wide viewing angle. In OLED display devices, an OLED is formed in each pixel. Because OLED display devices not only have high response speed, excellent luminous efficiency, excellent brightness, and excellent viewing angle, but also can display black grayscale levels with pure black, their contrast ratio and color gamut are excellent.

[0003] Meanwhile, the multimedia capabilities of mobile devices are improving. For example, cameras are now largely embedded in smartphones, and camera resolution is increasing to match that of existing digital cameras. However, the front-facing camera on smartphones imposes limitations on screen design, making screen design difficult. To reduce the space occupied by the camera, smartphones have adopted screen designs including notches or punch-holes, but screen size is still limited by the camera, preventing full-screen displays.

[0004] To achieve full-screen display, the following method is proposed: An image capture area is provided within the screen of the display panel, where low-resolution pixels are set, and a camera is placed below the display panel, opposite the image capture area. The image capture area on the screen operates as a transparent display for showing the image. Since interference fringes appear in the image captured through such an image capture area, image quality may need to be improved. Summary of the Invention

[0005] The purpose of this disclosure is to address the aforementioned problems and / or other limitations associated with the prior art.

[0006] This disclosure provides a display panel capable of improving the quality of images captured by an imaging device, and a display device including the display panel.

[0007] The problems to be solved or addressed in the implementation of this disclosure are not limited to those described herein, and may also include purposes and effects that can be identified from solutions or manifestations of the following problems.

[0008] In a display panel according to an embodiment of the present disclosure, the display panel includes: a display area including a first pixel area in which a plurality of pixels are disposed; and an image capture area including: a second pixel area in which a plurality of pixel groups are disposed; and a light-transmitting portion disposed between the pixel groups, wherein the light-transmitting portion is disposed along a virtual spiral reference line extending outward from the center of the image capture area, and the size of the light-transmitting portion increases with the distance from the center of the image capture area.

[0009] Virtual spiral reference lines can include Fibonacci spirals.

[0010] Each of the light-transmitting parts can be circular or elliptical in shape.

[0011] Each of the first pixel region and the second pixel region may include: a light-shielding layer; and a metal layer having a higher absorption coefficient relative to a specific wavelength of the laser beam than the light-shielding layer. The light-shielding layer may include a metal film or an inorganic film, and the light-shielding layer may be removed from the light-transmitting area of ​​the image capture area to expose the light-transmitting portion. The metal layer may be removed from the light-transmitting area of ​​the image capture area to expose the light-transmitting portion.

[0012] At least one of the light-transmitting portions may include an overlapping area that overlaps with the pixel group. The light-shielding layer may not be removed from the overlapping area.

[0013] At least some of the light-transmitting portions may include overlapping areas that overlap with the pixel group, and the metal layer may not be removed from the overlapping areas.

[0014] The light-shielding layer may include molybdenum (Mo) or amorphous silicon (a-Si), and the metal layer may include magnesium (Mg).

[0015] The first pixel region and the second pixel region may include a circuit layer on the substrate and a light-emitting element layer on the circuit layer. A light-shielding layer may be disposed in the circuit layer.

[0016] The circuit layer may include transistors that are connected to the light-emitting elements of the light-emitting element layer, and the light-shielding layer may be disposed between the inorganic insulating layers below the transistors.

[0017] Each of the pixel areas in the display area and the image capture area may also include a light-shielding pattern disposed between the light-shielding layer and the transistor, and the light-shielding pattern may include metal.

[0018] The first pixel area can have a higher pixel per inch (PPI) than the second pixel area.

[0019] In another embodiment of the display device according to the present disclosure, the display device includes: a display panel including: a display area including a first pixel area in which a plurality of pixels are disposed; and an image capture area including: a second pixel area in which a plurality of pixel groups are disposed; and a light-transmitting portion disposed between the pixel groups; a cover glass configured to cover the display panel; and an imaging element module disposed below the display panel and opposite to the image capture area, wherein the light-transmitting portion is disposed along a virtual spiral reference line extending outward from the center of the image capture area, and the size of the light-transmitting portion increases with the distance from the center of the image capture area.

[0020] Virtual spiral reference lines can include Fibonacci spirals.

[0021] Each of the light-transmitting parts can be circular or elliptical in shape.

[0022] Each of the first pixel region and the second pixel region may include: a light-shielding layer; and a metal layer having a higher absorption coefficient relative to a specific wavelength of the laser beam than the light-shielding layer. The light-shielding layer may include a metal film or an inorganic film and may be removed from the light-transmitting area of ​​the image capture area to expose the light-transmitting portion. The metal layer may be removed from the light-transmitting area of ​​the image capture area to expose the light-transmitting portion.

[0023] At least one of the light-transmitting portions may include an overlapping area that overlaps with the pixel group, and the light-shielding layer and the metal layer may not be removed from the overlapping area.

[0024] The first pixel region and the second pixel region may include a circuit layer on the substrate and a light-emitting element layer on the circuit layer. The light-shielding layer may be located within the circuit layer.

[0025] The circuit layer may include transistors that are connected to the light-emitting elements of the light-emitting element layer, and light-shielding layers are disposed between the inorganic insulating layers below the transistors.

[0026] Each of the pixel areas in the display area and the image capture area may also include a light-shielding pattern disposed between the light-shielding layer and the transistor, and the light-shielding pattern may include metal.

[0027] The first pixel area can have a higher pixel per inch (PPI) than the second pixel area.

[0028] This disclosure aims to remove interference fringes that may appear in captured images by randomly arranging the light-transmitting parts.

[0029] This disclosure also aims to effectively achieve full-screen display.

[0030] The effects of this disclosure are not limited to those described above, and those skilled in the art will clearly understand other effects not described in the claims. Attached Figure Description

[0031] The accompanying drawings, which are included and incorporated into and form part of this specification to provide a further understanding of this disclosure, illustrate embodiments of the disclosure and, together with the specification, serve to explain the principles of the disclosure. In the drawings:

[0032] Figure 1 This is a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure;

[0033] Figure 2 This is a plan view showing a portion of the sensor area and the main display area in a display device according to an embodiment of the present disclosure;

[0034] Figure 3 This is a diagram illustrating an example of pixel arrangement in the display area (DA);

[0035] Figure 4 This is a diagram showing an example of pixels and light-transmitting areas in the image capture area (CA);

[0036] Figure 5 This is a diagram showing the arrangement of the light-transmitting portion (AG) and the pixel group (PG);

[0037] Figure 6 It is shown Figure 5 A diagram showing the arrangement of the light-transmitting portion (AG) in the image;

[0038] Figure 7 It is shown Figure 5 A diagram showing the overlapping portion of the light-transmitting part (AG) and the pixel group (PG);

[0039] Figure 8 This is a diagram showing the cross-sectional structure of a display panel according to an embodiment of the present disclosure and the laser beam emitted during laser ablation;

[0040] Figures 9 to 11 This is a diagram illustrating various laser beam points according to embodiments of this disclosure;

[0041] Figure 12 It is an image of a captured image showing interference fringes;

[0042] Figure 13 It is an image of the captured image from which interference fringes have been removed;

[0043] Figure 14 This is a block diagram illustrating a display panel and a display panel driver according to an embodiment of the present disclosure;

[0044] Figure 15 It is a block diagram schematically showing the configuration of the driver integrated circuit (IC);

[0045] Figure 16 This is a circuit diagram showing an example of a pixel circuit;

[0046] Figure 17 This is a circuit diagram showing another example of a pixel circuit;

[0047] Figure 18 It is shown Figure 16 and Figure 17 The timing diagram shows the operation method of the pixel circuit.

[0048] Figure 19 It is a cross-sectional view showing in detail the structure of the pixel area in a display panel according to an embodiment of the present disclosure;

[0049] Figure 20 and Figure 21 This is a cross-sectional view showing the light-shielding layer of the pixel area and the light-transmitting portion of the image capture area in the structure of a display panel according to various embodiments of the present disclosure;

[0050] Figure 22 This is a cross-sectional view showing an example of an insulating layer that can be removed from the light-transmitting portion of the image capture area; and

[0051] Figure 23 This is a diagram illustrating an example of multiple sensor modules arranged in an image capture area. Detailed Implementation

[0052] The following detailed description of the embodiments, together with the accompanying drawings, shall be followed. Figure 1 From this point onward, the advantages and features of this disclosure and how to implement them will become apparent. However, this disclosure is not limited to the embodiments disclosed below and can be implemented in various forms. These embodiments are provided so that this disclosure will be described in detail and completely, and will fully convey the scope of this disclosure to those skilled in the art to which this disclosure pertains. This disclosure is defined only by the scope of the claims.

[0053] The shapes, sizes, ratios, angles, numbers, etc., shown in the accompanying drawings to illustrate embodiments of this disclosure are merely exemplary, and this disclosure is not limited thereto. Throughout the document, the same reference numerals designate the same elements. In the following description, detailed descriptions of well-known functions or configurations associated with this document may be omitted or may be provided briefly when determined to unnecessarily obscure the essential points of this disclosure.

[0054] In this disclosure, when terms such as “comprising,” “having,” and “compose” are used, additional components may be added unless “only” is used. A singular expression may include a plural expression as long as the singular expression does not have a significantly different meaning in the context.

[0055] In the explanation of components, even if not specifically stated, it is understood that a range of error is included.

[0056] In the description of positional relationships, when a structure is described as being "above or above", "below or below", or "beside" another structure, the description should be interpreted to include situations where the structures are in contact with each other and where a third structure is situated between them.

[0057] The terms "first," "second," etc., can be used to describe various components, but components are not limited by such terms. Terms are used only for the purpose of distinguishing one component from others. For example, without departing from the scope of this disclosure, a first component may be designated as a second component.

[0058] Features of various embodiments of this disclosure can be combined partially or completely with each other, and can be technically interlocked in various ways. Embodiments can be implemented independently or in combination with each other.

[0059] In the following, various embodiments of this disclosure will be described in detail with reference to the accompanying drawings. All components of each display panel and each display device according to all embodiments of this disclosure are operatively coupled and configured.

[0060] Figure 1 This is a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure.

[0061] Figure 2 This is a plan view showing a portion of the sensor area and the main display area in a display device according to an embodiment of the present disclosure.

[0062] Reference Figure 1 and Figure 2 The display device 1 includes a display panel 100 and an imaging element module 30 disposed below the display panel 100. More specifically, the display panel 100 may include an image capture area CA, and the imaging element module 30 may be located below the image capture area CA.

[0063] The display area DA and the image capture area CA each comprise a pixel array in which pixels P are arranged, and pixel data is written to pixels P. To ensure the transmittance of the image capture area CA, the number of pixels per unit area of ​​the image capture area CA, for example, pixels per inch (PPI), is less than the number of pixels per unit area of ​​the display area DA.

[0064] The pixel array of the display area DA includes a pixel region (first pixel region) in which multiple pixels are arranged with a high PPI. The pixel array of the image capture area CA includes a pixel region (second pixel region) in which multiple pixels are arranged with a relatively low PPI because the pixels are spaced apart from each other by light-transmitting portions. In the image capture area CA, external light can pass through the display panel 100 through the light-transmitting portions with high transmittance to be incident on the imaging element module 30 below the display panel 100.

[0065] Since the display area DA and the image capture area CA include pixel P, the input image is displayed in the display area DA and the image capture area CA.

[0066] Each pixel in pixel P within the display area DA and the image capture area CA includes subpixels of different colors to display image colors. These subpixels include red (R) subpixels, green (G) subpixels, and blue (B) subpixels. Each pixel in pixel P may also include a white (W) subpixel. Each subpixel may include pixel circuitry and a light-emitting element (organic light-emitting diode (OLED)).

[0067] The image capture area CA includes pixels and an imaging element module 30 disposed below the screen of the display panel 100. In display mode, pixel data of the input image is written to pixel P in the image capture area CA, and pixel P displays the input image. In image capture mode, the imaging element module 30 captures external images and outputs picture or video image data. The imaging element module 30 is opposite to the image capture area CA. In other words, when viewed from the front of the display device, the imaging element module 30 can overlap with the image capture area CA. External light is incident on the imaging element module 30 through the image capture area CA, and the imaging element module 30 focuses the light onto the image sensor.

[0068] An image quality compensation algorithm can be applied to ensure transmittance. This algorithm is used to compensate for the brightness and color coordinates of pixel P in the image capture region CA due to pixels removed from the image capture region CA.

[0069] Because low-resolution pixels are arranged in the image capture area CA, the display area of ​​the screen is not limited by the imaging element module. Therefore, this disclosure enables full-screen display.

[0070] The display panel 100 has a width in the X-axis direction, a length in the Y-axis direction, and a thickness in the Z-axis direction. The display panel 100 includes a circuit layer 12 disposed on a substrate 10 and a light-emitting element layer 14 disposed on the circuit layer 12. A polarizer 18 may be disposed on the light-emitting element layer 14, and a cover glass 20 may be disposed on the polarizer 18.

[0071] Circuit layer 12 may include pixel circuitry connected to interconnects such as data lines, gate lines, and power lines, gate drivers connected to the gate lines, etc. Circuit layer 12 may include circuit elements such as transistors implemented as thin-film transistors (TFTs) and capacitors. Interconnects and circuit elements may be implemented using multiple insulating layers, two or more metal layers, and active layers comprising semiconductor materials, wherein the two or more metal layers are separated by insulating layers inserted therebetween.

[0072] The light-emitting element layer 14 may include light-emitting elements driven by pixel circuitry. The light-emitting element may be implemented as an OLED. The OLED includes an organic compound layer formed between an anode and a cathode. The organic compound layer may include, but is not limited to, a hole injection layer (HIL), a hole transport layer (HTL), an emissive layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). When a voltage is applied to the anode and cathode of the OLED, holes passing through the HTL and electrons passing through the ETL move to the EML and form excitons, causing visible light to be emitted from the EML. The light-emitting element layer 14 may be disposed on pixels that selectively transmit red, green, and blue wavelengths, and may also include a color filter array.

[0073] The light-emitting element layer 14 can be covered by a protective film, which can in turn be covered by an encapsulation layer. The protective film and encapsulation layer can have a structure obtained by alternately depositing organic and inorganic films. The inorganic film prevents the penetration of moisture or oxygen. The organic film smooths the surface of the inorganic film. When the organic and inorganic films are repeatedly stacked, the path for moisture or oxygen becomes longer compared to the case of a single layer. Therefore, the penetration of moisture or oxygen affecting the light-emitting element layer 14 can be effectively prevented.

[0074] The polarizer 18 can be adhered to the encapsulation layer. The polarizer 18 improves the outdoor visibility of the display device. The polarizer 18 increases pixel brightness by reducing light reflected from the surface of the display panel 100 and blocking light reflected from the metal of the circuit layer 12. The polarizer 18 can be implemented as a polarizer in which a linear polarizer and a phase retardation film are bonded together, or it can be implemented as a circular polarizer.

[0075] In the display panel of this disclosure, each pixel region of the display area DA and the image capture area CA includes a light-shielding layer. The light-shielding layer is removed from the light-transmitting portion of the image capture area CA to define the light-transmitting portion. The light-shielding layer includes an opening corresponding to the light-transmitting portion. The light-shielding layer is removed from the opening. The light-shielding layer is formed of a metal or inorganic film, and the metal or inorganic film has a lower absorption coefficient than the metal removed from the light-transmitting portion, with respect to the wavelength of the laser beam used in the laser ablation process to remove the metal layer present in the light-transmitting portion.

[0076] Figure 3 This is a diagram showing an example of the pixel arrangement in the display area DA.

[0077] Figure 4 This is a diagram showing an example of pixels and light-transmitting areas in the image capture region CA.

[0078] exist Figure 3 and Figure 4 In this text, the interconnects connecting to pixels are omitted in order to focus on the features being described.

[0079] The following will refer to Figure 3 and Figure 4 The pixel arrangement of a display device according to embodiments of the present disclosure is described.

[0080] Reference Figure 3 The display area DA comprises pixels PIX1 and PIX2 arranged with a high PPI. Each pixel in PIX1 and PIX2 can be implemented as a real-type pixel including R sub-pixels, G sub-pixels, and B sub-pixels, where R, G, and B are the three primary colors. Each pixel in PIX1 and PIX2 may also include a W sub-pixel. Furthermore, a pixel rendering algorithm can be used to construct a pixel with two sub-pixels. For example, a pixel rendering algorithm can be used to construct a first pixel PIX1 with R and G sub-pixels, and a second pixel PIX2 with B and G sub-pixels. The pixel rendering algorithm can compensate for the lack of color representation in each pixel in PIX1 and PIX2 using the average color data of adjacent pixels.

[0081] Reference Figure 4The image capture area CA includes pixel groups PG spaced a certain distance from each other and a light-transmitting portion AG disposed between adjacent pixel groups PG. External light is incident on the lens of the sensor module through the light-transmitting portion AG. The light-transmitting portion AG may include a metal-free transparent medium with high transmittance, allowing light to enter with minimal light loss. In other words, the light-transmitting portion AG may not include metal interconnects or pixels and may be made of a transparent insulating material. Due to the light-transmitting portion AG, the image capture area CA can have a lower PPI than the display area DA. The larger the light-transmitting portion AG, the higher the transmittance of the image capture area CA.

[0082] A pixel group PG within an image capture region CA can include one or two pixels. Each pixel in a pixel group PG can include two to four sub-pixels. For example, a pixel in a pixel group PG can include an R sub-pixel, a G sub-pixel, and a B sub-pixel, or two sub-pixels, and may also include a W sub-pixel. Figure 4 In the example, the first pixel PIX1 may include R sub-pixels and G sub-pixels, and the second pixel PIX2 may include B sub-pixels and G sub-pixels. However, the first pixel PIX1 and the second pixel PIX2 are not limited to this example.

[0083] exist Figure 4 In the diagram, the light-transmitting portion AG is shown as a circular shape, but it is not limited to this. For example, the light-transmitting portion AG can be designed in various shapes, such as circles, ellipses, and polygons.

[0084] To minimize optical loss, all metal electrode material can be removed from the light-transmitting area AG. According to the display panel manufacturing method, the metal used for the cathode can be uniformly deposited across the entire screen, and then the cathode layer can be removed from the light-transmitting area CA of the image capture region during laser ablation. The laser ablation process will be described in detail below.

[0085] The following will refer to Figures 5 to 7 Describe the specific arrangement of the light-transmitting parts.

[0086] Figure 5 This diagram shows the arrangement of the light-transmitting portion AG and the pixel group PG.

[0087] Figure 6 It is shown Figure 5 A diagram showing the arrangement of the light-transmitting AG section in the image.

[0088] Figure 7 It is shown Figure 5 The image shows the overlapping portion of the light-transmitting part AG and the pixel group PG.

[0089] Reference Figure 5The display panel according to the embodiment may include regularly arranged pixel groups PG and randomly arranged light-transmitting portions AG. The pixel groups PG may be arranged regularly at regular intervals. The light-transmitting portions AG may be disposed between the pixel groups PG. The light-transmitting portions AG may partially overlap with the pixel groups PG.

[0090] like Figure 6 As shown, the light-transmitting portion AG can be randomly arranged based on the center O of the image capture area. In one embodiment, the light-transmitting portion AG can be arranged along a Fibonacci spiral L based on the center O of the image capture area. Each Fibonacci spiral L is a virtual line used to guide the arrangement of the light-transmitting portion AG and may not actually be visible in the product. The distance from the starting point of the Fibonacci spiral L to the center O of the image capture area may vary from one another. Furthermore, the light-transmitting portion AG formed along the Fibonacci spiral L can have a larger diameter as it is positioned further away from the center O, but the diameter of the light-transmitting portion AG is not limited to this. The light-transmitting portion AG can have a circular shape, but is not limited to this as described above.

[0091] The Fibonacci equation is Here, a is any positive real number, n is a positive integer, and b is a constant value of 137.5°.

[0092] Reference Figure 7 The light-transmitting portion AG may include an overlapping area OAG that overlaps with the pixel group PG. Figure 7 The metallic material present in the overlapping region OAG of the shaded lines can be left unremoved. In other words, the metallic material of the cathode, etc., can be left unremoved from the overlapping region OAG used for light emission. When the metallic material, such as in the cathode layer, is removed, no light is emitted. The metallic material can be removed by a laser ablation process, which will be described below.

[0093] The following will refer to Figures 8 to 11 The process of forming the light-transmitting portion is described. As an example, the process of forming the light-transmitting portion by laser ablation will be described below, but this disclosure is not limited thereto.

[0094] Figure 8 This is a diagram showing the cross-sectional structure of a display panel 100 according to an embodiment of the present disclosure and the laser beam emitted during laser ablation.

[0095] Reference Figure 8 The display panel 100 includes a light-shielding layer LS that blocks the laser beam and a metal layer ML that is exposed to the laser beam through an opening OP obtained by removing the light-shielding layer LS.

[0096] A light-shielding layer LS is deposited over the entire display area DA and image capture area CA, and then patterned in a photolithography process. The light-shielding layer LS is formed over the entire display area DA and image capture area CA, or at least over the pixel areas of the display area DA and image capture area CA, and is removed from the aperture region that exposes the light-transmitting portion AG of the image capture area CA to define the aperture OP. The aperture OP may not be formed on... Figure 7 The overlapping area OAG of the light-shielding layer LS is shown—for example, the area where the light-transmitting portion AG overlaps with the pixel group PG. This is because the metal layer ML should not be removed from the overlapping area OAG. The pixel area refers to the region where pixels PIX1 and PIX2 are arranged in each of the display area DA and the image capture area CA.

[0097] The metal layer ML is any of the metal layers required for pixel driving of the display panel 100 and should be removed from the light-transmitting portion AG of the image capture area CA. For example, the metal layer ML may be formed in a cathode material layer or another layer. When the metal layer ML is a metal that should be partially removed during laser ablation, the wavelength of the laser beam LB is determined in the wavelength band where the metal has a high absorption coefficient.

[0098] The light-shielding layer LS protects the metal layer ML, excluding the light-transmitting area of ​​the image capture region CA, from the laser beam LB generated during laser ablation. For this purpose, the metal layer ML is selected from materials with a low absorption coefficient at the wavelength of the laser beam LB.

[0099] When the metal layer ML is a Mg-Ag alloy thin film layer used as a cathode material, Mg has a high absorption coefficient at a wavelength of 1064 nm. On the other hand, amorphous silicon (a-Si) or molybdenum (Mo) has a low absorption coefficient at a wavelength of 1064 nm. Therefore, when the Mg-Ag alloy thin film layer is removed using a laser beam LB with a wavelength of 1064 nm, the light-shielding layer LS used to protect the Mg-Ag alloy layer in areas other than the transparent region from the influence of the laser beam LB includes materials with a low absorption coefficient at a wavelength of 1064 nm, such as a-Si or Mo.

[0100] Due to the light-shielding layer LS formed in the display panel 100, the laser beam LB can be emitted in the form of a line beam or a block beam during laser ablation. The length of the line beam or block beam is greater than the image capture area CA. The beam point BSPOT of the laser beam LB emitted to the display panel 100 in the form of a line beam or block beam can be longer than the image capture area CA in at least one direction (X-axis or Y-axis). When the beam point BSPOT is greater than the image capture area CA, only a portion of the metal layer ML in the light-transmitting area is exposed to the laser beam LB through the opening OP where the light-shielding layer LS is not present, and the metal layer ML in other areas covered by the light-shielding layer LS can be protected from the influence of the laser beam LB.

[0101] The laser ablation apparatus can use a beam shaper (or beam homogenizer) BSH to generate a linear or block beam of uniform intensity. The linear or block beam can be generated according to the structure of the beam shaper BSH, and the size of the laser beam LB can be adjusted according to the distance between the beam shaper BSH and the substrate 10 of the display panel 100.

[0102] When a laser beam LB is emitted onto the entire image capture area CA during the laser ablation process using the light-shielding layer LS formed in the display panel 100, the metal layer ML can be simultaneously and completely removed from the light-transmitting portion AG in the image capture area CA. Here, the metal layer ML present in the pixel array other than the light-transmitting portion AG is protected from the laser beam LB by the light-shielding layer LS and is therefore not removed during the laser ablation process. By emitting the laser beam LB only once, the metal layer ML can be removed only from the light-transmitting portion AG of the image capture area CA in the screen. Therefore, this disclosure minimizes the laser ablation process time and minimizes the margin between the display area DA and the image capture area CA. Furthermore, since the metal layer ML is completely removed from the light-transmitting portion AG without any residual film, this disclosure increases the transmittance of the image capture area CA and reduces noise in the captured image data.

[0103] Figures 9 to 11 This is a diagram illustrating various laser beam points according to embodiments of the present disclosure.

[0104] Reference Figure 9 During laser ablation, the laser beam LB is emitted as a line beam passing through the image capture area CA. Since only the metal layer ML exposed to the laser beam LB through the opening OP, where the light-shielding layer LS is absent, is removed, the laser beam LB is allowed to be sufficiently long. The width Wb of the laser beam LB can be greater than the diameter or maximum length of the light-transmitting portion AG, and can also be the diameter or maximum length of the image capture area CA, or even greater.

[0105] The length L of the laser beam LB can be greater than or equal to the maximum length of the image capture area CA. The laser beam LB, emitted as a beam, scans the display panel 100 while moving in a first direction (X-axis or Y-axis direction). The laser beam LB has a large beam point and therefore can be emitted not only to the image capture area CA, but also to a portion of the display area DA adjacent to the image capture area CA, or the entire display area DA. As the laser beam LB moves in the first direction, the previously fired laser beam LB and the currently fired laser beam LB can at least partially overlap, ensuring that no residual metal film is retained in the light-transmitting portion AG of the image capture area CA.

[0106] After scanning the display panel 100 along a first direction (X-axis or Y-axis direction), the laser beam LB can scan the display panel 100 in a second direction (X-axis or Y-axis direction) to remove the metal layer ML only from the light-transmitting area, so that the residual film can be completely removed. Since the metal layer ML is a thin film, it can usually be removed without any residual film by performing laser scanning in only one direction.

[0107] Reference Figure 10 During laser ablation, the laser beam LB can be emitted as a block beam with a size larger than the light-transmitting portion AG and the further image-capturing area CA. Because the laser beam LB emitted as a block beam has a large beam point, a single shot of the laser beam LB is emitted to all the light-transmitting portions AG, and further to the entire image-capturing area CA. The beam point of the block beam covers the entire image-capturing area CA, and therefore, a selected metal layer, such as a cathode, can be removed from all the light-transmitting portions AG of the image-capturing area CA by a single shot of the laser beam LB.

[0108] The shape and size of the block beam are determined by the beam shaper (BSH), and the intensity of the laser beam (LB) is uniform throughout the block. The block beam can be circular or quadrilateral, but is not limited to any specific shape.

[0109] Since only the metal layer ML exposed to the laser beam LB through the opening OP is removed, the laser beam LB can have a large size. For example, a block-shaped laser beam pointing at the display panel 100 can be emitted not only to the image capture area CA, but also to at least a portion or the entire display area DA adjacent to the image capture area CA. Therefore, the metal layer ML of all light-transmitting portions AG can be removed from the screen with only a single shot of the laser beam LB.

[0110] Reference Figure 11 Multiple display panels 100 can be manufactured simultaneously using multi-panel technology.

[0111] A thin film formation process is performed simultaneously on multiple cells on the mother substrate MSUBS. Here, a cell is a single product of the display panel 100. The circuit layer 12 of the cell is simultaneously formed on the mother substrate MSUBS. The circuit layer 12 includes a light-shielding layer LS that exposes the light-transmitting area. A laser ablation process can be performed when removing metal from the circuit layer 12 formed in the light-transmitting area.

[0112] During the fabrication of circuit layer 12, after forming the anode of the OLED light-emitting element, an organic compound layer of light-emitting element layer 14 is deposited, and simultaneously, a cell light-emitting element layer is formed on the mother substrate MSUBS. After the light-emitting element layer 14 is coated with a protective film and an encapsulation layer, the mother substrate MSUBS is cut along the dicing line by a dicing wheel in a dicing process, thus dividing the mother substrate MSUBS into cells. After the dicing process, the contours of each display panel in the display panel 100 are trimmed by a laser cutting device in a trimming process.

[0113] During laser ablation, the laser beam LB can be emitted onto the mother substrate MSUBS in the form of a line beam or a block beam. Here, the beam point can have a larger size than the light-transmitting portion AG of the image capture area CA. Furthermore, the size of the beam point can completely cover the image capture area CA, or it can be larger to cover the unit cell CELL.

[0114] The following will refer to Figure 12 and Figure 13 The advantages of the arrangement of the light-transmitting parts according to the embodiments of this disclosure are described.

[0115] Figure 12 It is an image of a captured image showing interference fringes.

[0116] Figure 13 It is an image of the captured image from which interference fringes have been removed.

[0117] Reference Figure 12 When a typical arrangement of light-transmitting elements, such as a regular arrangement, is used in the image capture area, interference fringes may appear in the captured image as shown in the attached figure. This is likely due to regular optical path differences caused by the regular arrangement of light-transmitting elements.

[0118] Reference Figure 13When the light-transmitting portions are randomly arranged, more specifically, when the light-transmitting portions are randomly arranged using a Fibonacci sequence, the optical path of external light incident on the imaging module is randomly distributed by the randomly arranged light-transmitting portions, making it possible to avoid interference fringes. Therefore, when using the light-transmitting portion arrangement according to the embodiments of this disclosure, ghost images or interference fringes can be removed, thereby improving the quality of the captured image.

[0119] Figure 14 This is a block diagram illustrating a display panel and a display panel driver according to an embodiment of the present disclosure. Figure 15 This is a block diagram schematically illustrating the configuration of a driver integrated circuit (IC).

[0120] Reference Figure 14 and Figure 15 The display device includes a display panel 100 (having a screen on which a pixel array is disposed), a display panel driver, etc.

[0121] The pixel array of the display panel 100 includes: data lines DL, gate lines GL intersecting the data lines DL, and pixels P arranged in a matrix form defined by the data lines DL and the gate lines GL. The pixel array also includes power lines, such as… Figure 16 The VDD line PL1, the Vini line PL2, and the VSS line PL3 are shown.

[0122] Pixel arrays can be divided into, for example Figure 1 The circuit layer 12 and the light-emitting element layer 14 are shown. A touch sensor array may be disposed on the light-emitting element layer 14. As described above, each pixel in the pixel array may include two to four sub-pixels. Each sub-pixel includes pixel circuitry disposed in the circuit layer 12.

[0123] The screen of the display panel 100 that displays the input image includes a display area DA and an image capture area CA.

[0124] Subpixels in each of the display area DA and the image capture area CA include pixel circuitry. Pixel circuitry may include: a driving element that supplies current to the light-emitting element; a plurality of switching elements that sample a threshold voltage of the driving element and switch the current path of the pixel circuitry; a capacitor that maintains the gate voltage of the driving element, etc. The pixel circuitry is positioned below the light-emitting element.

[0125] The image capture area CA includes a light-transmitting portion AG disposed between pixel groups and an imaging element module 400 disposed below the image capture area CA. In image capture mode, the imaging element module 400 uses an image sensor to perform photoelectric conversion on the light incident through the image capture area CA, converting pixel data of the image output from the image sensor into digital data, and outputting the captured image data.

[0126] The display panel driver writes the pixel data of the input image to pixel P. Pixel P can be understood as a group of pixels comprising multiple subpixels.

[0127] The display panel driver includes a data driver 306 and a gate driver 120. The data driver 306 provides data voltages for pixel data to the data line DL, and the gate driver 120 sequentially provides gate pulses to the gate line GL. The data driver 306 can be integrated into a driver IC 300. The display panel driver may also include a touch sensor driver.

[0128] The driver IC 300 can be attached to the display panel 100. The driver IC 300 receives pixel data and timing signals of the input image from the main system 200, provides data voltage of pixel data to pixel P, and synchronizes the data driver 306 and the gate driver 120 with each other.

[0129] The driver IC 300 is connected to the data line DL via a data output channel and provides the data voltage of the pixel data to the data line DL. The driver IC 300 can also output a gate timing signal for controlling the gate driver 120 via a gate timing signal output channel. The gate timing signal generated by the timing controller 303 may include a gate start pulse GVST, a gate shift clock GCLK, etc. The gate start pulse GVST and the gate shift clock GCLK oscillate between the gate on-voltage VGL and the gate off-voltage VGH. The gate timing signals GVST and GCLK output from the level shifter 307 are applied to the gate driver 120 and control the shift operation of the gate driver 120.

[0130] Gate driver 120 may include a shift register formed together with the pixel array in circuit layer 12 of display panel 100. The shift register of gate driver 120 sequentially provides gate signals to gate lines GL under the control of timing controller 303. Gate signals may include electromagnetic (EM) pulses and scan pulses of light emission signals. The shift register may include a scan driver that outputs scan pulses and an EM driver that outputs EM pulses. Figure 15 In the diagram, GVST and GCLK indicate the gate timing signals input to the scan driver. EVST and ECLK indicate the gate timing signals input to the EM driver.

[0131] The driver IC 300 can be connected to the main system 200, the first memory 301, and the display panel 100. The driver IC 300 may include a data receiving and calculation section 308, a timing controller 303, a data driver 306, a gamma-compensated voltage generator 305, a power supply 304, a second memory 302, etc.

[0132] The data receiving and processing section 308 includes: a receiver that receives pixel data as a digital signal input from the main system 200; and a data processing section that processes the pixel data input through the receiver to improve image quality. The data processing section may include: a data recovery section (which recovers pixel data by decoding compressed pixel data), an optical compensator (which adds a preset optical compensation value to the pixel data), etc. The optical compensation value can be set to a value used to correct the brightness of each pixel data based on screen brightness, which is measured based on camera images captured during manufacturing.

[0133] The timing controller 303 provides pixel data of the input image received from the main system 200 to the data driver 306. The timing controller 303 controls the operation timing of the gate driver 120 and the data driver 306 by generating a gate timing signal for controlling the gate driver 120 and a source timing signal for controlling the data driver 306.

[0134] The data driver 306 converts digital data, including pixel data received from the timing controller 303, into a gamma-compensated voltage via a digital-to-analog converter (DAC) and outputs a data voltage. The data voltage output from the data driver 306 is provided to the data line DL of the pixel array through an output buffer connected to the data channel of the driver IC 300.

[0135] The gamma compensation voltage generator 305 generates a gamma compensation voltage for a specific grayscale by dividing the gamma reference voltage from the power supply 304 using a voltage divider circuit. The gamma compensation voltage is an analog voltage set according to the grayscale level of the pixel data. The gamma compensation voltage output from the gamma compensation voltage generator 305 is provided to the data driver 306.

[0136] Power supply 304 uses a DC-DC converter to generate the power required to drive the pixel array, gate driver 120, and driver IC 300 of display panel 100. The DC-DC converter may include a charge pump, regulator, buck converter, boost converter, etc. Power supply 304 can generate DC power, such as gamma reference voltage, gate on-state voltage VGL, gate off-state voltage VGH, pixel drive voltage VDD, low-level power voltage VSS, and initialization voltage Vini, by adjusting the DC input voltage from main system 200. The gamma reference voltage is provided to gamma compensation voltage generator 305. The gate on-state voltage VGL and gate off-state voltage VGH are provided to level shifter 307 and gate driver 120. Pixel power, such as pixel drive voltage VDD, low-level power voltage VSS, and initialization voltage Vini, is collectively provided to pixel P. The initialization voltage Vini is set to a DC voltage lower than the pixel drive voltage VDD and the threshold voltage of the OLED light-emitting element, initializing the main node of the pixel circuit and suppressing light emission from the OLED light-emitting element.

[0137] When power is input to the driver IC 300, the second memory 302 stores compensation values, register setting data, etc., received from the first memory 301. The compensation values ​​can be applied to various algorithms to improve image quality. The compensation values ​​may include optical compensation values. The register setting data defines the operation of the data driver 306, timing controller 303, gamma compensation voltage generator 305, etc. The first memory 301 may include flash memory. The second memory 302 may include static random access memory (SRAM).

[0138] The main system 200 can be implemented as an application processor (AP). The main system 200 can send pixel data of the input image to the driver IC 300 via a Mobile Industrial Processor Interface (MIPI). The main system 200 can be connected to the driver IC 300 via, for example, a flexible printed circuit (FPC).

[0139] Meanwhile, the display panel 100 can be implemented as a flexible panel suitable for flexible displays. The screen size of the flexible display can be changed by rolling, folding, or bending the flexible panel, and the flexible display can be easily manufactured in various designs. Flexible displays can be implemented as rollable displays, foldable displays, bendable displays, sliding displays, etc. The flexible panel can be manufactured as a so-called "plastic OLED panel." A plastic OLED panel may include a backplane and a pixel array on an organic thin film bonded to the backplane. A touch sensor array can be formed on the pixel array.

[0140] The backsheet can be a polyethylene terephthalate (PET) substrate. The pixel array and touch sensor array can be formed on the organic thin film. The backsheet prevents moisture from penetrating into the organic thin film, allowing the pixel array to remain unexposed to moisture. The organic thin film can be a polyimide (PI) substrate. The multilayer buffer film can be made of an insulating material on the organic thin film. The circuit layer 12 and the light-emitting element layer 14 can be stacked on the organic thin film.

[0141] In the display device of this disclosure, the pixel circuit, gate driver 120, etc., disposed in the circuit layer 12 may include multiple transistors. The transistors may be implemented as oxide TFTs including oxide semiconductors, LTPS TFTs including low-temperature polycrystalline silicon (LTPS), etc. Each transistor may be implemented as a p-channel TFT or an n-channel TFT. In this embodiment, an example of the pixel circuit transistors being implemented as p-channel TFTs has been mainly described, but this disclosure is not limited thereto.

[0142] A transistor is a three-electrode device comprising a gate, a source, and a drain. The source is the electrode through which charge carriers are supplied to the transistor. In a transistor, charge carriers begin to flow out of the source. The drain is the electrode through which charge carriers are removed from the transistor. In a transistor, charge carriers flow from the source to the drain. In the case of an n-channel transistor, the charge carriers are electrons, therefore the source voltage is lower than the drain voltage. In an n-channel transistor, current flows from the source to the drain. In the case of a p-channel transistor (p-channel metal-oxide-semiconductor (PMOS)), the charge carriers are holes, therefore the source voltage is higher than the drain voltage, allowing holes to flow from the source to the drain. Because holes flow from the source to the drain in a p-channel transistor, current flows from the source to the drain. It should be noted that the source and drain of a transistor are not fixed. For example, the source and drain can change depending on the applied voltage. Therefore, this disclosure is not limited to the source and drain of a transistor. In the following description, the source and drain of a transistor will be referred to as the first electrode and the second electrode.

[0143] The gate pulse oscillates between the gate on-state voltage and the gate off-state voltage. The gate on-state voltage is set to a value higher than the transistor's threshold voltage, while the gate off-state voltage is set to a value lower than the transistor's threshold voltage. The transistor turns on in response to the gate on-state voltage and turns off in response to the gate off-state voltage. In the case of an n-channel transistor, the gate on-state voltage can be the gate high voltage VGH, and the gate off-state voltage can be the gate low voltage VGL. In the case of a p-channel transistor, the gate on-state voltage can be the gate low voltage VGL, and the gate off-state voltage can be the gate high voltage VGH.

[0144] The driving elements of a pixel circuit can be implemented as transistors. All pixel driving elements should have the same electrical characteristics. However, the electrical characteristics of all pixel driving elements may differ from each other due to process variations or component characteristic variations, and may change over display operation time. To compensate for such electrical characteristic variations of the driving elements, the display device may include internal and external compensation circuitry. Internal compensation circuitry is added to the pixel circuitry in each sub-pixel to sample the threshold voltage Vth and / or mobility μ of the driving element, which vary according to the electrical characteristics of the driving element, and compensates for changes in the threshold voltage Vth and / or mobility μ in real time. External compensation circuitry sends the threshold voltage and / or mobility of the driving element sensed via a sensing line connected to each sub-pixel to an external compensator. The compensator of the external compensation circuitry modulates the pixel data of the input image to reflect the sensing results, thereby compensating for the electrical characteristics of the driving element. The external compensation circuitry senses the voltage of the pixel varying according to the electrical characteristics of the driving element and modulates the data of the input image based on the sensed voltage, so that the electrical characteristic variations of the pixel driving elements can be compensated.

[0145] Figure 16 and Figure 17 This is a circuit diagram showing an example of a pixel circuit CPIX with its internal compensation circuitry applied. Figure 18 It is shown Figure 16 and Figure 17 The diagram shows a timing diagram illustrating the operation of the pixel circuit. It should be noted that the pixel circuit described in this disclosure is not limited to... Figure 16 and Figure 17 . Figure 16 and Figure 17 The pixel circuits shown can be used together in the pixel circuits of the image capture area CA and the display area DA. The pixel circuits suitable for this disclosure can be implemented as follows: Figure 16 and Figure 17 The circuit shown is not limited to this.

[0146] Reference Figures 16 to 18 The pixel circuit includes: a light-emitting element; a driving element DT that provides current to the light-emitting element; and an internal compensation circuit that uses multiple switching elements M1 to M6 to sample the threshold voltage Vth of the driving element DT and compensates the gate voltage of the driving element DT using the threshold voltage Vth of the driving element DT. Each of the driving element DT and the switching elements M1 to M6 can be implemented as a p-channel TFT.

[0147] like Figure 18 As shown, the operation period of the pixel circuit using the internal compensation circuit can be divided into the initialization period Tini, the sampling period Tsam, the data writing period Twr, and the transmission period Tem.

[0148] During the initialization period Tini, the (N-1)th scan signal SCAN(N-1) is generated as a pulse of the gate on-state voltage VGL, and the voltage of each of the Nth scan signal SCAN(N) and the transmit signal EM(N) is the gate off-state voltage VGH. During the sampling period Tsam, the Nth scan signal SCAN(N) is generated as a pulse of the gate on-state voltage VGL, and the voltage of each of the (N-1)th scan signal SCAN(N-1) and the transmit signal EM(N) is the gate off-state voltage VGH. During the data writing period Twr, the voltage of each of the (N-1)th scan signal SCAN(N-1), the Nth scan signal SCAN(N), and the transmit signal EM(N) is the gate off-state voltage VGH. During at least a portion of the transmission period Tem, the transmission signal EM(N) is generated at the gate on-voltage VGL, and the voltage of each of the (N-1)th scan signal SCAN(N-1) and the Nth scan signal SCAN(N) is generated at the gate off-voltage VGH.

[0149] During the initialization period Tini, the fifth switching element M5 is turned on according to the gate turn-on voltage VGL of the (N-1)th scan signal SCAN(N-1) to initialize the pixel circuit. During the sampling period Tsam, the first switching element M1 and the second switching element M2 are turned on according to the gate turn-on voltage VGL of the Nth scan signal SCAN(N), and thus the threshold voltage of the driving element DT is sampled and stored in the capacitor Cst1. Furthermore, the sixth switching element M6 is turned on during the sampling period Tsam, and thus the voltage of the fourth node n4 drops to the reference voltage Vref, allowing light emission from the light-emitting element to be suppressed. During the data writing period Twr, the first switching elements M1 through the sixth switching element M6 remain in their off state. During the emission period Tem, the third switching element M3 and the fourth switching element M4 are turned on, causing the light-emitting element to emit light. During the transmission period Tem, in order to accurately represent the brightness of low gray levels using the duty cycle of the transmission signal EM(N), the transmission signal EM(N) oscillates between the gate on voltage VGL and the gate off voltage VGH with a certain duty cycle, so that the third switching element M3 and the fourth switching element M4 can be repeatedly turned on and off.

[0150] The light-emitting element can be implemented as an OLED or an inorganic light-emitting diode. An example of an OLED being implemented as a light-emitting element will be described below.

[0151] An OLED (Light Emitting Diode) may include an organic compound layer formed between an anode and a cathode. The organic compound layer may include, but is not limited to, HIL, HTL, EML, ETL, and EIL. When a voltage is applied to the anode and cathode of the OLED, holes passing through the HTL and electrons passing through the ETL are moved to the EML and form excitons, causing visible light to be emitted from the EML.

[0152] The anode of the OLED is connected to a fourth node n4 between the fourth switching element M4 and the sixth switching element M6. The fourth node n4 is connected to the anode of the OLED, the second electrode of the fourth switching element M4, and the second electrode of the sixth switching element M6. The cathode of the OLED is connected to the VSS line PL3, to which a low-potential electrical voltage VSS is applied. The OLED emits light by a current Ids flowing according to the gate-source voltage Vgs of the driving element DT. The current path of the OLED is switched by the third switching element M3 and the fourth switching element M4.

[0153] Storage capacitor Cst1 is connected between VDD line PL1 and the first node n1. Storage capacitor Cst1 is charged by data voltage Vdata, which is compensated by the threshold voltage Vth of the driving element DT. Since the data voltage Vdata is compensated by the threshold voltage Vth of the driving element DT in each sub-pixel, the characteristic deviation of the driving element DT in the sub-pixel is corrected.

[0154] The first switching element M1 is turned on in response to the gate turn-on voltage VGL of the Nth scan pulse SCAN(N) and is connected to the second node n2 and the third node n3. The second node n2 is connected to the gate electrode of the driving element DT, the first electrode of the storage capacitor Cst1, and the first electrode of the first switching element M1. The third node n3 is connected to the second electrode of the driving element DT, the second electrode of the first switching element M1, and the first electrode of the fourth switching element M4. The gate electrode of the first switching element M1 is connected to the first gate line GL1 and is supplied with the Nth scan pulse SCAN(N). The first electrode of the first switching element M1 is connected to the second node n2, and the second electrode of the first switching element M1 is connected to the third node n3.

[0155] During a frame period, the first switching element M1 is turned on for only a very short horizontal period (1H) and thus remains in its off state for almost a full frame period, during which the Nth scan signal SCAN(N) is generated at the gate on-state voltage VGL. Therefore, leakage current may occur in the off state of the first switching element M1. Figure 17As shown, in order to suppress the leakage current of the first switching element M1, the first switching element M1 can be implemented as a transistor with a dual-gate structure, in which two transistors M1a and M1b are connected in series.

[0156] The second switching element M2 turns on in response to the gate turn-on voltage VGL of the Nth scan pulse SCAN(N) and provides the data voltage Vdata to the first node n1. The gate electrode of the second switching element M2 is connected to the first gate line GL1 and is supplied with the Nth scan pulse SCAN(N). The first electrode of the second switching element M2 is connected to the first node n1. The second electrode of the second switching element M2 is connected to the data line DL to which the data voltage Vdata is applied. The first node n1 is connected to the first electrode of the second switching element M2, the second electrode of the third switching element M3, and the first electrode of the driving element DT.

[0157] The third switching element M3 is turned on in response to the gate turn-on voltage VGL of the transmit signal EM(N), and connects the VDD line PL1 to the first node n1. The gate electrode of the third switching element M3 is connected to the third gate line GL3 and is supplied with the transmit signal EM(N). The first electrode of the third switching element M3 is connected to the VDD line PL1. The second electrode of the third switching element M3 is connected to the first node n1.

[0158] The fourth switching element M4 is turned on in response to the gate turn-on voltage VGL of the emission signal EM(N), and connects the third node n3 to the anode of the light-emitting element (OLED). The gate electrode of the fourth switching element M4 is connected to the third gate line GL3 and is supplied with the emission signal EM(N). The first electrode of the fourth switching element M4 is connected to the third node n3, and the second electrode is connected to the fourth node n4.

[0159] The fifth switching element M5 is turned on in response to the gate turn-on voltage VGL of the (N-1)th scan pulse SCAN(N-1), and connects the second node n2 to the Vini line PL2. The gate electrode of the fifth switching element M5 is connected to the second gate line GL2 and is supplied with the (N-1)th scan pulse SCAN(N-1). The first electrode of the fifth switching element M5 is connected to the second node n2, and the second electrode is connected to the Vini line PL2. Figure 17 As shown, in order to suppress the leakage current of the fifth switching element M5, the fifth switching element M5 can be implemented as a transistor with a dual-gate structure, in which two transistors M5a and M5b are connected in series.

[0160] The sixth switching element M6 is turned on in response to the gate turn-on voltage VGL of the Nth scan pulse SCAN(N), and connects the Vini line PL2 to the fourth node n4. The gate electrode of the sixth switching element M6 is connected to the first gate line GL1 and is supplied with the Nth scan pulse SCAN(N). The first electrode of the sixth switching element M6 is connected to the Vini line PL2, and the second electrode is connected to the fourth node n4.

[0161] The driving element DT drives the OLED by adjusting the current Ids flowing to the OLED according to the gate-source voltage Vgs. The driving element DT includes a gate connected to the second node n2, a first electrode connected to the first node n1, and a second electrode connected to the third node n3.

[0162] During the initialization period Tini, the (N-1)th scan pulse SCAN(N-1) is generated at the gate on-voltage VGL. The Nth scan pulse SCAN(N) and the transmit signal EM(N) are maintained at the gate off-voltage VGH during the initialization period Tini. Therefore, during the initialization period Tini, the fifth switching element M5 is turned on, and the second node n2 and the fourth node n4 are initialized to the initialization voltage Vini. A hold period Th can be set between the initialization period Tini and the sampling period Tsam. During the hold period Th, the gate pulses SCAN(N-1), SCAN(N), and EM(N) remain in their previous states.

[0163] During the sampling period Tsam, the Nth scan pulse SCAN(N) is generated at the gate on-voltage VGL. The Nth scan pulse SCAN(N) is synchronized with the data voltage Vdata of the Nth pixel line. The (N-1)th scan pulse SCAN(N-1) and the transmit signal EM(N) are maintained at the gate off-voltage VGH during the sampling period Tsam. Therefore, during the sampling period Tsam, the first switching element M1 and the second switching element M2 are turned on.

[0164] During the sampling period Tsam, the gate voltage DTG of the driving element DT increases due to the current flowing through the first switching element M1 and the second switching element M2. When the driving element DT is turned off, the gate voltage DTG is equal to Vdata – |Vth|. In this case, the voltage of the first node n1 is also equal to Vdata – |Vth|. During the sampling period Tsam, the gate-source voltage Vgs of the driving element DT corresponds to |Vgs| = Vdata – (Vdata – |Vth|) = |Vth|.

[0165] During the data write period Twr, the Nth scan pulse SCAN(N) is inverted to the gate cutoff voltage VGH. The (N-1)th scan pulse SCAN(N-1) and the transmit signal EM(N) are maintained at the gate cutoff voltage VGH during the data write period Twr. Therefore, during the data write period Twr, all switching elements M1 to M6 remain in their off state.

[0166] During the transmission period Tem, the transmission signal EM(N) can be generated at the gate on-state voltage VGL. During the transmission period Tem, to improve the ability to represent low gray levels, the transmission signal EM(N) can be turned on and off with a certain duty cycle, thus oscillating between the gate on-state voltage VGL and the gate off-state voltage VGH. The transmission signal EM(N) can be generated at the gate on-state voltage VGL during at least a portion of the transmission period Tem.

[0167] When the emission signal EM(N) is at the gate on-state voltage VGL, current can flow between VDD and the light-emitting element (OLED), allowing the OLED to emit light. During the emission period Tem, the (N-1)th scan pulse SCAN(N-1) and the Nth scan pulse SCAN(N) are maintained at the gate off-state voltage VGH. During the emission period Tem, the third switching element M3 and the fourth switching element M4 are repeatedly turned on and off according to the voltage of the emission signal EM(N). When the emission signal EM(N) is at the gate on-state voltage VGL, the third switching element M3 and the fourth switching element M4 are turned on, causing current to flow to the light-emitting element (OLED). In this case, the gate-source voltage Vgs of the driving element DT corresponds to |Vgs| = VDD – (Vdata – |Vth|), and the current flowing to the light-emitting element (OLED) is equal to K(VDD – Vdata). 2 K is a constant determined by the charge mobility, parasitic capacitance, and channel capacitance of the driving element DT.

[0168] Figure 19 This is a cross-sectional view showing in detail the structure of the pixel area in a display panel according to an embodiment of the present disclosure. It should be noted that the cross-sectional structure of the display panel 100 is not limited to... Figure 19 .exist Figure 19 In this context, TFT represents the driving element DT of the pixel circuit.

[0169] Reference Figure 19 Circuit layer 12, light-emitting element layer 14, etc., can be stacked on substrates PI1 and PI2. Substrates PI1 and PI2 may include a first PI substrate PI1 and a second PI substrate PI2. An inorganic film IPD can be formed between the first PI substrate PI1 and the second PI substrate PI2. The inorganic film IPD prevents moisture penetration.

[0170] A first buffer layer BUF1 can be formed on a second PI substrate PI2. The first buffer layer BUF1 can be formed as a multilayer insulating film, in which two or more oxide (SiO2) and nitride (SINx) films are stacked. A first metal layer can be formed on the first buffer layer BUF1, and a second buffer layer BUF2 can be formed on the first metal layer. The first metal layer is patterned in a photolithography process. The first metal layer may include a light-shielding pattern BSM. The light-shielding pattern BSM blocks external light, preventing the active layer of the TFT from being illuminated, thereby preventing photocurrent from the TFT formed in the pixel area. When the light-shielding pattern BSM is made of a metal having a lower absorption coefficient relative to the laser wavelength used in the laser ablation process than the metal layer ML to be removed from the image capture area CA, the light-shielding pattern BSM can also be used as a light-shielding layer LS to block the laser beam LB during laser ablation.

[0171] Each of the first buffer layer BUF1 and the second buffer layer BUF2 may be made of inorganic insulating material and may include one or more insulating layers.

[0172] The active layer ACT can be fabricated from semiconductor material deposited on the second buffer layer BUF2 and patterned in a photolithography process. The active layer ACT includes active patterns for the TFTs in the gate driver and the TFTs in the pixel circuit. A portion of the active layer ACT can be metallized by ion doping. The metallized portion can be used as a jumper pattern connecting the metal layers at some nodes in the pixel circuit, and can connect the elements of the pixel circuit.

[0173] A gate insulating layer GI can be formed on the second buffer layer BUF2 to cover the active layer ACT. The gate insulating layer GI can be made of an inorganic insulating material. A second metal layer can be formed on the gate insulating layer GI. The second metal layer can be patterned in a photolithography process. The second metal layer may include gate lines and gate electrode patterns GATE, the lower electrode of the storage capacitor Cst1, jumper patterns connecting the patterns of the first metal layer and the patterns of the third metal layer, etc.

[0174] A first interlayer insulating layer ILD1 can be formed on the gate insulating layer GI to cover the second metal layer. A third metal layer can be formed on the first interlayer insulating layer ILD1, and a second interlayer insulating layer ILD2 can cover the third metal layer. The third metal layer can be patterned in a photolithography process. The third metal layer can include a metal pattern TM, such as the upper electrode of a storage capacitor Cst1. The first interlayer insulating layer ILD1 and the second interlayer insulating layer ILD2 can include inorganic insulating materials.

[0175] A fourth metal layer may be formed on the second interlayer insulating layer ILD2, and an inorganic insulating layer PAS1 and a first planarization layer PLN1 may be stacked on the fourth metal layer. A fifth metal layer may be formed on the first planarization layer PLN1.

[0176] Partial patterns of the fourth metal layer can be connected to the third metal layer through contact holes passing through the first planarization layer PLN1 and the inorganic insulating layer PAS1. The first planarization layer PLN1 and the second planarization layer PLN2 can be made of organic insulating materials that planarize the surface.

[0177] The fourth metal layer may include a first electrode and a second electrode of the TFT, which are connected to the active pattern of the TFT through contact holes passing through the second interlayer insulating layer ILD2. Data lines DL and power lines PL1, PL2, and PL3 can be implemented using the pattern SD1 of the fourth metal layer and the pattern SD2 of the fifth metal layer.

[0178] The anode AND of the light-emitting element (OLED) can be formed on the second planarization layer PLN2. The anode AND can be connected to the electrode of the TFT, which is used as a switching element or a driving element, through contact holes in the second planarization layer PLN2. The anode AND can be made of transparent or translucent electrode material.

[0179] A pixel-defining film (BNK) can cover the anode and AND of an OLED light-emitting element. The BNK is patterned to define a light-emitting region (or aperture region), through which light passes from the outside in each pixel. A spacer structure (SPC) can be formed on the BNK. Both the BNK and SPC can be made of the same organic insulating material and integrated with each other. The SPC ensures a gap between the fine metal mask (FMM) and the anode and AND, allowing the FMM to remain in contact with the anode and AND during the organic compound (electroluminescence (EL)) deposition process.

[0180] An organic compound EL is formed in the light-emitting region of each pixel defined by the pixel-defining film BNK. The cathode CAT of the OLED is formed on the entire surface of the display panel 100 to cover the pixel-defining film BNK, the spacer SPC, and the organic compound EL. The cathode CAT can be connected to a VSS line PL3 formed using any of the underlying metal layers. A sealing layer CPL can cover the cathode CAT. The sealing layer CPL is made of an inorganic insulating material and protects the cathode CAT by preventing air penetration and outgassing the organic insulating material applied to the sealing layer CPL. An inorganic insulating layer PAS2 can cover the sealing layer CPL, and a planarization layer PCL can be formed on the inorganic insulating layer PAS2. The planarization layer PCL may include an organic insulating material. An inorganic insulating layer PAS3 of the encapsulation layer can be formed on the planarization layer PCL.

[0181] Figure 20 and Figure 21 This is a cross-sectional view showing the light-shielding layer LS of the pixel area and the light-transmitting portion AG of the image capture area CA in the structure of a display panel according to various embodiments of the present disclosure. Figure 20 and Figure 21 In, with Figure 19 The elements shown are substantially the same as those indicated by the same reference numerals, and their detailed descriptions will be omitted or may be provided briefly.

[0182] Reference Figure 20 During the laser ablation process, the light-shielding layer LS protects the pixel area PIX in the display area DA and the image capture area CA from the laser beam LB emitted to the display panel 100.

[0183] The light-shielding layer LS is removed from the region of the light-transmitting portion AG to define an opening OP that exposes the light-transmitting portion to the laser beam LB. The laser beam LB, generated during laser ablation, removes the metal layer to be removed, such as the cathode material of the light-transmitting region, through the opening OP of the light-shielding layer LS. The light-shielding layer LS can be disposed below the TFT in the pixel region PIX to prevent photocurrent in the TFT. In this case, the light-shielding layer LS should be made of a metal with an absorption coefficient lower than that of the metal layer to be removed relative to the wavelength of the laser beam LB. When the metal layer to be removed is a cathode material of Mg-Ag alloy, the light-shielding layer LS can be made of Mo, which has an absorption coefficient lower than that of Mg relative to the laser beam LB with a wavelength of 1064 nm. Since Mo is a metal with a low absorption coefficient, it can prevent photocurrent in the TFT by reflecting external light.

[0184] Figure 20 The light-shielding layer LS shown is disposed between the first buffer layer BUF1 and the second buffer layer BUF2 below the TFT in the pixel area PIX.

[0185] Figure 21 The example shown is made of a-Si. Since a-Si has a lower absorption coefficient than Mg relative to the 1064nm laser beam LB, it can protect the metal layer on the a-Si from the effects of the laser beam LB used to remove Mg and Ag during laser ablation. In this case, the light-shielding layer LS cannot block external light affecting the TFTs in the pixel region (PIX), and therefore an additional light-shielding pattern BSM can be added to the pixel region (PIX). Figure 21 The light-shielding layer LS shown is disposed between the inorganic insulating layers BUF2 and BUF3 below the TFT in the pixel region PIX. Figure 21 In the pixel region, the second buffer layer BUF2 is an inorganic insulating layer formed between the light-shielding layer LS and the light-shielding pattern BSM. The third buffer layer BUF3 is an inorganic insulating layer formed between the light-shielding layer LS and the active layer ACT in the pixel region.

[0186] All metal layers in the pixel region (PIX) are removed from the light-transmitting region (AG). Therefore, only a transparent insulating layer may exist in the light-transmitting region (AG).

[0187] Figure 22 This is a cross-sectional view showing an example of an insulating layer that can be removed from the light-transmitting portion of the image capture area.

[0188] Reference Figure 22 Either PI1 or PI2 of the PI substrate can be removed from the light-transmitting portion AG. One or more of the inorganic insulating layers BUF1, BUF2, GI, ILD1, ILD2, and PAS1 can be removed from the light-transmitting portion AG, and one or more of the active layer ACT, pixel defining film BNK, and spacer SPC can be further removed. The recessed portion resulting from the removal of the insulating layer from the light-transmitting portion AG can be filled with the first planarization layer PLN1 and the second planarization layer PLN2.

[0189] Figure 23 This is an example diagram illustrating multiple sensor modules arranged in an image capture area, based on the present disclosure.

[0190] like Figure 23As shown, multiple sensor modules can be disposed in the image capture area CA. For example, an infrared sensor module can be separately disposed in the image capture area CA together with the imaging element module 400. Another sensor, such as an illuminance sensor or a proximity sensor, can be separately disposed in the image capture area CA. Pixels can be arranged with a high PPI together with the light-transmitting portions AG in the light-receiving surface 401 of the imaging element module 400 and the light-receiving surface 402 of the infrared sensor module. Since the transmittance of infrared wavelengths at the thin film in the image capture area CA is higher than that of visible light wavelengths, the number and / or size of the light-transmitting portions AG in the light-receiving surface 402 of the infrared sensor module can be smaller than the number and / or size of the light-transmitting portions AG in the light-receiving surface of the imaging element module 400, or the light-transmitting portions AG may not exist in the light-receiving surface 402 of the infrared sensor module. At the same time, the infrared sensor module can sense infrared light and can be used for facial recognition.

[0191] The light-shielding layer LS can be made of various different materials depending on the region in the image capture area CA. For example, such as Figure 22 As shown, when the infrared sensor module and the imaging element module 400 are disposed in the image capture area CA, the light-shielding layer LS in the area where the imaging element module 400 is disposed can have a higher transmittance than the light-shielding layer LS in the area where the infrared sensor module is disposed. The transmittance of the light-shielding layer LS can vary depending on the type of electronic module disposed in the area of ​​the light-shielding layer LS. For example, a-Si can be used as the light-shielding layer LS in the light-receiving surface 402 of the infrared sensor module, and Mo can be used as the light-shielding layer LS in the light-receiving surface 401 of the imaging element module 400.

[0192] While embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, the present disclosure is not limited to these embodiments, and various changes and modifications can be made without departing from the technical spirit of the present disclosure. Therefore, the embodiments disclosed herein are considered descriptive and not limiting of the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by the embodiments. Thus, it should be understood that the embodiments set forth herein are illustrative in all respects and not restrictive. The scope of the present disclosure should be interpreted according to the claims, and all technical spirit of its equivalents should be interpreted as falling within the scope of the present disclosure.

Claims

1. A display panel comprising: a display area including a first pixel region in which a plurality of pixels are provided; and an image capturing area including a second pixel region in which a plurality of pixel groups are provided, and a plurality of light-transmissive portions provided between the pixel groups, wherein the light-transmissive portions are provided along a virtual spiral reference line extending spirally outward from a center of the image capturing area, and a size of the light-transmissive portions increases as a distance from the center of the image capturing area increases.

2. The display panel of claim 1, wherein, the virtual spiral reference line includes a Fibonacci spiral.

3. The display panel of claim 1, wherein, each of the light-transmissive portions is in a circular shape or an elliptical shape.

4. The display panel of claim 1, wherein, each of the first pixel region and the second pixel region includes: a light-blocking layer; and a metal layer having a higher absorption coefficient than the light-blocking layer with respect to a specific wavelength of a laser beam, wherein the light-blocking layer includes a metal film or an inorganic film, and the light-blocking layer is removed from a light-transmissive region in the image capturing area to expose the light-transmissive portions, and the metal layer is removed from the light-transmissive region in the image capturing area to expose the light-transmissive portions.

5. The display panel of claim 4, wherein, at least one of the light-transmissive portions includes an overlapping region overlapping with the pixel groups, and the light-blocking layer is not removed from the overlapping region.

6. The display panel of claim 4, wherein, at least some of the light-transmissive portions include an overlapping region overlapping with the pixel groups, and the metal layer is not removed from the overlapping region.

7. The display panel of claim 4, wherein, the light-blocking layer includes molybdenum (Mo) or amorphous silicon (a-Si), and the metal layer includes magnesium (Mg).

8. The display panel of claim 7, wherein, the first pixel region and the second pixel region include: a circuit layer on a substrate; and a light-emitting element layer on the circuit layer, and the light-blocking layer is provided in the circuit layer.

9. The display panel of claim 8, wherein, the circuit layer includes a transistor connected to a light-emitting element of the light-emitting element layer, and the light-blocking layer is provided between inorganic insulating layers below the transistor.

10. The display panel of claim 9, wherein, each of the pixel regions of the display area and the image capturing area further includes a light-blocking pattern provided between the light-blocking layer and the transistor, and the light-blocking pattern includes a metal.

11. The display panel of claim 1, wherein, the first pixel region has a higher pixel per inch (PPI) than the second pixel region.

12. A display device comprising: a display panel including a display area including a first pixel region in which a plurality of pixels are provided, and an image capturing area including a second pixel region in which a plurality of pixel groups are provided, and a plurality of light-transmissive portions provided between the pixel groups; a cover glass configured to cover the display panel; and an imaging element module provided below the display panel and opposite the image capturing area, wherein the light-transmissive portions are provided along a virtual spiral reference line extending spirally outward from a center of the image capturing area, and a size of the light-transmissive portions increases as a distance from the center of the image capturing area increases.

13. The display device of claim 12, wherein, the virtual spiral reference line includes a Fibonacci spiral.

14. The display device of claim 12, wherein, each of the light-transmissive portions is in a circular shape or an elliptical shape.

15. The display device of claim 12, wherein, each of the first pixel region and the second pixel region includes: a light-blocking layer; and a metal layer having a higher absorption coefficient than the light-blocking layer with respect to a specific wavelength of a laser beam, wherein the light-blocking layer includes a metal film or an inorganic film, and the light-blocking layer is removed from a light-transmissive region in the image capturing area to expose the light-transmissive portions, and the metal layer is removed from the light-transmissive region in the image capturing area to expose the light-transmissive portions. a metal layer having a higher absorption coefficient than the light-shielding layer with respect to a specific wavelength of a laser beam, wherein the light-shielding layer includes a metal film or an inorganic film, and the light-shielding layer is removed from a light-transmitting region in the image capturing region to expose the light-transmitting portion, and the metal layer is removed from the light-transmitting region in the image capturing region to expose the light-transmitting portion.

16. The display device of claim 15, wherein, at least one of the light-transmitting portions includes an overlapping region overlapping the pixel group, and the light-shielding layer and the metal layer are not removed from the overlapping region.

17. The display device of claim 16, wherein, the first pixel region and the second pixel region include: a circuit layer on a substrate; and a light-emitting element layer on the circuit layer, and the light-shielding layer is provided in the circuit layer.

18. The display device of claim 17, wherein, the circuit layer includes a transistor connected to a light-emitting element of the light-emitting element layer, and the light-shielding layer is provided between inorganic insulating layers below the transistor.

19. The display device of claim 18, wherein, each of the pixel regions of the display region and the image capturing region further includes a light-shielding pattern provided between the light-shielding layer and the transistor, and the light-shielding pattern includes metal.

20. The display device of claim 12, wherein, the first pixel region has a higher pixel per inch (PPI) than the second pixel region.

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