Image sensing device and operating method thereof

Abstract

The present application discloses an image sensing device and an operating method thereof, wherein the image sensing device may include: a first unit pixel circuit arranged in a first row, which includes a first floating diffusion node and is suitable for outputting a first pixel signal through a column line; a second unit pixel circuit arranged in a second row, which includes a second floating diffusion node and is suitable for outputting a second pixel signal through a column line; and a first connecting circuit, which is suitable for selectively connecting the first floating diffusion node to the second floating diffusion node based on a first mode control signal.

Description

Technical Field

[0001] Various embodiments of the present disclosure relate to semiconductor design technology, and more particularly, to an image sensing device and an operating method thereof. Background Art

[0002] Image sensing devices capture images using the properties of semiconductors that react to light. Generally, there are two types of image sensing devices: charge coupled device (CCD) image sensing devices and complementary metal oxide semiconductor (CMOS) image sensing devices. Recently, CMOS image sensing devices are widely used because they allow both analog control circuits and digital control circuits to be directly implemented on a single integrated circuit (IC). Summary of the invention

[0003] Various embodiments of the present disclosure are directed to an image sensing device capable of increasing charge capacity per pixel by using adjacent pixels, and an operating method of the image sensing device.

[0004] Furthermore, various embodiments of the present disclosure relate to an image sensing device capable of controlling whether to increase a charge capacity of a pixel according to a mode while increasing the capacity by maximizing the use of adjacent pixels, and an operating method of the image sensing device.

[0005] According to an embodiment, an image sensing device may include: a first unit pixel circuit arranged in a first row, which includes a first floating diffusion node and is suitable for outputting a first pixel signal through a column line; a second unit pixel circuit arranged in a second row, which includes a second floating diffusion node and is suitable for outputting a second pixel signal through a column line; and a first connecting circuit, which is suitable for selectively connecting the first floating diffusion node to the second floating diffusion node based on a first mode control signal.

[0006] The first coupling circuit may electrically couple the first floating diffusion node to the second floating diffusion node during a low conversion gain period, and electrically isolate the first floating diffusion node from the second floating diffusion node during a high conversion gain period.

[0007] According to an embodiment, an operating method of an image sensing device may include: during a first frame time, electrically connecting a plurality of floating diffusion nodes respectively included in a plurality of unit pixel circuits and arranged in a column; and generating image data according to a low conversion gain mode by any one of the plurality of unit pixel circuits during the first frame time.

[0008] The operating method of the image sensing device may further include: electrically isolating the plurality of floating diffusion nodes during a second frame time; and generating image data according to a high conversion gain mode by any one of the plurality of unit pixel circuits.

[0009] According to an embodiment, an operating method of an image sensing device may include: during a first frame time, alternately operating each of a plurality of unit pixel circuits in a low conversion gain mode and a high conversion gain mode; and during the first frame time, generating image data according to the low conversion gain mode and generating image data according to the high conversion gain mode alternately by each of the unit pixel circuits.

[0010] The alternately operating may include electrically coupling a plurality of floating diffusion nodes respectively included in the plurality of unit pixel circuits and disposed in one column in a low conversion gain mode.

[0011] The alternately operating step may include electrically isolating the plurality of floating diffusion nodes in a high conversion gain mode.

[0012] According to an embodiment, an operating method of an image sensing device including a column of unit pixel circuits, each of which has a floating diffusion node, may include: generating first image data from a pixel circuit in the pixel circuit that has a floating diffusion node electrically connected to an adjacent pixel circuit; and generating second image data from a pixel circuit in the pixel circuit that has a floating diffusion node electrically isolated from the adjacent pixel circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a block diagram illustrating an image sensing device according to an embodiment.

[0014] Figure 2 is a diagram showing an example of a pixel array.

[0015] Figure 3 is a circuit diagram illustrating a first unit pixel circuit and a second unit pixel circuit among a plurality of unit pixel circuits included in a pixel array and related circuits thereof.

[0016] Figures 4 to 10 It shows that Figure 1 A timing diagram of an example of the operation of the image sensing device shown in FIG. DETAILED DESCRIPTION

[0017] Various embodiments are described in detail below with reference to the accompanying drawings to describe the present disclosure in detail, so that those skilled in the art to which the present disclosure belongs can practice and easily implement the present disclosure. Throughout the specification, references to "embodiment" and the like are not necessarily directed to only one embodiment, and different references to any such phrases are not necessarily directed to the same embodiment. When the term "embodiment" is used herein, it does not necessarily refer to all embodiments.

[0018] Throughout the specification, when an element is referred to as being "connected to" or "coupled to" another element, the element may be directly connected to or coupled to the other element, or electrically connected to or coupled to the other element with one or more elements interposed therebetween. In addition, it will be understood that when the terms "include," "comprises," and their derivatives are used herein, they specify the presence of the element and do not exclude the presence or addition of one or more other elements. In the following description, some components are described in the singular, but the present disclosure is not limited thereto; it should be understood that the components may be formed in plural.

[0019] Figure 1 is a block diagram showing an image sensing device 100 according to an embodiment.

[0020] Reference Figure 1 , the image sensing device 100 may include a row controller 110 , a pixel array 120 , a signal converter 130 , and an image processor 140 .

[0021] The row controller 110 may generate a plurality of row control signals RCTRL for controlling corresponding rows of the pixel array 120 during a frame time (i.e., a single frame time). For example, the row controller 110 may generate a first row control signal for controlling pixels arranged in a first row of the pixel array 120 during a first row line time of the frame time, and generate an nth row control signal for controlling pixels arranged in an nth row of the pixel array 120 during an nth (wherein "n" is a natural number greater than 2) row line time of the frame time. During the frame time, the row controller 110 may generate a plurality of row control signals RCTRL according to a single mode, which may be a low conversion gain mode or a high conversion gain mode, or may generate a plurality of row control signals RCTRL according to a mixed mode including both the low conversion gain mode and the high conversion gain mode.

[0022] The pixel array 120 may include a plurality of pixels arranged at intersections of a plurality of rows and a plurality of columns. Figure 2As shown, the plurality of pixels may be arranged in a quad pattern. Under the control of the row controller 110, the plurality of pixels may output a plurality of pixel signals VPX for each row to the signal converter 130. For example, pixels arranged in a first row among the plurality of pixels may generate a plurality of pixel signals VPX during a first row line time based on a first row control signal, and pixels arranged in an nth row among the plurality of pixels may generate a plurality of pixel signals VPX during an nth row line time based on an nth row control signal.

[0023] The signal converter 130 may generate a plurality of digital signals DOUT corresponding to the plurality of pixel signals VPX. Hereinafter, all the plurality of digital signals DOUT generated corresponding to all rows (i.e., the first row to the nth row) during the frame time are referred to as image data. For example, the signal converter 130 may include an analog-to-digital converter (ADC).

[0024] The image processor 140 may generate an image IMG based on the plurality of digital signals DOUT. For example, the image processor 140 may generate a high dynamic range image IMG based on at least one first image data generated according to a low conversion gain mode and at least one second image data generated according to a high conversion gain mode.

[0025] Figure 2 It is shown Figure 1 0048. A diagram of an example of a pixel array 120 is shown in FIG.

[0026] Reference Figure 2 , the pixel array 120 may include a plurality of pixels arranged in a quaternary pattern. A quaternary pattern refers to a pattern in which pixels having the same color are arranged in units of 2×2. Figure 2 The first individual row and the second individual row of pixels shown) the first column (which may collectively include Figure 2 The 2×2 unit pixel circuits UP1 in the first individual column and the second individual column shown in FIG. 1 are referred to as first unit pixel circuits, and are arranged in the second row (which may collectively include Figure 2 The 2×2 unit pixel circuits UP2 in the first column (which may collectively include the first and second individual columns) of the third and fourth individual rows shown are referred to as second unit pixel circuits. Generally, a 2×2 unit pixel includes any four adjacent pixels.

[0027] Figure 3 It is shown Figure 2 The circuit diagram of the first unit pixel circuit UP1 and the second unit pixel circuit UP2 and their related circuits (ie, MDCG1, MDCG2, MDCG3, CDCG1, CDCG2 and COL1) is shown.

[0028] Reference Figure 3 , the first unit pixel circuit UP1 may include: first to fourth photodiodes PD10, PD11, PD12 and PD13; first to fourth transmission elements MT10, MT11, MT12 and MT13; a first floating diffusion node FD1; a first reset element MR1; a first driving element MD1 and a first selection element MS1.

[0029] The first unit pixel circuit UP1 may have a structure in which the first to fourth photodiodes PD10 , PD11 , PD12 , and PD13 share a first floating diffusion node FD1 , a first reset element MR1 , a first driving element MD1 , and a first selection element MS1 .

[0030] The first photodiode PD10 may be coupled between a low voltage terminal (e.g., a ground voltage terminal) and the first transmission element MT10. The second photodiode PD11 may be coupled between the low voltage terminal and the second transmission element MT11. The third photodiode PD12 may be coupled between the low voltage terminal and the third transmission element MT12. The fourth photodiode PD13 may be coupled between the low voltage terminal and the fourth transmission element MT13.

[0031] The first transmission element MT10 may be connected between the first photodiode PD10 and the first floating diffusion node FD1. The first transmission element MT10 may selectively connect the first photodiode PD10 to the first floating diffusion node FD1 based on the first transmission control signal TX10 of the first row control signal. The second transmission element MT11 may be connected between the second photodiode PD11 and the first floating diffusion node FD1. The second transmission element MT11 may selectively connect the second photodiode PD11 to the first floating diffusion node FD1 based on the second transmission control signal TX11 of the first row control signal. The third transmission element MT12 may be connected between the third photodiode PD12 and the first floating diffusion node FD1. The third transmission element MT12 may selectively connect the third photodiode PD12 to the first floating diffusion node FD1 based on the third transmission control signal TX12 of the first row control signal. The fourth transmission element MT13 may be connected between the fourth photodiode PD13 and the first floating diffusion node FD1. The fourth transfer element MT13 may selectively couple the fourth photodiode PD13 to the first floating diffusion node FD1 based on a fourth transmission control signal TX13 of the first row control signal.

[0032] Although not shown in the drawings, a first parasitic capacitor may be coupled to the first floating diffusion node FD1 The first parasitic capacitor may store charges generated from the first to fourth photodiodes PD10 , PD11 , PD12 , and PD13 .

[0033] The first reset element MR1 may be coupled between a high voltage terminal (eg, power supply voltage terminal AVDD) and the first floating diffusion node FD1. The first reset element MR1 may selectively couple the high voltage terminal to the first floating diffusion node FD1 based on a first reset control signal RX1 of a first row control signal.

[0034] The first driving element MD1 may be coupled between the high voltage terminal and the first selection element MS1. The first driving element MD1 may drive the first pixel signal VPX1 based on a voltage loaded on the first floating diffusion node FD1.

[0035] The first selection element MS1 may be coupled between the first driving element MD1 and the first column line COL1 The first selection element MS1 may output the first pixel signal VPX1 to the first column line COL1 based on the first selection control signal SX1 of the first row control signal.

[0036] The second unit pixel circuit UP2 may include fifth to eighth photodiodes PD20, PD21, PD22, and PD23; fifth to eighth transmission elements MT20, MT21, MT22, and MT23; a second floating diffusion node FD2; a second reset element MR2; a second driving element MD2, and a second selection element MS2.

[0037] The second unit pixel circuit UP2 may have a structure in which the fifth to eighth photodiodes PD20 , PD21 , PD22 , and PD23 share the second floating diffusion node FD2 , the second reset element MR2 , the second driving element MD2 , and the second selection element MS2 .

[0038] The fifth photodiode PD20 may be coupled between the low voltage terminal and the fifth transmission element MT20. The sixth photodiode PD21 may be coupled between the low voltage terminal and the sixth transmission element MT21. The seventh photodiode PD22 may be coupled between the low voltage terminal and the seventh transmission element MT22. The eighth photodiode PD23 may be coupled between the low voltage terminal and the eighth transmission element MT23.

[0039] The fifth transmission element MT20 may be connected between the fifth photodiode PD20 and the second floating diffusion node FD2. The fifth transmission element MT20 may selectively connect the fifth photodiode PD20 to the second floating diffusion node FD2 based on the fifth transmission control signal TX20 of the second row control signal. The sixth transmission element MT21 may be connected between the sixth photodiode PD21 and the second floating diffusion node FD2. The sixth transmission element MT21 may selectively connect the sixth photodiode PD21 to the second floating diffusion node FD2 based on the sixth transmission control signal TX21 of the second row control signal. The seventh transmission element MT22 may be connected between the seventh photodiode PD22 and the second floating diffusion node FD2. The seventh transmission element MT22 may selectively connect the seventh photodiode PD22 to the second floating diffusion node FD2 based on the seventh transmission control signal TX22 of the second row control signal. The eighth transmission element MT23 may be connected between the eighth photodiode PD23 and the second floating diffusion node FD2. The eighth transmission element MT23 may selectively couple the eighth photodiode PD23 to the second floating diffusion node FD2 based on the eighth transmission control signal TX23 of the second row control signal.

[0040] Although not shown in the drawings, the second parasitic capacitor may be coupled to the second floating diffusion node FD2. The second parasitic capacitor may store charges generated from the fifth to eighth photodiodes PD20, PD21, PD22, and PD23.

[0041] The second reset element MR2 may be coupled between the high voltage terminal AVDD and the second floating diffusion node FD2. The second reset element MR2 may selectively couple the high voltage terminal to the second floating diffusion node FD2 based on a second reset control signal RX2 of the second row control signal.

[0042] The second driving element MD2 may be coupled between the high voltage terminal and the second selection element MS2. The second driving element MD2 may drive the second pixel signal VPX2 based on a voltage loaded on the second floating diffusion node FD2.

[0043] The second selection element MS2 may be coupled between the second driving element MD2 and the first column line COL1 The second selection element MS2 may output the second pixel signal VPX2 to the first column line COL1 based on the second selection control signal SX2 of the second row control signal.

[0044] The related circuits MDCG1, MDCG2, MDCG3, CDCG1, CDCG2 and COL1 may be directly / indirectly connected to the first unit pixel circuit UP1 and the second unit pixel circuit UP2. The related circuits MDCG1, MDCG2, MDCG3, CDCG1, CDCG2 and COL1 may include a first connection circuit MDCG1, a second connection circuit MDCG2, a third connection circuit MDCG3, a first charge storage circuit CDCG1, a second charge storage circuit CDCG2 and a first column line COL1.

[0045] The first connection circuit MDCG1 can selectively connect the dummy unit pixel circuit (not shown) to the first unit pixel circuit UP1 based on the first mode control signal VDCG1. For example, the first connection circuit MDCG1 can electrically connect the dummy floating diffusion node (not shown) included in the dummy unit pixel circuit to the first floating diffusion node FD1 included in the first unit pixel circuit UP1 according to the low conversion gain mode, and electrically disconnect or isolate the dummy floating diffusion node from the first floating diffusion node FD1 according to the high conversion gain mode.

[0046] The first connection circuit MDCG1 may include a first gate capacitor having a MOS structure. The capacitance of the first gate capacitor may be adjusted according to the thickness of the gate oxide of the first connection circuit MDCG1. For example, the capacitance of the first gate capacitor may increase as the thickness of the gate oxide of the first connection circuit MDCG1 decreases.

[0047] The second connection circuit MDCG2 can selectively connect the first unit pixel circuit UP1 to the second unit pixel circuit UP2 based on the second mode control signal VDCG2. For example, the second connection circuit MDCG2 can electrically connect the first floating diffusion node FD1 included in the first unit pixel circuit UP1 to the second floating diffusion node FD2 included in the second unit pixel circuit UP2 according to the low conversion gain mode, and electrically disconnect or isolate the first floating diffusion node FD1 from the second floating diffusion node FD2 according to the high conversion gain mode.

[0048] The second connection circuit MDCG2 may include a second gate capacitor having a MOS structure. The capacitance of the second gate capacitor may be adjusted according to the thickness of the gate oxide of the second connection circuit MDCG2. For example, the capacitance of the second gate capacitor may increase as the thickness of the gate oxide of the second connection circuit MDCG2 decreases.

[0049] The third connection circuit MDCG3 can selectively connect the second unit pixel circuit UP2 to the third unit pixel circuit (not shown) based on the third mode control signal VDCG3. For example, the third connection circuit MDCG3 can electrically connect the second floating diffusion node FD2 included in the second unit pixel circuit UP2 to the third floating diffusion node (not shown) included in the third unit pixel circuit according to the low conversion gain mode, and electrically disconnect or isolate the second floating diffusion node FD2 from the third floating diffusion node according to the high conversion gain mode.

[0050] The third connection circuit MDCG3 may include a third gate capacitor having a MOS structure. The capacitance of the third gate capacitor may be adjusted according to the thickness of the gate oxide of the third connection circuit MDCG3. For example, the capacitance of the third gate capacitor may increase as the thickness of the gate oxide of the third connection circuit MDCG3 decreases.

[0051] The first charge storage circuit CDCG1 may be coupled to a conductive line coupling the first coupling circuit MDCG1, the dummy floating diffusion node, and the first floating diffusion node FD1 to each other. The first charge storage circuit CDCG1 may be a parasitic capacitor or a general capacitor, for example, a metal-insulator-metal (MIM) capacitor.

[0052] The second charge storage circuit CDCG2 may be coupled to a conductive line coupling the second coupling circuit MDCG2, the first floating diffusion node FD1, and the second floating diffusion node FD2 to each other. The second charge storage circuit CDCG2 may be a parasitic capacitor or a general capacitor, for example, a metal-insulator-metal (MIM) capacitor.

[0053] The first column line COL1 may be commonly coupled to the first unit pixel circuit UP1 and the second unit pixel circuit UP2. The first column line COL1 may transmit the first pixel signal VPX1 to the signal converter 130 during the first row line time of the frame time, and transmit the second pixel signal VPX2 to the signal converter 130 during the second row line time of the frame time.

[0054] Hereinafter, an operation example of the image sensing device 100 having the above-described configuration is described.

[0055] Figure 4 is a timing diagram illustrating a method of controlling the image sensing device 100 according to the single mode. The single mode refers to a mode in which the image sensing device 100 operates according to one of the low conversion gain mode and the high conversion gain mode during a frame time.

[0056] Reference Figure 4, the image sensing device 100 can operate according to one of the low conversion gain mode and the high conversion gain mode during the frame time, and generate image data according to the one mode. The low conversion gain mode can be performed under high illumination conditions. In other words, when the average brightness value of the currently captured image is greater than the reference brightness value, that is, when the currently captured image is relatively bright, the low conversion gain mode can be performed. The high conversion gain mode can be performed under low light conditions. In other words, when the average brightness value of the currently captured image is less than the reference brightness value, that is, when the currently captured image is relatively dark, the high conversion gain mode can be performed.

[0057] In addition, the image sensing device 100 may generate first image data according to the low conversion gain mode during the first frame time, and then generate second image data according to the high conversion gain mode during the second frame time. The image sensing device 100 may generate a high dynamic range image IMG based on the first image data and the second image data generated during the first frame time and the second frame time.

[0058] Figure 4 A more detailed description is given by taking the second unit pixel circuit UP2 as an example.

[0059] First, the operation of the second unit pixel circuit UP2 according to the low conversion gain mode LCG is described. When a currently captured image is relatively bright, the low conversion gain mode LCG may be performed.

[0060] During the second reset time B10 of the second row line time, the second unit pixel circuit UP2 can reset the fifth to eighth photodiodes PD20, PD21, PD22 and PD23 and the second floating diffusion node FD2 based on the second reset control signal RX2 and the fifth to eighth transmission control signals TX20, TX21, TX22 and TX23. During the second reset time B10, the second mode control signal VDCG2 is activated, so the first floating diffusion node FD1 and the second floating diffusion node FD2 can be electrically connected through the second connection circuit MDCG2, and the first reset control signal RX1 is disabled, so that the high voltage terminal AVDD and the first floating diffusion node FD1 can be electrically disconnected or electrically isolated.

[0061] The second unit pixel circuit UP2 may generate charges through the fifth to eighth photodiodes PD20, PD21, PD22, and PD23 during the second exposure time B11 of the second row line time. For example, the second unit pixel circuit UP2 may generate charges through the fifth to eighth photodiodes PD20, PD21, PD22, and PD23 during the second exposure time B11. The second reset control signal RX2 may be disabled during the initial time of the second exposure time B11. The initial time may correspond to a third reset time of a third row line time (not shown).

[0062] During the second readout time B12 of the second row line time, the second unit pixel circuit UP2 may sequentially output the second reset signal and the second data signal as the second pixel signal VPX2 according to the second reset control signal RX2, the second selection control signal SX2, and the fifth to eighth transmission control signals TX20, TX21, TX22, and TX23. During the second readout time B12, the second mode control signal VDCG2 may be activated, so that the first floating diffusion node FD1 and the second floating diffusion node FD2 may be electrically connected. Therefore, during the second readout time B12, the total charge capacity of the second unit pixel circuit UP2 is equal to the sum of the capacitance of the second parasitic capacitor connected to the second floating diffusion node FD2, the capacitance of the second charge storage circuit CDCG2, the capacitance of the second gate capacitor included in the second connection circuit MDCG2, the capacitance of the first charge storage circuit CDCG1, and the capacitance of the first parasitic capacitor connected to the first floating diffusion node FD1. Herein, at least one of the capacitance of the second charge storage circuit CDCG2 , the capacitance of the second gate capacitor included in the second coupling circuit MDCG2 , and the capacitance of the first charge storage circuit CDCG1 may be excluded from the total charge capacity according to design.

[0063] Next, the operation of the second unit pixel circuit UP2 according to the high conversion gain mode HCG is described. When a currently captured image is relatively dark, the high conversion gain mode HCG may be performed.

[0064] During the second reset time B10 of the second row line time, the second unit pixel circuit UP2 may reset the fifth to eighth photodiodes PD20, PD21, PD22, and PD23 and the first floating diffusion node FD1 based on the second reset control signal RX2 and the fifth to eighth transmission control signals TX20, TX21, TX22, and TX23. During the second reset time B10, the second mode control signal VDCG2 may be disabled, so the first floating diffusion node FD1 and the second floating diffusion node FD2 may be electrically disconnected or electrically isolated. The second unit pixel circuit UP2 may generate charges through the fifth to eighth photodiodes PD20, PD21, PD22, and PD23 during the second exposure time B11 of the second row line time. The second unit pixel circuit UP2 may generate a second reset signal corresponding to the second reset control signal RX2 as the second pixel signal VPX2 during the second readout time B12 of the second row line time, and then generate a second data signal corresponding to the fifth to eighth photodiodes PD20, PD21, PD22, and PD23 as the second pixel signal VPX2. During the second readout time B12, the second mode control signal VDCG2 may be disabled, thereby electrically disconnecting or isolating the first floating diffusion node FD1 and the second floating diffusion node FD2. Therefore, during the second readout time B12, the total charge capacity of the second unit pixel circuit UP2 may be equal to the capacitance of the second parasitic capacitor coupled to the second floating diffusion node FD2.

[0065] Although the above describes an example in which the first unit pixel circuit UP1 is connected to and used with the second unit pixel circuit UP2 when the second unit pixel circuit UP2 operates, the present disclosure is not limited thereto; a plurality of unit pixel circuits adjacently arranged above and / or below a target unit pixel circuit may be connected to and used with the target unit pixel circuit. For example, when the second unit pixel circuit UP2 operates, the first unit pixel circuit UP1 disposed above the second unit pixel circuit UP2 and the third unit pixel circuit disposed below the second unit pixel circuit UP2 may be connected to and used with the second unit pixel circuit UP2.

[0066] Figures 5 to 10 is a timing diagram illustrating a method of controlling the image sensing device 100 according to a hybrid mode. The hybrid mode refers to a mode in which the image sensing device 100 operates according to a low conversion gain mode LCG and a high conversion gain mode HCG during a frame time.

[0067] Reference Figure 5, the image sensing device 100 may operate according to the low conversion gain mode LCG and the high conversion gain mode HCG during the frame time, and generate the first image data according to the low conversion gain mode LCG and the second image data according to the high conversion gain mode HCG. For example, during the frame time, the image sensing device 100 may generate the second image data corresponding to some charges generated from the four photodiodes according to the high conversion gain mode HCG, and then generate the first image data corresponding to the remaining charges generated from the four photodiodes according to the low conversion gain mode LCG. The image sensing device 100 may generate a high dynamic range image IMG based on the first image data and the second image data generated during the frame time.

[0068] Reference Figure 6 , the image sensing device 100 may operate according to the low conversion gain mode LCG and the high conversion gain mode HCG during the frame time, and generate image data according to the low conversion gain mode LCG and the high conversion gain mode HCG. For example, during the frame time, the image sensing device 100 may generate first image data corresponding to charges generated from one photodiode according to the low conversion gain mode LCG, and then generate second image data corresponding to charges generated from three photodiodes according to the high conversion gain mode HCG. By using the charges generated from the three photodiodes in the high conversion gain mode HCG, the image sensing device 100 may generate second image data with high sensitivity under low illumination conditions. The image sensing device 100 may generate a high dynamic range image IMG based on the first image data and the second image data generated during the frame time.

[0069] Reference Figure 7 , the image sensing device 100 may operate according to the low conversion gain mode LCG and the high conversion gain mode HCG during the frame time, and generate image data according to the low conversion gain mode LCG and the high conversion gain mode HCG. For example, during the frame time, the image sensing device 100 may generate first image data corresponding to charges generated from three photodiodes according to the low conversion gain mode LCG, and then generate second image data corresponding to charges generated from one photodiode according to the high conversion gain mode HCG. By using the charges generated from three photodiodes in the low conversion gain mode LCG and the charges generated from one photodiode in the high conversion gain mode HCG, the image sensing device 100 may generate first image data and second image data with an improved signal-to-noise ratio (SNR). The image sensing device 100 may generate a high dynamic range image IMG based on the first image data and the second image data generated during the frame time.

[0070] Reference Figure 8, the image sensing device 100 may operate according to the low conversion gain mode LCG and the high conversion gain mode HCG during the frame time, and generate image data according to the low conversion gain mode LCG and the high conversion gain mode HCG. For example, during the frame time, the image sensing device 100 may generate first image data corresponding to charges generated from one photodiode according to the low conversion gain mode LCG, and then generate second image data corresponding to charges generated from three photodiodes according to the high conversion gain mode HCG. Specifically, during the corresponding exposure time A11 or B11, the image sensing device 100 may control the voltage level of the transmission control signal TX10 or TX20 associated with the low conversion gain mode LCG to be higher than the inactive level of the transmission control signal TX10 or TX20 and lower than the active level of the transmission control signal TX10 or TX20, thereby transferring some of the charges generated from the photodiode PD10 or PD20 to the corresponding floating diffusion node FD1 or FD2 during the corresponding exposure time A11 or B11. In the low conversion gain mode LCG, the image sensing device 100 may transfer some charges (i.e., charges equal to or greater than a set amount of charges (overflowing charges)) from the photodiode PD10 or PD20 in the low conversion gain mode LCG to the corresponding floating diffusion node FD1 or FD2 in advance during the corresponding exposure time A11 or B11, thereby increasing the dynamic range of the first image data. The image sensing device 100 may generate a high dynamic range image IMG based on the first image data and the second image data generated during the frame time.

[0071] like Figure 8 As shown, when the first image data is generated according to the low conversion gain mode LCG, the image sensing device 100 may read out the image data having the signal level according to the transmission control signal TX10 or TX20, and then read out the image data having the reset level according to the reset control signal RX1 or RX2. When first reading out the image data having the signal level from among the image data having the reset level and the image data having the signal level, the image sensing device 100 may use an incremental sampling method.

[0072] Reference Fig. 9, the image sensing device 100 may operate according to the low conversion gain mode LCG and the high conversion gain mode HCG during the frame time, and generate image data according to the low conversion gain mode LCG and the high conversion gain mode HCG. For example, during the frame time, the image sensing device 100 may generate first image data corresponding to charges generated from three photodiodes according to the low conversion gain mode LCG, and then generate second image data corresponding to charges generated from one photodiode according to the high conversion gain mode HCG. Specifically, the image sensing device 100 may simultaneously read out image data having a signal level generated according to the low conversion gain mode LCG and image data having a signal level generated according to the high conversion gain mode HCG, thereby reducing the corresponding readout time A12 or B12. For example, the second unit pixel circuit UP2 may store the first image data having the signal level generated according to the low conversion gain mode LCG in the first floating diffusion node FD1 of the first unit pixel circuit UP1, and the second image data having the signal level generated according to the high conversion gain mode HCG in the second floating diffusion node FD2, and then simultaneously activate the first selection control signal SX1 and the second selection control signal SX2, thereby simultaneously reading out the first image data having the signal level and the second image data having the signal level. The image sensing device 100 may generate a high dynamic range image IMG based on the first image data and the second image data generated during the frame time.

[0073] Reference Fig.10 , the image sensing device 100 may operate according to the low conversion gain mode LCG and the high conversion gain mode HCG during the frame time, and generate image data according to the low conversion gain mode LCG and the high conversion gain mode HCG. For example, during the frame time, the image sensing device 100 may generate first image data corresponding to charges generated from three photodiodes according to the high conversion gain mode HCG, generate second image data corresponding to charges generated from three photodiodes according to the low conversion gain mode LCG, and then generate third image data corresponding to charges generated from one photodiode according to the high conversion gain mode HCG. The image sensing device 100 may have the above Figure 6 and Figure 7 In other words, the image sensing device 100 can generate first image data with high sensitivity under low illumination conditions, and generate second image data and third image data with improved signal-to-noise ratio (SNR). The image sensing device 100 can generate a high dynamic range image IMG based on the first to third image data generated during the frame time.

[0074] According to an embodiment of the present disclosure, it is possible to increase the charge storage capacity per pixel by using adjacent pixels, and control whether to increase the charge capacity according to a mode.

[0075] According to an embodiment of the present disclosure, it is possible to help optimize the size of a pixel by increasing the charge storage capacity per pixel using adjacent pixels.

[0076] Furthermore, according to the embodiments of the present disclosure, the operation of each mode may be optimized by controlling whether to increase the charge capacity.

[0077] Although the present disclosure has been shown and described with reference to specific embodiments, those skilled in the art can recognize that various changes and modifications can be made based on the present disclosure. Therefore, the disclosed embodiments and any specific details are not restrictive. The present disclosure includes all variations that fall within the scope of the claims.

[0078] CROSS-REFERENCE TO RELATED APPLICATIONS

[0079] This application claims priority to Korean Patent Application No. 10-2020-0135240, filed on October 19, 2020, the disclosure of which is incorporated herein by reference in its entirety.

Claims

1. An image sensing device, comprising: A first unit pixel circuit disposed in a first row, the first unit pixel circuit including a first floating diffusion node and outputting a first pixel signal through a column line; a second unit pixel circuit disposed in a second row, the second unit pixel circuit including a second floating diffusion node and outputting a second pixel signal through the column line; a first connection circuit that selectively connects the first floating diffusion node to the second floating diffusion node based on a first mode control signal; a third unit pixel circuit disposed in a third row, the third unit pixel circuit including a third floating diffusion node and outputting a third pixel signal through the column line; as well as A second coupling circuit selectively couples the second floating diffusion node to the third floating diffusion node based on a second mode control signal.

2. The image sensing device according to claim 1, wherein: The first coupling circuit electrically couples the first floating diffusion node to the second floating diffusion node during a low conversion gain period and electrically isolates the first floating diffusion node from the second floating diffusion node during a high conversion gain period.

3. The image sensing device according to claim 1, wherein: The first coupling circuit includes a gate capacitor having a MOS structure.

4. The image sensing device according to claim 1, in, The first unit pixel circuit includes a plurality of first photodiodes sharing the first floating diffusion node, and The second unit pixel circuit includes a plurality of second photodiodes sharing the second floating diffusion node.

5. The image sensing device according to claim 1, in, The first coupling circuit electrically couples the first floating diffusion node to the second floating diffusion node during a low conversion gain period and electrically isolates the first floating diffusion node from the second floating diffusion node during a high conversion gain period, and The second coupling circuit electrically couples the second floating diffusion node to the third floating diffusion node during the low conversion gain period, and electrically isolates the second floating diffusion node from the third floating diffusion node during the high conversion gain period.

6. The image sensing device according to claim 1, wherein: Each of the first coupling circuit and the second coupling circuit includes a gate capacitor having a MOS structure.

7. The image sensing device according to claim 1, in, The first unit pixel circuit includes a plurality of first photodiodes sharing the first floating diffusion node, wherein the second unit pixel circuit includes a plurality of second photodiodes sharing the second floating diffusion node, and The third unit pixel circuit includes a plurality of third photodiodes that share the third floating diffusion node.

8. An operating method of the image sensing device according to any one of claims 1 to 7, the operating method comprising the following steps: During a first frame time, electrically connecting a plurality of floating diffusion nodes respectively included in a plurality of unit pixel circuits and arranged in one column; as well as During the first frame time, image data is generated by any one of the plurality of unit pixel circuits according to a low conversion gain mode.

9. The operating method according to claim 8, further comprising the following steps: During a second frame time, electrically isolating the plurality of floating diffusion nodes; as well as Image data is generated by any one of the plurality of unit pixel circuits according to the high conversion gain mode.

10. An operating method of an image sensing device, the operating method comprising the following steps: during a first frame time, alternately operating each of the plurality of unit pixel circuits in a low conversion gain mode and a high conversion gain mode; as well as During the first frame time, each of the plurality of unit pixel circuits alternately generates image data according to the low conversion gain mode and generates image data according to the high conversion gain mode, The step of alternately operating includes the following steps: selectively connecting a plurality of floating diffusion nodes respectively included in the plurality of unit pixel circuits and arranged in one column according to the low conversion gain mode and the high conversion gain mode, wherein the step of alternately operating comprises: operating in the high conversion gain mode, operating in the low conversion gain mode, and then operating in the high conversion gain mode, and The alternately generating step includes: generating first image data according to the high conversion gain mode, generating second image data according to the low conversion gain mode, and then generating third image data according to the high conversion gain mode.

11. The operating method according to claim 10, wherein: The step of alternately operating includes the step of electrically coupling the plurality of floating diffusion nodes in the low conversion gain mode.

12. The operating method according to claim 10, in, The step of alternately operating comprises: operating in the high conversion gain mode and then operating in the low conversion gain mode, and The alternately generating step includes: generating image data according to the high conversion gain mode, and then generating image data according to the low conversion gain mode.

13. The operating method according to claim 10, in, generating first image data based on some charges generated by two or more photodiodes among a plurality of photodiodes included in each of the plurality of unit pixel circuits, wherein the second image data is generated based on the remaining charges generated by the two or more photodiodes, and The third image data is generated based on charges generated by one of the remaining photodiodes in the plurality of photodiodes.

14. The operating method according to claim 10, in, The step of alternately operating comprises: operating in the low conversion gain mode and then operating in the high conversion gain mode, and The alternately generating step includes: generating first image data according to the low conversion gain mode, and then generating second image data according to the high conversion gain mode.

15. The operating method according to claim 14, in, generating the first image data based on charges generated by any one of a plurality of photodiodes in each of the plurality of unit pixel circuits, and The second image data is generated based on the charges generated by other photodiodes.

16. The operating method according to claim 14, in, generating the first image data based on charges generated by two or more photodiodes among a plurality of photodiodes included in each of the plurality of unit pixel circuits, and Wherein, the second image data is generated based on the charge generated by each of the other photodiodes.

17. The operating method according to claim 10, in, The step of alternately operating comprises: operating in the low conversion gain mode and then operating in the high conversion gain mode, The step of alternately generating includes: generating first image data according to the low conversion gain mode, and then generating second image data according to the high conversion gain mode, and The step of alternately operating further includes: transferring some of the charges generated by the plurality of photodiodes during the corresponding exposure time to the corresponding floating diffusion node based on the corresponding transfer control signal by each of the plurality of unit pixel circuits.

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