Low threshold voltage transistor bias circuit

Abstract

Embodiments of this application relate to a low threshold voltage transistor bias circuit. A current mirror circuit (200) includes a first current mirror transistor (206), a second current mirror transistor (208), and a bias circuit (204). The first current mirror transistor (206) includes a gate (206G) and a drain (206D). The second current mirror transistor (208) includes a gate (208G) coupled to the gate (206G) of the first current mirror transistor (206). The first current mirror transistor (206) and the second current mirror transistor (208) are low threshold voltage transistors. The bias circuit (204) is coupled to the gate (206G) and the drain (206D) of the first current mirror transistor (206). The bias circuit (204) is configured to bias the first current mirror transistor (206) when the threshold voltage of the first current mirror transistor (206) is negative to operate in saturation mode.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and more specifically to low threshold voltage transistor bias circuits. Background Technology

[0002] Transistors with various threshold voltages can be fabricated. A threshold voltage is the voltage that must be applied to the gate region to induce current between the source and drain of the transistor. Metal-oxide-semiconductor field-effect transistors (MOSFETs) can be fabricated with a standard threshold voltage (e.g., 0.6 volts) or a low threshold voltage (e.g., 0.15 volts). Low threshold voltage transistors can be used to implement circuits that may operate at supply voltages lower than those of standard threshold voltage transistors. Circuit power consumption can be reduced by using a lower supply voltage. Summary of the Invention

[0003] This document discloses a bias circuit for maintaining saturation-mode operation of a low threshold voltage transistor. In one example, a circuit includes a power supply terminal, a ground terminal, a low threshold voltage transistor, and a bias circuit. The low threshold voltage transistor includes a gate and a drain. The bias circuit includes a first bias circuit transistor, a second bias circuit transistor, and a resistor. The first bias circuit transistor includes a first current terminal and a second current terminal. The first current terminal is coupled to the power supply terminal. The second bias circuit transistor includes a first current terminal and a second current terminal. The first current terminal of the second bias circuit transistor is coupled to the ground terminal. The resistor is coupled to the second current terminal of both the first and second bias circuit transistors. The resistor is also coupled between the gate and drain of the low threshold voltage transistor.

[0004] In another example, a current mirror circuit includes a first current mirror transistor, a second current mirror transistor, and a bias circuit. The first current mirror transistor includes a gate and a drain. The second current mirror transistor includes a gate coupled to the gate of the first current mirror transistor. Both the first and second current mirror transistors are low threshold voltage transistors. The bias circuit is coupled to the gate and drain of the first current mirror transistor. The bias circuit is configured to bias the first current mirror transistor to operate in saturation mode when the threshold voltage of the first current mirror transistor is negative.

[0005] In a further example, a linear voltage regulator includes a current mirror circuit and a bias circuit. The current mirror circuit includes a first current mirror. The first current mirror includes a first low threshold voltage transistor and a second low threshold voltage transistor. The first low threshold voltage transistor includes a gate and a drain. The second low threshold voltage transistor includes a gate coupled to the gate of the first low threshold voltage transistor. The bias circuit includes a resistor coupled between the drain of the first low threshold voltage transistor and the gate of the first low threshold voltage transistor. The resistor is also coupled between a second current mirror and a third current mirror. Attached Figure Description

[0006] Figure 1 A schematic diagram showing a conventional current mirror using a diode connected to a low threshold voltage transistor.

[0007] Figure 2 A schematic diagram of a current mirror circuit is shown, which includes a bias circuit that maintains saturation mode operation of a low threshold voltage transistor.

[0008] Figure 3 A schematic diagram showing a portion of a low-dropout linear voltage regulator includes a current mirror circuit, which includes a bias circuit to maintain saturation mode operation of a low threshold voltage transistor.

[0009] Figure 4 A schematic diagram showing a portion of a low-dropout linear voltage regulator includes a current mirror circuit, which includes a bias circuit to maintain saturation mode operation of a low threshold voltage transistor.

[0010] Figure 5 exhibit Figure 2 Comparison of the error and temperature of current mirror circuits and current mirror circuits using diodes to connect transistors.

[0011] Figure 6 exhibit Figure 2 The error of the current mirror circuit and the current mirror circuit using diodes connected to standard threshold voltage transistors are compared with the power supply voltage. Detailed Implementation

[0012] Metal-oxide-semiconductor field-effect transistors (MOSFETs) are typically manufactured with one of three threshold voltage ranges. In a natural threshold voltage transistor, the threshold voltage is not altered by the use of implants or bulk doping and is approximately 0 volts (V) ± 0.1 V. In a low threshold voltage transistor, the threshold voltage is slightly altered by the use of implants or bulk doping and is approximately 0.15 V ± 0.1 V. In a standard threshold voltage transistor, the threshold voltage is set by the use of implants or bulk doping and is approximately 0.6 V to 0.8 V, with a range of approximately + / - 0.05 V. Standard threshold voltage transistors can be used in a wide range of low-leakage, analog, and digital applications. However, due to the higher threshold voltage, the minimum supply voltage that can be used with standard threshold voltage transistors is higher than that of natural and low threshold voltage transistors.

[0013] In low threshold voltage transistors, the threshold voltage can change polarity (e.g., from positive to negative) at higher temperatures and process corners. Because the threshold voltage of a low threshold voltage transistor can be negative, saturation of the low threshold voltage transistor cannot be guaranteed when a diode is connected, and therefore a diode connection cannot be used to implement current mirrors with low threshold voltage transistors in wide temperature ranges, such as Class 1 (-40°C to 125°C) or Class 0 (-40°C to 150°C) automotive requirements.

[0014] This document describes a bias circuit that enables saturation-mode operation of a low threshold voltage transistor even when the threshold voltage of the transistor is negative. This bias circuit allows the low threshold voltage transistor to be used in current mirrors and other circuits as an application that benefits from a reduced supply voltage, such as part of a low-dropout linear voltage regulator, while maintaining the ability to operate over a wide temperature range.

[0015] Figure 1 This diagram illustrates a current mirror 100 (a conventional current mirror) using a diode-connected low threshold voltage transistor. The current mirror 100 includes transistor 102, transistor 104, current source 106, and resistor 108. Transistors 102 and 104 are low threshold voltage transistors. Transistor 102 is diode-connected. The source terminal 102S of transistor 102 is coupled to ground terminal 112. The gate terminal 102G of transistor 102 is coupled to the drain terminal 102D of transistor 102. Current source 106 is coupled to power supply terminal 110 and to the drain terminal 102D of transistor 102.

[0016] The source terminal 104S of transistor 104 is coupled to ground terminal 112. The gate terminal 104G of transistor 104 is coupled to the gate terminal 102G of transistor 102. Resistor 108 is coupled to power supply terminal 110 and to drain terminal 104D of transistor 104. The current from current source 106 through transistor 102 is mirrored in transistor 104. In some current mirrors (e.g., current mirrors using diodes connected to standard threshold transistors), by providing a gate-source voltage greater than or equal to V... GS Subtract the transistor's threshold voltage (V) TH The drain-source voltage (V) DS (V) DS ≥V GS -V TH This ensures the transistor operates in saturation mode. For a standard threshold voltage transistor, the threshold voltage is always positive and is within V... DS =V GS At that time, the transistor operates in saturation mode. However, because transistors 102 and 104 are low threshold voltage transistors, the threshold voltage changes polarity and becomes negative at high temperatures. For a negative threshold voltage, V DS =V GS Operation in saturation mode will not be provided. Transistors 102 and 104 can operate in the linear region, and the difference (error) in the current flowing in transistors 102 and 104 can be high (e.g., 50%-100% error), making the current mirror 100 unsuitable for most applications.

[0017] Figure 2 A schematic diagram of a current mirror circuit 200 is shown, comprising a bias circuit that maintains low threshold voltage transistors in saturation mode operation at high temperatures. The current mirror circuit 200 includes a current mirror 202, a bias circuit 204, and a current source 224. The current mirror 202 includes current mirror transistors 206 and 208. Current mirror transistors 206 and 208 are low threshold voltage transistors. In various embodiments, current mirror transistors 206 and 208 may be n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) or p-channel MOSFETs. The gate terminal 206G of current mirror transistor 206 is coupled to the gate terminal 208G of current mirror transistor 208. The source terminal 206S of current mirror transistor 206 is coupled to ground terminal 228. The source terminal 208S of current mirror transistor 208 is also coupled to ground terminal 228. The drain terminal 206D of current mirror transistor 206 is coupled to the current source 224. The current flowing in the drain terminal 206D of the current mirror transistor 206 is mirrored by the current flowing in the drain terminal 208D of the current mirror transistor 208.

[0018] Unlike transistor 102 in current mirror 100, current mirror transistor 206 is not diode-connected. The drain terminal 206D and gate terminal 206G of current mirror transistor 206 are coupled to bias circuit 204. Bias circuit 204 applies bias to current mirror 202 to maintain operation in saturation mode within the temperature range. Bias circuit 204 includes resistor 220, current source 222, current mirror 230, and current mirror 232. Resistor 220 is connected across the drain terminal 206D and gate terminal 206G of current mirror transistor 206. Current mirrors 230 and 232 control the current in resistor 220. In current mirror circuit 200, the drain-source voltage of current mirror transistor 206 is the gate-source voltage of current mirror transistor 206 plus the voltage across resistor 220 (V). shift (V) DS =V GS +V shift Use the appropriate selected V). shift The drain-source voltage generated by the voltage allows the current mirror transistor 206 to operate in saturation mode even when the threshold voltage of the current mirror transistor 206 is negative. If V shift If the voltage is too high, then operation at low supply voltages is prohibited. If V shift If it's too small, then the compensation for changes in threshold voltage polarity will be insufficient. 50-100 millivolts V shift Voltage provides improved performance in the implementation of current mirror circuit 200. In current mirror circuit 200, the error of the mirrored current can be significantly smaller than the error current in current mirror 100 (e.g., less than 5% error between the currents in current mirror transistor 206 and current mirror transistor 208).

[0019] Resistor 220 includes a terminal 220A coupled to the drain terminal 206D of current mirror transistor 206 and a terminal 220B coupled to the gate terminal 206G of current mirror transistor 206. Current mirror 230 supplies current to resistor 220, and current mirror 232 draws current from resistor 220. Current mirror 230 includes bias circuit transistors 210, 214, and 216. Bias circuit transistors 210, 214, and 216 are standard threshold voltage transistors. Bias circuit transistors 210, 214, and 216 may be p-channel MOSFETs. Bias circuit transistor 214 is diode-connected. Bias circuit transistor 214 includes a source terminal 214S coupled to power supply terminal 226, a drain terminal 214D coupled to current source 222, and a gate terminal 214G coupled to the drain terminal 214D of bias circuit transistor 214. Bias circuit transistor 216 includes a source terminal 216S coupled to power supply terminal 226 and a gate terminal 216G coupled to the gate terminal 214G of bias circuit transistor 214. Bias circuit transistor 210 includes a source terminal 210S coupled to power supply terminal 226, a gate terminal 210G coupled to the gate terminal 214G of bias circuit transistor 214, and a drain terminal 210D coupled to terminal 220A of resistor 220. The current through bias circuit transistor 214 is mirrored in bias circuit transistors 216 and 210. The current flowing through bias circuit transistor 214 can be relatively low (e.g., 100 nanoamps).

[0020] Because V shift The value is typically on the order of 100 millivolts (mV), so some implementations of resistor 220 use a high-thin-layer resistor with a value of 1 MegOhm to absorb a current of 100 mV / 1 MegOhm = 0.1 microamps (µA) or 100 nanoamps (nA). This gives the bias circuit 204 low quiescent current (IQ) loss. The high-thin-layer resistor is also implemented with a small area. Therefore, the bias circuit 204 has low IQ and low area overhead. In some implementations of the current mirror circuit 200, resistor 220 is implemented using a MOSFET.

[0021] The current in resistor 220 is also chosen to be 10 times smaller than the current supplied from current source 224, minimizing errors caused by cross-feeding between the branch to current mirror transistor 206 and the branch formed by resistor 220 and bias circuit transistor 212. Making the current in resistor 220 very small is a reliable way to ensure low cross-feeding.

[0022] The current mirror 232 includes bias circuit transistors 212 and 218. Bias circuit transistors 212 and 218 are standard threshold voltage transistors. Bias circuit transistors 212 and 218 may be n-channel MOSFETs. Bias circuit transistor 218 is diode-connected. Bias circuit transistor 218 includes a source terminal 218S coupled to ground terminal 228, a drain terminal 218D coupled to drain terminal 216D of bias circuit transistor 216, and a gate terminal 218G coupled to drain terminal 218D. Bias circuit transistor 212 includes a drain terminal 212D coupled to terminal 220B of resistor 220, a source terminal 212S coupled to ground terminal 228, and a gate terminal 212G coupled to gate terminal 218G of bias circuit transistor 218.

[0023] The transistors 214, 216, 210, 218, and 212 in the bias circuit are sized to avoid imposing significant area losses. The mismatch specification of the bias circuit 204 is relaxed because the goal is to achieve V... shift The reasonable variation value and range. Bias circuit transistors 210 and 212 supply and absorb the same current respectively, thereby causing V... shift This becomes a floating voltage source applied between the drain terminal 206D and the gate terminal 206G of the current mirror transistor 206. Bias circuit transistors 210 and 212 ensure that the current in resistor 220 is not shunted into any other circuit. The position of bias circuit transistor 212 allows the current mirror transistor 206 to freely set its gate terminal potential to meet the current requirements of the current source 224. Because the drain of bias circuit transistor 212 provides its own high impedance, bias circuit transistor 212 can remain saturated even when the gate voltage of the current mirror transistor 206 is forced onto it, and resistor 220 provides V to the drain voltage of the current mirror transistor 206. shift promote.

[0024] Some examples of bias circuit 204 are implemented using bipolar junction transistors instead of MOSFETs. For example, bias circuit transistors 210, 214, and 216 are PNP bipolar junction transistors, and bias circuit transistors 212 and 218 are NPN bipolar junction transistors.

[0025] Figure 3This diagram illustrates a portion of a linear voltage regulator 300 (low dropout linear voltage regulator) that sets a current limit to protect the linear voltage regulator 300 and its attached load circuitry from overcurrent or short circuits. The linear voltage regulator 300 includes a power transistor 306, a duplicated transistor 304, and a current mirror circuit 303. The power transistor 306 supplies current to power the load circuitry. The duplicated transistor 304 is a much smaller example of the power transistor 306, a scaled-down version carrying the load current flowing in the power transistor 306. The current mirror circuit 303 is a p-channel implementation of the current mirror circuit 200. The power transistor 306 and the duplicated transistor 304 are n-channel MOSFETs. The current mirror circuit 303 includes a current mirror 302 and a bias circuit 204. The use of the current mirror circuit 303 in the current limit detection circuitry of the linear voltage regulator 300 allows the linear voltage regulator 300 to operate at output voltages as low as 0.6 volts (Vout). This low output voltage support would be highly impractical for standard threshold voltage transistors whose threshold voltage would be on the order of 0.5-0.6V, and therefore the load circuit below the current mirror 302 would have no remaining space.

[0026] The current mirror circuit 303 includes a current mirror transistor 308 and a current mirror transistor 310. Both current mirror transistors 308 and 310 are low threshold voltage transistors (p-channel MOSFETs). The gate terminal 308G of the current mirror transistor 308 is coupled to the gate terminal 310G of the current mirror transistor 310. The source terminal 308S of the current mirror transistor 308 is coupled to the source terminal 306S of the power transistor 306. The source terminal 310S of the current mirror transistor 310 is coupled to the source terminal 304S of the replica transistor 304. The current flowing in the current mirror transistor 308 is mirrored by the current flowing in the current mirror transistor 310.

[0027] The current mirror transistor 308 is not diode-connected. The drain terminal 308D and gate terminal 308G of the current mirror transistor 308 are coupled to the bias circuit 204. The gate terminal 308G of the current mirror transistor 308 is coupled to terminal 220A of the resistor 220, and the drain terminal 308D of the current mirror transistor 308 is coupled to terminal 220B of the resistor 220.

[0028] Transistors 316, 318, 320, and 322 are coupled to a current mirror 302. The gate terminals of transistors 316 and 320 are set at a voltage VCAS, and the gate terminals of transistors 318 and 322 are set at a constant reference current (not shown) VBIAS. When the current in power transistor 306 exceeds a predefined limit, the NMOS current reference formed by transistors 316, 318, 320, and 322 cannot provide the required current for replica transistors 304 and 310, and node V1 is pulled high. Node V1 is coupled to output circuit 312, and when node V1 is pulled high, transistor 324 is turned on, and signal 314 is subsequently pulled low to indicate that the current flowing in power transistor 306 has exceeded a predefined limit.

[0029] Figure 4 This diagram illustrates a portion of a linear voltage regulator 400 (low-dropout linear voltage regulator) that provides leakage compensation when operating under no-load or very low-load conditions. The linear voltage regulator 400 includes an example of a power transistor 402, a duplicated transistor 404, a current mirror circuit 200, and a current mirror circuit 406. The power transistor 402 and the duplicated transistor 404 are p-channel MOSFETs. The duplicated transistor 404 is a scaled-down example of the power transistor 402 (e.g., N:1, where N is 100-1000).

[0030] The gate terminal 404G of the duplicate transistor 404 is coupled to the source terminal 404S of the duplicate transistor 404, such that the only drain current is due to various MOSET leakage mechanisms, such as subthreshold leakage. When there is no load, the leakage current of the power transistor 402 can charge the output capacitor COUT coupled to the drain terminal 402D of the power transistor 402. The capacitor COUT can theoretically charge to VDD and cause damage to the load circuit. The control loop of the regulator can at most pull the gate terminal 402G of the power transistor 402 to the same potential as VDD, which is insufficient to suppress the leakage current of the power transistor 402. In the low-dropout linear voltage regulator 400, current mirror circuits 200 and 406 provide leakage compensation for low supply voltage and low output voltage.

[0031] The current mirror circuit 406 is a p-channel implementation of the current mirror circuit 200. Both the current mirror circuit 200 and the current mirror circuit 406 compensate for leakage in the power transistor 402, achieving output voltages as low as 0.5 volts over a wide temperature range.

[0032] The current mirror circuit 406 includes a current mirror 408 and a bias circuit 410. The current mirror 408 includes current mirror transistors 412 and 414. Current mirror transistors 412 and 414 are low threshold voltage transistors (p-channel MOSFETs). The gate terminal 412G of current mirror transistor 412 is coupled to the gate terminal 414G of current mirror transistor 414. The source terminal 412S of current mirror transistor 412 is coupled to the drain terminal 402D of power transistor 402. The source terminal 414S of current mirror transistor 414 is coupled to the drain terminal 404D of replica transistor 404. The current flowing in current mirror transistor 412 is mirrored by the current flowing in current mirror transistor 414.

[0033] The current mirror transistor 414 is not diode-connected. The drain terminal 414D and gate terminal 414G of the current mirror transistor 414 are coupled to a bias circuit 410. The bias circuit 410 applies a bias voltage to the current mirror 408 to maintain operation in saturation mode within the temperature range. The bias circuit 410 includes a resistor 220, a current source 432, a current mirror 440, and a current mirror 442. Resistor 220 is connected across the drain terminal 414D and gate terminal 414G of the current mirror transistor 414. Current mirrors 440 and 442 control the current in resistor 220. The drain terminal 412D of the current mirror transistor 412 is coupled to the drain terminal 206D of the current mirror transistor 206, and the drain terminal 414D of the current mirror transistor 414 is coupled to the drain terminal 208D of the current mirror transistor 208. In the linear voltage regulator 400, the voltage (V) across resistor 220 is used. shift The resulting drain-source voltage allows current mirror transistors 414 and 412 to operate in saturation mode even when the threshold voltages of current mirror transistors 412 and 414 are negative.

[0034] Resistor 220 of bias circuit 410 includes terminal 220A coupled to drain terminal 414D of current mirror transistor 414 and terminal 220B coupled to gate terminal 414G of current mirror transistor 414. Current mirror 442 supplies current to resistor 220, and current mirror 440 draws current from resistor 220. Current mirror 440 includes bias circuit transistors 420, 424, and 426. Bias circuit transistors 420, 424, and 426 are standard threshold voltage transistors. Bias circuit transistors 420, 424, and 426 may be n-channel MOSFETs. Bias circuit transistor 424 is diode-connected. Bias circuit transistor 424 includes a source terminal 424S coupled to ground terminal 228, a drain terminal 424D coupled to current source 432, and a gate terminal 424G coupled to the drain terminal 424D of bias circuit transistor 424. Bias circuit transistor 426 includes a source terminal 426S coupled to ground terminal 228 and a gate terminal 426G coupled to the gate terminal 424G of bias circuit transistor 424. Bias circuit transistor 420 includes a source terminal 420S coupled to ground terminal 228, a gate terminal 420G coupled to the gate terminal 424G of bias circuit transistor 424, and a drain terminal 420D coupled to terminal 220A of resistor 220. The current through bias circuit transistor 424 is mirrored in bias circuit transistors 426 and 420. The current flowing through bias circuit transistor 424 can be relatively low (e.g., 100 nanoamps).

[0035] The current mirror 442 includes bias circuit transistors 422 and 428. Bias circuit transistors 422 and 428 are standard threshold voltage transistors. Bias circuit transistors 422 and 428 may be p-channel MOSFETs. Bias circuit transistor 428 is diode-connected. Bias circuit transistor 428 includes a source terminal 428S coupled to power supply terminal 226, a drain terminal 428D coupled to drain terminal 426D of bias circuit transistor 426, and a gate terminal 428G coupled to drain terminal 428D. Bias circuit transistor 422 includes a drain terminal 422D coupled to terminal 220B of resistor 220, a source terminal 422S coupled to power supply terminal 226, and a gate terminal 422G coupled to gate terminal 428G of bias circuit transistor 428.

[0036] Some examples of bias circuit 410 are implemented using bipolar junction transistors instead of MOSFETs. For example, bias circuit transistors 420, 424, and 426 are NPN bipolar junction transistors, and bias circuit transistors 422 and 428 are PNP bipolar junction transistors.

[0037] The leakage of power transistor 402 is replicated in replica transistor 404. The replicated leakage is amplified proportionally using current mirror 202 and discharged from the output capacitor COUT coupled to the drain terminal 402D of power transistor 402. If the mirror is accurate, the leakage of power transistor 402 is shunt to current mirror transistor 412, and the voltage of current mirror transistor 206 and COUT capacitor does not rise.

[0038] Figure 5 The comparison of current mirror error with temperature is shown as a percentage of the current (also referred to as the reference current) in the diode-connected shunt of various current mirror circuits. Due to linear mode operation, the error 504 of current mirror 100 increases significantly with increasing temperature. The error 506 of a current mirror using a standard threshold voltage (e.g., an embodiment of current mirror 100) does not increase with temperature. The error 502 of current mirror circuits 200, 303, or 406 is stable over the temperature range and is lower than either error 506 or error 504.

[0039] Figure 6 This paper compares the current mirror ratio error (%) with the supply voltage for a current mirror circuit using the bias circuit described herein and a current mirror circuit using a diode connected to a standard threshold voltage transistor. The error 604 in the current mirror circuit using a low threshold voltage transistor and the bias circuit described herein (e.g., current mirror circuit 200, current mirror circuit 303, or current mirror circuit 406) is significantly lower at low supply voltages than the error 602 produced in the current mirror circuit using a standard threshold voltage transistor. Furthermore, using the low threshold voltage transistor and the bias circuit described herein, the error is maintained below 0.5% for supply voltages as low as 0.4 volts. Using a diode connected to a standard threshold voltage transistor, the error is as high as 4%, which affects the accuracy of the application circuit (e.g., ...). Figure 4 The accuracy of the leakage compensation circuit can cause output voltage errors or introduce... Figure 3 Errors in the current-limiting circuit cause it to trip too early or too late.

[0040] The implementations of the bias circuits described herein (e.g., the implementations of bias circuit 204 or bias circuit 410) can also be used in circuits other than current mirror circuits to bias low threshold voltage transistors for saturation mode operation over a temperature range.

[0041] In this specification, the term "coupled" may encompass a connection, communication, or signal path that achieves a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: in a first instance, device A is coupled to device B, or in a second instance, if the intermediary component C substantially does not alter the functional relationship between device A and device B, then device A is coupled to device B via the intermediary component C such that device B is controlled by device A via a control signal generated by device A.

[0042] Modifications are possible in the described embodiments, and other embodiments are also possible within the scope of the claims.

Claims

1. A circuit comprising: Power terminals; Grounding terminal; A low threshold voltage transistor, comprising: Gate; and Drain; The bias circuit includes: The first bias circuit transistor includes A first current terminal, which is coupled to the power supply terminal; and Second current terminal; The second bias circuit transistor includes: A first current terminal, which is coupled to the ground terminal; and Second current terminal; and A resistor, which is coupled to the second current terminal of the first bias circuit transistor and the second current terminal of the second bias circuit transistor, and is coupled between the gate and the drain of the low threshold voltage transistor. The first bias circuit transistor is configured to supply current to the resistor, the second bias circuit transistor is configured to draw current from the resistor, the drain-source voltage across the low threshold voltage transistor is equal to the sum of the gate-source voltage of the low threshold voltage transistor and the voltage across the resistor, and the bias circuit is configured to apply bias to the low threshold voltage transistor to operate in saturation mode when the threshold voltage of the low threshold voltage transistor is negative.

2. The circuit according to claim 1, wherein the bias circuit comprises: The third bias circuit transistor includes: A first current terminal, which is coupled to the power supply terminal; The control terminal is coupled to the control terminal of the first bias circuit transistor; and The second current terminal is coupled to the control terminal of the third bias circuit transistor.

3. The circuit according to claim 2, further comprising: A current source, comprising: The first terminal is coupled to the second current terminal of the third bias circuit transistor; and The second terminal is coupled to the grounding terminal.

4. The circuit according to claim 1, wherein the bias circuit comprises: The third bias circuit transistor includes: A first current terminal, which is coupled to the power supply terminal; and The control terminal is coupled to the control terminal of the first bias circuit transistor.

5. The circuit according to claim 4, wherein: The third bias circuit transistor includes a second current terminal; and The bias circuit includes: The fourth bias circuit transistor includes: A first current terminal is coupled to the second current terminal of the third bias circuit transistor; The second current terminal is coupled to the ground terminal; and The control terminal is coupled to the first current terminal of the fourth bias circuit transistor.

6. The circuit according to claim 1, wherein: The resistor is coupled between the second current terminal of the first bias circuit transistor and the second current terminal of the second bias circuit transistor.

7. The circuit of claim 6, wherein the low threshold voltage transistor is a p-channel field-effect transistor.

8. The circuit of claim 6, wherein the low threshold voltage transistor is an n-channel field-effect transistor.

9. A current mirror circuit, comprising: The first current mirror transistor includes: Gate; and Drain; The second current mirror transistor includes: The gate, which is coupled to the gate of the first current mirror transistor; and A bias circuit is coupled to the gate and drain of the first current mirror transistor and configured to apply a bias to the first current mirror transistor when the threshold voltage of the first current mirror transistor is negative to operate in saturation mode. The bias circuit includes a resistor, a first current mirror, and a second current mirror. The resistor has a first resistor terminal and a second resistor terminal. The first resistor terminal is coupled to the first current mirror and to the drain of the first current mirror transistor. The second resistor terminal is coupled to the second current mirror and to the gate of the first current mirror transistor. The first current mirror is configured to supply current to the resistor, and the second current mirror is configured to draw current from the resistor. The drain-source voltage across the first current mirror transistor is equal to the sum of the gate-source voltage of the first current mirror transistor and the voltage across the resistor.

10. The current mirror circuit of claim 9, wherein the bias circuit comprises: A first current mirror, configured to supply a first current to the resistor; and A second current mirror is configured to absorb the first current from the resistor.

11. The current mirror circuit of claim 10, wherein the first current mirror comprises: The first bias circuit transistor is connected as a diode and has a standard threshold voltage; and The second bias circuit transistor has a standard threshold voltage and is configured to supply the first current to the resistor.

12. The current mirror circuit according to claim 11, wherein: The second current mirror includes: The third bias circuit transistor is connected as a diode and has a standard threshold voltage; and A fourth bias circuit transistor, having a standard threshold voltage and configured to draw the first current from the resistor; and The first current mirror includes a fifth bias circuit transistor configured to supply a second current to the third bias circuit transistor.

13. A linear voltage regulator, comprising: A current mirror circuit includes: The first current mirror comprises: A first low threshold voltage transistor, comprising: Gate; and Drain; The second low threshold voltage transistor includes a gate coupled to the gate of the first low threshold voltage transistor; The bias circuit includes: A resistor is coupled between the drain and the gate of the first low threshold voltage transistor and between the second and third current mirrors. The second current mirror is configured to supply current to the resistor, the third current mirror is configured to draw current from the resistor, the drain-source voltage across the first low threshold voltage transistor is equal to the sum of the gate-source voltage of the first low threshold voltage transistor and the voltage across the resistor, and the bias circuit is configured to apply bias to the first low threshold voltage transistor to operate in saturation mode when the threshold voltage of the first low threshold voltage transistor is negative.

14. The linear voltage regulator of claim 13, wherein the second current mirror comprises: The first bias circuit transistor, which is connected as a diode, includes: Drain; and The gate, which is coupled to the drain of the first bias circuit transistor; The second bias circuit transistor includes: The gate, which is coupled to the gate of the first bias circuit transistor; and The drain, which is coupled to the resistor; and The third bias circuit transistor includes: A gate, which is coupled to the gate of the first bias circuit transistor; and Drain electrode.

15. The linear voltage regulator of claim 14, wherein the third current mirror comprises: The fourth bias circuit transistor, which is connected as a diode, includes: The drain, which is coupled to the drain of the third bias circuit transistor of the second current mirror; and The gate, which is coupled to the drain of the fourth bias circuit transistor; The fifth bias circuit transistor includes: The gate, which is coupled to the gate of the fourth bias circuit transistor; and The drain is coupled to the resistor.

16. The linear voltage regulator of claim 14, wherein the bias circuit further includes a current source coupled to the drain of the first bias circuit transistor.

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