Display substrate and display device

Abstract

The application provides a display substrate and a display device, wherein the display substrate comprises a substrate, a photosensitive circuit and a display circuit arranged on the substrate, wherein the photosensitive circuit comprises a photodiode and a first driving transistor coupled with the photodiode; the display circuit comprises a display device, a second driving transistor and a switch transistor coupled with the display device respectively; the distance between the corresponding gate layer and the active layer of the first driving transistor and the second driving transistor is greater than the distance between the corresponding gate layer and the active layer of the switch transistor. The display quality is improved.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic technology, and in particular to a display substrate and a display device. Background Technology

[0002] Visible light communication technology uses visible light as the information carrier. This technology can directly utilize light-emitting diodes (LEDs) as the signal source, achieving advantages such as low-energy communication and being green and low-carbon. Furthermore, as an optical communication technology, it effectively avoids the risk of electromagnetic signal leakage associated with traditional radio communication, which is beneficial for building a secure and reliable information network. Moreover, visible light communication will be combined with other communication technologies such as 5G to bring innovative applications and valuable experiences in fields such as the Internet of Things and smart homes.

[0003] With the development of visible light communication, optoelectronic integrated circuit (OEIC) technology, which integrates signal reception and signal amplification functions, is receiving increasing attention, and its integration with display technology is also gaining more focus. In optoelectronic integrated substrates, besides photodiodes, the response frequency of the amplifier circuit also directly affects communication speed. Furthermore, due to limitations in semiconductor display manufacturing processes, glass-based backplane thin-film transistors are relatively large, resulting in a large dielectric capacitance between the gate layer and the active layer, which is detrimental to grayscale expansion and improving the response frequency of the amplifier circuit.

[0004] Currently, grayscale expansion and the response frequency of amplifier circuits are improved by increasing the overall thickness of the dielectric layer between the gate layer and the active layer and reducing the capacitance of the dielectric layer. However, increasing the overall thickness of the dielectric layer will lead to increased power consumption.

[0005] Therefore, improving display quality has become an urgent technical problem to be solved. Summary of the Invention

[0006] The present invention provides a display substrate and a display device for improving display quality.

[0007] In a first aspect, embodiments of the present invention provide a display substrate, comprising:

[0008] A substrate, a photosensitive circuit disposed on the substrate, and a display circuit, wherein:

[0009] The photosensitive circuit includes a photodiode and a first driving transistor coupled to the photodiode;

[0010] The display circuit includes a display device and a second driving transistor and a switching transistor respectively coupled to the display device;

[0011] The distance between the gate layer and the active layer corresponding to the first driving transistor and the second driving transistor is greater than the distance between the gate layer and the active layer corresponding to the switching transistor.

[0012] In one possible implementation, the gate layer corresponding to the first driving transistor and the gate layer corresponding to the second driving transistor are located in the same film layer, and both are located in different film layers from the gate layer corresponding to the switching transistor.

[0013] In one possible implementation, the gate layer corresponding to the first driving transistor, the gate layer corresponding to the second driving transistor, and the gate layer corresponding to the switching transistor are all located on the side of the corresponding active layer away from the substrate.

[0014] In one possible implementation, a first gate insulating layer and a second gate insulating layer are sequentially disposed between the gate layer and the corresponding active layer of the first driving transistor, and between the gate layer and the corresponding active layer of the second driving transistor, in a direction away from the substrate. Only the first gate insulating layer is disposed between the gate layer and the corresponding active layer of the switching transistor.

[0015] In one possible implementation, the gate layer corresponding to the first driving transistor and the gate layer corresponding to the second driving transistor are both located on the side of the corresponding active layer close to the substrate, and the gate layer corresponding to the switching transistor is located on the side of the corresponding active layer away from the substrate.

[0016] In one possible implementation, a light-shielding layer is further provided on the side of the active layer corresponding to the switching transistor that is close to the substrate. The light-shielding layer is located in the same film layer as the gate layer corresponding to the first driving transistor and the gate layer corresponding to the second driving transistor.

[0017] In one possible implementation, a buffer layer is provided between the gate layer and the corresponding active layer of the first driving transistor, and between the gate layer and the corresponding active layer of the second driving transistor, and only a first gate insulating layer is provided between the gate layer and the corresponding active layer of the switching transistor.

[0018] In one possible implementation, the gate layer corresponding to the first driving transistor and the gate layer corresponding to the second driving transistor are both located on different film layers from the gate layer corresponding to the switching transistor, and the gate layer corresponding to the first driving transistor, the gate layer corresponding to the second driving transistor, and the gate layer corresponding to the switching transistor are all located on the side of the corresponding active layer away from the substrate.

[0019] In one possible implementation, the gate layer corresponding to the second driving transistor is located in the same film layer as the source / drain electrode layers of the first driving transistor and the source / drain electrode layers of the switching transistor.

[0020] In one possible implementation, a first gate insulating layer and a second gate insulating layer are sequentially disposed between the gate layer and the corresponding active layer of the first driving transistor in a direction away from the substrate. Between the gate layer and the corresponding active layer of the second driving transistor, a first gate insulating layer, a second gate insulating layer, and an interlayer insulating layer are sequentially disposed in a direction away from the substrate. Only the first gate insulating layer is disposed between the gate layer and the corresponding active layer of the switching transistor.

[0021] In one possible implementation, the active layer corresponding to the first driving transistor, the active layer corresponding to the second driving transistor, and the active layer corresponding to the switching transistor are made of polycrystalline silicon or metal oxide semiconductor materials.

[0022] In one possible implementation, the display device includes an organic light-emitting diode display module; or,

[0023] The display device includes a liquid crystal display module.

[0024] Secondly, embodiments of the present invention also provide a display device, comprising: a display substrate as described in any of the above claims.

[0025] The beneficial effects of this invention are as follows:

[0026] This invention provides a display substrate and a display device. The display substrate includes a substrate, a photosensitive circuit disposed on the substrate, and a display circuit. The photosensitive circuit includes a photodiode and a first driving transistor coupled to the photodiode. The display circuit includes a display device and a second driving transistor and a switching transistor respectively coupled to the display device. The switching transistor can be one or more, which is not limited here. In addition, the distance between the gate layer and the active layer corresponding to the first driving transistor and the second driving transistor is greater than the distance between the gate layer and the active layer corresponding to the switching transistor. Correspondingly, the capacitance formed between the gate layer and the active layer corresponding to the first driving transistor and the second driving transistor is smaller than the capacitance formed between the gate layer and the active layer corresponding to the switching transistor. On the one hand, this increases the response frequency of the photosensitive circuit; on the other hand, it increases the subthreshold slope of the display circuit, ensuring the grayscale expansion effect; and on the other hand, it helps to increase the current and reduce the power consumption, thereby improving the display quality. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of one type of amplifier circuit used in optoelectronic integrated substrates in related technologies;

[0028] Figure 2 This is a schematic diagram of one type of display driving circuit used in optoelectronic integrated substrates in related technologies;

[0029] Figure 3 This is a top view schematic diagram of one embodiment of a display substrate provided by the present invention;

[0030] Figure 4 For along Figure 3 A schematic diagram of one type of cross-sectional structure in the direction shown in MM;

[0031] Figure 5 To make Figure 4 The diagram shows one of the process flow diagrams for a display substrate.

[0032] Figure 6 For along Figure 3 A schematic diagram of one type of cross-sectional structure in the direction shown in MM;

[0033] Figure 7 To make Figure 6 The diagram shows one of the process flow diagrams for a display substrate.

[0034] Figure 8 For along Figure 3 A schematic diagram of one type of cross-sectional structure in the direction shown in MM. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Furthermore, the embodiments and features in the embodiments of the present invention can be combined with each other without conflict. Based on the described embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention pertains. The terms "comprising" or "including," or similar terms as used in this invention, mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects.

[0037] It should be noted that the dimensions and shapes of the figures in the accompanying drawings do not reflect actual proportions and are intended only to illustrate the content of the invention. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

[0038] In related technologies, the inventors discovered that the capacitance of the dielectric layer between the gate layer and the active layer in a thin-film transistor is... Where W represents the width of the corresponding gate layer of the thin-film transistor, and L represents the length of the corresponding gate layer of the thin-film transistor. Let d represent the dielectric constant of the dielectric layer, and d represent the distance between the corresponding gate layer and the active layer. According to this capacitance formula, when the width and length of the corresponding gate layer in a thin-film transistor remain constant, the capacitance of the dielectric layer between the gate layer and the active layer in the thin-film transistor is inversely proportional to the distance between them. Furthermore, the inventors have discovered that optoelectronic integrated substrates using... Figure 1 When the amplifier circuit shown is used, the response time of the amplifier circuit is... ,in, This represents the dielectric layer capacitance between the gate layer and the active layer of the driving transistor DT, which is coupled to the photodiode in the amplifier circuit. Based on this formula, it can be known that... and t In direct proportion, the smaller the dielectric layer capacitance between the gate layer and the active layer of the driving transistor coupled to the photodiode, the shorter the response time of the amplifier circuit and the faster the response speed.

[0039] Furthermore, the inventors have discovered that optoelectronic integrated substrates, when employing methods such as... Figure 2 In the display driving circuit shown, the subthreshold slope of the P-type driving thin-film transistor (DTFT) in the display driving circuit is... ,in, This represents the dielectric capacitance between the gate layer and the active layer of a P-type driven thin-film transistor. From this formula, it can be seen that... S and Inversely proportional, correspondingly, the smaller the dielectric layer capacitance between the gate layer and the active layer of the P-type driving thin-film transistor in the display driving circuit, the larger the subthreshold slope of the P-type driving thin-film transistor, which is more conducive to grayscale expansion. For other thin-film transistors in this display driving circuit besides the P-type driving thin-film transistor, the current in the saturation region is... From this formula, we can see that... and The capacitance is directly proportional to the capacitance of the dielectric layer between the gate layer and the active layer of each other thin-film transistor. The larger the capacitance of the dielectric layer between the gate layer and the active layer of the corresponding thin-film transistor, the larger the current in the saturation region of the thin-film transistor and the lower the power consumption.

[0040] In related technologies, it is necessary to increase the overall thickness of the dielectric layer between the gate layer and the active layer and reduce the capacitance of the dielectric layer to ensure grayscale expansion and improve the response frequency of the amplifier circuit. However, increasing the overall thickness of the dielectric layer will lead to an increase in power consumption.

[0041] Therefore, embodiments of the present invention provide a display substrate and a display device for improving display quality.

[0042] Figure 3 This is a top view schematic diagram of one embodiment of a display substrate provided by the present invention. In this embodiment, the display substrate includes:

[0043] Substrate 10, photosensitive circuit 20 disposed on substrate 10, and display circuit 30, wherein:

[0044] The photosensitive circuit 20 includes a photodiode 200 and a first driving transistor 201 coupled to the photodiode 200;

[0045] The display circuit 30 includes a display device 301 and a second driving transistor 302 and a switching transistor 303 respectively coupled to the display device 301;

[0046] The distance between the gate layer and the active layer Poly corresponding to the first driving transistor 201 and the second driving transistor 302 is greater than the distance between the gate layer and the active layer Poly corresponding to the switching transistor 303.

[0047] In specific implementation, the substrate 10 can be a rigid substrate or a flexible substrate, and there is no limitation on this. The display substrate includes a photosensitive circuit 20 and a display circuit 30 disposed on the substrate 10. The photosensitive circuit 20 includes a photodiode 200 and a first driving transistor 201 coupled to the photodiode 200. The photodiode 200 can generally be implemented using a PIN diode. The display circuit 30 includes a display device 301 and a second driving transistor 302 and a switching transistor 303 respectively coupled to the display device 301. The number of switching transistors 303 can be one or more. For example, when the display circuit 30 is a 2T1C, it includes two switching transistors 303; or, for example, when the display circuit 30 is a 7T1C, it includes seven switching transistors 303. The number of switching transistors 303 can be set according to the actual application needs, and there is no limitation on this. The distances between the gate layers of the first driving transistor 201 and the active layer Poly corresponding to the second driving transistor 302 are both greater than the distances between the gate layers of the switching transistor 303 and the active layer Poly. Correspondingly, the capacitance formed between the gate layers of the first driving transistor 201 and the second driving transistor 302 and the active layer Poly is smaller than the capacitance formed between the gate layers of the switching transistor 303 and the active layer Poly. In this way, on the one hand, the response frequency of the photosensitive circuit 20 is increased, and on the other hand, the subthreshold slope of the display circuit 30 is increased, ensuring the grayscale expansion effect. Furthermore, it is beneficial to increase the current and reduce the power consumption, thereby improving the display quality.

[0048] Furthermore, each transistor can be a thin film transistor (TFT) or a metal oxide semiconductor field-effect transistor (MOS), and there is no limitation on this.

[0049] In the embodiments of the present invention, the specific configuration of the first driving transistor 201 and the second driving transistor 302 can be as follows, but is not limited to the following. It can be configured according to the actual application needs, and is not limited here.

[0050] The first method

[0051] In the first embodiment, the gate layer corresponding to the first driving transistor 201 and the gate layer corresponding to the second driving transistor 302 are located on the same film layer, and both are located on different film layers from the gate layer corresponding to the switching transistor 303.

[0052] In practical implementation, the first driving transistor 201, the second driving transistor, and the switching transistor 303 can all be top-gate structures. Furthermore, the gate layer corresponding to the first driving transistor 201 and the gate layer corresponding to the second driving transistor 302 are located on the same film layer. Correspondingly, the gate layers corresponding to the first driving transistor 201 and the second driving transistor 302 can be fabricated in the same layer, thus simplifying the manufacturing process and reducing the manufacturing cost of the display substrate. In addition, since the gate layers corresponding to the first driving transistor 201 and the second driving transistor 302, which are located on the same film layer, are on different film layers from the gate layer corresponding to the switching transistor 303, the distance between the gate layers corresponding to the first driving transistor 201 and the second driving transistor 302 and the active layer Poly is greater than the distance between the gate layer corresponding to the switching transistor 303 and the active layer Poly. Consequently, the capacitance formed between the gate layers corresponding to the first driving transistor 201 and the second driving transistor 302 and the active layer Poly is less than the capacitance formed between the gate layer corresponding to the switching transistor 303 and the active layer Poly, thereby ensuring the display quality of the display substrate.

[0053] In one exemplary embodiment, such as Figure 4 The image shows along Figure 3 The diagram shows one possible cross-sectional structure along the MM direction, where Gate2 represents the gate layer corresponding to the first driving transistor 201 and the second driving transistor 302, and Gate1 represents the gate layer corresponding to the switching transistor 303. In this exemplary embodiment, the gate layers corresponding to the first driving transistor 201, the second driving transistor 302, and the switching transistor 303 are all located on the side of their respective active layers (Poly) that faces away from the substrate 10.

[0054] Still combined Figure 4As shown, the first driving transistor 201, the second driving transistor 302, and the switching transistor 303 are all top-gate structures. Correspondingly, the gate layer of each transistor is disposed on the side of the corresponding active layer Poly that faces away from the substrate 10. If the distance between the first driving transistor 201 and the substrate 10 is d1, the distance between the second driving transistor 302 and the substrate 10 is d1, and the distance between the switching transistor 303 and the substrate 10 is d2, then the numerical relationship between them is d1 > d2. In this way, the distances between the gate layers of the first driving transistor 201 and the second driving transistor 302 and the active layer Poly are both greater than the distance between the gate layer of the switching transistor 303 and the active layer Poly. Consequently, the capacitance formed between the gate layers of the first driving transistor 201 and the second driving transistor 302 and the active layer Poly is less than the capacitance formed between the gate layer of the switching transistor 303 and the active layer Poly, thus ensuring the display quality of the display substrate.

[0055] In the above exemplary embodiments, a first gate insulating layer GI1 and a second gate insulating layer GI2 are sequentially disposed between the gate layer and the corresponding active layer Poly of the first driving transistor 201 and between the gate layer and the corresponding active layer Poly of the second driving transistor 302, along the direction away from the substrate 10. Only the first gate insulating layer GI1 is disposed between the gate layer and the corresponding active layer Poly of the switching transistor 303.

[0056] Still combined Figure 4As shown, in a specific implementation, a first gate insulating layer GI1 and a second gate insulating layer GI2 are sequentially disposed between the gate layer and the corresponding active layer Poly of the first driving transistor 201, and between the gate layer and the corresponding active layer Poly of the second driving transistor 302, along the direction away from the substrate 10. Thus, the first gate insulating layer GI1 and the second gate insulating layer GI2 form the dielectric layer structure of the capacitance between the gate layer and the corresponding active layer Poly of the first driving transistor 201 and the second driving transistor 302. Furthermore, only the first gate insulating layer GI1 is disposed between the gate layer and the corresponding active layer Poly of the switching transistor 303, and this first gate insulating layer GI1 forms the dielectric layer structure of the capacitance between the gate layer and the corresponding active layer Poly of the switching transistor 303. In this way, the distance between the gate layer and the corresponding active layer Poly of the first driving transistor 201, and the distance between the gate layer and the corresponding active layer Poly of the second driving transistor 302, must be greater than the distance between the gate layer and the corresponding active layer Poly of the switching transistor 303. This makes the capacitance formed between the gate layer and the active layer Poly of the first driving transistor 201 and the second driving transistor 302 less than the capacitance formed between the gate layer and the active layer Poly of the switching transistor 303, thereby ensuring the display quality of the display substrate.

[0057] It should be noted that during the production Figure 4 The process flow diagram for the display substrate shown is as follows: Figure 5As shown, the process can be as follows: First, a buffer layer and an a-Si layer are deposited on the substrate 10; then, the active layer Poly for each transistor is crystallized and patterned, and then a first gate insulating layer GI1 is deposited and patterned to form a first gate layer, followed by a second gate insulating layer GI2; then, a second gate layer is deposited and patterned, and N+ doping is performed using the first and second gate layers as masks to form doped regions; then, an interlayer insulating layer ILD is deposited and patterned, and the source / drain electrode layers SD1 for each transistor are fabricated, thus completing the fabrication of each transistor; then, a first passivation layer PVX1, a first planarization layer PLN1, and a second... A passivation layer PVX2 is deposited and patterned accordingly. Then, another source / drain electrode layer SD2 is deposited to form the lower electrode of photodiode 200, connecting the deposited N-layer structure, I-layer structure, P-layer structure, and upper electrode to complete the fabrication of the PIN photodiode. Next, a protective layer Cover and a second planarization layer PLN2 are deposited and patterned to complete planarization. Then, a metal layer is deposited, which can serve as the lead between the anode layer and the upper electrode of the PIN photodiode in the organic light-emitting diode display module. Finally, a pixel delimiting layer PDL is fabricated to further realize the fabrication of the entire display substrate. Of course, other fabrication processes can also be used according to the actual application requirements. Figure 4 The display substrate shown will not be described in detail here.

[0058] In one exemplary embodiment, such as Figure 6 The image shows along Figure 3 The diagram shows one possible cross-sectional structure along the MM direction, where LS represents the gate layer corresponding to the first driving transistor 201 and the gate layer corresponding to the second driving transistor 302, and Gate1 represents the gate corresponding to the switching transistor 303. In this exemplary embodiment, the gate layers corresponding to the first driving transistor 201 and the second driving transistor 302 are both located on the side of the corresponding active layer Poly close to the substrate 10, while the gate layer corresponding to the switching transistor 303 is located on the side of the corresponding active layer Poly away from the substrate 10.

[0059] Still combined Figure 6As shown, both the first driving transistor 201 and the second driving transistor 302 are bottom-gate structures. Accordingly, the gate layer corresponding to the first driving transistor 201 and the gate layer corresponding to the second driving transistor 302 are located on the side of the corresponding active layer Poly that is close to the substrate 10. In addition, the switching transistor 303 is a top-gate structure. Accordingly, the gate layer corresponding to the switching transistor 303 is located on the side of the corresponding active layer Poly that is away from the substrate 10. If the distance between the gate layer and the corresponding active layer Poly of the first driving transistor 201 is d3, then the distance between the gate layer and the corresponding active layer Poly of the second driving transistor 302 is d3, and the distance between the gate layer and the corresponding active layer Poly of the switching transistor 303 is d4. The numerical relationship between the two is d3 > d4. In this way, the distance between the gate layer and the corresponding active layer Poly of the first driving transistor 201 and the second driving transistor 302 is greater than the distance between the gate layer and the corresponding active layer Poly of the switching transistor 303. This makes the capacitance formed between the gate layer and the active layer Poly of the first driving transistor 201 and the second driving transistor 302 less than the capacitance formed between the gate layer and the active layer Poly of the switching transistor 303, thereby ensuring the display quality of the display substrate.

[0060] Still combined Figure 6 As shown, the active layer Poly corresponding to the switching transistor 303 is further provided with a light-shielding layer LS on the side close to the substrate 10. The light-shielding layer LS is located in the same film layer as the gate layer corresponding to the first driving transistor 201 and the gate layer corresponding to the second driving transistor 302.

[0061] In the specific implementation process, a light-shielding layer LS is also provided on the side of the active layer Poly corresponding to the switching transistor 303 near the substrate 10. The material of the light-shielding layer LS can be molybdenum. The light-shielding layer LS is located on the same film layer as the gate layer corresponding to the first driving transistor 201 and the gate layer corresponding to the second driving transistor 302. Accordingly, the light-shielding layer LS, the gate layer corresponding to the first driving transistor 201 and the gate layer corresponding to the second driving transistor 302 can be fabricated in the same layer, thereby simplifying the manufacturing process and reducing the manufacturing cost of the display substrate.

[0062] Still combined Figure 6 As shown, a buffer layer is provided between the gate layer and the corresponding active layer Poly of the first driving transistor 201, and between the gate layer and the corresponding active layer Poly of the second driving transistor 302. Only a first gate insulating layer GI1 is provided between the gate layer and the corresponding active layer Poly of the switching transistor 303.

[0063] In the specific implementation process, a buffer layer is provided between the gate layer and the corresponding active layer Poly of the first driving transistor 201, and a buffer layer is provided between the gate layer and the corresponding active layer Poly of the second driving transistor 302. Accordingly, the buffer layer forms the dielectric layer structure of the capacitance between the gate layer and the active layer Poly of the first driving transistor 201 and the second driving transistor 302. In addition, only a first gate insulating layer GI1 is provided between the gate layer and the corresponding active layer Poly of the switching transistor 303. Accordingly, the first gate insulating layer GI1 forms the dielectric layer structure of the capacitance between the gate layer and the active layer Poly of the switching transistor 303. Along the light emission direction of the display device 301, the thickness of the buffer layer Buffer is greater than the thickness of the first gate insulating layer GI1. In this way, the capacitance formed between the gate layer and the active layer Poly of the first driving transistor 201 and the second driving transistor 302 is smaller than the capacitance formed between the gate layer and the active layer Poly of the switching transistor 303, thereby ensuring the display quality of the display substrate.

[0064] It should be noted that during the production Figure 6 The process flow diagram for the display substrate shown is as follows: Figure 7 As shown, the fabrication process can begin by depositing and patterning a light-shielding layer LS on a substrate 10; then, depositing a buffer layer and an a-Si layer; then, crystallizing and patterning the active layer Poly of each transistor, followed by covering with a first gate insulating layer GI1, and depositing and patterning the first gate layer; then, depositing an interlayer insulating layer ILD, coating with photoresist, and performing N+ doping using the photoresist and the first gate layer as a mask to form doped regions, followed by removing the photoresist; then, depositing and patterning the interlayer insulating layer ILD, and fabricating the source / drain electrode layers SD1 of each transistor to complete the fabrication of each transistor; finally, covering with a first passivation layer PVX1, ... The first planarization layer PLN1 and the second passivation layer PVX2 are deposited and patterned accordingly. Then, another source / drain electrode layer SD2 is deposited to form the lower electrode of the photodiode 200, connecting the deposited N-layer structure, I-layer structure, P-layer structure and the upper electrode to complete the fabrication of the PIN photodiode. Then, a protective layer Cover and the second planarization layer PLN2 are deposited and patterned to complete the planarization. Then, a transparent electrode layer ITO is deposited, which can serve as the lead wire between the electrode layer in the liquid crystal display module and the upper electrode of the PIN photodiode, further realizing the fabrication of the entire display substrate. Of course, other fabrication processes can also be used according to the actual application requirements. Figure 6 The display substrate shown will not be described in detail here.

[0065] The second method

[0066] In the second approach, the gate layers corresponding to the first driving transistor 201 and the second driving transistor 302 are located on different film layers from the gate layer corresponding to the switching transistor 303. Furthermore, the gate layers corresponding to the first driving transistor 201, the second driving transistor 302, and the switching transistor 303 are all located on the side of the corresponding active layer Poly that is away from the substrate 10.

[0067] In one exemplary embodiment, such as Figure 8 The image shows along Figure 3 A schematic cross-sectional view of one of the structures shown in the MM direction, where Gate2 represents the gate layer corresponding to the first driving transistor 201, SD1 represents the gate layer corresponding to the second driving transistor 302, and Gate1 represents the gate layer corresponding to the switching transistor 303; in this exemplary embodiment, the gate layers corresponding to the first driving transistor 201 and the second driving transistor 302 are located on different film layers from the gate layer corresponding to the switching transistor 303. In specific implementation, the gate layers corresponding to the first driving transistor 201, the second driving transistor 302, and the switching transistor 303 are all located on the side of the corresponding active layer Poly that faces away from the substrate 10. Accordingly, as shown... Figure 8 As shown, the first driving transistor 201, the second driving transistor 302, and the switching transistor 303 can all be top-gate structures. Still in conjunction with... Figure 8 As shown, the distance between the gate layer of the first driving transistor 201 and the corresponding active layer Poly is d5, the distance between the gate layer of the second driving transistor 302 and the corresponding active layer Poly is d6, and the distance between the gate layer of the switching transistor 303 and the corresponding active layer Poly is d7. The numerical relationship between the three is d6 > d5 > d7. In this way, the capacitance formed between the gate layer of the first driving transistor 201 and the active layer Poly of the second driving transistor 302 is smaller than the capacitance formed between the gate layer of the switching transistor 303 and the active layer Poly, thereby ensuring the display quality of the display substrate.

[0068] Still combined Figure 8As shown, the gate layer corresponding to the second driving transistor 302 is located on the same film layer as the source / drain electrode layer SD1 of the first driving transistor 201 and the source / drain electrode layer SD1 of the switching transistor 303. In specific implementation, since the gate layer corresponding to the second driving transistor 302 is located on the same film layer as the source / drain electrode layer SD1 of the first driving transistor 201 and the source / drain electrode layer SD1 of the switching transistor 303, the gate layer corresponding to the second driving transistor 302 can be fabricated on the same layer when fabricating each source / drain electrode layer, thereby simplifying the fabrication process and reducing the manufacturing cost of the display substrate.

[0069] Still combined Figure 8 As shown, between the gate layer and the corresponding active layer Poly of the first driving transistor 201, a first gate insulating layer GI1 and a second gate insulating layer GI2 are sequentially disposed in a direction away from the substrate 10. Between the gate layer and the corresponding active layer Poly of the second driving transistor 302, the first gate insulating layer GI1, the second gate insulating layer GI2 and an interlayer insulating layer ILD are sequentially disposed in a direction away from the substrate 10. Only the first gate insulating layer GI1 is disposed between the gate layer and the corresponding active layer Poly of the switching transistor 303.

[0070] In specific implementation, a first gate insulating layer GI1 and a second gate insulating layer GI2 are sequentially disposed between the gate layer and the corresponding active layer Poly of the first driving transistor 201, along the direction away from the substrate 10. Similarly, a first gate insulating layer GI1, a second gate insulating layer GI2, and an interlayer insulating layer ILD are sequentially disposed between the gate layer and the corresponding active layer Poly of the second driving transistor 302, along the direction away from the substrate 10. Accordingly, the first gate insulating layer GI1 and the second gate insulating layer GI2 form the dielectric layer structure of the capacitance between the gate layer and the corresponding active layer Poly of the first driving transistor 201. Furthermore, the first gate insulating layer GI1, the second gate insulating layer GI2, and the interlayer insulating layer ILD form the dielectric layer structure of the capacitance between the gate layer and the corresponding active layer Poly of the second driving transistor 302. Additionally, only the first gate insulating layer GI1 is disposed between the gate layer and the corresponding active layer Poly of the switching transistor 303. Accordingly, the first gate insulating layer GI1 forms the dielectric layer structure of the capacitance between the gate layer and the corresponding active layer Poly of the switching transistor 303. In this way, the distance between the gate layer and the corresponding active layer Poly of the first driving transistor 201 and the distance between the gate layer and the corresponding active layer Poly of the second driving transistor 302 are both greater than the distance between the gate layer and the active layer Poly of the switching transistor 303. This results in the capacitance formed between the gate layer and the active layer Poly of the first driving transistor 201 and the second driving transistor 302 being smaller than the capacitance formed between the gate layer and the active layer Poly of the switching transistor 303, thereby ensuring the display quality of the display substrate. It should be noted that for... Figure 8 The manufacturing process of the display substrate can be referred to Figure 5 and Figure 7 The method shown will not be described in detail here.

[0071] In this embodiment of the invention, the active layer Poly corresponding to the first driving transistor 201, the active layer Poly corresponding to the second driving transistor 302, and the active layer Poly corresponding to the switching transistor 303 are made of polycrystalline silicon or metal oxide semiconductor materials.

[0072] In the specific implementation process, the material of the active layer Poly corresponding to each transistor can be polycrystalline silicon, such as a-Si or p-Si, or it can be a metal oxide semiconductor material, such as IGZO. The material of the active layer Poly corresponding to each transistor can be selected according to the actual application needs, and there is no limitation here.

[0073] In this embodiment of the invention, the display device 301 includes an organic light-emitting diode display module; or,

[0074] The display device 301 includes a liquid crystal display module.

[0075] In specific implementation, the display device 301 includes an organic light-emitting diode (OLED) display module, which includes an anode layer (AND), a light-emitting functional layer, a cathode, and other related film layer structures. The display device 301 may also include a liquid crystal display module, which includes a transparent electrode layer (ITO) and a liquid crystal layer, and other related film layer structures. The specific film layers of the display device 301 can be set according to solutions in related technologies, and are not limited here. In this way, the display function of the display substrate is realized.

[0076] It should be noted that, in combination Figures 4 to 8 The display substrate also includes another source / drain electrode (SD2), a first passivation layer PVX1, a first planarization layer PLN1, a second passivation layer PVX2, and a second planarization layer PLN2. The photodiode 200 includes an N-layer structure, an I-layer structure, and a P-layer structure sequentially facing away from the substrate 10. The display substrate also includes a protective layer Cover that covers the transparent electrode coupled to the P-layer structure of the photodiode 200, improving the performance of the display substrate. Specific configurations of each film layer structure can be found in related technologies and will not be detailed here. Of course, other film layers besides those mentioned above can be configured according to actual application needs, and this is not limited here.

[0077] Based on the same inventive concept, this invention also provides a display device. The principle of this display device in solving the problem is similar to that of the aforementioned display panel. Therefore, the implementation of this display device can refer to the implementation of the aforementioned display panel, and the repeated parts will not be described again.

[0078] In specific implementations, the display device provided in this invention can be a mobile phone, or any product or component with display function such as a tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. Other essential components of this display device are understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting the invention.

[0079] This invention provides a display substrate and a display device. The display substrate includes a substrate 10, a photosensitive circuit 20 disposed on the substrate 10, and a display circuit 30. The photosensitive circuit 20 includes a photodiode 200 and a first driving transistor 201 coupled to the photodiode 200. The display circuit 30 includes a display device 301 and a second driving transistor 302 and a switching transistor 303 respectively coupled to the display device 301. The switching transistor 303 can be one or more, which is not limited here. Furthermore, the first driving transistor 201 and the second driving transistor... The distance between the gate layer and the active layer Poly corresponding to transistor 302 is greater than the distance between the gate layer and the active layer Poly corresponding to switching transistor 303. Correspondingly, the capacitance formed between the gate layer and the active layer Poly corresponding to the first driving transistor 201 and the second driving transistor 302 is smaller than the capacitance formed between the gate layer and the active layer Poly corresponding to switching transistor 303. On the one hand, this increases the response frequency of the photosensitive circuit 20; on the other hand, it increases the subthreshold slope of the display circuit 30, ensuring the grayscale expansion effect; and furthermore, it helps to increase the current and reduce power consumption, thereby improving the display quality.

[0080] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0081] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A display substrate, characterized in that, The display substrate is an optoelectronic integrated substrate that integrates signal reception and signal amplification functions, and the display substrate includes: A substrate, a photosensitive circuit disposed on the substrate, and a display circuit, wherein: The photosensitive circuit includes a photodiode and a first driving transistor coupled to the photodiode; the first driving transistor is the core component for signal amplification. The display circuit includes a display device and a second driving transistor and a switching transistor respectively coupled to the display device; The distance between the gate layer and the active layer corresponding to the first driving transistor and the second driving transistor is greater than the distance between the gate layer and the active layer corresponding to the switching transistor. Wherein, the gate layer corresponding to the first driving transistor and the gate layer corresponding to the second driving transistor are both in different film layers from the gate layer corresponding to the switching transistor; the orthogonal projections of the gate layer corresponding to the first driving transistor, the gate layer corresponding to the second driving transistor, and the gate layer corresponding to the switching transistor on the substrate completely fall within the region of the orthogonal projection of the side surface of the dielectric layer structure located between the gate layer corresponding to the first driving transistor and the corresponding active layer on the substrate away from the substrate.

2. The display substrate as described in claim 1, characterized in that, The gate layer corresponding to the first driving transistor and the gate layer corresponding to the second driving transistor are located in the same film layer.

3. The display substrate as described in claim 2, characterized in that, The gate layer corresponding to the first driving transistor, the gate layer corresponding to the second driving transistor, and the gate layer corresponding to the switching transistor are all located on the side of the corresponding active layer away from the substrate.

4. The display substrate as described in claim 3, characterized in that, A first gate insulating layer and a second gate insulating layer are sequentially disposed between the gate layer and the corresponding active layer of the first driving transistor, and between the gate layer and the corresponding active layer of the second driving transistor, in a direction away from the substrate. Only the first gate insulating layer is disposed between the gate layer and the corresponding active layer of the switching transistor.

5. The display substrate as described in claim 2, characterized in that, The gate layer corresponding to the first driving transistor and the gate layer corresponding to the second driving transistor are both located on the side of the corresponding active layer close to the substrate, while the gate layer corresponding to the switching transistor is located on the side of the corresponding active layer away from the substrate.

6. The display substrate as described in claim 5, characterized in that, A light-shielding layer is also provided on the side of the active layer corresponding to the switching transistor that is close to the substrate. The light-shielding layer is located in the same film layer as the gate layer corresponding to the first driving transistor and the gate layer corresponding to the second driving transistor.

7. The display substrate as described in claim 6, characterized in that, A buffer layer is provided between the gate layer and the corresponding active layer of the first driving transistor, and between the gate layer and the corresponding active layer of the second driving transistor. Only a first gate insulating layer is provided between the gate layer and the corresponding active layer of the switching transistor.

8. The display substrate as described in claim 1, characterized in that, The gate layer corresponding to the first driving transistor, the gate layer corresponding to the second driving transistor, and the gate layer corresponding to the switching transistor are all located on the side of the corresponding active layer away from the substrate.

9. The display substrate as described in claim 8, characterized in that, The gate layer corresponding to the second driving transistor is located in the same film layer as the source / drain electrode layers of the first driving transistor and the source / drain electrode layers of the switching transistor.

10. The display substrate as claimed in claim 9, characterized in that, Between the gate layer and the corresponding active layer of the first driving transistor, a first gate insulating layer and a second gate insulating layer are sequentially disposed in a direction away from the substrate. Between the gate layer and the corresponding active layer of the second driving transistor, a first gate insulating layer, a second gate insulating layer and an interlayer insulating layer are sequentially disposed in a direction away from the substrate. Only the first gate insulating layer is disposed between the gate layer and the corresponding active layer of the switching transistor.

11. The display substrate according to any one of claims 1-10, characterized in that, The active layer corresponding to the first driving transistor, the active layer corresponding to the second driving transistor, and the active layer corresponding to the switching transistor are made of polycrystalline silicon or metal oxide semiconductor materials.

12. The display substrate as claimed in claim 11, characterized in that, The display device includes an organic light-emitting diode display module; or... The display device includes a liquid crystal display module.

13. A display device, characterized in that, include: The display substrate as described in any one of claims 1-12.

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