Display device

Abstract

Disclosed is a display device including: a display portion including first and second pixels, a first scan line and a first sensing line and a second scan line and a second sensing line connected to the first and second pixels; a scan driving portion including a first sensing output transistor and a second sensing output transistor that supply first and second sensing signals to the first and second sensing lines, a first scan output transistor and a second scan output transistor that supply first and second scan signals to the first and second scan lines; a first sensing connection line and a second sensing connection line that connect the first sensing line and the first sensing output transistor and the second sensing line and the second sensing output transistor, respectively; a first scan connection line and a second scan connection line that connect the first scan line and the first scan output transistor and the second scan line and the second scan output transistor, respectively, the first scan connection line and the first sensing connection line intersecting and overlapping each other, and the second sensing connection line and the second scan connection line intersecting and overlapping each other.

Description

TECHNICAL FIELD

[0001] The present application relates to a display device. BACKGROUND

[0002] A display device can include a plurality of pixels each emitting light. The pixels can be arranged in a matrix form in a row direction and a column direction, and accordingly, a plurality of pixel rows and a plurality of pixel columns can be defined in the display device. The display device can display an image based on the light emitted by the pixels.

[0003] In a case where there is an electrical deviation between the pixel rows or between the pixel columns, a visual deviation can be recognized in the pixel row direction or in the pixel column direction. For example, in a case where there is a capacitance deviation between the pixel rows, a stripe or the like can be recognized in the pixel row direction. SUMMARY

[0004] An object of the present application is to provide a display device that reduces a capacitance deviation between pixel rows.

[0005] However, the technical problem to be solved by the present application is not limited to the above-described technical problem, and the present application can implement various extensions without departing from the scope of the idea and concept of the present application.

[0006] To achieve the above-described object of the present application, a display device according to an embodiment can include a display portion including a first pixel, a second pixel adjacent to the first pixel in a first direction, a first scan line and a first sense line connected to the first pixel and extending in a second direction intersecting the first direction, a second scan line and a second sense line connected to the second pixel and extending in the second direction, a scan driving portion including a first scan output transistor providing a first scan signal to the first scan line, a first sense output transistor providing a first sense signal to the first sense line, a second sense output transistor providing a second sense signal to the second sense line, and a second scan output transistor providing a second scan signal to the second scan line, a first scan connection line connecting the first scan line and the first scan output transistor, a first sense connection line connecting the first sense line and the first sense output transistor, a second sense connection line connecting the second sense line and the second sense output transistor, and a second scan connection line connecting the second scan line and the second scan output transistor, wherein the first scan connection line can intersect and overlap the first sense connection line, and the second sense connection line can intersect and overlap the second scan connection line.

[0007] In an embodiment, the first scan line, the first sense line, the second scan line and the second sense line can be arranged in sequence along the first direction, and the first scan output transistor, the first sense output transistor, the second sense output transistor and the second scan output transistor can be arranged in sequence along the first direction.

[0008] In an embodiment, the first scan connection line can include a first scan connection horizontal portion connected to the first scan output transistor and extending along the second direction, and a first scan connection vertical portion connecting the first scan connection horizontal portion and the first scan line and extending along the first direction, the first sense connection line can include a first sense connection horizontal portion connected to the first sense output transistor and extending along the second direction, and a first sense connection vertical portion connecting the first sense connection horizontal portion and the first sense line and extending along the first direction, the second sense connection line can include a second sense connection horizontal portion connected to the second sense output transistor and extending along the second direction, and a second sense connection vertical portion connecting the second sense connection horizontal portion and the second sense line and extending along the first direction, and the second scan connection line can include a second scan connection horizontal portion connected to the second scan output transistor and extending along the second direction, and a second scan connection vertical portion connecting the second scan connection horizontal portion and the second scan line and extending along the first direction.

[0009] In an embodiment, the first scan connection vertical portion can cross and overlap the first sense connection horizontal portion, and the second sense connection vertical portion can cross and overlap the second scan connection horizontal portion.

[0010] In an embodiment, the first scan connection horizontal portion can cross and overlap the first sense connection vertical portion, and the second sense connection horizontal portion can cross and overlap the second scan connection vertical portion.

[0011] In an embodiment, the first scan connection horizontal portion can include a first contact portion crossing and contacting the first scan connection vertical portion, and a first overlap portion overlapping the first sense connection vertical portion, and the first overlap portion can be arranged apart from the first contact portion along the second direction.

[0012] In an embodiment, the first sense connection horizontal portion can include a second overlap portion crossing and overlapping the first scan connection vertical portion, and the second overlap portion can be arranged apart from the first contact portion along the first direction.

[0013] In an embodiment, the first sensing connection lateral portion can further include a second contact portion intersecting and contacting the first sensing connection longitudinal portion, wherein the second contact portion is disposed apart from the first overlap portion in the first direction, and the second contact portion is disposed apart from the second overlap portion in the second direction.

[0014] In an embodiment, the second sensing connection lateral portion can include a third contact portion intersecting and contacting the second sensing connection longitudinal portion, and a third overlap portion intersecting and overlapping the second scan connection longitudinal portion, wherein the third overlap portion is disposed apart from the third contact portion in the second direction.

[0015] In an embodiment, the second scan connection lateral portion can include a fourth overlap portion intersecting and overlapping the second sensing connection longitudinal portion, the fourth overlap portion being disposed apart from the third contact portion in the first direction.

[0016] In an embodiment, the second scan connection lateral portion can include a fourth contact portion intersecting and contacting the second scan connection longitudinal portion, the fourth contact portion being disposed apart from the third overlap portion in the first direction, and the fourth contact portion being disposed apart from the fourth overlap portion in the second direction.

[0017] In an embodiment, the first scan connection lateral portion can be disposed in the same layer as the first scan line, the first sensing connection lateral portion can be disposed in the same layer as the first sensing line, the second sensing connection lateral portion can be disposed in the same layer as the second sensing line, and the second scan connection lateral portion can be disposed in the same layer as the second scan line.

[0018] In an embodiment, each of the first and second pixels can include a lower electrode disposed on a substrate, an active layer disposed on the lower electrode, a gate electrode disposed on the active layer, and a source electrode and a drain electrode disposed on the gate electrode and connected to the active layer.

[0019] In an embodiment, each of the first scan connection lateral portion, the first sensing connection lateral portion, the second sensing connection lateral portion, and the second scan connection lateral portion can be disposed in the same layer as the source electrode and the drain electrode.

[0020] In an embodiment, each of the first scan connection longitudinal portion, the first sensing connection longitudinal portion, the second sensing connection longitudinal portion, and the second scan connection longitudinal portion can be disposed in the same layer as the lower electrode.

[0021] In one embodiment, the first scan connection lateral portion can be in direct contact with the first scan connection longitudinal portion, the first sense connection lateral portion can be in direct contact with the first sense connection longitudinal portion, the second sense connection lateral portion can be in direct contact with the second sense connection longitudinal portion, and the second scan connection lateral portion can be in direct contact with the second scan connection longitudinal portion.

[0022] In one embodiment, the first scan line can be in direct contact with the first scan connection longitudinal portion, the first sense line can be in direct contact with the first sense connection longitudinal portion, the second scan line can be in direct contact with the second scan connection longitudinal portion, and the second sense line can be in direct contact with the second sense connection longitudinal portion.

[0023] In one embodiment, a length of the first scan connection longitudinal portion in the first direction can be substantially the same as a length of the second sense connection longitudinal portion in the first direction.

[0024] In one embodiment, a length of the first sense connection longitudinal portion in the first direction can be substantially the same as a length of the second scan connection longitudinal portion in the first direction.

[0025] In one embodiment, a length of the first scan connection lateral portion in the second direction, a length of the first sense connection lateral portion in the second direction, a length of the second sense connection lateral portion in the second direction, and a length of the second scan connection lateral portion in the second direction can be substantially the same as each other.

[0026] In the display device according to the embodiment of the present application, as the first scan connection line crosses and overlaps the first sense connection line and the second sense connection line crosses and overlaps the second scan connection line, a capacitance deviation between a first pixel row in which first pixels are arranged and a second pixel row in which second pixels are arranged can be reduced, or substantially no capacitance deviation can occur between the first pixel row and the second pixel row.

[0027] However, the effects of the present application are not limited to the above-mentioned effects, and various extensions can be made without departing from the spirit and technical scope of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 is a block diagram illustrating a display device according to an embodiment of the present application.

[0029] Figure 2 is a circuit diagram illustrating a pixel of Figure 1

[0030] Figure 3 is a circuit diagram illustrating a pixel of Figure 1 ​a block diagram of a scan driving section.

[0031] Figure 4 is a plan view showing Figure 1 between the display section and the scan driving section.

[0032] Figure 5 is a cross-sectional view of the display device cut along Figure 4 line I-I' of FIG. 1.

[0033] Figure 6 is a cross-sectional view of the display device cut along Figure 4 line II-II' of FIG. 1.

[0034] Figure 7 is a cross-sectional view of the display device cut along Figure 4 line III-III' of FIG. 1.

[0035] Explanation of Reference Numerals:

[0036] 100: display section 121: first scan connection longitudinal section

[0037] 122: first sense connection longitudinal section 123: second sense connection longitudinal section

[0038] 124: second scan connection longitudinal section 151: first scan connection transverse section

[0039] 152: first sense connection transverse section 153: second sense connection transverse section

[0040] 154: second scan connection transverse section 210: scan driving section

[0041] CCL1: first scan connection line CCL2: second scan connection line

[0042] MC1: first scan output transistor MC2: second scan output transistor

[0043] MS1: first sense output transistor MS2: second sense output transistor

[0044] PX1: first pixel PX2: second pixel

[0045] SC1: first scan line SC2: second scan line

[0046] SS1: first sense line SS2: second sense line

[0047] SCL1: first sense connection line SCL2: second sense connection line DETAILED DESCRIPTION

[0048] Hereinafter, a display apparatus according to an embodiment of the present application will be described in greater detail with reference to the accompanying drawings. The same or similar components will be designated by the same or similar reference numerals throughout the drawings.

[0049] Figure 1 is a block diagram illustrating a display apparatus according to an embodiment of the present application.

[0050] Referring to Figure 1 The display apparatus according to an embodiment can include a display part 100, a scan driving part 210, a data driving part 220, a sensing part 230, and a timing control part 240.

[0051] The display part 100 can include a plurality of pixels PX. The pixels PX can be connected to data lines DL, scan lines SC, sensing lines SS, and initialization lines SL.

[0052] The pixels PX can receive a first power voltage from a first power supply ELVDD, and can receive a second power voltage from a second power supply ELVSS. Each of the pixels PX can receive a data signal from the data lines DL when each of the pixels PX receives a scan signal from the scan lines SC. The pixels PX receiving the data signal can control an amount of current flowing from the first power supply ELVDD to the second power supply ELVSS via a light emitting element in correspondence with the data signal. In this case, the light emitting element can generate light of a predetermined brightness in correspondence with the amount of current. In an embodiment, the first power voltage can be greater than the second power voltage.

[0053] The scan driving part 210 can output the scan signal in correspondence with a scan control signal. The scan driving part 210 can sequentially provide the scan signal to the scan lines SC. Here, the scan signal can be set to a gate-on voltage (e.g., a voltage of a predetermined high level) so that a transistor included in each of the pixels PX is turned on.

[0054] The scan driving part 210 can output a sensing signal in correspondence with the sensing control signal. The scan driving part 210 can provide the sensing signal to at least one of the sensing lines SS. Here, the sensing signal can be set to a gate-on voltage (e.g., a voltage of a predetermined high level) so that a transistor included in each of the pixels PX is turned on.

[0055] The data driving part 220 can provide the data signal to the data lines DL in correspondence with a data control signal. The data signal provided to the data lines DL can be provided to the pixels PX receiving the scan signal.

[0056] The sensing part 230 can provide an initialization voltage to the pixels PX receiving the sensing signal through the initialization lines SL, and can measure deterioration information of each of the pixels PX. In an embodiment, as described above, the sensing part 230 can measure the deterioration information of each of the pixels PX in correspondence with the initialization voltage.Figure 1 As shown, the sensing section 230 can be constituted independently of the data driving section 220, but the present application is not limited thereto. In another embodiment, the sensing section 230 can also be included in the data driving section 220.

[0057] The timing control section 240 can generate the scan control signal and the data control signal based on a signal inputted from the outside. The scan control signal generated by the timing control section 240 can be provided to the scan driving section 210, and the data control signal can be provided to the data driving section 220.

[0058] The scan control signal can include a plurality of clock signals CLK1, CLK2, CLK3, CLK4, CLK1_SC, CLK2_SC, CLK3_SC, CLK4_SC, CLK1_SS, CLK2_SS, CLK3_SS, CLK4_SS, and a scan start signal SSP. The scan start signal SSP can control the output time point of the first scan signal.

[0059] The clock signals CLK1, CLK2, CLK3, CLK4, CLK1_SC, CLK2_SC, CLK3_SC, CLK4_SC, CLK1_SS, CLK2_SS, CLK3_SS, CLK4_SS supplied to the scan driving portion 210 can include a first clock signal CLK1, a second clock signal CLK2, a third clock signal CLK3, a fourth clock signal CLK4, a first scan clock signal CLK1_SC, a second scan clock signal CLK2_SC, a third scan clock signal CLK4_SC, a fourth scan clock signal CLK4_SC, a first sense clock signal CLK1_SS, a second sense clock signal CLK2_SS, a third sense clock signal CLK3_SS, and a fourth sense clock signal CLK4_SS. The first clock signal CLK1, the second clock signal CLK2, the third clock signal CLK3, and the fourth clock signal CLK4 can be used in order to shift the scan start signal SSP. The first scan clock signal CLK1_SC, the second scan clock signal CLK2_SC, the third scan clock signal CLK4_SC, and the fourth scan clock signal CLK4_SC can be used in order to output the scan signal in correspondence with the scan start signal SSP and at least one of the first clock signal CLK1, the second clock signal CLK2, the third clock signal CLK3, and the fourth clock signal CLK4. The first sense clock signal CLK1_SS, the second sense clock signal CLK2_SS, the third sense clock signal CLK3_SS, and the fourth sense clock signal CLK4_SS can be used in order to output the sense signal in correspondence with the scan start signal SSP and at least one of the first clock signal CLK1, the second clock signal CLK2, the third clock signal CLK3, and the fourth clock signal CLK4. Further, the scan driving portion 210 can also receive other clock signals in addition to the above-described clock signals CLK1, CLK2, CLK3, CLK4, CLK1_SC, CLK2_SC, CLK3_SC, CLK4_SC, CLK1_SS, CLK2_SS, CLK3_SS, and CLK4_SS.

[0060] The data control signal can include a source start pulse and a plurality of clock signals. The source start pulse can control a sampling start time point of the data signal, and the clock signals can be used in order to control a sampling operation.

[0061] Figure 2 is a circuit diagram showing Figure 1 a pixel PX.

[0062] Referring to Figure 2 , the pixel PX can include a drive transistor M1, a switch transistor M2, a sense transistor M3, a storage capacitor Cst, and a light emitting element EL.

[0063] The switching transistor M2 can include a first electrode connected to the data line DL, a second electrode connected to the first node N1, and a gate electrode connected to the scan line SC. The switching transistor M2 can be turned on when the scan signal is provided from the scan line SC, thereby providing the data signal received from the data line DL to the storage capacitor Cst. Also, the switching transistor M2 can control the voltage of the first node N1.

[0064] The driving transistor M1 can include a first electrode connected to the first power supply ELVDD, a second electrode connected to the second node N2, and a gate electrode connected to the first node N1. The driving transistor M1 can control the amount of current flowing in the light emitting element EL in correspondence with the voltage between the gate electrode and the second electrode.

[0065] The sensing transistor M3 can include a first electrode connected to the initialization line SL, a second electrode connected to the second node N2, and a gate electrode connected to the sensing line SS. The sensing transistor M3 can be turned on when the sensing signal is provided to the sensing line SS, thereby controlling the voltage of the second node N2. Also, the sensing transistor M3 can be turned on when the sensing signal is provided to the sensing line SS, thereby measuring the current flowing in the light emitting element EL.

[0066] The storage capacitor Cst can include a first electrode connected to the first node N1 and a second electrode connected to the second node N2. The storage capacitor Cst can be charged with the voltage corresponding to the data signal.

[0067] The light emitting element EL can include a first electrode connected to the second node N2 and a second electrode connected to the second power supply ELVSS. The light emitting element EL can generate light corresponding to the amount of current provided from the driving transistor M1.

[0068] In Figure 2 , the first electrode of each of the transistors M1, M2, and M3 can be any one of a source electrode and a drain electrode, and the second electrode of each of the transistors M1, M2, and M3 can be an electrode different from the first electrode. For example, the first electrode can be a drain electrode, and the second electrode can be a source electrode.

[0069] In an embodiment, as Figure 2 shown, each of the transistors M1, M2, and M3 can be an NMOS transistor. However, the present application is not limited thereto, and in another embodiment, each of the transistors M1, M2, and M3 can also be a PMOS transistor.

[0070] In one embodiment, during a period in which the mobility of the drive transistor M1 is sensed, an activated scan signal can be supplied to the scan line SC, and an activated sense signal can be supplied to the sense line SS. However, in order to acquire the degradation information of the light emitting element EL for sensing the current flowing in the light emitting element EL, the drive transistor M1 can be turned off, and the sense transistor M3 can be turned on. In other words, during a period in which the current flowing in the light emitting element EL is sensed, a non-activated signal can be applied to the scan line SC, and an activated signal can be applied to the sense line SS. Thereby, the scan signal supplied to the scan line SC and the sense signal supplied to the sense line SS can be separated and supplied.

[0071] Figure 3 is a block diagram illustrating Figure 1 the scan driving section 210.

[0072] Referring to Figure 1 and Figure 3 , the scan driving section 210 can include a plurality of stages ST. The scan driving section 210 can supply the scan signal to the scan line SC so that the display section 100 can display an image. Also, the scan driving section 210 can supply the sense signal to the sense line SS so that the display section 100 can perform a mobility sensing operation and a degradation sensing operation of the EL in the light emitting element EL. Figure 2

[0073] The stages ST can be connected in sequence, and one scan line SC and one sense line SS can be connected to each stage ST. Each stage ST can receive at least two of the first clock signal CLK1, the second clock signal CLK2, the third clock signal CLK3, and the fourth clock signal CLK4, can receive at least one of the first scan clock signal CLK1_SC, the second scan clock signal CLK2_SC, the third scan clock signal CLK4_SC, and the fourth scan clock signal CLK4_SC, and can receive at least one of the first sense clock signal CLK1_SS, the second sense clock signal CLK2_SS, the third sense clock signal CLK3_SS, and the fourth sense clock signal CLK4_SS.

[0074] ​For example, the first stage ST can receive the first clock signal CLK1, the third clock signal CLK3, the first scan clock signal CLK1_SC, the first sense clock signal CLK1_SS, and the scan start signal SSP, and can be connected to the first scan line SC and the first sense line SS. The second stage ST can be connected to the first stage ST, and can receive the second clock signal CLK2, the fourth clock signal CLK4, the second scan clock signal CLK2_SC, the second sense clock signal CLK2_SS, and the scan signal output from the first stage ST, and can be connected to the second scan line SC and the second sense line SS. Also, the nth stage ST can be connected to the (n-1)th stage ST, can receive the second clock signal CLK2, the fourth clock signal CLK4, the fourth scan clock signal CLK4_SC, the fourth sense clock signal CLK4_SS, and the scan signal output from the (n-1)th stage ST, and can be connected to the nth scan line SC and the nth sense line SS.

[0075] In a case where the display portion 100 performs an operation of displaying an image, the scan driving portion 210 can sequentially apply the scan signal to the first scan line SC to the nth scan line SC in response to the scan start signal SSP. For example, after the first stage ST outputs the scan signal, the second stage ST can output the scan signal, after the second stage ST outputs the scan signal, the third stage ST can output the scan signal, and after the (n-1)th stage ST outputs the scan signal, the nth stage ST can output the scan line.

[0076] In a case where the display portion 100 performs an operation of sensing mobility or deterioration of the light emitting element EL, the scan driving portion 210 can select the sense line SS on which the sensing operation is to be performed, and can output the sense signal to the selected sense line SS.

[0077] In other words, the scan driving portion 210 can sequentially apply the scan signal to the scan line SC within a display period of one frame, and can apply the sense signal to at least one of the sense lines SS within the display period of the one frame.

[0078] Figure 4 is a plan view showing the display portion 100 and the scan driving portion 210 of Figure 1

[0079] Referring to Figure 1 and Figure 4 ​The display part 100 can include a first pixel PX1, a second pixel PX2, a first scan line SC1, a first sense line SS1, a second scan line SC2, and a second sense line SS2. The second pixel PX2 can be adjacent to the first pixel PX1 in the first direction DR1. For example, the first pixel PX1 can be included in an n-th pixel row, and the second pixel PX2 can be included in an n+1-th pixel row.

[0080] In an embodiment, the first pixel PX1 can be included in an odd-numbered pixel row, and the second pixel PX2 can be included in an even-numbered pixel row. However, the present application is not limited thereto, and in another embodiment, the first pixel PX1 can also be included in an even-numbered pixel row, and the second pixel PX2 can also be included in an odd-numbered pixel row.

[0081] Each of the first scan line SC1 and the first sense line SS1 can be connected to the first pixel PX1, and can extend in a second direction DR2 crossing the first direction DR1. The first sense line SS1 can be disposed apart from the first scan line SC1 in the first direction DR1. The first scan line SC1 can provide a first scan signal to the first pixel PX1, and the first sense line SS1 can provide a first sense signal to the first pixel PX1.

[0082] Each of the second scan line SC2 and the second sense line SS2 can be connected to the second pixel PX2, and can extend in the second direction DR2. The second sense line SS2 can be disposed apart from the second scan line SC2 in the first direction DR1. The second scan line SC2 can provide a second scan signal to the second pixel PX2, and the second sense line SS2 can provide a second sense signal to the second pixel PX2.

[0083] The scan driving part 210 can include a first stage ST1 and a second stage ST2. The second stage ST2 can be adjacent to the first stage ST1 in the first direction DR1. The first stage ST1 can provide the first scan signal and the first sense signal to the first pixel PX1, and the second stage ST2 can provide the second scan signal and the second sense signal to the second pixel PX2.

[0084] The first stage ST1 can include a first scan output transistor MC1 and a first sense output transistor MS1. The first scan output transistor MC1 can provide the first scan signal to the first scan line SC1, and the first sense output transistor MS1 can provide the first sense signal to the first sense line SS1.

[0085] The second stage ST2 can include a second sensing output transistor MS2 and a second scan output transistor MC2. The second sensing output transistor MS2 can provide the second sensing signal to a second sensing line SS2, and the second scan output transistor MC2 can provide the second scan signal to a second scan line SC2.

[0086] In an embodiment, the first scan line SC1, the first sensing line SS1, the second scan line SC2, and the second sensing line SS2 can be arranged in sequence along a first direction DR1, and the first scan output transistor MC1, the first sensing output transistor MS1, the second sensing output transistor MS2, and the second scan output transistor MC2 can be arranged in sequence along the first direction DR1. The first sensing line SS1 and the first sensing output transistor MS1 can be arranged apart from the first scan line SC1 and the first scan output transistor MC1, respectively, along the first direction DR1, and in contrast, the second sensing line SS2 can be arranged apart from the second scan line SC2 along the first direction DR1, and the second sensing output transistor MS2 can be arranged apart from the second scan output transistor MC2 along a direction opposite to the first direction DR1. In other words, the first scan output transistor MC1 can be arranged in the same row as the first scan line SC1, the first sensing output transistor MS1 can be arranged in the same row as the first sensing line SS1, in contrast, the second scan output transistor MC2 can be arranged in the same row as the second sensing line SS2, and the second sensing output transistor MS2 can be arranged in the same row as the second scan line SC2.

[0087] The display device can include a first scan connection line CCL1, a first sensing connection line SCL1, a second sensing connection line SCL2, and a second scan connection line CCL2 arranged between the display part 100 and the scan driving part 210. The first scan connection line CCL1 can connect the first scan line SC1 and the first scan output transistor MC1, and the first sensing connection line SCL1 can connect the first sensing line SS1 and the first sensing output transistor MS1. The second sensing connection line SCL2 can connect the second sensing line SS2 and the second sensing output transistor MS2, and the second scan connection line CCL2 can connect the second scan line SC2 and the second scan output transistor MC2.

[0088] The first scan connection line CCL1 can cross and overlap the first sense connection line SCL1, and the second sense connection line SCL2 can cross and overlap the second scan connection line CCL2. As the first scan connection line CCL1 crosses and overlaps the first sense connection line SCL1, a capacitor can be formed at a portion where the first scan connection line CCL1 overlaps the first sense connection line SCL1. Also, as the second sense connection line SCL2 crosses and overlaps the second scan connection line CCL2, a capacitor can be formed at a portion where the second sense connection line SCL2 overlaps the second scan connection line CCL2.

[0089] In the prior art, since the first scan output transistor MC1 is arranged in the same row as the first scan line SC1, and the first sense output transistor MS1 is arranged in the same row as the first sense line SS1, the first scan connection line CCL1 can not cross the first sense connection line SCL1. Also, since the second scan output transistor MC2 is arranged in the same row as the second sense line SS2, and the second sense output transistor MS2 is arranged in the same row as the second scan line SC2, the second scan connection line CCL2 can cross and overlap the second sense connection line SCL2. In this case, a capacitor can not be formed between the first scan connection line CCL1 and the first sense connection line SCL1, but a capacitor is formed between the second scan connection line CCL2 and the second sense connection line SCL2. Accordingly, a deviation in capacitance between pixel rows can occur, and a horizontal line defect can be recognized.

[0090] However, in the embodiment of the present application, as the first scan connection line CCL1 crosses and overlaps the first sense connection line SCL1, and the second sense connection line SCL2 crosses and overlaps the second scan connection line CCL2, a capacitor can be formed between the first scan connection line CCL1 and the first sense connection line SCL1, and a capacitor is also formed between the second scan connection line CCL2 and the second sense connection line SCL2. Accordingly, a deviation in capacitance between pixel rows can be reduced or substantially not occur, and a horizontal line defect can not be recognized.

[0091] In an embodiment, the first scan connection line CCL1 can include a first scan connection horizontal portion 151 and a first scan connection vertical portion 121, and the first sense connection line SCL1 can include a first sense connection horizontal portion 152 and a first sense connection vertical portion 122. The first scan connection horizontal portion 151 can be connected to the first scan output transistor MC1 and can extend in the second direction DR2. The first scan connection vertical portion 121 can connect the first scan connection horizontal portion 151 and the first scan line SC1 and can extend in the first direction DR1. The first sense connection horizontal portion 152 can be connected to the first sense output transistor MS1 and can extend in the second direction DR2. The first sense connection vertical portion 122 can connect the first sense connection horizontal portion 152 and the first sense line SS1 and can extend in the first direction DR1.

[0092] In an embodiment, the first scan connection vertical portion 121 can cross and overlap the first sense connection horizontal portion 152, and the first scan connection horizontal portion 151 can cross and overlap the first sense connection vertical portion 122. The first scan connection vertical portion 121 can be insulated from the first sense connection horizontal portion 152, and the first scan connection horizontal portion 151 can be insulated from the first sense connection vertical portion 122.

[0093] In an embodiment, the first scan connection horizontal portion 151 can include a first contact portion CP1 crossing and contacting the first scan connection vertical portion 121 and a first overlap portion OP1 crossing and overlapping the first sense connection vertical portion 122. The first contact portion CP1 can contact the first scan connection vertical portion 121 through a contact hole. The first overlap portion OP1 can be insulated from the first sense connection vertical portion 122. The first overlap portion OP1 can be disposed apart from the first contact portion CP1 in the second direction DR2.

[0094] In an embodiment, the first sense connection horizontal portion 152 can include a second overlap portion OP2 crossing and overlapping the first scan connection vertical portion 121 and a second contact portion CP2 crossing and contacting the first sense connection vertical portion 122. The second overlap portion OP2 can be insulated from the first scan connection vertical portion 121. The second contact portion CP2 can contact the first sense connection vertical portion 122 through a contact hole. The second overlap portion OP2 can be disposed apart from the first contact portion CP1 in the first direction DR1. The second contact portion CP2 can be disposed apart from the first overlap portion OP1 in the first direction DR1, and the second contact portion CP2 can be disposed apart from the second overlap portion OP2 in the second direction DR2.

[0095] In an embodiment, the second sensing connection line SCL2 can include a second sensing connection horizontal portion 153 and a second sensing connection vertical portion 123, and the second scan connection line CCL2 can include a second scan connection horizontal portion 154 and a second scan connection vertical portion 124. The second sensing connection horizontal portion 153 can be connected to the second sensing output transistor MS2 and can extend in the second direction DR2. The second sensing connection vertical portion 123 can connect the second sensing connection horizontal portion 153 with the second sensing line SS2 and can extend in the first direction DR1. The second scan connection horizontal portion 154 can be connected to the second scan output transistor MC2 and can extend in the second direction DR2. The second scan connection vertical portion 124 can connect the second scan connection horizontal portion 154 with the second scan line SC2 and can extend in the first direction DR1.

[0096] In an embodiment, the second sensing connection vertical portion 123 can cross and overlap the second scan connection horizontal portion 154, and the second sensing connection horizontal portion 153 can cross and overlap the second scan connection vertical portion 124. The second sensing connection vertical portion 123 can be insulated from the second scan connection horizontal portion 154, and the second sensing connection horizontal portion 153 can be insulated from the second scan connection vertical portion 124.

[0097] In an embodiment, the second sensing connection horizontal portion 153 can include a third contact portion CP3 crossing and contacting the second sensing connection vertical portion 123 and a third overlap portion OP3 crossing and overlapping the second scan connection vertical portion 124. The third contact portion CP3 can contact the second sensing connection vertical portion 123 through a contact hole. The third overlap portion OP3 can be insulated from the second scan connection vertical portion 124. The third overlap portion OP3 can be disposed apart from the third contact portion CP3 in the second direction DR2.

[0098] In an embodiment, the second scan connection horizontal portion 154 can include a fourth overlap portion OP4 crossing and overlapping the second sensing connection vertical portion 123 and a fourth contact portion CP4 crossing and contacting the second scan connection vertical portion 124. The fourth overlap portion OP4 can be insulated from the second sensing connection vertical portion 123. The fourth contact portion CP4 can contact the second scan connection vertical portion 124 through a contact hole. The fourth overlap portion OP4 can be disposed apart from the third contact portion CP3 in the first direction DR1. The fourth contact portion CP4 can be disposed apart from the third overlap portion OP3 in the first direction DR1 and can be disposed apart from the fourth overlap portion OP4 in the second direction DR2.

[0099] In an embodiment, a length of the first scan connection vertical portion 121 in the first direction DR1 can be substantially the same as a length of the second sensing connection vertical portion 123 in the first direction DR1.

[0100] In an embodiment, a length of the first sensing connection longitudinal portion 122 in the first direction DR1 can be substantially equal to a length of the second scan connection longitudinal portion 124 in the first direction DR1.

[0101] In an embodiment, a length of the first scan connection transverse portion 151 in the second direction DR2, a length of the first sensing connection transverse portion 152 in the second direction DR2, a length of the second sensing connection transverse portion 153 in the second direction DR2, and a length of the second scan connection transverse portion 154 in the second direction DR2 can be substantially equal to each other.

[0102] Figure 5 FIG. 2 is a cross-sectional view of the display device taken along line I-I' of FIG. 1. Figure 4 FIG. 3 is a cross-sectional view of the display device taken along line II-II' of FIG. 1. Figure 6 FIG. 4 is a cross-sectional view of the display device taken along line III-III' of FIG. 1. Figure 4 FIG. 5 is a cross-sectional view of the display device taken along line IV-IV' of FIG. 1. Figure 7 FIG. 6 is a cross-sectional view of the display device taken along line V-V' of FIG. 1. Figure 4 FIG. 7 is a cross-sectional view of the display device taken along line VI-VI' of FIG. 1.

[0103] Referring to FIGS. 1, 2, 3, 4, 5, 6, and 7, Figure 4 Figure 5 Figure 6 Figure 7 and FIG. 8, each of the first pixel PX1 and the second pixel PX2 can include the substrate 110, the lower electrode 120, the buffer layer 111, the active layer 130, the gate insulating layer 112, the gate electrode 140, the interlayer insulating layer 113, the drain electrode 150a, the source electrode 150b, the planarization layer 114, the first electrode 160, the pixel definition film 115, the light emitting layer 170, and the second electrode 180.

[0104] ​​​The substrate 110 can be a transparent insulating substrate. In an embodiment, the substrate 110 can have a rigid characteristic. In this case, the substrate 110 can include, for example, glass, quartz, metal, or the like. In another embodiment, the substrate 110 can have a flexible characteristic. In this case, the substrate 110 can include, for example, polyethersulfone (PES), polyacrylate, polyetherimide (PEI), polyethylene naphthalate (PEN), polyethyleneterephthalate (PET), polyphenylene sulfide (PPS), polyarylate (PAR), polyimide (PI), polycarbonate (PC), cellulose acetate propionate (CAP).

[0105] The lower electrode 120 can be disposed on the substrate 110. The lower electrode 120 can include a conductive substance such as molybdenum (Mo), copper (Cu), aluminum (Al), titanium (Ti), or the like.

[0106] The buffer layer 111 can be disposed on the lower electrode 120. The buffer layer 111 can cover the lower electrode 120 on the substrate 110. The buffer layer 111 can prevent impurities from flowing in through the substrate 110. Also, the buffer layer 111 can provide a flat upper surface on the substrate 110. The buffer layer 111 can include an inorganic insulating substance such as silicon nitride, silicon oxide, silicon oxynitride, or the like.

[0107] The active layer 130 can be disposed on the buffer layer 111. The active layer 130 can overlap the lower electrode 120. In an embodiment, the active layer 130 can include amorphous silicon, polysilicon, or the like. In another embodiment, the active layer 130 can include an oxide semiconductor. For example, the oxide semiconductor can include an oxide of at least one of indium (In), gallium (Ga), zinc (Zn), tin (Sn), titanium (Ti), zirconium (Zr), and hafnium (Hf).

[0108] The gate insulating layer 112 can be disposed on the active layer 130. The gate insulating layer 112 can cover the active layer 130 on the buffer layer 111. In an embodiment, the gate insulating layer 112 can have a uniform thickness along the profile of the active layer 130. In another embodiment, the gate insulating layer 112 can also have a flat upper surface. The gate insulating layer 112 can include an inorganic insulating substance such as silicon nitride, silicon oxide, silicon oxynitride, or the like.

[0109] The gate electrode 140 can be disposed on the gate insulating layer 112. The gate electrode 140 can overlap the active layer 130. The gate electrode 140 can include a conductive substance such as molybdenum (Mo), copper (Cu), aluminum (Al), titanium (Ti), or the like.

[0110] The interlayer insulating layer 113 can be disposed on the gate electrode 140. The interlayer insulating layer 113 can cover the gate electrode 140 on the gate insulating layer 112. In an embodiment, the interlayer insulating layer 113 can have a uniform thickness along the profile of the gate insulating layer 112 and the gate electrode 140. In another embodiment, the interlayer insulating layer 113 can also have a flat upper surface. The interlayer insulating layer 113 can include an inorganic insulating substance such as silicon nitride, silicon oxide, silicon oxynitride, or the like.

[0111] The drain electrode 150a and the source electrode 150b can be disposed on the interlayer insulating layer 113. Each of the drain electrode 150a and the source electrode 150b can be connected to the active layer 130 through a contact hole formed in the gate insulating layer 112 and the interlayer insulating layer 113. Each of the drain electrode 150a and the source electrode 150b can include a conductive substance such as molybdenum (Mo), copper (Cu), aluminum (Al), titanium (Ti), or the like. In an embodiment, the active layer 130, the gate electrode 140, the drain electrode 150a, and the source electrode 150b can form a driving transistor M1 (refer to FIG. 1). Figure 2 ).

[0112] The planarization layer 114 can be disposed on the drain electrode 150a and the source electrode 150b. The planarization layer 114 can cover the drain electrode 150a and the source electrode 150b on the interlayer insulating layer 113. The planarization layer 114 can have a flat upper surface. The planarization layer 114 can include an organic insulating substance such as polyimide (PI) or the like.

[0113] The first electrode 160 can be disposed on the planarization layer 114. The first electrode 160 can be connected to the drain electrode 150a or the source electrode 150b through a contact hole formed in the planarization layer 114. In an embodiment, as shown in FIG. 1, the first electrode 160 can be connected to the source electrode 150b. However, the present application is not limited thereto, and in another embodiment, the first electrode 160 can also be connected to the drain electrode 150a. Figure 5 The first electrode 160 can include a conductive substance such as a metal, an alloy, a transparent conductive oxide, or the like. In an embodiment, the first electrode 160 can include silver (Ag) and indium tin oxide (ITO).

[0114] A pixel definition film 115 can be disposed on the first electrode 160. The pixel definition film 115 can partially cover the first electrode 160 on the planarization layer 114. The pixel definition film 115 can have a pixel opening exposing at least a portion of the first electrode 160. In an embodiment, the pixel opening can expose a central portion of the first electrode 160, and the pixel definition film 115 can cover a peripheral portion of the first electrode 160. The pixel definition film 115 can have a flat upper surface. The pixel definition film 115 can include an organic insulating substance such as polyimide (PI) or the like.

[0115] A light emitting layer 170 can be disposed on the first electrode 160. The light emitting layer 170 can be disposed on the first electrode 160 exposed by the pixel opening. The light emitting layer 170 can include at least one of an organic light emitting substance and a quantum dot.

[0116] In an embodiment, the organic light emitting substance can include a low molecular organic compound or a high molecular organic compound. For example, the low molecular organic compound can include copper phthalocyanine, N,N'-diphenylbenzidine, tris-(8-hydroxyquinoline) aluminum, or the like, and the high molecular organic compound can include poly(3,4-ethylenedioxythiophene), polyaniline, poly-phenylenevinylene, polyfluorene, or the like.

[0117] In an embodiment, the quantum dot can include a core including a group II-VI compound, a group III-V compound, a group IV-VI compound, a group IV element, a group IV compound, and a combination thereof. In an embodiment, the quantum dot can have a core-shell structure including a core and a shell surrounding the core. The shell can function as a protective layer for preventing chemical denaturation of the core to maintain a semiconductor property and as a charging layer for imparting electrophoretic properties to the quantum dot.

[0118] The second electrode 180 can be disposed on the light-emitting layer 170. In an embodiment, the second electrode 180 can also be disposed on the pixel definition film 115. The second electrode 180 can include a conductive substance such as a metal, an alloy, a transparent conductive oxide, or the like. For example, the conductive substance can include aluminum (Al), platinum (Pt), silver (Ag), magnesium (Mg), gold (Au), chromium (Cr), tungsten (W), titanium (Ti), or the like. The first electrode 160, the light-emitting layer 170, and the second electrode 180 can form a light-emitting element EL (see FIG. 1). Figure 2

[0119] In an embodiment, the first scan connection horizontal portion 151 can be disposed on the same layer as the first scan line SC1, and the first sense connection horizontal portion 152 can be disposed on the same layer as the first sense line SS1. Also, the second sense connection horizontal portion 153 can be disposed on the same layer as the second sense line SS2, and the second scan connection horizontal portion 154 can be disposed on the same layer as the second scan line SC2.

[0120] In an embodiment, the first scan connection horizontal portion 151, the first sense connection horizontal portion 152, the second sense connection horizontal portion 153, and the second scan connection horizontal portion 154 can be disposed on the same layer as the drain electrode 150a and the source electrode 150b, respectively. For example, each of the first scan connection horizontal portion 151, the first sense connection horizontal portion 152, the second sense connection horizontal portion 153, and the second scan connection horizontal portion 154 can be disposed on an upper surface of the interlayer insulating layer 113.

[0121] In an embodiment, each of the first scan connection vertical portion 121, the first sense connection vertical portion 122, the second sense connection vertical portion 123, and the second scan connection vertical portion 124 can be disposed on the same layer as the lower electrode 120. For example, each of the first scan connection vertical portion 121, the first sense connection vertical portion 122, the second sense connection vertical portion 123, and the second scan connection vertical portion 124 can be disposed between the substrate 110 and the buffer layer 111.

[0122] ​In an embodiment, the first scan connection horizontal portion 151 can be directly contacted to the first scan connection vertical portion 121, and the first sense connection horizontal portion 152 can be directly contacted to the first sense connection vertical portion 122. Also, the second sense connection horizontal portion 153 can be directly contacted to the second sense connection vertical portion 123, and the second scan connection horizontal portion 154 can be directly contacted to the second scan connection vertical portion 124. For example, the first scan connection horizontal portion 151, the first sense connection horizontal portion 152, the second sense connection horizontal portion 153, and the second scan connection horizontal portion 154 can be directly contacted to the first scan connection vertical portion 121, the first sense connection vertical portion 122, the second sense connection vertical portion 123, and the second scan connection vertical portion 124, respectively, through contact holes formed in the buffer layer 111, the gate insulating layer 112, and the interlayer insulating layer 113.

[0123] In an embodiment, the first scan line SC1 can be directly contacted to the first scan connection vertical portion 121, and the first sense line SS1 can be directly contacted to the first sense connection vertical portion 122. Also, the second scan line SC2 can be directly contacted to the second scan connection vertical portion 124, and the second sense line SS2 can be directly contacted to the second sense connection vertical portion 123. For example, the first scan line SC1, the first sense line SS1, the second scan line SC2, and the second sense line SS2 can be directly contacted to the first scan connection vertical portion 121, the first sense connection vertical portion 122, the second scan connection vertical portion 124, and the second sense connection vertical portion 123, respectively, through contact holes formed in the buffer layer 111, the gate insulating layer 112, and the interlayer insulating layer 113.

[0124] Industrial applicability

[0125] The display device according to an exemplary embodiment of the present application can be applied to a display device included in a computer, a notebook computer, a mobile phone, a smart phone, a smart pad, a PMP, a PDA, an MP3 player, etc.

[0126] The above-described embodiments are merely exemplary embodiments of the present application and various modifications and changes can be made thereto by those skilled in the art without departing from the technical concept of the present application as recited in the claims.

Claims

1. A display device, comprising: The display unit includes a first pixel, a second pixel adjacent to the first pixel along a first direction, a first scan line and a first sensing line connected to the first pixel and extending along a second direction intersecting the first direction, and a second scan line and a second sensing line connected to the second pixel and extending along the second direction. The scan driving unit includes a first scan output transistor that provides a first scan signal to the first scan line, a first sensing output transistor that provides a first sensing signal to the first sensing line, a second sensing output transistor that provides a second sensing signal to the second sensing line, and a second scan output transistor that provides a second scan signal to the second scan line; The first scan connection line connects the first scan line to the first scan output transistor; A first sensing connection line connects the first sensing line to the first sensing output transistor; The second sensing connection line connects the second sensing line to the second sensing output transistor; and The second scan connection line connects the second scan line to the second scan output transistor. The first scanning connection line intersects and overlaps with the first sensing connection line. The second sensing connection line intersects and overlaps with the second scanning connection line.

2. The display device as claimed in claim 1, wherein, The first scan line, the first sensing line, the second scan line, and the second sensing line are arranged sequentially along the first direction. The first scan output transistor, the first sensing output transistor, the second sensing output transistor, and the second scan output transistor are arranged sequentially along the first direction.

3. The display device as claimed in claim 1, wherein, The first scan connection line includes: a first scan connection lateral portion connected to the first scan output transistor and extending along the second direction; and a first scan connection vertical portion connecting the first scan connection lateral portion and the first scan line, and extending along the first direction. The first sensing connection line includes: a first sensing connection lateral portion connected to the first sensing output transistor and extending along the second direction; and a first sensing connection vertical portion connecting the first sensing connection lateral portion and the first sensing line, and extending along the first direction. The second sensing connection line includes: a second sensing connection lateral portion connected to the second sensing output transistor and extending along the second direction; and a second sensing connection vertical portion connecting the second sensing connection lateral portion and the second sensing line, and extending along the first direction. The second scan connection line includes: a second scan connection lateral portion connected to the second scan output transistor and extending along the second direction; and a second scan connection longitudinal portion connecting the second scan connection lateral portion and the second scan line and extending along the first direction.

4. The display device as claimed in claim 3, wherein, The vertical portion of the first scanning connection intersects and overlaps with the horizontal portion of the first sensing connection. The vertical portion of the second sensing connection intersects and overlaps with the horizontal portion of the second scanning connection.

5. The display device as claimed in claim 3, wherein, The first scanning connection horizontal portion intersects and overlaps with the first sensing connection vertical portion. The second sensing connection lateral portion intersects and overlaps with the second scanning connection longitudinal portion.

6. The display device as claimed in claim 3, wherein, The first scanning connection lateral portion includes: a first contact portion that intersects with and contacts the first scanning connection longitudinal portion; and a first overlapping portion that intersects with and overlaps with the first sensing connection longitudinal portion. The first overlapping portion is arranged apart from the first contact portion along the second direction.

7. The display device as claimed in claim 6, wherein, The first sensing connection lateral portion includes a second overlapping portion that intersects with and overlaps with the first scanning connection longitudinal portion. The second overlapping portion is arranged apart from the first contact portion along the first direction.

8. The display device as claimed in claim 7, wherein, The first sensing connection lateral portion further includes a second contact portion that intersects with and contacts the first sensing connection longitudinal portion. The second contact portion is arranged apart from the first overlapping portion along the first direction, and the second contact portion is arranged apart from the second overlapping portion along the second direction.

9. The display device as claimed in claim 3, wherein, The first scan connection lateral portion is arranged on the same layer as the first scan line. The first sensing connection lateral portion is arranged on the same layer as the first sensing line. The second sensing connection lateral portion is arranged on the same layer as the second sensing line. The second scan connection lateral portion is arranged on the same layer as the second scan line.

10. The display device as claimed in claim 3, wherein, The length of the first scanning connection longitudinal portion in the first direction is the same as the length of the second sensing connection longitudinal portion in the first direction. The length of the first sensing connection longitudinal portion in the first direction is the same as the length of the second scanning connection longitudinal portion in the first direction.

Images