Image sensing device

Abstract

An image sensing device includes a first pixel array and a second pixel array. The first pixel array includes a plurality of first unit pixels that are continuously arranged to generate first pixel signals by photoelectric conversion of incident light. The second pixel array is disposed below the first pixel array and includes a plurality of second unit pixels that are continuously arranged to generate second pixel signals by photoelectric conversion of incident light. The first unit pixels are arranged to have a uniform pitch between adjacent first unit pixels in the first pixel array. The second unit pixels are arranged so that a pitch between adjacent second unit pixels is not uniform in the second pixel array.

Description

Technical Field

[0001] The technologies and implementations disclosed in this patent document generally relate to image sensing devices. Background Technology

[0002] An image sensor is a device used to capture optical images by converting light into electrical signals using photosensitive semiconductor materials that react to light. With the development of the automotive, medical, computer, and communications industries, the demand for high-performance image sensors is growing in various fields such as smartphones, digital cameras, camcorders, personal communication systems (PCS), video game consoles, IoT (Internet of Things), robotics, surveillance cameras, and medical miniature cameras. Summary of the Invention

[0003] Various embodiments of the disclosed technology relate to an image sensing device that includes a lower pixel array and an upper pixel array, and allows a sufficient amount of light to reach the photoelectric conversion element of the lower pixel array.

[0004] According to the disclosed embodiments, an image sensing device may include a first pixel array and a second pixel array. The first pixel array includes a plurality of first unit pixels arranged sequentially to generate a first pixel signal through photoelectric conversion of incident light. The second pixel array is disposed below the first pixel array and includes a plurality of second unit pixels arranged sequentially to generate a second pixel signal through photoelectric conversion of incident light. The first unit pixels are arranged such that adjacent first unit pixels in the first pixel array have a uniform spacing. The second unit pixels are arranged such that the spacing between adjacent second unit pixels is different in the second pixel array.

[0005] It should be understood that the foregoing general description and the following detailed description of the disclosed technology are illustrative and explanatory, and are intended to provide further explanation of the claimed disclosure. Attached Figure Description

[0006] The above and other features and advantages of the disclosed technology will become apparent when considered in conjunction with the accompanying drawings and with reference to the following detailed description.

[0007] Figure 1 This is a block diagram illustrating examples of image sensing devices based on some implementations of the disclosed technology.

[0008] Figure 2 These are examples of some implementations based on the disclosed technologies. Figure 1 A 3D view of the pixel array shown.

[0009] Figure 3 This illustrates some implementation methods based on the disclosed technology. Figure 1 The cross-sectional view of an example pixel array cut by line A-A' is shown.

[0010] Figure 4 This illustrates some implementation methods based on the disclosed technology. Figure 1 The cross-sectional view of an example pixel array cut by line B-B' shown.

[0011] Figure 5 This is a cross-sectional view illustrating a problem caused by an imbalance in the amount of light generated in the central and edge regions of a pixel array.

[0012] Figure 6 This illustrates other implementations based on the disclosed technology. Figure 1 The cross-sectional view of an example pixel array cut by line B-B' shown. Detailed Implementation

[0013] Some implementations of the disclosed technology can be used to design an image sensing device comprising different pixel arrays (e.g., a lower pixel array and an upper pixel array) stacked on top of each other in a three-dimensional (3D) stacked structure, such that incident light is first received by the upper pixel array and a portion of the incident light passes through the upper pixel array to reach the lower pixel array, such that the upper and lower pixel arrays operate to detect the incident light. The use of different pixel arrays stacked in a three-dimensional (3D) stacked structure allows a sufficient amount of light to reach the photoelectric conversion element of the lower pixel array.

[0014] Figure 1 This is a block diagram illustrating examples of image sensing devices based on some implementations of the disclosed technology. Figure 2 These are examples of some implementations based on the disclosed technologies. Figure 1 A schematic diagram of an example layout of the pixel array 100 shown.

[0015] Reference Figure 1 and Figure 2 The image sensing device may include a pixel array 100, which includes, for example, two stacked pixel arrays, a correlated dual sampler (CDS) 200, an analog-to-digital converter (ADC) 300, a buffer 400, a line driver 500, a timing generator 600, a control register 700, and a ramp signal generator 800. Figure 1 As shown, each pixel array may include a color filter array with color filters of different colors (e.g., red (R), green (G), and blue (B)), which are arranged in a suitable color filter pattern to properly capture the color information of the scene or object to be imaged.

[0016] like Figure 2 As shown, this example of pixel array 100 includes an upper pixel array 110u and a lower pixel array 110d that are perpendicularly spaced from each other and laterally overlapped to jointly detect incident light. The upper pixel array 110u may include a plurality of upper unit pixels (PXu) arranged continuously in a two-dimensional (2D) structure where upper unit pixels (PXu) are arranged in both row and column directions. The lower pixel array 110d may include a plurality of lower unit pixels (PXd) arranged continuously in a two-dimensional (2D) structure where lower unit pixels (PXd) are arranged in both row and column directions. The upper unit pixels (PXu) and lower unit pixels (PXd) may include a plurality of photoelectric conversion elements configured to generate photocharge through photoelectric conversion of incident light received from the outside, and a plurality of pixel transistors configured to output an electrical signal (i.e., a pixel signal) corresponding to the photocharge generated by the photoelectric conversion elements. The upper unit pixel (PXu) may include red, green, and blue pixels configured to generate corresponding pixel signals (e.g., a first pixel signal) through photoelectric conversion of red, green, and blue visible light, respectively. The red, green, and blue pixels may be arranged in a Bayer pattern. The lower unit pixel (PXd) may include infrared (IR) pixels that generate pixel signals (e.g., a second pixel signal) through photoelectric conversion of light having a wavelength longer than that of red, green, and blue visible light (e.g., infrared (IR) light). Alternatively, the lower unit pixel (PXd) may include red, green, and blue pixels arranged in a Bayer pattern in the same manner as the upper unit pixel (PXu). Therefore, image sensing devices based on some implementations of the disclosed technology may have a stacked structure including different pixel arrays such as an upper pixel array and a lower pixel array. In some implementations, the upper and lower pixel arrays may include pixels of the same type, and in other implementations, the upper and lower pixel arrays may include pixels of different types. The type of pixel can be selected based on the wavelength or spectrum of the incident light to be detected by a particular pixel array (e.g., whether the pixel array is used to generate pixel signals in response to visible light or in response to light in the infrared or far-infrared spectral range).

[0017] The upper unit pixel (PXu) and the lower unit pixel (PXd) can be formed in a one-to-one correspondence. For example... Figure 2As can be seen, while the upper unit pixels (PXu) can be arranged with uniform spacing or spatial intervals in the row and column directions, the lower unit pixels (PXd) can be arranged such that the spacing between adjacent unit pixels can change with position. For example, the distance (or spacing) between adjacent unit pixels can gradually increase in the direction from the center of the lower pixel array 110d to the edge of the lower pixel array 110d. In one implementation of this variable pixel spacing, the distance between adjacent lower unit pixels (PXd) (i.e., the width of the device isolation structure) can gradually increase in response to the principal ray angle (CRA) in the direction from the center to the edge of the lower pixel array 110d, or it can gradually increase in units of a predetermined area in the direction from the center to the edge of the lower pixel array 110d.

[0018] The upper interconnect structure 120u can be connected to the upper unit pixel (PXu). The lower interconnect structure 120d can be connected to the lower unit pixel (PXd). The upper interconnect structure 120u and the lower interconnect structure 120d can be formed between the upper pixel array 110u and the lower pixel array 110d. In some implementations, each of the upper and lower interconnect structures can be implemented as an interconnect layer or an interconnect line. For example, each of the upper and lower interconnect structures can include a wire. In this patent document, the upper interconnect structure and the lower interconnect structure are referred to as the upper interconnect layer and the lower interconnect layer. However, other implementations are also possible.

[0019] The Correlated Dual Sampler (CDS) 200 can sample pixel signals received from unit pixels PXu and PXd of the pixel array 100. For example, the Correlated Dual Sampler (CDS) 200 can perform sampling of the voltage level and reference voltage level of the received pixel signal in response to a clock signal received from the timing generator 600, and can send an analog signal corresponding to the difference between the voltage level of the received pixel signal and the reference voltage level to the analog-to-digital converter (ADC) 300.

[0020] The analog-to-digital converter (ADC) 300 can compare a ramp signal received from the ramp signal generator 800 with a sampled signal received from the correlated double sampler (CDS) 200, and therefore can output a comparison signal indicating the comparison result between the ramp signal and the sampled signal. The ADC 300 can count the level transition times of the comparison signal in response to a clock signal received from the timing generator 600, and can output a count value indicating the counted level transition times to a buffer 400.

[0021] The buffer 400 can store each digital signal received from the analog-to-digital converter (ADC) 300, can sense and amplify each digital signal, and can output each amplified digital signal.

[0022] The row driver 500 can enable or drive the pixel array 100 in response to the output signal of the timing generator 600. For example, the row driver 500 can output drive signals to the pixel array 100 for controlling the operation of transistors contained in unit pixels PXu and PXd, and can drive unit pixels PXu and PXd on a row-line basis.

[0023] The timing generator 600 can generate timing signals to control the line driver 500, the correlated dual sampler (CDS) 200, the analog-to-digital converter (ADC) 300, and the ramp signal generator 800.

[0024] Control register 700 can generate control signals to control ramp signal generator 800, timing generator 600 and buffer 400.

[0025] The ramp signal generator 800 can generate a ramp signal for controlling the output signal of the analog-to-digital converter (ADC) 300 in response to the control signal of the control register 700 and the timing signal received from the timing generator 600.

[0026] Figure 3 This is an example along Figure 1 The cross-sectional view of an example pixel array cut by line A-A' is shown. Figure 4 This is an example along Figure 1 The cross-sectional view of an example pixel array cut by line B-B' shown.

[0027] Reference Figure 3 and Figure 4 The pixel array 100 may include a lower pixel array 110d, a lower interconnect layer 120d, an upper pixel array 110u, an upper interconnect layer 120u, a color filter layer 130, and a lens layer 140.

[0028] The lower pixel array 110d may include a lower substrate 112d, a plurality of lower photoelectric conversion elements 114d, a plurality of lower pixel transistors 116d, and a plurality of lower device isolation structures 118d.

[0029] The lower substrate 112d may include a semiconductor substrate. The semiconductor substrate may include a first surface on which light is incident and a second surface opposite or opposite to the first surface. A lower photoelectric conversion element 114d may be formed in the lower substrate 112d. The lower photoelectric conversion element 114d can generate photocharge by photoelectric conversion of light incident on the first surface. A lower pixel transistor 116d can generate a pixel signal (e.g., a second pixel signal) corresponding to the photocharge generated by the lower photoelectric conversion element 114d. The lower pixel transistor 116d may be formed above the first surface of the lower substrate 112d and can be connected to a correlated dual sampler (CDS) 200 or a line driver 500 via a lower conductor 124d formed in the lower interconnect layer 120d. The lower photoelectric conversion elements 114d of adjacent lower unit pixels (PXd) in the lower substrate 112d may be isolated from each other by a lower device isolation structure 118d. Each lower device isolation structure 118d may include a trench isolation structure formed by filling trenches with insulating material, or may include a junction isolation structure formed by implanting impurities. Unlike the upper device isolation structure 118u, the lower device isolation structure 118d may be formed with different widths depending on its position within the lower pixel array 110d. For example, the lower device isolation structure 118d may be formed with a gradually increasing width in the direction from the center of the lower pixel array 110d to the edge of the lower pixel array 110d. The lower interconnect layer 120d may be disposed between the lower pixel array 110d and the upper pixel array 110u, and simultaneously disposed above the first surface of the lower substrate 112d. The lower interconnect layer 120d may be formed to contact the upper interconnect layer 120u. The lower interconnect layer 120d may include a lower interlayer insulating layer 122d and a lower conductive line 124d formed in the lower interlayer insulating layer 122d. The lower conductor 124d can be connected to the lower pixel transistor 116d and can be arranged so as not to overlap perpendicularly with the lower photoelectric conversion element 114d.

[0030] The upper pixel array 110u may include an upper substrate 112u, multiple photoelectric conversion elements 114u, multiple upper pixel transistors 116u, and multiple upper device isolation structures 118u.

[0031] The upper substrate 112u may include a semiconductor substrate. The semiconductor substrate may include a first surface on which light is incident and a second surface opposite or opposite to the first surface. An upper photoelectric conversion element 114u may be formed in the upper substrate 112u. The upper photoelectric conversion element 114u can generate photocharge by photoelectric conversion of light incident on the first surface. An upper pixel transistor 116u can generate a pixel signal (e.g., a first pixel signal) corresponding to the photocharge generated by the upper photoelectric conversion element 114u of the upper unit pixel (PXu). The upper pixel transistor 116u may be formed above the second surface of the upper substrate 112u and can be connected to a correlated dual sampler (CDS) 200 or a line driver 500 via an upper conductor 124u formed in the upper interconnect layer 120u. The upper photoelectric conversion elements 114u of adjacent upper unit pixels (PXu) in the upper substrate 112u may be isolated from each other by an upper device isolation structure 118u. Each upper device isolation structure 118u may include a trench isolation structure formed by filling trenches with insulating material, or may include a junction isolation structure formed by injecting impurities. The upper device isolation structure 118u may be formed to have the same width in the central and edge regions of the upper pixel array 110u.

[0032] The upper interconnect layer 120u can be disposed between the lower pixel array 110d and the upper pixel array 110u, and simultaneously disposed above the second surface of the upper substrate 112u. The upper interconnect layer 120u can be formed to contact the lower interconnect layer 120d. The upper interconnect layer 120u may include an upper interlayer insulating layer 122u and an upper conductive line 124u formed in the upper interlayer insulating layer 122u. The upper conductive line 124u can be connected to the upper pixel transistor 116u and can be arranged not to overlap perpendicularly with the upper photoelectric conversion element 114u.

[0033] Color filter layer 130 includes different color filters covering the underlying photosensitive element, and the spatial arrangement of the different color filters is designed to use different color filters in adjacent pixels to filter incident light in order to capture color information of the scene or object to be imaged. One suitable color filter arrangement is a Bayer color filter array comprising 50% green (G), 25% blue (B), and 25% red (R) of all color filters. (See reference...) Figure 1In the example, the pixel array 100 includes a 4×4 pixel block at its center, based on a Bayer color arrangement, with two green filters at one diagonal pixel position and a red and a blue filter at the other diagonal pixel position. When implementing a Bayer filter array, two adjacent filters in the same row or column can be different colors, or alternatively, the same color. A particular implementation of a Bayer filter array for placing adjacent filters of the same color in a row or column is a quad-Bayer pixel structure, where the adjacent 2×2 pixels of the 4-pixel block, which serves as the basic building block, are the same color, while the Bayer color arrangement is achieved by making 50% of all 4-pixel filter blocks green (G), 25% blue (B), and 25% red (R). For example, an example of such a quad-Bayer pixel structure could include a 4×4 pattern of a 4-pixel block with a blue filter, a red filter, and two green filters.

[0034] A color filter layer 130 may be formed above a first surface of the upper substrate 112u. The color filter layer 130 may include a plurality of red color filters (R), a plurality of green color filters (G), and a plurality of blue color filters (B). The color filters R, G, and B may be arranged in a Bayer pattern. The red color filters (R) may include a polymeric organic material containing red pigment, the green color filters (G) may include a polymeric organic material containing green pigment, and the blue color filters (B) may include a polymeric organic material containing blue pigment. For example, the red color filters (R) may include a resist material containing red pigment, the green color filters (G) may include a resist material containing green pigment, and the blue color filters (B) may include a resist material containing blue pigment. A grid structure may be formed between the color filters to prevent crosstalk between adjacent color filters.

[0035] Lens layer 140 may be formed above color filter layer 130. Lens layer 140 may include an outer cover layer 142 and a plurality of microlenses 144. The outer cover layer 142 and microlenses 144 may be formed of the same material. The outer cover layer 142 may serve as a planarization layer to compensate for (or remove) the step aberration caused by color filter layer 130. Microlenses 144 may be formed above outer cover layer 142. Each microlens 144 may be formed in a hemispherical shape. Microlenses 144 may converge incident light and transmit the converged light to corresponding photoelectric conversion elements 114u and 114d. Microlenses 144 may be displaced according to their position to correspond to the principal ray angle (CRA).

[0036] The upper photoelectric conversion element 114u and the lower photoelectric conversion element 114d can be formed in a one-to-one correspondence. In some implementations, although the upper photoelectric conversion elements 114u can be arranged at uniform intervals in the upper pixel array 110u, the lower photoelectric conversion elements 114d can be arranged at different intervals in the lower pixel array 110d, so that the distance (or interval) between adjacent lower photoelectric conversion elements 114d varies according to the position of the lower photoelectric conversion elements 114d formed in the lower pixel array 110d.

[0037] For example, such as Figure 3 As shown, in the central region of the pixel array 100, the lower photoelectric conversion element 114d and the upper photoelectric conversion element 114u can be formed such that the center of the lower photoelectric conversion element 114d and the center of the upper photoelectric conversion element 114u overlap each other in the vertical direction. On the other hand, as... Figure 4 As shown, in the edge region of the lower pixel array 110d (e.g., the region closer to B than B'), the lower photoelectric conversion element 114d can be formed to be offset outward compared to the upper photoelectric conversion element 114u. Therefore, the lower photoelectric conversion elements 114d formed in the edge region of the lower pixel array 110d can be spaced further apart than the upper photoelectric conversion elements 114u formed in the edge region of the upper pixel array 110u. For example, the distance between the lower photoelectric conversion elements 114d can gradually increase in the direction from the center of the lower pixel array 110d to the edge of the lower pixel array 110d in response to the principal ray angle (CRA).

[0038] In some implementations, the lower pixel array 110d can be divided into multiple regions based on its distance from the center. For example, the lower pixel array 110d may include a first region, a second region, and a third region arranged sequentially from the center to the edge of the lower pixel array 110d. The distance between any two adjacent lower photoelectric conversion elements 114d can depend on which region the lower photoelectric conversion element 114d falls in. For example, the lower photoelectric conversion elements 114d in each of the first to third regions are set at the same distance, while the lower photoelectric conversion elements 114d in the first region are set at a different distance than those in the second and third regions. In this case, as... Figure 3As shown, in the central region of the lower pixel array 110d, the center point of each microlens 144 and the center point of each lower photoelectric conversion element 114d can be arranged to coincide with each other. On the other hand, in the region located outside the central region of the lower pixel array 110d, each lower photoelectric conversion element 114d can be offset by a predetermined distance proportional to the distance from the central region of the lower pixel array 110d for each region. In this case, the lower photoelectric conversion elements 114d in the same region can be arranged at equal intervals.

[0039] Figure 5 A comparative example of an image sensing device displaying a three-dimensional (3D) layered structure is shown. Figure 5 In the lower pixel array (PXd), the lower photoelectric conversion elements are arranged at uniform intervals from the center to the edge region. For an image sensing device having a 3D stacked structure including an upper pixel array (PXu) and a lower pixel array (PXd), the path of light incident on the lower pixel array (PXd) can be longer than the path of light incident on the upper pixel array (PXu). When the lower photoelectric conversion elements 114d are arranged at uniform intervals from the center to the edge of the lower pixel array (PXd) in the same manner as the upper photoelectric conversion elements 114u, such as Figure 3 As shown, sufficient light can also be incident on the lower photoelectric conversion element 114d in the central region of the pixel array 100, which is perpendicular to it. However, as Figure 5 As shown, in the edge region where light is obliquely incident on the pixel array 100, the amount of light incident on the lower photoelectric conversion element 114d is greatly reduced.

[0040] To prevent uneven light distribution, the distance between adjacent lower photoelectric conversion elements 114d (i.e., the distance between lower unit pixels) can gradually increase in response to the principal ray angle (CRA) in the direction from the center to the edge of the lower pixel array 110d. In some implementations, the lower photoelectric conversion elements 114d can be arranged such that the distance between two adjacent lower photoelectric conversion elements 114d is determined based on the region where the lower photoelectric conversion elements are located, and the distance between two adjacent lower photoelectric conversion elements 114d is larger in the region closer to the edge. In some implementations, in the lower pixel array 110d, the lower device isolation structure 118d can gradually increase its width in response to the principal ray angle (CRA) in the direction from the center to the edge of the lower pixel array 110d, or it can gradually increase its width in units of predetermined regions in the direction from the center to the edge of the lower pixel array 110d. Therefore, a sufficient amount of light can be incident on the lower photoelectric conversion elements 114d of the lower pixel array 110d.

[0041] Reference Figure 3 In the central region of the pixel array 100, the lower conductor 124d can be formed to perpendicularly overlap with the upper conductor 124u. Conversely, referring to... Figure 4 In the edge region of the pixel array 100, the lower conductor 124d can be offset by a predetermined distance corresponding to the offset of the lower photoelectric conversion element 114d, so that the resulting lower conductor 124d can be formed to be offset perpendicularly to the upper conductor 124u in the edge region of the pixel array 100.

[0042] Figure 6 This illustrates other implementations based on the disclosed technology. Figure 1 The cross-sectional view of an example pixel array cut by line B-B' shown.

[0043] Reference Figure 6 Even in the edge region of the lower pixel array (PXd), the lower conductor 126d of the lower interconnect layer 120d and the upper conductor 126u of the upper interconnect layer 120u can overlap each other perpendicularly.

[0044] like Figure 4 As shown, when the lower conductor 126d is also offset in the edge region of the lower pixel array (PXd), the mask for patterning the upper conductor 126u and the mask for patterning the lower conductor 126d should be manufactured separately from each other. However, as Figure 6 As shown, when the remaining lower conductors 126d, excluding some conductors directly connected to the lower pixel transistor 116d, are formed at the same position as the upper conductors 126u, the same mask can be used to pattern the corresponding lower conductors 126d and upper conductors 126u. Therefore, the manufacturing process of the image sensing device can be streamlined, thereby reducing production costs.

[0045] Figure 6 The remaining constituent elements shown, besides the aforementioned elements, are... Figure 4 The components are the same, and therefore their detailed descriptions will be omitted for ease of description.

[0046] As disclosed in this patent document, an image sensing device based on some implementations of the disclosed technology can be implemented in a way that allows a sufficient amount of light to reach the photoelectric conversion element of the lower pixel array of the image sensing device having a three-dimensional (3D) stacked structure.

[0047] Although several illustrative embodiments have been described, it should be understood that modifications or enhancements to the disclosed embodiments and other embodiments can be designed based on the descriptions and / or illustrations in this patent document.

[0048] Cross-references to related applications

[0049] This patent document claims priority and benefit to Korean Patent Application No. 10-2020-0156828, filed on November 20, 2020, the entire contents of which are incorporated herein by reference as part of the disclosure of this patent document.

Claims

1. An image sensing device comprising: a first pixel array including a plurality of first unit pixels arranged continuously to generate first pixel signals by photoelectric conversion of incident light; and a second pixel array disposed below the first pixel array and including a plurality of second unit pixels arranged continuously to generate second pixel signals by photoelectric conversion of the incident light, wherein the first unit pixels are arranged to have a uniform pitch between adjacent first unit pixels in the first pixel array, and the second unit pixels are arranged so that a pitch between adjacent second unit pixels is not uniform in the second pixel array.

2. The image sensing device according to claim 1, wherein the second unit pixels are arranged so that a distance between the second unit pixels gradually increases in a direction from a center of the second pixel array to an edge of the second pixel array.

3. The image sensing device according to claim 1, wherein the second pixel array includes a first region at a first distance from the center of the second pixel array and a second region at a second distance greater than the first distance from the center of the second pixel array, and wherein the second unit pixels in the first region are disposed to be spaced apart from each other at a first interval, and the second unit pixels in the second region are disposed to be spaced apart from each other at a second interval.

4. The image sensing device according to claim 3, wherein the second interval is greater than the first interval.

5. The image sensing device according to claim 1, wherein the first unit pixels include: a first color pixel that performs photoelectric conversion of visible light corresponding to a first color; a second color pixel that performs photoelectric conversion of visible light corresponding to a second color; and a third color pixel that performs photoelectric conversion of visible light corresponding to a third color.

6. The image sensing device according to claim 1, wherein the second unit pixels include a plurality of infrared (IR) pixels that perform photoelectric conversion of infrared (IR) light.

7. The image sensing device according to claim 1, wherein the second unit pixels include: a fourth color pixel that performs photoelectric conversion of visible light corresponding to a first color; a fifth color pixel that performs photoelectric conversion of visible light corresponding to a second color; and a sixth color pixel that performs photoelectric conversion of visible light corresponding to a third color.

8. The image sensing device according to claim 1, wherein the first unit pixels and the second unit pixels are formed in a one-to-one correspondence.

9. The image sensing device according to claim 1, wherein the first pixel array includes: a first substrate including a first surface and a second surface opposite to the first surface; a first photoelectric conversion element formed in the first substrate and generating photoelectric charges by the photoelectric conversion of the incident light incident on the first surface of the first substrate; a first pixel transistor formed over the second surface of the first substrate and outputting the first pixel signals corresponding to the photoelectric charges; and a first wiring formed on the second surface of the first substrate and electrically connected to the first pixel transistor. a first device isolation structure formed in the first substrate and isolating the first photoelectric conversion elements from each other.

10. The image sensing device according to claim 9, wherein the first device isolation structure has the same width over the first pixel array.

11. The image sensing device according to claim 1, wherein the second pixel array includes: a second substrate including a first surface and a second surface opposite to the first surface; a second photoelectric conversion element formed in the second substrate and generating photocharges by another photoelectric conversion of the incident light incident on the first surface of the second substrate; a second pixel transistor formed over the second surface of the second substrate and outputting the second pixel signal corresponding to the photocharges; and a second device isolation structure formed in the second substrate and isolating the second photoelectric conversion elements from each other.

12. The image sensing device according to claim 11, wherein the second device isolation structure has different widths over the second pixel array.

13. The image sensing device according to claim 11, wherein the second device isolation structure has a width that gradually increases in a direction from a center of the second pixel array to an edge of the second pixel array.

14. The image sensing device according to claim 11, wherein the second pixel array includes a first region at a first distance from the center of the second pixel array and a second region at a second distance greater than the first distance from the center of the second pixel array, and wherein a width of the second device isolation structure in the second region is greater than a width of the second device isolation structure in the first region.

15. The image sensing device according to claim 11, wherein the second photoelectric conversion elements are spaced apart from each other at different intervals in a central region and an edge region of the second pixel array.

16. The image sensing device according to claim 15, wherein the second photoelectric conversion elements are arranged such that a distance between the second photoelectric conversion elements gradually increases in a direction from a center of the second pixel array to an edge of the second pixel array.

17. The image sensing device according to claim 15, wherein the second pixel array includes a first region at a first distance from the center of the second pixel array and a second region at a second distance greater than the first distance from the center of the second pixel array, and wherein the second photoelectric conversion elements in the first region are arranged to be spaced apart from each other at a first interval, and the second photoelectric conversion elements in the second region are arranged to be spaced apart from each other at a second interval greater than the first interval.

18. The image sensing device according to claim 1, further comprising: a first interconnection structure coupled to the first pixel array and provided between the first pixel array and the second pixel array, the first interconnection structure including a first wiring connected to the first unit pixel; and a second interconnection structure coupled to the second pixel array and provided between the first pixel array and the second pixel array, the second interconnection structure including a second wiring connected to the second unit pixel. a second interconnection structure coupled to the second pixel array and disposed between the first pixel array and the second pixel array, the second interconnection structure including second conductive lines connected to the second unit pixels.

19. The image sensing device of claim 18, wherein, the second conductive lines perpendicularly overlap the first conductive lines in a central region of the second pixel array, and deviate from the first conductive lines in an edge region of the second pixel array.

20. The image sensing device of claim 18, wherein, the second conductive lines are formed to perpendicularly overlap the first conductive lines in the central region and the edge region of the second pixel array.

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