A package structure and a packaging method thereof

Abstract

This invention provides a packaging structure and packaging method thereof. The packaging structure includes: a semiconductor wafer with its back side above its front side; a sensor control unit and metal pads disposed on the front side of the semiconductor wafer; a through-hole disposed inside the semiconductor wafer, extending downward from the back side of the semiconductor wafer to the sensor control unit; a first redistribution layer disposed on the back side of the semiconductor wafer, the first redistribution layer being led out from the sensor control unit through the through-hole and redistributed to the back side of the semiconductor wafer; multiple sensor devices distributed on the first redistribution layer, each sensor device being bonded to the back side of the semiconductor wafer, and the signal contacts of each sensor device being connected to the first redistribution layer; and a second redistribution layer located below and connected to the metal pads. Compared with the prior art, this invention integrates multiple sensors and control units into a single package, thereby achieving higher product integration.

Description

[Technical Field]

[0001] This invention relates to the field of integrated sensor technology, and in particular to a wafer-level system integration packaging structure and packaging method that integrates multiple sensors with a control unit. [Background Technology]

[0002] As Moore's Law continues to evolve, chip sizes are approaching the limits of photomasks, posing even greater challenges to the development of semiconductor packaging towards lighter, thinner, shorter, and smaller designs. Currently, most sensor packaging employs single-chip, single-function, frame-type, or substrate-type packaging, resulting in large package sizes, low integration, and limited functionality. The development requirements for high integration, multifunctionality, small size, and modularity in semiconductor devices present new demands and challenges for sensor packaging. [Summary of the Invention]

[0003] One of the objectives of this invention is to provide a packaging structure and packaging method that integrates multiple sensors and control units into a single package, thereby increasing the product's integration level and reducing processing costs.

[0004] According to one aspect of the present invention, a packaging structure is provided, comprising: a semiconductor wafer with its back side facing its front side and the back side being above the front side; a sensor control unit and metal pads are disposed on the front side of the semiconductor wafer; a through-hole is disposed inside the semiconductor wafer, the through-hole extending downward from the back side of the semiconductor wafer to the sensor control unit; a first redistribution layer is disposed on the back side of the semiconductor wafer, the first redistribution layer being led out from the sensor control unit through the through-hole and redistributed to the back side of the semiconductor wafer; a plurality of sensor devices are distributed on the first redistribution layer, each sensor device being bonded to the back side of the semiconductor wafer, and a signal contact of each sensor device being connected to the first redistribution layer; and a second redistribution layer located below and connected to the metal pads.

[0005] According to another aspect of the present invention, the present invention provides a packaging method for a packaging structure, comprising: providing a semiconductor wafer, wherein the back side of the semiconductor wafer faces its front side and is located above its front side; a sensor control unit and metal pads are disposed on the front side of the semiconductor wafer; a through-hole is disposed inside the semiconductor wafer, the through-hole extending downward from the back side of the semiconductor wafer to the sensor control unit; a first redistribution layer is disposed on the back side of the semiconductor wafer, the first redistribution layer being led out from the sensor control unit through the through-hole and redistributed to the back side of the semiconductor wafer; providing a plurality of sensor devices; placing the plurality of sensor devices on the first redistribution layer, bonding each sensor device to the back side of the semiconductor wafer, and connecting the signal contacts of each sensor device to the first redistribution layer to form a wafer structure;

[0006] The circular wafer structure is cut to obtain multiple individual chips, which are then distributed on a carrier board. In each individual chip, the metal pads are adjacent to the carrier board, and multiple sensor devices are opposite to the carrier board. A molding process is used to encapsulate the multiple individual chips distributed on the carrier board using molding compound to form a molded product. A second redistribution layer is formed on the surface of the molded product that has been peeled off from the carrier board. The second redistribution layer is located below the metal pads in the individual chips, and the second redistribution layer is connected to the metal pads.

[0007] Compared with existing technologies, this invention integrates multiple sensors (not limited to two) and a control unit into a single package through system integration packaging, realizing the diversification, integration, and modularization of the functions of a single packaged sensor; effectively reducing the area occupied in terminal applications, shortening the terminal production cycle and processing costs, and having a wider range of application prospects. [Attached Image Description]

[0008] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0009] Figure 1 This is a longitudinal cross-sectional view of the packaging structure in one embodiment of the present invention;

[0010] Figure 2 This is a flowchart illustrating the packaging method of the packaging structure in one embodiment of the present invention;

[0011] Figures 3-13 In one embodiment of the present invention Figure 2 The diagram shows the longitudinal cross-sections corresponding to each step.

Detailed Implementation Methods

[0012] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0013] The term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the invention. The phrase "in one embodiment" appearing in different places throughout this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that excludes other embodiments. Unless otherwise specified, the terms "connected," "linked," and "connected" used herein to indicate electrical connection refer to direct or indirect electrical connection.

[0014] Please refer to Figure 1 As shown, it is a longitudinal cross-sectional schematic diagram of the packaging structure in one embodiment of the present invention, which integrates multiple sensor devices and sensor control units into a single package. Figure 1 The package structure shown includes a semiconductor wafer 1, multiple sensor devices 2 and 3, and molding compound 5. After semiconductor wafer-level packaging (or system integration packaging), a semiconductor wafer dicing step is performed to form multiple independent package structures, i.e., individual chips. From the perspective before semiconductor wafer dicing, i.e., from the semiconductor wafer level (i.e., wafer-level) perspective, semiconductor wafer 1 is an independent semiconductor wafer. From the perspective after semiconductor wafer dicing, i.e., from the chip level perspective, semiconductor wafer 1 can be understood as a semiconductor wafer wafer.

[0015] For ease of description, Figure 1 The illustrated embodiment shows only two sensor devices 2 and 3. In fact, there can be more sensor devices in this invention.

[0016] The back side of the semiconductor wafer 1 faces its front side, and the back side of the semiconductor wafer 1 is located above its front side. The front side (i.e., the circuit surface) of the semiconductor wafer 1 is provided with a sensor control unit (including sensor control circuitry and storage circuitry) 102 and metal pads 103. A through-hole 101 is provided inside the semiconductor wafer 1, extending downwards from the back side of the semiconductor wafer 1 to the sensor control unit 102. The back side (i.e., the non-circuit surface) of the semiconductor wafer 1 is provided with a first redistribution layer 105, which is led out from the sensor control unit 102 through the through-hole 101 and redistributed to the back side of the semiconductor wafer 1, thereby redistributing the signal from the through-hole 101 to the back side of the semiconductor wafer 1.

[0017] exist Figure 1 In the specific embodiment shown, the metal pad 103 is located below the control unit 102 of the sensor (or the metal pad 103 is closer to the front side of the semiconductor wafer 1 than the control unit 102 of the sensor); the first redistribution layer 105 is protected by a passivation layer 104; the via 101 is a silicon via formed based on deep silicon etching technology.

[0018] Sensor devices 2 and 3 are distributed on the first redistribution layer 105. Each sensor device 2 and 3 is bonded to the back side of the semiconductor wafer 1, and the signal contact of each sensor device 2 and 3 is connected to the first redistribution layer 105. In one embodiment, the sensor devices 2 and 3 are bonded to the semiconductor wafer 1 through a flip-chip and reflow process.

[0019] exist Figure 1 In the specific embodiment shown, sensor device 2 is a WLP (Wafer Level Packaging) based sensor device, which includes a substrate 201, a sensor structure layer 202, a sensor structure protective cover 203, a redistribution layer 204, and metal bumps 205 stacked sequentially; sensor device 3 is a WLP based sensor device, which includes a substrate 301, a sensor structure layer 302, a sensor structure protective cover 303, a redistribution layer 304, and metal bumps 305 stacked sequentially. The metal bumps 205 and 305 are signal contacts in sensor devices 2 and 3 connected to the first redistribution layer 105; both sensor structure layer 202 and sensor structure layer 302 include a fixed structure located at the chip edge and a movable structure located in the middle of the chip.

[0020] It should be noted that the multiple sensor devices 2 and 3 in this invention can be of the same type or different types. The sensor devices 2 and 3 can be existing sensor devices; therefore, their specific structures will not be described in detail here.

[0021] exist Figure 1 In the embodiment shown, a second redistribution layer 501 is provided on the front side of the bonded semiconductor wafer 1. The second redistribution layer 501 is located below the metal pad 103 and is connected to the metal pad 103, thereby redistributing the signal output terminals through the redistribution process. The second redistribution layer 501 is protected by the dielectric layer 502.

[0022] Solder balls 503 are disposed on the second redistribution layer 501 on the front side of the semiconductor wafer 1. In one embodiment, this can be achieved through a ball-planting or electroplating process. The integrated semiconductor wafer 1 and multiple sensor devices 2 and 3 are encapsulated using a molding compound 5 to form the final package.

[0023] Please refer to Figure 2 The diagram shown is a flowchart illustrating the packaging method of the packaging structure in one embodiment of the present invention; please refer to... Figures 3-13 As shown, this is one embodiment of the present invention. Figure 2 The diagram shows the longitudinal cross-sections corresponding to each step. Figure 2 The packaging method for the shown packaging structure includes the following steps.

[0024] Step 210, as follows Figure 3 As shown, an initial circular wafer 11 is provided, with its back side facing its front side, and the back side of the initial circular wafer 11 positioned above its front side. The front side (i.e., the circuit surface) of the initial circular wafer 11 is provided with a sensor control unit (including a sensor control circuit and a storage circuit) 102 and metal pads 103. A through-hole 101 is provided inside the initial circular wafer 11, located above the sensor control unit 102, with one end of the through-hole 101 at a predetermined distance from the back side of the initial circular wafer 11, and the other end extending to the sensor control unit 102. Figure 1 In the specific embodiment shown, the metal pad 103 is located below the control unit 102 of the sensor (or the metal pad 103 is closer to the front side of the initial wafer 11 than the control unit 102 of the sensor); the through hole 101 is a silicon through hole formed based on deep silicon etching technology.

[0025] Step 220, as Figure 4 As shown, the back side of the initial wafer 11 is thinned using a thinning process, exposing the through-hole 101 on the back side (i.e., the non-circuit surface) of the thinned initial wafer 11, thereby obtaining the semiconductor wafer 1. That is, the back side of the semiconductor wafer 1 faces its front side, and its back side is located above its front side; the front side of the semiconductor wafer 1 is provided with a sensor control unit 102 and metal pads 103; the semiconductor wafer 1 has a through-hole 101 inside, extending downwards from the back side of the semiconductor wafer 1 to the sensor control unit 102.

[0026] Step 230, as Figure 5As shown, through a redistribution process, a first redistribution layer 105 is formed on the back side of the semiconductor wafer 1 (i.e., the back side of the thinned initial wafer 11). The first redistribution layer 105 is led out from the control unit 102 of the sensor through the via 101 and redistributed to the back side of the semiconductor wafer 1, thereby redistributing the signal from the via 101 on the back side of the semiconductor wafer 1. Figure 5 In the specific embodiment shown, the first redistribution layer 105 is protected by a passivation layer 104.

[0027] Step 240, as follows Figure 6 As shown, sensor device 2 and sensor device 3 are provided. Figure 6 In the specific embodiments shown, sensor device 2 is a WLP (Wafer Level Packaging) based sensor device, which includes a substrate 201, a sensor structure layer 202, a sensor structure protective cover 203, a redistribution layer 204, and metal bumps 205 stacked sequentially; sensor device 3 is a WLP based sensor device, which includes a substrate 301, a sensor structure layer 302, a sensor structure protective cover 303, a redistribution layer 304, and metal bumps 305 stacked sequentially. Both sensor structure layer 202 and sensor structure layer 302 include a fixed structure located at the chip edge and a movable structure located in the middle of the chip.

[0028] Step 250, as follows Figure 7 As shown, sensor devices 2 and 3 are placed on the first redistribution layer 105, each sensor device 2 and 3 is bonded to the back side of the semiconductor wafer 1, and the signal contacts of each sensor device 2 and 3 are connected to the first redistribution layer 105 to form a wafer structure. Figure 7 In the illustrated embodiment, the sensor devices 2 and 3 are bonded to the semiconductor wafer 1 via a flip-chip and reflow process. Figure 7 In the specific embodiment shown, the metal bumps 205 and 305 are signal contacts in the sensor devices 2 and 3 that are connected to the first redistribution layer 105.

[0029] Step 260, as Figure 8 As shown, the above-mentioned circular structure is cut to obtain multiple individual chips, and the multiple individual chips are distributed on the carrier board 4 through a redistribution process. In each individual chip, the metal pad 103 is adjacent to the carrier board 4, and the sensor devices 2 and 3 are opposite to the carrier board 4.

[0030] Step 270, as follows Figure 9 As shown, through the molding process, multiple individual chips distributed on the carrier board 4 are molded using molding compound 5 to form a molded product.

[0031] Step 280, as follows Figure 10 As shown, under certain process conditions, the carrier plate 4 on the plastic-sealed product is peeled off.

[0032] Step 290, as Figure 11 As shown, a second redistribution layer 501 is formed on the surface of the molded product where the carrier board 4 has been peeled off. The second redistribution layer 501 is located below the metal pads 103 in each of the individual chips, and is connected to the metal pads 103, thereby redistributing the signal output terminals through a redistribution process. Figure 11 In the specific embodiment shown, the second redistribution layer 501 is protected by the dielectric layer 502.

[0033] Step 300, such as Figure 12 As shown, solder balls 503 are formed on the second rewiring layer 501 of the encapsulated product. In one embodiment, this can be achieved through a ball-planting or electroplating process.

[0034] Step 310, as follows Figure 13 As shown, the packaged product with solder balls 503 is separated by a cutting process to form a single packaged chip.

[0035] For ease of description, Figure 3-13 The illustrated embodiment shows only two sensor devices 2 and 3. In reality, the present invention can use more sensor devices. It should be noted that the multiple sensor devices 2 and 3 in the present invention can be of the same type or different types. The sensor devices 2 and 3 can be existing sensor devices; therefore, their specific structures will not be described in detail here.

[0036] In summary, this invention integrates multiple sensors (not limited to two) 2, 3 and sensor control unit 102 into a single package through system integration packaging, achieving diversification, integration and modularization of the functions of a single packaged sensor; effectively reducing the area occupied in terminal applications, shortening the terminal production cycle and processing costs, and thus having a wider range of application prospects.

[0037] In this invention, terms such as “connection,” “linked,” “connected,” and “joined” that indicate electrical connection, unless otherwise specified, indicate direct or indirect electrical connection.

[0038] The above description is only a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiments. Any equivalent modifications or changes made by those skilled in the art based on the disclosure of the present invention should be included within the scope of protection set forth in the claims.

Claims

1. A package structure, comprising: It includes: A semiconductor wafer, with its back side facing its front side and its back side positioned above its front side; The front side of the semiconductor wafer is provided with a sensor control unit and metal pads; the inside of the semiconductor wafer is provided with a through hole, which extends downward from the back side of the semiconductor wafer to the sensor control unit; the back side of the semiconductor wafer is provided with a first redistribution layer, which is led out from the sensor control unit through the through hole and redistributed to the back side of the semiconductor wafer. Multiple sensor devices are distributed on the first redistribution layer, each sensor device is bonded to the back side of the semiconductor wafer, and the signal contact of each sensor device is connected to the first redistribution layer. The second redistribution layer is located below the metal pads and is connected to the metal pads.

2. The packaging structure according to claim 1, characterized in that, The control unit of the sensor includes the sensor's control circuit and storage circuit; The sensor device is a wafer-level packaged sensor device; The multiple sensor devices may be of the same type or different types.

3. The packaging structure according to claim 2, characterized in that, The via is a silicon via formed based on deep silicon etching technology; The sensor device is bonded to the semiconductor wafer through a flip-chip and reflow process.

4. The packaging structure according to claim 1, characterized in that, The sensor device includes a substrate, a sensor structure layer, a sensor structure protective cover, a rewiring layer, and metal bumps stacked sequentially. The metal bumps are signal contacts in the sensor device that are connected to the first redistribution layer.

5. The package structure of claim 1, wherein, It also includes: Solder balls are disposed on the second redistribution layer on the front side of the semiconductor wafer; A molding compound that encapsulates the integrated semiconductor wafer and multiple sensor devices.

6. A packaging method of a package structure, characterized by, It includes: A semiconductor wafer is provided, wherein the back side of the semiconductor wafer faces its front side and is positioned above its front side; The front side of the semiconductor wafer is provided with a sensor control unit and metal pads; the semiconductor wafer is provided with a through hole, which extends downward from the back side of the semiconductor wafer to the sensor control unit. A first redistribution layer is provided on the back side of the semiconductor wafer. The first redistribution layer is led out from the control unit of the sensor through the via and redistributed to the back side of the semiconductor wafer. Provides multiple sensor devices; Multiple sensor devices are placed on the first redistribution layer, each sensor device is bonded to the back side of the semiconductor wafer, and the signal contacts of each sensor device are connected to the first redistribution layer to form a wafer structure. The circular wafer structure is cut to obtain multiple individual chips, and the multiple individual chips are distributed on a carrier board. In each individual chip, the metal pads are adjacent to the carrier board, and the multiple sensor devices are opposite to the carrier board. Through the molding process, multiple individual chips distributed on the carrier are molded using molding compound to form a molded product; A second redistribution layer is formed on the surface of the molded product on the side where the carrier board has been peeled off. The second redistribution layer is located below the metal pads in the single chip and is connected to the metal pads.

7. The packaging method of the packaging structure according to claim 6, characterized in that, It also includes: Solder balls are formed on the second redistribution layer of the encapsulated product; The molded product with solder balls is separated by a cutting process to form a single packaged chip.

8. The packaging method of the packaging structure according to claim 6 or 7, characterized in that, The step of providing semiconductor wafers includes: An initial disc is provided, with its back side facing its front side and the back side above its front side; a sensor control unit and metal pads are provided on the front side of the initial disc; a through hole is provided inside the initial disc, the through hole is located above the sensor control unit, and one end of the through hole is a predetermined distance from the back side of the initial disc, and the other end extends to the sensor control unit. Thinning is performed on the back side of the initial wafer to expose the vias on the thinned back side of the initial wafer, thereby obtaining the semiconductor wafer.

9. The packaging method of the packaging structure according to claim 6, characterized in that, The control unit of the sensor includes the sensor's control circuit and storage circuit; The sensor device is a wafer-level packaged sensor device; The multiple sensor devices may be of the same type or different types. The via is a silicon via formed based on deep silicon etching technology; The sensor device is bonded to the semiconductor wafer through a flip-chip and reflow process.

10. The packaging method of the packaging structure according to claim 6, characterized in that, The sensor device includes a substrate, a sensor structure layer, a sensor structure protective cover, a rewiring layer, and metal bumps stacked sequentially. The metal bumps are signal contacts in the sensor device that are connected to the first redistribution layer.

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