Quasi-cyclic low-density parity-check code decoding method, system, apparatus and device
By acquiring the current decoding recursion number, the previous flip signal, and the row weight value, the flip signal and decoding result of the quasi-cyclic low-density parity-check code can be quickly determined, solving the problem of low decoding efficiency and realizing a more efficient decoding process.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-28
- Publication Date
- 2026-03-17
AI Technical Summary
In existing quasi-cyclic low-density parity-check code decoding methods, the flipping situation can only be determined after calculating the symptom value of each bit in the codeword each time, resulting in low decoding efficiency.
By acquiring the current decoding recursion number, the previous flip signal, the symptom value, and the row weight value, the current flip signal and decoding result can be quickly determined, reducing unnecessary bit flip calculations.
This improves the decoding efficiency of quasi-cyclic low-density parity-check codes, reduces unnecessary bit-flipping operations, and increases decoding speed.
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Figure CN114598330B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of decoding technology, and more specifically, to a method, system, apparatus, and equipment for decoding quasi-cyclic low-density parity-check codes. Background Technology
[0002] Currently, in the decoding process of quasi-cyclic low-density parity-check codes, the symptom value of each bit in the codeword must be calculated each time before the flipping status of each bit can be determined from the symptom value, i.e., whether to perform a flipping operation. This results in low decoding efficiency of the quasi-cyclic low-density parity-check code decoding method.
[0003] In summary, improving the decoding efficiency of quasi-cyclic low-density parity-check code decoding methods is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0004] The purpose of this application is to provide a quasi-cyclic low-density parity-check (QLP) code decoding method, which can, to some extent, solve the technical problem of how to improve the decoding efficiency of QLP code decoding methods. This application also provides a QLP code decoding system, apparatus, and device.
[0005] To achieve the above objectives, this application provides the following technical solution:
[0006] A quasi-cyclic low-density parity-check code decoding method includes:
[0007] Obtain the target codeword to be decoded;
[0008] Obtain the current decoding recursion number and the previous flip signal, wherein the previous flip signal is used to indicate whether the previous recursion number of the current decoding recursion number was bit-flipped;
[0009] Obtain the symptom value calculated for the target codeword at the current decoding recursion number;
[0010] Obtain the row weight value of the target codeword;
[0011] The current flip signal is determined based on the current decoding recursion count, the previous flip signal, the symptom value, and the row weight value;
[0012] Based on the current flip signal and the symptom value, determine the current decoding result of the target codeword at the current decoding recursion number, and determine the target decoding result of the target codeword based on the current decoding result.
[0013] Preferably, determining the current flip signal based on the current decoding recursion count, the previous flip signal, the symptom value, and the row weight value includes:
[0014] The flip threshold corresponding to the current decoding recursion number is determined based on the current decoding recursion number and the previous flip signal;
[0015] The flip function value corresponding to the current decoding recursion number is determined based on the symptom value and the row weight value.
[0016] If the flip threshold is greater than the flip function value, then the current flip signal indicates that no bit flipping will be performed.
[0017] If the flip threshold is less than or equal to the flip function value, then the current flip signal is determined to indicate that a bit flip is to be performed.
[0018] Preferably, determining the flip threshold corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flip signal includes:
[0019] If the value of the current decoding recursion number is 1, then the flip threshold is determined to be the first preset value;
[0020] If the current decoding recursion number is 2, then the flip threshold is determined to be the second preset value;
[0021] If the value of the current decoding recursion number is greater than or equal to 2, and the previous flip signal indicates that a bit flip has occurred, then the flip threshold is determined to be 1.
[0022] If the value of the current decoding recursion number is greater than or equal to 2, and the previous flip signal indicates that no bit flip was performed, then the flip threshold is determined to be 0.
[0023] Preferably, determining the flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value includes:
[0024] The flip function value is determined based on the existing correspondence between the symptom value, the row weight value, and the flip function value.
[0025] Preferably, determining the flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value includes:
[0026] The flip function value is determined based on the symptom value and the row weight value using the flip function value calculation formula.
[0027] The formula for calculating the value of the flip function includes:
[0028]
[0029] Where n represents the nth bit in the target codeword; E nM(n) represents the flip function value of the nth bit in the target codeword; M(n) represents the position of the 1 in the nth parity check matrix corresponding to the target codeword; S k This represents the symptom value corresponding to k; col wt(n) This represents the row weight value.
[0030] A quasi-cyclic low-density parity-check code decoding system includes:
[0031] The first acquisition module is used to acquire the target codeword to be decoded;
[0032] The second acquisition module is used to acquire the current decoding recursion number and the previous flip signal, wherein the previous flip signal is used to indicate whether the previous recursion number of the current decoding recursion number was bit-flipped.
[0033] The third acquisition module is used to acquire the symptom value that the target codeword has been calculated at the current decoding recursion number;
[0034] The fourth acquisition module is used to acquire the row weight value of the target codeword;
[0035] The first determining module is used to determine the current flip signal based on the current decoding recursion number, the previous flip signal, the symptom value, and the row weight value.
[0036] The second determining module is used to determine the current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and the symptom value, and to determine the target decoding result of the target codeword based on the current decoding result.
[0037] A quasi-cyclic low-density parity-check code decoding device includes:
[0038] Memory, used to store computer programs;
[0039] A processor, configured to implement the steps of the quasi-cyclic low-density parity-check code decoding method as described above when executing the computer program.
[0040] A quasi-cyclic low-density parity-check code decoding device, comprising:
[0041] The input register is used to obtain the target codeword to be decoded;
[0042] Select a multiplexer to obtain the current decoding recursion count;
[0043] A bit-flipping and symptom value updater is used to acquire a previous flip signal, which indicates whether a bit flip was performed in the previous recursion of the current decoding recursion; acquire the symptom value calculated for the target codeword at the current decoding recursion; acquire the row weight value of the target codeword; determine the current flip signal based on the current decoding recursion, the previous flip signal, the symptom value, and the row weight value; determine the current decoding result of the target codeword at the current decoding recursion based on the current flip signal and the symptom value, and determine the target decoding result of the target codeword based on the current decoding result.
[0044] Preferably, the bit flip and symptom value updater includes:
[0045] A flip threshold selector is used to determine the flip threshold corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flip signal;
[0046] A flip function value determiner is used to determine the flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value.
[0047] A bit-flip determiner is configured to determine that the current flip signal indicates no bit flipping if the flip threshold is greater than the flip function value, and to determine that the current flip signal indicates bit flipping if the flip threshold is less than or equal to the flip function value.
[0048] The bit flip and symptom value operator is used to determine the current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and the symptom value, and to determine the target decoding result of the target codeword based on the current decoding result.
[0049] Preferably, the bit flipping and symptom value calculator includes:
[0050] A first shifter is used to shift the target symptom value in the symptom values to obtain the shifted symptom value;
[0051] A first mutual exclusion OR operator is used to perform a mutual exclusion OR operation on the shifted symptom value and the current flip signal to obtain the shifted updated symptom value.
[0052] The second shifter is used to shift the shifted updated symptom value to obtain an updated symptom value.
[0053] The second mutual exclusion OR operator is used to perform a mutual exclusion OR operation on the codeword information corresponding to the current decoding recursion number and the current flip signal to obtain the flip codeword corresponding to the current decoding recursion number.
[0054] This application provides a quasi-cyclic low-density parity-check (QRP) code decoding method. The method involves: obtaining the target codeword to be decoded; obtaining the current decoding recurrence count and the previous flip signal, where the previous flip signal indicates whether a bit flip occurred in the previous recurrence count; obtaining the symptom value calculated for the target codeword at the current decoding recurrence count; obtaining the row weight value of the target codeword; determining the current flip signal based on the current decoding recurrence count, the previous flip signal, the symptom value, and the row weight value; and determining the current decoding result of the target codeword at the current decoding recurrence count based on the current flip signal and the symptom value, thereby determining the target decoding result of the target codeword based on the current decoding result. This application allows for the rapid determination of the current flip signal based on the current decoding recurrence count, the previous flip signal, the symptom value, and the row weight value, and thus allows for the rapid determination of the current decoding result of the target codeword at the current decoding recurrence count, improving the decoding efficiency of quasi-cyclic low-density parity-check codes. The quasi-cyclic low-density parity-check code decoding system, apparatus, and equipment provided in this application also solve the corresponding technical problems. Attached Figure Description
[0055] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0056] Figure 1 A flowchart of a quasi-cyclic low-density parity-check code decoding method provided in this application embodiment;
[0057] Figure 2 A schematic diagram of a quasi-cyclic low-density parity-check code decoding system provided in this application embodiment;
[0058] Figure 3 A schematic diagram of a quasi-cyclic low-density parity-check code decoding device provided in this application embodiment;
[0059] Figure 4 Another schematic diagram of a quasi-cyclic low-density parity-check code decoding device provided in this application embodiment;
[0060] Figure 5 A schematic diagram of a quasi-cyclic low-density parity-check code decoding device provided in this application embodiment;
[0061] Figure 6 This is another structural schematic diagram of a quasi-cyclic low-density parity-check code decoding device provided in an embodiment of this application. Detailed Implementation
[0062] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0063] To facilitate understanding of this application, the relevant information in the fast decoding method of quasi-cyclic low-density parity-check codes is first described. An (N,K) quasi-cyclic low-density parity-check code is a linear code, where N is the length of the codeword and K is the length of the transmitted information. An LDPC code is defined by a parity check matrix H. The dimension of H is M×N. The received codeword R has a length N, R = [r0, r1, r2, ..., r...]. N-1 Define the flipped vector. The symptom value is calculated using a formula. Obtain, R T Let R be the transpose matrix of the codeword R to be decoded, and The dimension is M×1.
[0064] Please see Figure 1 , Figure 1 A flowchart of a quasi-cyclic low-density parity-check code decoding method provided in an embodiment of this application.
[0065] This application provides a quasi-cyclic low-density parity-check code decoding method, which may include the following steps:
[0066] Step S101: Obtain the target codeword to be decoded.
[0067] In practical applications, the target codeword to be decoded can be obtained first. The type and content of the target codeword can be determined according to actual needs, and this application does not make specific restrictions here.
[0068] Step S102: Obtain the current decoding recursion number and the previous flip signal. The previous flip signal is used to indicate whether the previous recursion number of the current decoding recursion number was bit-flipped.
[0069] In practical applications, after obtaining the target codeword to be decoded, the current decoding recursion number and the previous flip signal can be obtained. The previous flip signal is used to indicate whether the previous recursion number of the current decoding recursion number has undergone bit flipping, so that the current flip signal of the current decoding recursion number can be determined based on the current decoding recursion number and the previous flip signal.
[0070] Step S103: Obtain the symptom value calculated for the target codeword at the current decoding recursion number.
[0071] Step S104: Obtain the row weight value of the target codeword.
[0072] In practical applications, after obtaining the current decoding recursion number and the previous flip signal, it is also necessary to obtain the symptom value calculated for the target codeword at the current decoding recursion number and obtain the row weight value of the target codeword.
[0073] It should be noted that the symptom value calculated for the target codeword at the current decoding recursion number is the symptom value obtained at the beginning of the decoding process corresponding to the current decoding recursion number. It can be determined according to the specific calculation process, and the row weight value can be determined according to actual needs. This application does not make specific limitations here.
[0074] Step S105: Determine the current flip signal based on the current decoding recursion number, the previous flip signal, the symptom value, and the row weight value.
[0075] In practical applications, after obtaining the current decoding recursion number, the previous flip signal, the symptom value, and the row weight value, the current flip signal can be quickly determined based on the current decoding recursion number, the previous flip signal, the symptom value, and the row weight value.
[0076] In specific application scenarios, during the process of determining the current flip signal based on the current decoding recursion number, the previous flip signal, the symptom value, and the row weight value, the flip threshold corresponding to the current decoding recursion number can be determined based on the current decoding recursion number and the previous flip signal; the flip function value corresponding to the current decoding recursion number can be determined based on the symptom value and the row weight value; if the flip threshold is greater than the flip function value, it is determined that the current flip signal indicates that bit flipping will not occur; if the flip threshold is less than or equal to the flip function value, it is determined that the current flip signal indicates that bit flipping will occur.
[0077] In specific application scenarios, during the process of determining the flip threshold corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flip signal, if the value of the current decoding recursion number is 1, the flip threshold can be determined to be the first preset value; if the value of the current decoding recursion number is 2, the flip threshold is determined to be the second preset value; if the value of the current decoding recursion number is greater than or equal to 2, and the previous flip signal indicates that a bit flip has been performed, the flip threshold is determined to be 1; if the value of the current decoding recursion number is greater than or equal to 2, and the previous flip signal indicates that a bit flip has not been performed, the flip threshold is determined to be 0.
[0078] It should be noted that the specific values of the first preset value and the second preset value can be determined according to actual needs. For example, they can be determined according to the row weight value. For example, if the row weight value is 3 or 4, the first preset value can be set to 4 and the second preset value to 1, etc. This application does not make specific limitations here.
[0079] In specific application scenarios, when determining the flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value, the flip function value can be determined based on the existing correspondence between the symptom value, the row weight value, and the flip function value.
[0080] For ease of understanding, assuming a row weight value of 4, the correspondence between symptom values, row weight values, and the flip function can be shown in Table 1. Similarly, assuming a row weight value of 4, the correspondence between symptom values, row weight values, and the flip function can be shown in Table 2. Here, #(s_k=1) represents the sum of symptom values, and E... n This indicates that the function value is toggled.
[0081] Table 1 shows the correspondence between symptom values, row weight values, and flip functions when the row weight is 4.
[0082] #(s_k=1) <![CDATA[E n ]]> 0 -4 1 -2 2 0 3 2 4 4
[0083] Table 2 shows the correspondence between symptom values, row weight values, and flip functions when the row weight is 3.
[0084] #(s_k=1) <![CDATA[E n ]]> 0 -3 1 -1 2 1 3 3
[0085] In specific application scenarios, in the process of determining the flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value, the flip function value can also be determined based on the symptom value and the row weight value through the flip function value calculation formula.
[0086] The formulas for flipping function values include:
[0087]
[0088] Where n represents the nth bit in the target codeword; E n M(n) represents the flip function value of the nth bit in the target codeword; M(n) represents the position of the 1 in the nth parity check matrix corresponding to the target codeword; S k Indicates the symptom value corresponding to k; col wt(n) This indicates the row weight value.
[0089] Step S106: Determine the current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and symptom value, and determine the target decoding result of the target codeword based on the current decoding result.
[0090] In practical applications, after determining the current flip signal based on the current decoding recursion number, the previous flip signal, the symptom value, and the row weight value, the current decoding result of the target codeword at the current decoding recursion number can be determined based on the current flip signal and the symptom value, and the target decoding result of the target codeword can be determined based on the current decoding result.
[0091] This application provides a quasi-cyclic low-density parity-check (QRP) code decoding method. The method involves: obtaining the target codeword to be decoded; obtaining the current decoding recurrence count and the previous flip signal, where the previous flip signal indicates whether a bit flip occurred in the previous recurrence count; obtaining the symptom value calculated for the target codeword at the current decoding recurrence count; obtaining the row weight value of the target codeword; determining the current flip signal based on the current decoding recurrence count, the previous flip signal, the symptom value, and the row weight value; and determining the current decoding result of the target codeword at the current decoding recurrence count based on the current flip signal and the symptom value, thereby determining the target decoding result of the target codeword based on the current decoding result. This application allows for the rapid determination of the current flip signal based on the current decoding recurrence count, the previous flip signal, the symptom value, and the row weight value, and thus allows for the rapid determination of the current decoding result of the target codeword at the current decoding recurrence count, improving the decoding efficiency of quasi-cyclic low-density parity-check codes.
[0092] Please see Figure 2 , Figure 2 This is a schematic diagram of a quasi-cyclic low-density parity-check code decoding system provided in an embodiment of this application.
[0093] This application provides a quasi-cyclic low-density parity-check code decoding system, which may include:
[0094] The first acquisition module 101 is used to acquire the target codeword to be decoded;
[0095] The second acquisition module 102 is used to acquire the current decoding recursion number and the previous flip signal. The previous flip signal is used to indicate whether the previous recursion number of the current decoding recursion number was bit-flipped.
[0096] The third acquisition module 103 is used to acquire the symptom value that has been calculated for the target codeword at the current decoding recursion number;
[0097] The fourth acquisition module 104 is used to acquire the line weight value of the target codeword;
[0098] The first determining module 105 is used to determine the current flip signal based on the current decoding recursion number, the previous flip signal, the symptom value, and the row weight value.
[0099] The second determining module 106 is used to determine the current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and symptom value, so as to determine the target decoding result of the target codeword based on the current decoding result.
[0100] The descriptions of the various modules in the quasi-cyclic low-density parity-check code decoding system provided in this application can be found in the above embodiments, and will not be repeated here.
[0101] Please see Figure 3 , Figure 3 This is a schematic diagram of a quasi-cyclic low-density parity-check code decoding device provided in an embodiment of this application.
[0102] This application provides a quasi-cyclic low-density parity-check code decoding device, which may include:
[0103] Input register 11 is used to obtain the target codeword to be decoded;
[0104] Select multiplexer 12 to obtain the current decoding recursion number;
[0105] Bit flip and symptom value updater 13 is used to acquire the previous flip signal, which is used to characterize whether the previous recursion of the current decoding recursion number has undergone bit flipping; acquire the symptom value calculated by the target codeword at the current decoding recursion number; acquire the row weight value of the target codeword; determine the current flip signal based on the current decoding recursion number, the previous flip signal, the symptom value and the row weight value; determine the current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and the symptom value, so as to determine the target decoding result of the target codeword based on the current decoding result.
[0106] In practical applications, the quasi-cyclic low-density parity-check code decoding device provided in this application embodiment may also include a symptom value register 14, a data register 15, a decoding termination logic unit 16, etc., which are not specifically limited here.
[0107] It should be noted that the multiplexer needs to be connected to the data buffer so that the data in the data buffer can be transferred to the bit flip and symptom value updater when needed. In addition, when there is an external recursive data source, the multiplexer also needs to be connected to the external recursive data source in order to obtain the current decoding recursive number, etc. The bit flip and symptom value updater is bidirectionally connected to the symptom value buffer, that is, the bit flip and symptom value updater can transfer the updated symptom value to the symptom value buffer for storage, and the symptom value buffer can transfer data to the bit flip and symptom value updater. The data buffer 50 has one end connected to the bit flip and symptom value updater for storing the flipped codewords calculated by the bit flip and symptom value updater. The decoding termination logic is connected to the symptom value register. Based on the symptom values stored in the symptom value register, it determines the decoding status as continuing decoding, successful decoding, almost successful decoding, or decoding failure. Then, the decoding termination logic provides a decoding status signal to an external decoding process control module. Finally, the decoding process control module controls the decoding process according to the decoding status signal.
[0108] Please see Figure 4 , Figure 4 This is another schematic diagram of a quasi-cyclic low-density parity-check code decoding device provided in an embodiment of this application.
[0109] In specific application scenarios, bit flipping and symptom value updaters may include:
[0110] The flip threshold selector 131 is used to determine the flip threshold corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flip signal.
[0111] Flip function value determiner 132 is used to determine the flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value;
[0112] Bit flip determiner 133 is used to determine that if the flip threshold is greater than the flip function value, the current flip signal indicates that bit flipping will not be performed; if the flip threshold is less than or equal to the flip function value, the current flip signal indicates that bit flipping will be performed.
[0113] The bit flip and symptom value operator is used to determine the current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and symptom value, and to determine the target decoding result of the target codeword based on the current decoding result.
[0114] In specific application scenarios, bit flipping and symptom value operators may include:
[0115] The first shifter 134 is used to shift the target symptom value in the symptom value to obtain the shifted symptom value;
[0116] The first mutex OR operator 135 is used to perform a mutex OR operation on the shifted symptom value and the current flip signal to obtain the updated symptom value of the shift.
[0117] The second shifter 136 is used to shift the shifted updated symptom values to obtain updated symptom values.
[0118] The second mutual exclusion OR operator 137 is used to perform a mutual exclusion OR operation on the codeword information corresponding to the current decoding recursion number and the current flip signal to obtain the flip codeword corresponding to the current decoding recursion number.
[0119] It should be noted that the toggle threshold selector has one end connected to the input register or an external previous toggle signal source via a data selection multiplexer, the other end connected to the external recursive number source, and the remaining end connected to the bit toggle determiner. During operation, the toggle threshold selector determines the toggle threshold corresponding to the current decoded recursive number based on the current decoded recursive number and the previous toggle signal. The bit toggle determiner is also connected to a first mutex OR operator and a second mutex OR operator. The first shifter has one end connected to the aforementioned symptom value register, the other end connected to the toggle function value determiner, and the remaining end connected to the first mutex OR operator. The first mutex OR operator also has one end connected to the second mutex OR operator. The second shifter is connected to the first mutex OR operator and also to the symptom value register. The second mutex OR operator is connected to the data register. Furthermore, in specific application scenarios, the shifters in this application can be bucket shifters, etc., and this application does not impose any specific limitations.
[0120] This application also provides a quasi-cyclic low-density parity-check code decoding device and a computer-readable storage medium, both of which have the corresponding effects of the quasi-cyclic low-density parity-check code decoding method provided in the embodiments of this application. Please refer to... Figure 5 , Figure 5 This is a schematic diagram of a quasi-cyclic low-density parity-check code decoding device provided in an embodiment of this application.
[0121] This application provides a quasi-cyclic low-density parity check (QD) code decoding device, which includes a memory 201 and a processor 202. The memory 201 stores a computer program, and when the processor 202 executes the computer program, it implements the steps of the quasi-cyclic low-density parity check (QD) code decoding method described in any of the above embodiments.
[0122] Please see Figure 6The quasi-cyclic low-density parity check (QDPC) decoding device provided in this application embodiment may further include: an input port 203 connected to the processor 202 for transmitting commands input from the outside to the processor 202; a display unit 204 connected to the processor 202 for displaying the processing results of the processor 202 to the outside; and a communication module 205 connected to the processor 202 for enabling communication between the quasi-cyclic QDPC decoding device and the outside. The display unit 204 may be a display panel, a laser scanner, or the like; the communication methods used by the communication module 205 include, but are not limited to, Mobile High Definition Link (HML), Universal Serial Bus (USB), High Definition Multimedia Interface (HDMI), wireless connectivity: Wi-Fi, Bluetooth, Bluetooth Low Energy, and IEEE 802.11s-based communication technologies.
[0123] This application provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the steps of the quasi-cyclic low-density parity-check code decoding method described in any of the above embodiments.
[0124] The computer-readable storage media involved in this application include random access memory (RAM), memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, or any other form of storage media known in the art.
[0125] For descriptions of relevant parts of the quasi-cyclic low-density parity-check code decoding system, device, apparatus, and computer-readable storage medium provided in this application, please refer to the detailed descriptions of the corresponding parts in the quasi-cyclic low-density parity-check code decoding method provided in this application, which will not be repeated here. Furthermore, parts of the technical solutions provided in this application that are consistent with the implementation principles of corresponding technical solutions in the prior art have not been described in detail to avoid excessive elaboration.
[0126] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0127] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A quasi-cyclic low-density parity-check code decoding method characterized by comprising: The method comprises the following steps: acquiring a target codeword to be decoded; acquiring a current decoding recursion number and a previous flip signal, the previous flip signal being used to represent whether a previous recursion number of the current decoding recursion number has performed bit flipping; acquiring a syndrome value of the target codeword calculated at the current decoding recursion number; the syndrome value being calculated based on a transpose matrix of the target codeword and a parity check matrix corresponding to the target codeword; acquiring a row weight value of the target codeword; determining a current flip signal based on the current decoding recursion number, the previous flip signal, the syndrome value and the row weight value; determining a current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and the syndrome value, so as to determine a target decoding result of the target codeword based on the current decoding result; wherein the step of determining the current flip signal based on the current decoding recursion number, the previous flip signal, the syndrome value and the row weight value comprises the following steps: determining a flip threshold value corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flip signal; determining a flip function value corresponding to the current decoding recursion number based on the syndrome value and the row weight value; if the flip threshold value is greater than the flip function value, determining that the current flip signal represents that bit flipping is not performed; if the flip threshold value is less than or equal to the flip function value, determining that the current flip signal represents that bit flipping is performed; the step of determining the flip threshold value corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flip signal comprises the following steps: if the value of the current decoding recursion number is 1, determining that the flip threshold value is a first preset value; if the value of the current decoding recursion number is 2, determining that the flip threshold value is a second preset value; if the value of the current decoding recursion number is greater than or equal to 2 and the previous flip signal represents that bit flipping is performed, determining that the flip threshold value is 1; if the value of the current decoding recursion number is greater than or equal to 2 and the previous flip signal represents that bit flipping is not performed, determining that the flip threshold value is 0; the step of determining the flip function value corresponding to the current decoding recursion number based on the syndrome value and the row weight value comprises the following steps: determining the flip function value based on the syndrome value and the row weight value through a flip function value operation formula; the flip function value operation formula comprises: ; wherein, represents the i-th bit in the target codeword; represents the i-th bit in the target codeword; represents the i-th bit in the target codeword; represents the i-th bit in the target codeword; represents the position of the 1 in the i-th column of the parity check matrix corresponding to the target codeword; represents the position of the 1 in the i-th column of the parity check matrix corresponding to the target codeword; represents the symptom value corresponding to the target codeword; represents the row weight value.
2. The method of claim 1, wherein, the step of determining the flip function value corresponding to the current decoding recursion number based on the syndrome value and the row weight value comprises the following steps: determining the flip function value based on an existing corresponding relationship among the syndrome value, the row weight value and the flip function value.
3. A quasi-cyclic low-density parity-check code decoding system, characterized by comprising: The method comprises the following steps: a first acquiring module is configured to acquire a target codeword to be decoded; a second acquiring module is configured to acquire a current decoding recursion number and a previous flip signal, the previous flip signal being used to represent whether a previous recursion number of the current decoding recursion number has performed bit flipping; a third acquiring module is configured to acquire a syndrome value of the target codeword calculated at the current decoding recursion number; the syndrome value being calculated based on a transpose matrix of the target codeword and a parity check matrix corresponding to the target codeword; a fourth acquiring module is configured to acquire a row weight value of the target codeword; a determining module is configured to determine a current flip signal based on the current decoding recursion number, the previous flip signal, the syndrome value and the row weight value; a first determining module is configured to determine a current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and the syndrome value, so as to determine a target decoding result of the target codeword based on the current decoding result; wherein the determining module is configured to determine the current flip signal based on the current decoding recursion number, the previous flip signal, the syndrome value and the row weight value, and the determining module comprises the following modules: a first determining sub-module is configured to determine a flip threshold value corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flip signal; a second determining sub-module is configured to determine a flip function value corresponding to the current decoding recursion number based on the syndrome value and the row weight value; if the flip threshold value is greater than the flip function value, the first determining sub-module is configured to determine that the current flip signal represents that bit flipping is not performed; if the flip threshold value is less than or equal to the flip function value, the first determining sub-module is configured to determine that the current flip signal represents that bit flipping is performed; the first determining sub-module is configured to determine the flip threshold value corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flip signal, and the first determining sub-module comprises the following modules: if the value of the current decoding recursion number is 1, the first determining sub-module is configured to determine that the flip threshold value is a first preset value; if the value of the current decoding recursion number is 2, the first determining sub-module is configured to determine that the flip threshold value is a second preset value; if the value of the current decoding recursion number is greater than or equal to 2 and the previous flip signal represents that bit flipping is performed, the first determining sub-module is configured to determine that the flip threshold value is 1; if the value of the current decoding recursion number is greater than or equal to 2 and the previous flip signal represents that bit flipping is not performed, the first determining sub-module is configured to determine that the flip threshold value is 0; the second determining sub-module is configured to determine the flip function value corresponding to the current decoding recursion number based on the syndrome value and the row weight value, and the second determining sub-module comprises the following modules: the second determining sub-module is configured to determine the flip function value based on the syndrome value and the row weight value through a flip function value operation formula; the flip function value operation formula comprises: the second determining sub-module is configured to determine the flip function value corresponding to the current decoding recursion number based on the syndrome value and the row weight value, and the second determining sub-module comprises the following modules: the second determining sub-module is configured to determine the flip function value based on an existing corresponding relationship among the syndrome value, the row weight value and the flip function value. a fourth obtaining module, configured to obtain a row weight value of the target codeword; a first determining module, configured to determine a current flipping signal based on the current decoding recursion number, the previous flipping signal, the syndrome value and the row weight value; a second determining module, configured to determine a current decoding result of the target codeword at the current decoding recursion number based on the current flipping signal and the syndrome value, and determine a target decoding result of the target codeword based on the current decoding result; the first determining module is configured to determine a flipping threshold value corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flipping signal, determine a flipping function value corresponding to the current decoding recursion number based on the syndrome value and the row weight value, and determine that the current flipping signal represents no bit flipping if the flipping threshold value is greater than the flipping function value, or determine that the current flipping signal represents bit flipping if the flipping threshold value is less than or equal to the flipping function value; the first determining module is specifically configured to determine that the flipping threshold value is a first preset value if the value of the current decoding recursion number is 1, determine that the flipping threshold value is a second preset value if the value of the current decoding recursion number is 2, determine that the flipping threshold value is 1 if the value of the current decoding recursion number is greater than or equal to 2 and the previous flipping signal represents bit flipping, or determine that the flipping threshold value is 0 if the value of the current decoding recursion number is greater than or equal to 2 and the previous flipping signal represents no bit flipping; the first determining module is specifically configured to determine the flipping function value based on the syndrome value and the row weight value through a flipping function value operation formula; the flipping function value operation formula comprises: ; wherein, represents the i-th bit in the target codeword; represents the flipping function value of the i-th bit in the target codeword; represents the i-th bit in the target codeword; represents the flipping function value of the i-th bit in the target codeword; represents the position of the 1 in the i-th column of the parity check matrix corresponding to the target codeword; represents the i-th column of the parity check matrix corresponding to the target codeword; represents the i-th column of the parity check matrix corresponding to the target codeword; represents the i-th column of the parity check matrix corresponding to the target codeword; represents the i-th column of the parity check matrix corresponding to the target codeword; 4. A quasi-cyclic low-density parity-check code decoding device characterized by comprising: a memory, configured to store a computer program; a processor, configured to implement the steps of the quasi-cyclic low-density parity-check code decoding method in any one of claims 1 or 2 when the computer program is executed. a memory, configured to store a computer program; 5. A quasi-cyclic low-density parity-check code decoding apparatus characterized by comprising: an input register, configured to obtain a target codeword to be decoded; a selection multiplexer, configured to obtain a current decoding recursion number; a bit flipping and syndrome value updater, configured to obtain a previous flipping signal, the previous flipping signal being used to represent whether a previous recursion number of the current decoding recursion number performs bit flipping; obtain a syndrome value of the target codeword that has been calculated at the current decoding recursion number; obtain a row weight value of the target codeword; determine a current flipping signal based on the current decoding recursion number, the previous flipping signal, the syndrome value and the row weight value; determine a current decoding result of the target codeword at the current decoding recursion number based on the current flipping signal and the syndrome value, and determine a target decoding result of the target codeword based on the current decoding result; the bit flipping and syndrome value updater comprises: a flipping threshold value selector, configured to determine a flipping threshold value corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flipping signal; a flipping function value determiner, configured to determine a flipping function value corresponding to the current decoding recursion number based on the syndrome value and the row weight value; a bit-flip determination unit configured to determine that the current flip signal represents no bit-flip if the flip threshold is greater than the flip function value, and determine that the current flip signal represents bit-flip if the flip threshold is less than or equal to the flip function value; a bit-flip and syndrome value calculation unit configured to determine a current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and the syndrome value, and determine a target decoding result of the target codeword based on the current decoding result; the flip threshold selector is specifically configured to determine the flip threshold as a first preset value if the value of the current decoding recursion number is 1, determine the flip threshold as a second preset value if the value of the current decoding recursion number is 2, determine the flip threshold as 1 if the value of the current decoding recursion number is greater than or equal to 2 and the previous flip signal represents bit-flip, and determine the flip threshold as 0 if the value of the current decoding recursion number is greater than or equal to 2 and the previous flip signal represents no bit-flip; the flip function value determiner is specifically configured to determine the flip function value based on the syndrome value and the row weight value by using a flip function value calculation formula; the flip function value calculation formula comprises: ; wherein, represents the i-th bit in the target codeword; represents the i-th bit in the target codeword; represents the i-th bit in the target codeword; represents the i-th bit in the target codeword; represents the position of the 1 in the i-th column of the parity check matrix corresponding to the target codeword; represents the position of the 1 in the i-th column of the parity check matrix corresponding to the target codeword; represents the symptom value corresponding to the target codeword; represents the row weight value.
6. The apparatus of claim 5, wherein, the bit-flip and syndrome value calculation unit comprises: a first shifter configured to shift a target syndrome value in the syndrome value to obtain a shifted syndrome value; a first exclusive or calculation unit configured to perform exclusive or calculation on the shifted syndrome value and the current flip signal to obtain a shifted updated syndrome value; a second shifter configured to shift the shifted updated syndrome value to obtain an updated syndrome value; a second exclusive or calculation unit configured to perform exclusive or calculation on codeword information corresponding to the current decoding recursion number and the current flip signal to obtain a flipped codeword corresponding to the current decoding recursion number.
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Method employed in LDPC decoder and the decoder
US20190158115A1