Chip Testing Method, Device, Equipment and Storage Medium

Abstract

The present invention provides a chip testing method, device, equipment and storage medium. The testing method includes: determining a register test adapter file, determining the register test adapter file according to a register description file under a preset test environment, wherein the register test adapter file is adapted to a predetermined test case template format; constructing a test case according to the register test adapter file and the test case template, and executing the test case to test the chip; determining the register test adapter file also includes, when the preset test environment changes, determining change information of the register description file in response to the change; changing the register test adapter file according to the change information, without the need for tedious register information search and entry work, thereby improving chip testing efficiency, reducing error rate, and improving test accuracy, and being able to adaptively change the register test adapter file in response to changes in the preset test environment without the need to rebuild the test environment.

Description

Technical Field

[0001] The present disclosure relates to the field of chip testing technologies, and in particular, to a chip testing method, apparatus, device, and storage medium. Background Art

[0002] During the testing process of a chip, it is necessary to verify each register in the chip.

[0003] With the rapid development of chip technologies, the internal structure of chips has become increasingly complex, and the number of registers to be verified has also increased. Using existing chip testing methods has problems of low efficiency and high error rates. In addition, with the development of chip technologies, chip protocols are changing more and more frequently. For example, the Joint Electron Device Engineering Council (JEDEC) is an independent semiconductor engineering trade organization and standards body that releases specification requirements for each generation of DDR SDRAM. When the chip protocol changes, it is usually necessary to reconstruct the test environment, which is a cumbersome process and affects the testing efficiency. Summary of the Invention

[0004] The following is an overview of the subject matter described in detail in the present disclosure. This overview is not intended to limit the scope of protection of the claims.

[0005] The present disclosure provides a chip testing method, apparatus, device, and storage medium.

[0006] According to a first aspect of an embodiment of the present disclosure, a chip testing method is provided for testing a chip in a preset test environment. The method includes:

[0007] Determine a register test adaptation file according to a register description file in the preset test environment, where the register test adaptation file is adapted to a pre-determined test case template form;

[0008] Construct a test case according to the register test adaptation file and the test case template, and execute the test case to test the chip;

[0009] The determining of the register test adaptation file further includes, when the preset test environment changes, in response to the change, determining change information of the register description file;

[0010] According to the change information, change the register test adaptation file.

[0011] According to some embodiments of the present disclosure, the determining of the register test adaptation file according to the register description file in the preset test environment includes:

[0012] Obtain protocol information corresponding to the preset test environment;

[0013] Extract the register task allocation list from the protocol information, and use the register task allocation list as the register description file;

[0014] Convert the register task allocation list into a register test case list, and use the register test case list as the register test adaptation file.

[0015] According to some embodiments of the present disclosure, the test case template includes a plurality of different test items to be configured. The conversion of the register task allocation list into a register test case list includes:

[0016] Parse the register task allocation list to determine the test item information of each register. Each register corresponds to at least one test item information group, and each test item information group includes a plurality of test item information corresponding one-to-one to the plurality of different test items to be configured;

[0017] Generate the register test case list according to the determined test item information of each register. Each row in the register test case list includes the plurality of test item information in a test item information group, and the test item information in each column of the register test case list corresponds to the same test item to be configured.

[0018] According to some embodiments of the present disclosure, the arrangement order of the plurality of test item information in each row of the register test case list is the same as the arrangement order of the plurality of different test items to be configured in the test case template.

[0019] According to some embodiments of the present disclosure, the test case template includes:

[0020] task Reg(reg_addr, bit_addr, bit_len, Wr_Rd, default value);

[0021] Wherein, reg_addr represents the register address, bit_addr represents the operand information; bit_len represents the number of bits; Wr_Rd represents the read / write type; default value represents the register default value.

[0022] According to some embodiments of the present disclosure, the register default values in the test cases are different.

[0023] According to some embodiments of the present disclosure, when the register description file is the register task allocation list and the register test adaptation file is the register test case list, the determination of the change information of the register description file includes:

[0024] Compare the register task allocation list before the change with the register task allocation list after the change to determine the changed content in the register task allocation list;

[0025] Based on the changed content, determine the position of the changed test item information in the register test case list and the changed test item information, and use the position of the changed test item information in the register test case list and the changed test item information as the change information.

[0026] The second aspect of the present disclosure provides a chip testing device for testing a chip in a preset test environment. The device includes:

[0027] A register test adaptation file determination module configured to determine a register test adaptation file according to the register description file in the preset test environment, where the register test adaptation file is adapted to a pre-determined test case template form;

[0028] An adaptation file change module coupled to the register test adaptation file determination module, configured to determine the change information of the register description file when the preset test environment changes, and send a change command to the register test configuration file determination module to change the register test adaptation file;

[0029] A test case construction module configured to construct test cases according to the register test adaptation file and the test case template;

[0030] An execution module configured to execute the test cases to test the chip.

[0031] According to some embodiments of the present disclosure, the register test adaptation file determination module is configured to:

[0032] Obtain the protocol information corresponding to the preset test environment;

[0033] Extract a register task allocation list from the protocol information and use the register task allocation list as the register description file;

[0034] Convert the register task allocation list into a register test case list and use the register test case list as the register test adaptation file.

[0035] According to some embodiments of the present disclosure, the test case template includes a plurality of different test items to be configured, and the register test adaptation file determination module is configured to:

[0036] Parse the register task allocation list to determine the test item information of each register. Each register corresponds to at least one test item information group, and each test item information group includes multiple test item information corresponding one-to-one to the multiple different test items to be configured.

[0037] Generate the register test case list according to the determined test item information of each register. Each row in the register test case list includes the multiple test item information in a test item information group, and each column in the register test case list is the test item information of the same test item.

[0038] According to some embodiments of the present disclosure, the arrangement order of the multiple test item information in each row of the register test case list is the same as the arrangement order of the multiple different test items to be configured in the test case template.

[0039] According to some embodiments of the present disclosure, the test case template includes:

[0040] task Reg(reg_addr, bit_addr, bit_len, Wr_Rd, default value);

[0041] Wherein, reg_addr represents the register address, bit_addr represents the operand information; bit_len represents the number of bits; Wr_Rd represents the read / write type; default value represents the register default value.

[0042] According to some embodiments of the present disclosure, the register default values in the test cases are different.

[0043] According to some embodiments of the present disclosure, when the register description file is the register task allocation list and the register test adaptation file is the register test case list, the adaptation file change module is configured to:

[0044] Compare the register task allocation list before the change and the register task allocation list after the change to determine the changed content in the register task allocation list;

[0045] According to the changed content, determine the position of the changed test item information in the register test case list and the changed test item information, and use the position of the changed test item information in the register test case list and the changed test item information as the change information.

[0046] The third aspect of the present disclosure provides a chip test device, and the chip test device includes:

[0047] A processor;

[0048] A memory for storing processor-executable instructions;

[0049] Wherein, the processor is configured to execute:

[0050] Determine a register test adaptation file, determine a register test adaptation file according to a register description file in a preset test environment, and the register test adaptation file is adapted to a preset test case template form;

[0051] Construct a test case, construct a test case according to the register test adaptation file and the test case template, and execute the test case to test the chip;

[0052] The determining the register test adaptation file further includes, when the preset test environment changes, in response to the change, determining change information of the register description file;

[0053] According to the change information, change the register test adaptation file.

[0054] According to a fourth aspect of the embodiments of the present disclosure, there is provided a non-transitory computer-readable storage medium, when the instructions in the storage medium are executed by a processor of a memory test device, enabling the memory test device to execute:

[0055] Determine a register test adaptation file, determine a register test adaptation file according to a register description file in a preset test environment, and the register test adaptation file is adapted to a preset test case template form;

[0056] Construct a test case, construct a test case according to the register test adaptation file and the test case template, and execute the test case to test the chip;

[0057] The determining the register test adaptation file further includes, when the preset test environment changes, in response to the change, determining change information of the register description file;

[0058] According to the change information, change the register test adaptation file.

[0059] In the chip testing method, device, equipment, and storage medium provided by the embodiments of the present disclosure, a register test adaptation file adapted to the form of a test case template is determined according to a register description file, and then a test case is constructed according to the register test adaptation file to perform chip testing. There is no need to perform cumbersome register information search and entry work, which improves the chip testing efficiency, reduces the error rate, and improves the testing accuracy. In addition, when determining the register test adaptation file, it is possible to adaptively change the register test adaptation file in response to a change in the preset test environment, without having to reconstruct the test environment, which improves the testing flexibility and efficiency and is convenient for later maintenance.

[0060] Other aspects will be apparent after reading and understanding the drawings and the detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] The drawings incorporated in the specification and constituting a part of the specification illustrate embodiments of the present disclosure and, together with the description, are used to explain the principles of the embodiments of the present disclosure. In these drawings, like reference numerals are used to represent like elements. The drawings in the following description are some embodiments of the present disclosure, not all embodiments. Those skilled in the art can obtain other drawings based on these drawings without creative efforts.

[0062] Figure 1a and Figure 1b is a schematic diagram of the mode register task assignment column in the JEDEC DDR5 protocol file;

[0063] Figure 2 is a flowchart of a chip testing method shown according to an exemplary embodiment;

[0064] Figure 3 is a flowchart of a chip testing method shown according to an exemplary embodiment;

[0065] Figure 4 is a flowchart of a chip testing method shown according to an exemplary embodiment;

[0066] Figure 5 is a flowchart of a chip testing method shown according to an exemplary embodiment;

[0067] Figure 6 is a flowchart of a chip testing method shown according to an exemplary embodiment;

[0068] Figure 7 is a block diagram of a chip testing device shown according to an exemplary embodiment;

[0069] Figure 8 is a block diagram of a chip testing device shown according to an exemplary embodiment. Detailed implementation manners

[0070] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure. Apparently, the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present disclosure without creative efforts shall fall within the protection scope of the present disclosure. It should be noted that, without conflict, the embodiments in the present disclosure and the features in the embodiments may be combined with each other arbitrarily.

[0071] In the related art, in order to verify each register in a chip, a tester needs to find the test item information of each register, such as finding the register address, number of bits, read / write type, default value, and other test item information of each register, and then manually configure test cases according to the test item information of these registers, that is, when configuring test cases, manually enter this test item information into the test program, which is very cumbersome and error-prone. Especially with the development of chip technology, the number of registers in a chip is increasing. For example, protocols such as DDR5, DDR5 / LPDDR5 / GDDR5 / PCIE itself contain dozens or hundreds of registers. Manually configuring test cases and building a test environment for each register requires a large amount of work and low efficiency. In addition, when verifying a mode register, usually different operands may correspond to different test item information such as read / write type and default value, which further exacerbates the complexity of the test and increases the error rate.

[0072] Take Figure 1a and Figure 1b as an example. Figure 1a and Figure 1b are the mode register task allocation lists in the JEDEC DDR5 protocol file. The mode register task allocation list in the protocol file is usually divided into two parts, as Figure 1a shown. One part is the relationship table of the mode register address, operand, and the register function corresponding to the operand, as Figure 1b shown, and the other part is the relationship table between the register function and the register characteristic information. When configuring test cases, for each mode register, the tester needs to combine Figure 1a and Figure 1b to find the test item information such as the register address, number of bits, read / write type, and default value of this mode register. Since the test item information of the mode register may be different under different operands. For example, referring to Figure 1a , under the 8-bit operands from OP[0] to OP[7], register MR0 corresponds to three different register function items, while referring to Figure 1b, the register feature information corresponding to different register function items is also different. Therefore, when conducting tests, for each operand of each mode register, test cases need to be configured, which is a cumbersome process and prone to errors.

[0073] In addition, with the development of chip technology, the protocol replacement of chips is becoming more and more frequent. When upgrading the protocol, such as when upgrading protocols like DDR5 / LPDDR5, some registers will be modified accordingly. For example, Figure 1a the part outlined by the dashed line in Figure 1a will be modified, and the corresponding test cases need to be reconfigured, which is a cumbersome process and affects the test efficiency.

[0074] Based on this, the present disclosure provides a chip testing method. In this chip testing method, a register test adaptation file adapted to the form of a test case template is determined according to a register description file, and then test cases are constructed based on the register test adaptation file to conduct chip testing, eliminating the need for cumbersome register information searching and input work, improving the chip testing efficiency, reducing the error rate, and enhancing the test accuracy. Additionally, when determining the register test adaptation file, it is possible to adaptively change the register test adaptation file in response to a change in the preset test environment, without the need to reconstruct the test environment, improving the test flexibility and test efficiency, and facilitating later maintenance.

[0075] In an exemplary embodiment of the present disclosure, a chip testing method is provided for testing a chip in a preset test environment. Figure 2 FIG. shows a flowchart of a chip testing method provided according to an exemplary embodiment of the present disclosure, as Figure 2 shown, the chip testing method includes:

[0076] S100. Determine a register test adaptation file, and determine the register test adaptation file according to the register description file in the preset test environment. The register test adaptation file is adapted to the form of a pre-determined test case template.

[0077] In this step, a register test adaptation file adapted to the form of a test case template is determined for subsequent construction of test cases. Among them, the register description file is used to characterize the function information of each register in the chip to be tested, and the register description file is a file in a specific format, such as an SV file. Exemplarily, if the preset test environment is a DDR5 protocol test environment, the register description file is the register task allocation list in the DDR5 protocol file.

[0078] As can be seen from the above, the register description file is a protocol file with a specific format and file type, which does not match the form of the test case template. In this embodiment, the register description file is converted into a register test adaptation file so that the register test adaptation file matches the form of the test case template, facilitating the subsequent automatic generation of each test case. As an example, the register test adaptation file represents the correspondence between registers and register addresses, operand information, number of bits, read / write type, and register default values, and can be in forms such as mapping, table, etc.

[0079] S200. Construct test cases, construct test cases according to the register test adaptation file and the test case template, and execute the test cases to test the chip.

[0080] As described above, since the register test adaptation file matches the form of the test case template, it is more convenient to construct test cases according to the register test adaptation file and the test case template to test the chip.

[0081] As Figure 3 shown, step S100 further includes the following steps:

[0082] S110. When the preset test environment changes, in response to the change, determine the change information of the register description file;

[0083] S120. According to the change information, change the register test adaptation file.

[0084] In this embodiment, when the preset test environment changes, for example, when the protocol to be tested is upgraded, the changed content can be determined by comparing the register description file before the change and the register description file after the change, and the register test adaptation file can be modified accordingly. In this way, only the registers that have changed need to be reconfigured for test cases, and the original configuration information of other registers can remain unchanged.

[0085] In the chip test method provided in this embodiment, a register test adaptation file that is adapted to the form of the test case template is determined according to the register description file, and then test cases are constructed according to the register test adaptation file to perform chip testing, eliminating the need for cumbersome register information search and entry work, improving the chip test efficiency, reducing the error rate, and improving the test accuracy. In addition, when determining the register test adaptation file, it is possible to adaptively change the register test adaptation file in response to a change in the preset test environment, without having to reconstruct the test environment, improving the test flexibility and test efficiency, and facilitating later maintenance.

[0086] In one embodiment, as Figure 4As shown, in step 100, determining the register test adaptation file according to the register description file in the preset test environment includes the following steps:

[0087] S101. Obtain the protocol information corresponding to the preset test environment.

[0088] Exemplarily, if the preset test environment is a DDR5 protocol test environment, the corresponding protocol information is JEDEC DDR5 protocol information. Of course, the preset test environment can also be other test environments, such as an LPDDR5 protocol test environment, an HMB3 protocol test environment, a GDDR5 protocol test environment, etc.

[0089] S102. Extract the register task assignment list from the protocol information, and use the register task assignment list as the register description file.

[0090] The protocol information is usually a complete protocol description file. It is necessary to extract the part related to the register from the protocol information, that is, the register task assignment list. Exemplarily, the register task assignment list in the protocol information has a header file, and there are register tags in the header file. The register task assignment list can be extracted from the protocol information by identifying the register tags. The register task assignment list can be, for example, Figure 1a and Figure 1b in the form shown.

[0091] S103. Convert the register task assignment list into a register test case list, and use the register test case list as the register test adaptation file.

[0092] Exemplarily, the test case template is usually a combination of each item to be tested. As shown in Figure 1a and Figure 1b , the form of the register task assignment list is not adapted to the form of the test case template. Converting the register task assignment list into a register test case list makes the register test case list adapted to the form of the test case template. For example, the register test case list is used to represent the correspondence between the register and the test item information, and the test item information therein corresponds to each item to be tested in the aforementioned test case template. The register test case list can be an excel table or other forms of lists.

[0093] In this embodiment, first, the register task assignment list is extracted from the protocol information, and then the register task assignment list is converted to form a register test case list adapted to the form of the test case template. The form conversion between the lists is more convenient for automatic operation, with high conversion efficiency and not prone to omission.

[0094] The test case template can be determined according to the test items that need to be tested for each register in the protocol information. In an exemplary embodiment, the test case template includes:

[0095] task Reg(reg_addr, bit_addr, bit_len, Wr_Rd, default value);

[0096] Among them, reg_addr represents the register address, bit_addr represents the operand information; bit_len represents the number of bits; Wr_Rd represents the read / write type; default value represents the register default value.

[0097] Among them, bit_len represents the number of bits. When the multi-bit operands of a certain register represent the same operation item or function, multiple operand information can be indicated by bit_len, without generating a test case template for each operand information, which can further reduce the difficulty and cycle of generating the use case file and improve the efficiency.

[0098] Among them, the register address, operand information, number of bits, read / write type, and register default value are the above-mentioned items to be tested. Correspondingly, the register test case list is a list of the corresponding relationships of the register address, operand information, number of bits, read / write type, and register default value. In this way, when forming the test cases for each register, the test item information in each cell of the register test case list can be written into the test case template, so as to obtain the test cases for each register. Setting the test case template in the above format can make the register test case list match the form of the test case template, so as to improve the construction efficiency of the test cases.

[0099] In one embodiment, each row in the register test case list corresponds to forming a test case, and the arrangement order of the multiple test item information in each row of the register test case list is the same as the arrangement order of the multiple different test items to be configured in the test case template, so as to facilitate writing the test item information in the register test case list into the test items to be configured in the test case template in sequence.

[0100] As an example, the register test case list is shown in Table 1 below.

[0101] Register Sub Register Bit Type Default Value 0 Burst Length 0 R / W 0 1 MPSM 1 R 0 2 PDA Select ID 2 R / W 0

[0102] Among them, each cell in each row is the register address, operand information, number of bits, read / write type, and register default value of a register respectively, and the operand information among them is the function description information corresponding to the operand. In this way, when generating test cases, the information in each cell of each row is written into the test items to be configured in the test case template in sequence, so as to form the test cases corresponding to each register.

[0103] In some embodiments, when converting the register task assignment list into a register test case list, all register addresses can be first extracted from the register task assignment list and written into the register address column of the register test case list in sequence. Then, the register addresses in the register address column of the register test case list are traversed. For each register address, the operand information, number of bits, read / write type, and register default value corresponding to the register address are found in the register task assignment list and written into the register test case list, so as to ensure that the relevant information of each register in the register task assignment list is written into the register test case list without omission.

[0104] As described above, the mode register performs different functions in response to different operands, and correspondingly, the register feature information is also different. For each bit of the operand of the mode register, a corresponding test case needs to be generated for testing. Based on this, in an exemplary embodiment, as Figure 5 shown, step S103 includes:

[0105] S1031. Analyze the register task assignment list to determine the test item information of each register. Each register corresponds to at least one test item information group, and each test item information group includes multiple test item information corresponding to multiple different test items to be configured one by one.

[0106] In this embodiment, the determined test item information of each register is grouped. For a register, one test item information group corresponds to one bit of the operand of the register, so as to generate a corresponding test case for each bit of the operand.

[0107] S1032. Generate a register test case list according to the determined test item information of each register. Each row in the register test case list includes multiple test item information in one test item information group, and the test item information in each column of the register test case list corresponds to the same test item to be configured.

[0108] In this way, when forming the test cases, as long as the test cases are formed row by row, that is, for each row, the respective test item information in that row is written into the test case template to generate the test cases, all the test cases for all registers under all operands can be completed without omission.

[0109] In this embodiment, when converting the register task allocation list into a register test list, all register addresses and the operands corresponding to each register address can be extracted from the register task allocation list first, and then written into the register address column of the register test list in sequence. For example, when the operand of a register corresponding to a register address is 3, three such register addresses are written into the register test list accordingly, and the operand information corresponding to the register address is written in each row where the register address is located. Then, the register addresses in the register address column of the register test list are traversed, and for each piece of operand information of each register address, the number of bits, read / write type, and register default value corresponding to the register address are found in the register task allocation list and written into the register test list, so as to ensure that the relevant information of each bit of each operand of each register in the register task allocation list is written into the register test list without omission.

[0110] Exemplarily, continuing with Figure 1a and Figure 1b the register task allocation list shown as an example, as Figure 1a and Figure 1b shown, in the JEDEC DDR5 protocol information, each mode register corresponds to 8-bit operands, and the formed register test list is shown in Table 2 below:

[0111]

[0112]

[0113] In the above table, the information of each test item in each row forms a test item information group, and for each register, 8 test item information groups are formed. It can be understood that only the test item information of the three registers, namely Register0, Register1, and Register2, in the register test list is shown in the above table, and the test item information of other registers in the register test list is not shown, which is similar to that of Register0, Register1, and Register2.

[0114] As can be seen from the above table, the operand bits of some registers represent different operation items or functions. For example, Register2 in the table. While the multiple operands of some registers represent the same operation item or function. For example, Register0 in the table, where its operand OP[0] and operand OP[1] have the same function Burst Length, and its five operands from operand OP[2] to operand OP[6] all have the same function CAS Latency(RL). Another example is Register1 in the table, where its four operands from operand OP[0] to operand OP[3] all have the same function PDA Enumerate ID, and its four operands from operand OP[4] to operand OP[7] all have the same function PDA Select ID. In one embodiment, multiple operand information is indicated by bit_len in the test case template. Exemplarily, when generating a test case for Register0, since its operands from OP[2] to OP[6] all have the same function CAS Latency(RL), therefore, for the CAS Latency(RL) function, bit_len can be correspondingly set to 5 bits. Thus, the difficulty and cycle of generating the use case file can be further reduced, and the efficiency can be improved.

[0115] In one embodiment, in order to avoid omission of register data during the conversion of the register task assignment list to the register test case list, after forming the register test case list, the number of register information in the register test case list is counted and compared with the number of register information in the register task assignment list. Exemplarily, after forming the register test case list as shown in Table 2, the number of rows L of this register test case list is counted (the number of rows here refers to the actual content rows, excluding the header), and the number of registers N1 and the number of operands N2 in the register task assignment list are obtained, and the product of the number of registers N1 and the number of operands N2 is calculated. If L = N1 * N2, it is determined that no omission has occurred during the conversion of the list. If L ≠ N1 * N2, it indicates that an error has occurred during the conversion of the list.

[0116] In this embodiment, when it is determined that an error has occurred during the conversion process, it can be to re - execute the process of converting the register task assignment list to the register test case list, or to compare the operands of each register in the register task assignment list and the register test case list, determine the omitted registers and operands, and supplement the test item information corresponding to the omitted registers and operands to the register test case list. In this way, the efficiency can be improved and the amount of calculation can be reduced.

[0117] As described above, when the preset test environment changes, for example, when the protocol to be tested is upgraded, the register test adaptation file can be changed. In some embodiments, it is possible to determine whether the preset test environment has changed by detecting the version information. Exemplarily, before performing chip testing, first parse the header file of the protocol information, extract the version information from the header file, compare the version information with the original version information. If they are inconsistent, it is determined that the preset test environment has changed and the register test adaptation file needs to be changed.

[0118] In an embodiment where the register description file is a register task allocation list and the register test adaptation file is a register test case list, as Figure 6 shown, the method for determining the change information of the register description file includes the following steps:

[0119] S111. Compare the register task allocation list before the change and the register task allocation list after the change, and determine the content that has changed in the register task allocation list.

[0120] S112. According to the changed content, determine the position of the changed test item information in the register test case list and the changed test item information, and use the position of the changed test item information in the register test case list and the changed test item information as the change information.

[0121] When performing step S111, compare the contents of each item in the register task allocation list before the change and the register task allocation list after the change, determine the changed items. Continuing with the Figure 1a and Figure 1b shown register task allocation list as an example, when the DDR5 protocol is upgraded, as Figure 1a shown, Figure 1a the part boxed by the dashed line in it will be changed. After comparison, it is determined that the content corresponding to the mode register Register4 in the operand OP[5] has changed. Then, look up the relationship table between the register functions and register feature information after the protocol upgrade, and determine the test item information such as the register address, number of bits, read / write type, and default value corresponding to the mode register Register4 in the operand OP[5]. At the same time, determine the position of the operand OP[5] of the mode register Register4 in the register test case list, such as the row number in the register test case list. Thus, in step S120, update the row information corresponding to the operand OP[5] of the mode register Register4 in the register test case list and modify it to the test item information determined in step S112.

[0122] In this embodiment, by comparing the register task allocation list before the change and the register task allocation list after the change, the changed content can be easily determined. Only the information in the corresponding row of the register test case list needs to be updated according to the changed content, without regenerating the register test case list. The amount of computation is small and the computation speed is fast, greatly improving the test efficiency.

[0123] In this embodiment, when updating the row information, only the test item information that has changed can be updated, or the entire row information can be replaced to reduce the comparison operation.

[0124] After the test case is constructed, the test case can be executed to implement the test of the chip. For example, for a readable and writable register (the read / write type Type in the corresponding list is R / W), first read the initial value of the register and confirm whether the read value is the same as the register default value (Default Value in the corresponding list). If they are the same, it can be considered that the register default value of this register is correct. Then perform a write operation on this register, and then read its related value. If the read value is the same as the written value, it can be considered that the read / write function of this register is normal.

[0125] For a read-only register (the read / write type Type in the corresponding list is R), when the register has no operation, read the register value and confirm whether it is the same as the register default value. If they are the same, it can be considered that the register default value of this register is correct. Then perform a write operation on this register. If the written value affects the value of this register, it can be determined that the type of this register is incorrect. For example, if the register default value of this register is 0, after performing a write operation of 1 on this register, if the value of this register becomes 1, it means that the type of this register is incorrect; if the value of this register remains 0, it means that the type of this register is correct. It can be understood that the register default values in the test cases can be set to be the same, for example, they can all be 0, or all be 1; the register default values in the test cases can also be different. The default values of different registers can be set according to the corresponding standard file regulations, or different register default values can be provided according to the test needs, so as to implement the test of different register default values in a complex test environment.

[0126] When testing each register, to avoid missing the test of a register or a certain operand in the register, after completing the test of a register, the position of the register in the register test list can be marked. After completing all the tests, check whether there are unmarked test rows in the register test list. If there are, it means there are omissions, and the test of the register can be continued for the omitted test rows until no unmarked test rows can be found. Exemplarily, a header file is set for each row in the register test list, and a flag bit is set in the header file. When the row has not been tested, the flag bit is 0, and after the row has been tested, the flag bit is modified to 1. In other embodiments, it can also be that for each register test executed, the corresponding row of the register in the register test list is deleted. After completing all the tests, check whether there is still row information in the register test list. If there is, it means there are omissions, and the test of the register can be continued for the omitted test rows until the register test list is empty.

[0127] The chip testing method provided by the embodiments of the present disclosure determines a register test adaptation file adapted to the form of a test case template according to a register description file, and then constructs a test case based on the register test adaptation file to perform chip testing, without the need for cumbersome register information searching and entry work, improving the chip testing efficiency, reducing the error rate, and improving the test accuracy. In addition, when determining the register test adaptation file, it can adaptively change the register test adaptation file in response to a change in the preset test environment, without the need to reconstruct the test environment, improving the test flexibility and test efficiency, and facilitating later maintenance.

[0128] Figure 7 The block diagram of a chip testing device shown according to an exemplary embodiment. As Figure 7 shown, the device at least includes a register test adaptation file determination module 301, an adaptation file change module 302, a test case construction module 303, and an execution module 304. Among them,

[0129] The register test adaptation file determination module 301 is configured to determine a register test adaptation file according to a register description file in a preset test environment, and the register test adaptation file is adapted to a pre-determined test case template form;

[0130] The adaptation file change module 302 is coupled to the register test adaptation file determination module 301 and is configured to determine the change information of the register description file when the preset test environment changes, and send a change command to the register test configuration file determination module to change the register test adaptation file;

[0131] The test case construction module 303 is configured to construct test cases according to the register test adaptation file and the test case template;

[0132] The execution module 304 is configured to execute test cases to test the chip.

[0133] In an exemplary embodiment, the register test adaptation file determination module 301 is configured to:

[0134] Obtain the protocol information corresponding to the preset test environment;

[0135] Extract the register task allocation list from the protocol information and use the register task allocation list as the register description file;

[0136] Convert the register task allocation list into a register test case list and use the register test case list as the register test adaptation file.

[0137] In an exemplary embodiment, the test case template includes multiple different test items to be configured, and the register test adaptation file determination module 301 is configured to:

[0138] Parse the register task allocation list to determine the test item information of each register. Each register corresponds to at least one group of test item information, and each group of test item information includes multiple test item information corresponding one-to-one to multiple different test items to be configured;

[0139] Generate a register test case list according to the determined test item information of each register. Each row in the register test case list includes multiple test item information in a group of test item information, and each column in the register test case list is the test item information of the same test item.

[0140] In an exemplary embodiment, the arrangement order of the multiple test item information in each row of the register test case list is the same as the arrangement order of the multiple different test items to be configured in the test case template.

[0141] In an exemplary embodiment, the test case template includes:

[0142] task Reg(reg_addr, bit_addr, bit_len, Wr_Rd, default value);

[0143] Wherein, reg_addr represents the register address, bit_addr represents the operand information; bit_len represents the number of bits; Wr_Rd represents the read / write type; default value represents the register default value.

[0144] In an exemplary embodiment, the default values of the registers in the test cases are different.

[0145] In an exemplary embodiment, when the register description file is a register task assignment list and the register test adaptation file is a register test case list, the adaptation file change module 302 is configured to:

[0146] Compare the register task assignment list before the change with the register task assignment list after the change to determine the content that has changed in the register task assignment list;

[0147] According to the changed content, determine the position of the changed test item information in the register test case list and the changed test item information, and use the position of the changed test item information in the register test case list and the changed test item information as the change information.

[0148] Figure 8 FIG. 13 is a block diagram of a chip testing device, i.e., a computer device 400, shown according to an exemplary embodiment. For example, the computer device 400 may be provided as a terminal device. Referring to Figure 8 , the computer device 400 includes a processor 401, and the number of processors may be set to one or more according to needs. The computer device 400 further includes a memory 402 for storing instructions executable by the processor 401, such as application programs. The number of memories may be set to one or more according to needs. The application programs stored therein may be one or more. The processor 401 is configured to execute instructions to perform the above method.

[0149] Those skilled in the art should understand that the embodiments of the present disclosure may be provided as a method, an apparatus (device), or a computer program product. Therefore, the present disclosure may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present disclosure may take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program code therein. Computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information such as computer-readable instructions, data structures, program modules or other data, including but not limited to RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cartridges, tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically contains computer-readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and may include any information delivery medium.

[0150] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is provided, such as a memory 402 including instructions, and the instructions can be executed by a processor 401 of a device 400 to complete the above method. For example, the non-transitory computer-readable storage medium may be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0151] A non-transitory computer-readable storage medium, when the instructions in the storage medium are executed by a processor of a chip testing device, enables the chip testing device to execute:

[0152] Determine a register test adaptation file, determine the register test adaptation file according to a register description file in a preset test environment, and the register test adaptation file is adapted to a pre-determined test case template form;

[0153] Construct a test case, construct a test case according to the register test adaptation file and the test case template, and execute the test case to test the chip;

[0154] Determining the register test adaptation file further includes, when the preset test environment changes, in response to the change, determining the change information of the register description file;

[0155] According to the change information, change the register test adaptation file.

[0156] The present disclosure is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (devices), and computer program products according to embodiments of the present disclosure. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, as well as the combination of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for implementing the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0157] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device, and the instruction device implements the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0158] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus, so that a series of operation steps are performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby the instructions executed on the computer or other programmable apparatus provide steps for implementing the functions specified in one process or multiple processes in the flowchart and / or one block or multiple blocks in the block diagram.

[0159] In the present disclosure, the terms "comprising", "including" or any other variation thereof are intended to cover non-exclusive inclusion, such that an article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or further includes elements inherent to such article or device. Without further limitation, an element defined by the statement "comprising ……" does not exclude the presence of additional identical elements in the article or device comprising said element.

[0160] Although the preferred embodiments of the present disclosure have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications falling within the scope of the present disclosure.

[0161] Obviously, those skilled in the art can make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalent technologies, the intention of the present disclosure also includes these modifications and variations.

Claims

1. A chip testing method for testing a chip in a preset test environment, characterized in that, the method includes: Determine a register test adaptation file, and determine the register test adaptation file according to the register description file in the preset test environment, where the register test adaptation file is adapted to the form of a pre-determined test case template; Construct a test case, construct a test case according to the register test adaptation file and the test case template, and execute the test case to test the chip; The determination of the register test adaptation file further includes, when the preset test environment changes, in response to the change, determining the change information of the register description file; According to the change information, change the register test adaptation file; The determining the register test adaptation file according to the register description file in the preset test environment includes: Obtain the protocol information corresponding to the preset test environment; Extract a register task allocation list from the protocol information, and use the register task allocation list as the register description file; Convert the register task allocation list into a register test case list, and use the register test case list as the register test adaptation file.

2. The chip testing method according to claim 1, characterized in that, The test case template includes a plurality of different test items to be configured. The conversion of the register task allocation list into a register test case list includes: Parse the register task allocation list to determine the test item information of each register. Each register corresponds to at least one group of test item information, and each group of test item information includes a plurality of test item information corresponding one-to-one to the plurality of different test items to be configured; According to the determined test item information of each register, generate the register test case list. Each row in the register test case list includes the plurality of test item information in a group of test item information, and the test item information in each column of the register test case list corresponds to the same test item to be configured.

3. The chip testing method according to claim 2, characterized in that, The arrangement order of the plurality of test item information in each row of the register test case list is the same as the arrangement order of the plurality of different test items to be configured in the test case template.

4. The chip testing method according to claim 2, characterized in that, The test case template includes: Task Reg(reg_addr, bit_addr, bit_len, Wr_Rd, default value); Wherein, reg_addr represents the register address, bit_addr represents the operand information; bit_len represents the number of bits; Wr_Rd represents the read / write type; default value represents the register default value.

5. The chip testing method according to claim 4, characterized in that, The register default values in the test cases are different.

6. The chip testing method according to any one of claims 1 to 5, characterized in that, When the register description file is a register task allocation list and the register test adaptation file is a register test case list, determining the change information of the register description file includes: Comparing the register task allocation list before the change and the register task allocation list after the change to determine the changed content in the register task allocation list; Based on the changed content, determining the position of the changed test item information in the register test case list and the changed test item information, and taking the position of the changed test item information in the register test case list and the changed test item information as the change information.

7. A chip testing device for testing a chip in a preset test environment, characterized in that the device includes: a register test adaptation file determination module configured to determine a register test adaptation file according to the register description file in the preset test environment, and the register test adaptation file is adapted to the form of a pre-determined test case template; an adaptation file change module coupled to the register test adaptation file determination module, configured to determine the change information of the register description file when the preset test environment changes, and send a change command to the register test adaptation file determination module to change the register test adaptation file; a test case construction module configured to construct a test case according to the register test adaptation file and the test case template; an execution module configured to execute the test case to test the chip; the register test adaptation file determination module is configured to: obtain the protocol information corresponding to the preset test environment; extract a register task allocation list from the protocol information and use the register task allocation list as the register description file; convert the register task allocation list into a register test case list and use the register test case list as the register test adaptation file.

8. The chip testing device according to claim 7, characterized in that the test case template includes a plurality of different test items to be configured, and the register test adaptation file determination module is configured to: parse the register task allocation list to determine the test item information of each register, each register corresponds to at least one group of test item information, and each group of test item information includes a plurality of test item information corresponding one-to-one to the plurality of different test items to be configured; generate the register test case list according to the determined test item information of each register, each row in the register test case list includes the plurality of test item information in a group of test item information, and each column in the register test case list is the test item information of the same test item.

9. The chip testing device according to claim 8, characterized in that the arrangement order of the plurality of test item information in each row of the register test case list is the same as the arrangement order of the plurality of different test items to be configured in the test case template.

10. The chip testing device according to claim 8, It is characterized in that the test case template includes: task Reg(reg_addr, bit_addr, bit_len, Wr_Rd, default value); wherein, reg_addr represents the register address, bit_addr represents the operand information; bit_len represents the number of bits; Wr_Rd represents the read / write type; default value represents the register default value.

11. The chip testing device according to claim 10, it is characterized in that the register default values in the test cases are different.

12. The chip testing device according to any one of claims 7 to 11, it is characterized in that when the register description file is a register task allocation list and the register test adaptation file is a register test case list, the adaptation file change module is configured to: compare the register task allocation list before the change and the register task allocation list after the change to determine the changed content in the register task allocation list; determine the position of the changed test item information in the register test case list and the changed test item information according to the changed content, and use the position of the changed test item information in the register test case list and the changed test item information as the change information.

13. A chip testing device, it is characterized in that the chip testing device includes: a processor; a memory for storing processor-executable instructions; wherein, the processor is configured to execute: determine a register test adaptation file, determine a register test adaptation file according to a register description file in a preset test environment, and the register test adaptation file is adapted to the form of a pre-determined test case template; construct a test case, construct a test case according to the register test adaptation file and the test case template, and execute the test case to test the chip; the determining of the register test adaptation file further includes, when the preset test environment changes, in response to the change, determining the change information of the register description file; changing the register test adaptation file according to the change information; the determining of the register test adaptation file according to the register description file in the preset test environment includes: obtaining the protocol information corresponding to the preset test environment; extracting a register task allocation list from the protocol information and using the register task allocation list as the register description file; converting the register task allocation list into a register test case list and using the register test case list as the register test adaptation file.

14. A non-transitory computer-readable storage medium, it is characterized in that when the instructions in the storage medium are executed by a processor of a testing device, the testing device is enabled to execute: determine a register test adaptation file, determine a register test adaptation file according to a register description file in a preset test environment, and the register test adaptation file is adapted to the form of a pre-determined test case template; Construct test cases, construct test cases according to the register test adaptation file and the test case template, and execute the test cases to test the chip; The determination of the register test adaptation file further includes, when the preset test environment changes, in response to the change, determining the change information of the register description file; Change the register test adaptation file according to the change information; The determination of the register test adaptation file according to the register description file in the preset test environment includes: Obtain the protocol information corresponding to the preset test environment; Extract the register task assignment list from the protocol information, and use the register task assignment list as the register description file; Convert the register task assignment list into a register test case list, and use the register test case list as the register test adaptation file.

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