Antenna substrate
By exposing the pad portion on the main side surface of the antenna substrate and using an alternating structure of patterned layers and via layers, the problem of difficulty in achieving a vertical structure in the prior art is solved, thus achieving efficient signal transmission and cost optimization.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SAMSUNG ELECTRO MECHANICS CO LTD
- Filing Date
- 2021-06-15
- Publication Date
- 2026-07-24
Smart Images

Figure CN114628880B_ABST
Abstract
Description
[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2020-0174647, filed on December 14, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field
[0002] This disclosure relates to an antenna substrate. Background Technology
[0003] Recently, 5G communication services and markets have expanded rapidly to enable the transmission of large amounts of data at ultra-high speeds. Therefore, technological development has been undertaken to realize antenna substrates with low signal loss. Summary of the Invention
[0004] One aspect of this disclosure provides an antenna substrate for realizing an antenna with a vertical structure without using a separate cable substrate.
[0005] According to one aspect of this disclosure, an antenna substrate may include: a body having one surface and another surface opposite to each other and a side surface connecting the one surface and the other surface to each other; an antenna portion disposed on the one surface of the body; and a pad portion disposed in the body, exposed to the side surface of the body, and including a plurality of pad layers connected to each other in a first direction from the other surface of the body toward the one surface of the body, wherein, when viewed in the first direction from the other surface of the body toward the one surface of the body, at least one of the plurality of pad layers has a width in a second direction greater than its width in a third direction perpendicular to the second direction.
[0006] According to another aspect of this disclosure, an antenna substrate may include: a body having a first surface and a second surface opposite to each other and a side surface connecting the first surface and the second surface to each other; an antenna portion disposed on the first surface of the body; and a pad portion disposed in the body and including a plurality of pad layers, each pad layer including a pattern layer and a via layer, wherein the pattern layer and the via layer of each of the plurality of pad layers are exposed on the side surface of the body.
[0007] According to another aspect of this disclosure, an antenna substrate may include: a body; an antenna portion disposed on a first surface of the body; and a pad portion disposed in the body, exposed on a side surface of the body perpendicular to the first surface, and including a plurality of pad layers, each pad layer including a pattern layer and a via layer, wherein on the side surface of the body, the width of the pattern layer is greater than the width of the via layer. Attached Figure Description
[0008] The above and other aspects, features, and advantages of this disclosure will be more clearly understood from the following specific embodiments, taken in conjunction with the accompanying drawings, in which:
[0009] Figure 1 This is a schematic block diagram illustrating an example of an electronic device system;
[0010] Figure 2 This is a schematic plan view illustrating an example of an electronic device;
[0011] Figure 3 This is a schematic perspective view showing an antenna substrate according to an exemplary embodiment;
[0012] Figure 4 yes Figure 3 A cross-sectional view of the antenna substrate when viewed from the side surface of the main body;
[0013] Figure 5 It is shown Figure 3 A schematic perspective view of an example of a solder pad portion;
[0014] Figure 6 This is a schematic perspective view showing an antenna substrate according to another exemplary embodiment;
[0015] Figure 7 yes Figure 6 A cross-sectional view of the antenna substrate when viewed from the side surface of the main body;
[0016] Figure 8 It is shown Figure 6 A schematic perspective view of an example of a solder pad portion;
[0017] Figure 9 It is shown Figure 3 The antenna substrate also includes schematic cross-sectional views of examples of electronic components; and
[0018] Figure 10 It is shown Figure 3 A schematic cross-sectional view of an example of an antenna substrate mounted on another substrate. Detailed Implementation
[0019] In the following description, exemplary embodiments of the present disclosure will be illustrated with reference to the accompanying drawings. In the drawings, the shape, size, etc., of the components may be exaggerated or reduced for clarity.
[0020] In this article, the term "connection" between components includes both indirect connections via adhesive layers and direct connections between two components. Furthermore, "electrical connection" conceptually encompasses both physical connections and physical disconnections.
[0021] The terms "first," "second," etc., are used herein to distinguish one component from another and do not limit the order, importance, etc., of the respective components. In some cases, without departing from the scope of the claims set forth herein, a first element may be referred to as a second element. Similarly, a second element may also be referred to as a first element.
[0022] The term "exemplary embodiment" as used herein does not refer to the same exemplary embodiment and is provided to emphasize a feature or characteristic that differs from a particular exemplary embodiment. However, the exemplary embodiments provided herein are thought to be implementable by combining them wholly or partially with each other. For example, an element described in a particular exemplary embodiment may be understood as a description relating to another exemplary embodiment, even if that element is not described in another exemplary embodiment, unless a contrary or contradictory description is provided herein.
[0023] The terminology used herein is for describing exemplary embodiments only and is not intended to limit this disclosure. Furthermore, unless the context otherwise requires, the singular form includes the plural form.
[0024] Figure 1 This is a schematic block diagram illustrating an example of an electronic device system.
[0025] Reference Figure 1 The motherboard 1010 can be housed within the electronic device 1000. Chip-related components 1020, network-related components 1030, and other components 1040 can be physically or electrically connected to the motherboard 1010. These components can be connected to other components described below via various signal lines 1090.
[0026] Chip-related components 1020 may include: memory chips, such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM)), flash memory, etc.; application processor chips, such as central processing units (e.g., central processing units (CPU)), graphics processing units (e.g., graphics processing units (GPUs)), digital signal processors, cryptographic processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (ASICs), etc. However, chip-related components 1020 are not limited to these, and may also include other types of chip-related components. Furthermore, chip-related components 1020 can be combined with each other. These chip-related components 1020 may have a package form including the aforementioned chips or electronic components.
[0027] Network-related components 1030 may include components operating based on protocols such as: Wi-Fi (IEEE 802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, LTE, Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM+, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, and 5G protocols, as well as any other wireless and wired protocols specified after those listed above. However, network-related components 1030 are not limited to these and may also include components operating based on various other wireless or wired standards or protocols. In addition, the network-related component 1030 can be combined with the aforementioned chip-related component 1020.
[0028] Other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-fired ceramic (LTCC) capacitors, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCC), etc. However, these other components 1040 are not limited to these, and may also include chip-type passive components for various other purposes. Furthermore, other components 1040 may be combined with the aforementioned chip-related components 1020 and / or network-related components 1030.
[0029] Depending on the type of electronic device 1000, it may include other electronic components that are physically or electrically connected to the motherboard 1010 or not physically or electrically connected to the motherboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, a battery 1080, etc. These other electronic components are not limited to these and may include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage units (e.g., hard disk drives), optical disc (CD) drives, digital versatile disc (DVD) drives, etc. These other electronic components may also include other electronic components for various purposes, depending on the type of electronic device 1000.
[0030] Electronic device 1000 can be a smartphone, personal digital assistant (PDA), digital camera, digital video camera, network system, computer, monitor, tablet PC, laptop PC, netbook PC, television, video game console, smartwatch, automotive component, etc. However, electronic device 1000 is not limited to these, and can be any other electronic device that processes data.
[0031] Figure 2 This is a schematic plan view showing an example of an electronic device.
[0032] Reference Figure 2 The electronic device may be, for example, a smartphone 1100. A modem 1101 and various types of antenna modules 1102, 1103, 1104, 1105, and 1106 connected to the modem 1101 via rigid printed circuit boards, flexible printed circuit boards, and / or rigid-flex printed circuit boards may be provided in the smartphone 1100. If desired, a Wi-Fi module 1107 may also be provided in the smartphone 1100. Antenna modules 1102, 1103, 1104, 1105, and 1106 may include antenna modules 1102, 1103, 1104, and 1105 having various frequency bands for 5G mobile communications (such as antenna module 1102 for the 3.5 GHz band, antenna module 1103 for the 5 GHz band, antenna module 1104 for the 28 GHz band, antenna module 1105 for the 39 GHz band, etc.), and may also include a 4G antenna module 1106, but are not limited thereto. Furthermore, the electronic device is not limited to the smartphone 1100, but can be other electronic devices as described above.
[0033] Figure 3 This is a schematic perspective view showing an antenna substrate according to an exemplary embodiment.
[0034] Figure 4 yes Figure 3 A cross-sectional view of the antenna substrate when viewed from the side surface of the main body.
[0035] Figure 5 It is shown Figure 3 A schematic perspective view of an example of a solder pad area.
[0036] Reference Figures 3 to 5The antenna substrate 1000A may include: a body 100 having a first surface 100T and a second surface 100B opposite to each other, and a side surface 100S or more side surfaces connecting the first surface 100T and the second surface 100B to each other; an antenna portion 200 disposed on the first surface 100T of the body 100; and a pad portion 300 disposed in the body 100, exposed to the side surface 100S of the body 100, and including a plurality of pad layers 3001, 3002, 3003, 3004, 3005, 3006, 3007, 3008 and 3009 connected to each other in a first direction (i.e., the Y direction) from the second surface 100B of the body 100 toward the first surface 100T of the body 100. Additionally, the antenna substrate 1000A may also include a wiring portion 400 disposed in the body 100.
[0037] The body 100 can form the appearance of the antenna substrate 1000A and can be used to ensure the insulation characteristics of the antenna substrate 1000A in areas where electrical connections are not required. The body 100 may have a cuboid shape having a first surface 100T and a second surface 100B and four side surfaces 100S connecting the first surface 100T and the second surface 100B to each other, but the shape of the body 100 is not limited to this.
[0038] The body 100 may include a plurality of insulating layers 111, 112, and 113 stacked in the Y direction from the second surface 100B of the body 100 toward the first surface 100T of the body 100. Although Figure 4 Each of the boundaries between the multiple insulating layers 111, 112 and 113 is shown to be obvious, but each of the boundaries between the multiple insulating layers 111, 112 and 113 may become less obvious during the stacking of each of the multiple insulating layers 111, 112 and 113, making it possible to identify each boundary with the naked eye.
[0039] The plurality of insulating layers 111, 112, and 113 may include a core insulating layer 111 and a plurality of first stacked insulating layers 112 and a plurality of second stacked insulating layers 113 disposed on both sides of the core insulating layer 111 in the Y direction. The thickness of the core insulating layer 111 may be greater than the thickness of each of the first stacked insulating layers 112 and the second stacked insulating layers 113.
[0040] Each of the plurality of insulating layers 111, 112, 113 may include an insulating material. The insulating material may be a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide resin, a material including reinforcing materials (such as woven glass fiber) and / or inorganic fillers, and a thermosetting or thermoplastic resin (e.g., prepreg, Ajinomoto build-up film (ABF), photosensitive dielectric (PID), etc.).
[0041] Although not specifically shown, the antenna section 200 may include a patch antenna. In this case, the patch antenna may be connected to a feed via to receive radio frequency (RF) signals from the feed via, or may transmit RF signals to the feed via. However, the antenna section 200 may include a monopole antenna, a dipole antenna, and / or a patch antenna, and may also include a patch antenna. Additionally, the antenna section 200 may also include an inner layer antenna disposed within the body 100.
[0042] The pad portion 300 can be used to mount the antenna substrate 1000A onto another board (such as a motherboard). However, the pad portion 300 is not limited to this and can also be an area on which electronic components are mounted on the antenna substrate 1000A. The electronic components may include, but are not limited to, at least one of a power management integrated circuit (PMIC), a radio frequency integrated circuit (RFIC), and passive components.
[0043] There is no particular limitation on the number of pads 300, and they may be fewer or more than the number shown in the accompanying drawings. For example, the number of pads 300 may be one, three, or more.
[0044] The pad portion 300 may include a plurality of pad layers 3001, 3002, 3003, 3004, 3005, 3006, 3007, 3008, and 3009. In this case, each of the plurality of pad layers 3001, 3002, 3003, 3004, 3005, 3006, 3007, 3008, and 3009 may be formed on each of the plurality of insulating layers 111, 112, and 113.
[0045] When viewed in the Y direction from the second surface 100B of the body 100 toward the first surface 100T of the body 100, the width of at least one of the plurality of pad layers 3001, 3002, 3003, 3004, 3005, 3006, 3007, 3008, and 3009 in the second direction may be greater than its width in a third direction perpendicular to the second direction. In this case, the second direction may be the X direction parallel to the side surface 100S of the body 100 (e.g., the front side surface of the four side surfaces of the cuboid body 100 shown in the figures), and the third direction may be the Z direction perpendicular to the side surface 100S of the body 100 (e.g., the front side surface). As described later, the plurality of pad layers 3001, 3002, 3003, 3004, 3005, 3006, 3007, 3008, and 3009 may be formed by stacking vias having a strip shape to have the above-described structure.
[0046] Each of the plurality of pad layers 3001, 3002, 3003, 3004, 3005, 3006, 3007, 3008, and 3009 may include pattern layers 311, 312, and 313 and via layers 321, 322, and 323. In this case, the pattern layers 311, 312, and 313 and the via layers 321, 322, and 323 included in each of the plurality of pad layers 3001, 3002, 3003, 3004, 3005, 3006, 3007, 3008, and 3009 may be formed on and within each of the plurality of insulating layers 111, 112, and 113. The pad portion 300 may have a structure in which the plurality of pattern layers 311, 312, and 313 and the plurality of via layers 321, 322, and 323 are alternately arranged in the Y direction.
[0047] Each of the pattern layers 311, 312, and 313 may be disposed on each of the plurality of insulating layers 111, 112, and 113. In this case, the pattern layers 311, 312, and 313 may overlap each other in the Y direction (which is the stacking direction of the plurality of insulating layers 111, 112, and 113).
[0048] Pattern layers 311, 312, and 313 may include a plurality of core wiring layers 311 and a plurality of first stacked wiring layers 312 and a plurality of second stacked wiring layers 313 disposed on both sides of the plurality of core wiring layers 311 in the Y direction. The plurality of core wiring layers 311 may be disposed on two surfaces of the core insulating layer 111 in the Y direction. Each of the plurality of first stacked wiring layers 312 may be disposed on each of the plurality of first stacked insulating layers 112 in the Y direction, and each of the plurality of second stacked wiring layers 313 may be disposed on each of the plurality of second stacked insulating layers 113 in the Y direction.
[0049] Each of the patterned layers 311, 312 and 313 may be formed using a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti) or alloys thereof.
[0050] Each of the pattern layers 311, 312, and 313 can be formed by a known plating process. For example, the pattern layers 311, 312, and 313 can be formed by forming an electroless layer as a seed layer on a plurality of insulating layers 111, 112, and 113 respectively by an electroless plating process, and forming an electroplated layer on the seed layer respectively by an electroplating process.
[0051] Each of the via layers 321, 322, and 323 can penetrate each of the plurality of insulating layers 111, 112, and 113. Therefore, the via layers 321, 322, and 323 can connect the pattern layers 311, 312, and 313 included in each of the plurality of pad layers 3001, 3002, 3003, 3004, 3005, 3006, 3007, 3008, and 3009 to each other (e.g., the via layers can connect the pattern layers in adjacent pad layers to each other). In this case, the via layers 321, 322, and 323 can also overlap in the Y direction (which is the stacking direction of the plurality of insulating layers 111, 112, and 113).
[0052] Via layers 321, 322, and 323 may include a core via layer 321 and a plurality of first stacked via layers 322 and a plurality of second stacked via layers 323 disposed on both sides of the core via layer 321 in the Y direction. The core via layer 321 may penetrate the core insulating layer 111 in the Y direction and may connect a plurality of core wiring layers 311 disposed on the two surfaces of the core insulating layer 111 to each other. The plurality of first stacked via layers 322 may respectively penetrate the plurality of first stacked insulating layers 112 in the Y direction, and the plurality of second stacked via layers 323 may respectively penetrate the plurality of second stacked insulating layers 113 in the Y direction. The plurality of first stacked via layers 322 may connect the plurality of first stacked wiring layers 312 to the plurality of core wiring layers 311 to each other, and the plurality of second stacked via layers 323 may connect the plurality of second stacked wiring layers 313 to the plurality of core wiring layers 311 to each other.
[0053] Each of the via layers 321, 322 and 323 may be formed using a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti) or alloys thereof.
[0054] Each of the via layers 321, 322, and 323 can be formed using a known plating process. For example, via layers 321, 322, and 323 can be formed by forming vias that penetrate multiple insulating layers 111, 112, and 113 respectively, forming an electroless plating layer on the wall of each via as a seed layer using an electroless plating process, and forming an electroplated layer on the seed layer to fill the via. Each of the via layers 321, 322, and 323 may have a boundary with each of the pattern layers 311, 312, and 313, or may be integrated with each of the pattern layers 311, 312, and 313 without having a boundary with each of the pattern layers 311, 312, and 313.
[0055] Each via in each of via layers 321, 322, and 323 may be a filled via completely filled with metal, or a conformal via formed by metal along the wall of the via. Furthermore, each via in each of via layers 321, 322, and 323 may have various shapes, such as a conical shape, an hourglass shape, etc.
[0056] According to an exemplary embodiment, on the side surface 100S of the body 100, the width of each of the pattern layers 311, 312, and 313 may be greater than the width of each of the via layers 321, 322, and 323. On the other hand, the width of each of the pattern layers 311, 312, and 313 and / or the via layers 321, 322, and 323 on the side surface 100S of the body 100 may not be constant. In this case, on the side surface of the body 100, the maximum width of each of the pattern layers 311, 312, and 313 may be greater than the maximum width of each of the via layers 321, 322, and 323.
[0057] On the side surface 100S of the body 100, the pad portion 300 and the body 100 may have surfaces that are substantially coplanar with each other. In this case, on the side surface 100S of the body 100, each of the pattern layers 311, 312, and 313 and the via layers 321, 322, and 323, comprising each of the plurality of pad layers 3001, 3002, 3003, 3004, 3005, 3006, 3007, 3008, and 3009, may have a surface that is substantially coplanar with the side surface 100S of the body 100. Those skilled in the art will understand that the expression "substantially coplanar" means being located on the same plane by allowing for process errors, positional deviations, and / or measurement errors that may occur during the manufacturing process.
[0058] This structure of the antenna substrate 1000A can be achieved by forming patterned layers 311, 312, and 313 and via layers 321, 322, and 323, and then sawing the antenna substrate 1000A such that each of the patterned layers 311, 312, and 313 and the via layers 321, 322, and 323 is exposed on the side surface 100S of the body 100. Alternatively, this structure of the antenna substrate 1000A can be achieved by forming patterned layers 311, 312, and 313 and via layers 321, 322, and 323, and then performing laser processing on the antenna substrate 1000A such that each of the patterned layers 311, 312, and 313 and the via layers 321, 322, and 323 is exposed on the side surface 100S of the body 100. However, this disclosure is not limited thereto, and various processes can be applied by those skilled in the art to achieve this structure of the antenna substrate 1000A.
[0059] The wiring section 400 may include a plurality of wiring layers 411, 412 and 413 and a plurality of via layers 421, 422 and 423. The wiring section 400 may be electrically connected to the pad section 300 through at least one of the plurality of wiring layers 411, 412 and 413 and the plurality of via layers 421, 422 and 423.
[0060] Each of the plurality of wiring layers 411, 412, and 413 may be disposed on each of the plurality of insulating layers 111, 112, and 113. Each of the plurality of wiring layers 411, 412, and 413 may be disposed at the same height level as each of the plurality of pattern layers 311, 312, and 313. Each of the plurality of wiring layers 411, 412, and 413 may be formed on each of the plurality of insulating layers 111, 112, and 113 by the same process as that used for each of the plurality of pattern layers 311, 312, and 313 to achieve this structure.
[0061] The plurality of wiring layers 411, 412, and 413 may include a plurality of core wiring layers 411 and a plurality of first stacked wiring layers 412 and a plurality of second stacked wiring layers 413 disposed on both sides of the plurality of core wiring layers 411 in the Y direction. The plurality of core wiring layers 411 may be disposed on two surfaces of the core insulating layer 111 in the Y direction. Each of the plurality of first stacked wiring layers 412 may be disposed on each of the plurality of first stacked insulating layers 112 in the Y direction, and each of the plurality of second stacked wiring layers 413 may be disposed on each of the second stacked insulating layers 113 in the Y direction.
[0062] Each of the multiple wiring layers 411, 412 and 413 may be formed using a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti) or alloys thereof.
[0063] Each of the plurality of wiring layers 411, 412 and 413 can be formed by a known plating process. For example, the plurality of wiring layers 411, 412 and 413 can be formed by forming an electroless layer on the plurality of insulating layers 111, 112 and 113 respectively as a seed layer by an electroless plating process, and forming an electroplated layer on the seed layer respectively by an electroplating process.
[0064] Each of the plurality of via layers 421, 422, and 423 can penetrate each of the plurality of insulating layers 111, 112, and 113. Each of the plurality of via layers 421, 422, and 423 of the wiring section 400 can be disposed at the same height level as each of the plurality of via layers 321, 322, and 323 of the pad section 300. Each of the plurality of via layers 421, 422, and 423 of the wiring section 400 can be formed in each of the plurality of insulating layers 111, 112, and 113 using the same process as that used for each of the plurality of via layers 321, 322, and 323 of the pad section 300 to achieve this structure.
[0065] Each of the plurality of via layers 421, 422, and 423 may include a core via layer 421 and a plurality of first stacked via layers 422 and a plurality of second stacked via layers 423 disposed on both sides of the core via layer 421 in the Y direction. The core via layer 421 may penetrate the core insulating layer 111 in the Y direction and may connect a plurality of core wiring layers 411 disposed on the two surfaces of the core insulating layer 111 to each other. The plurality of first stacked via layers 422 may respectively penetrate the plurality of first stacked insulating layers 112 in the Y direction, the plurality of second stacked via layers 423 may respectively penetrate the plurality of second stacked insulating layers 113 in the Y direction, and the plurality of first stacked via layers 422 may connect the plurality of first stacked wiring layers 412 to the plurality of core wiring layers 411 to each other, and the plurality of second stacked via layers 423 may connect the plurality of second stacked wiring layers 413 to the plurality of core wiring layers 411 to each other.
[0066] Each of the multiple via layers 421, 422 and 423 may be formed using a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti) or alloys thereof.
[0067] Each of the plurality of via layers 421, 422, and 423 can be formed by a known plating process. For example, the plurality of via layers 421, 422, and 423 can be formed by forming vias that penetrate the plurality of insulating layers 111, 112, and 113 respectively, forming an electroless plating layer on the wall of the via as a seed layer by an electroless plating process, and forming an electroplated layer on the seed layer to fill the via by an electroplating process. Each of the plurality of via layers 421, 422, and 423 may have a boundary with each of the plurality of wiring layers 411, 412, and 413, or may be integrated with each of the plurality of wiring layers 411, 412, and 413 without having a boundary with each of the plurality of wiring layers 411, 412, and 413.
[0068] Each via in each of the multiple via layers 421, 422, and 423 can be a filled via completely filled with metal, or a conformal via formed by metal along the wall of the via. Furthermore, each via in each of the multiple via layers 421, 422, and 423 can have various shapes, such as a conical shape, an hourglass shape, etc.
[0069] According to an exemplary embodiment, the antenna substrate 1000A may further include a protective layer P disposed on at least one of the first surface 100T, the second surface 100B, and the side surface 100S of the body 100.
[0070] A protective layer P disposed on a first surface 100T of the main body 100 may be disposed on the antenna portion 200. A protective layer P disposed on a second surface 100B of the main body 100 may have an opening that exposes at least a portion of the second stacked wiring layer 413. A protective layer P disposed on a side surface 100S of the main body 100 may have an opening that exposes at least a portion of the pad portion 300.
[0071] The protective layer P can be formed using ABF, solder resist (SR), etc. However, the protective layer P is not limited to these and can be formed using known insulating materials.
[0072] Furthermore, when the antenna substrate provided for the 5G antenna module is mounted on the assembly board, the antenna orientation has a significant impact on the 5G signal sensitivity due to the strong linearity of the 5G antenna module. To address this issue, it is possible to arrange two or more antenna modules, including the 5G antenna substrate, in different orientations. In this case, the antenna modules need to be arranged vertically on the assembly board. For this purpose, it is possible to connect the antenna modules to the assembly board via connectors with individual flexible printed circuit (FPC) cable boards. However, in this case, signal characteristic loss may occur due to the cable connection, and there may also be cost issues.
[0073] On the other hand, as described above, in the antenna substrate 1000A according to the exemplary embodiment, the pad portion 300 can be exposed on the side surface 100S of the main body 100, so that the antenna portion 200 can be vertically arranged when the antenna substrate 1000A is mounted. Therefore, when the antenna substrate 1000A is applied to a 5G antenna module and mounted on a board, an antenna with a vertical structure can be realized without using a connector with a separate FPC cable board, and efficiency can be improved by directly mounting the vertical structure. In addition, the pattern layers 311, 312 and 313 and the via layers 321, 322 and 323 can be stacked in the Y direction to make the pad portion 300 perpendicular to the antenna portion 200. Therefore, the structure in which the pad portion 300 is perpendicular to the antenna portion 200 can be easily realized in the substrate process.
[0074] Figure 6 This is a schematic perspective view showing an antenna substrate according to another exemplary embodiment.
[0075] Figure 7 yes Figure 6 A cross-sectional view of the antenna substrate when viewed from the side surface of the main body.
[0076] Figure 8 It is shown Figure 6 A schematic perspective view of an example of a solder pad area.
[0077] Reference Figures 6 to 8 The antenna substrate 1000B may have a coreless structure that does not have a core insulating layer, a core wiring layer, or a core via layer.
[0078] Specifically, each of the pattern layers 311 included in the pad portion 300 may be disposed on each of the insulating layers 111, and each of the via layers 321 included in the pad portion 300 may penetrate each of the insulating layers 111 to connect the pattern layers 311 disposed on different layers to each other.
[0079] Additionally, each of the wiring layers 411 included in the wiring section 400 may be disposed on each of the insulating layers 111, and each of the via layers 421 included in the wiring section 400 may penetrate each of the insulating layers 111 to connect the wiring layers 411 disposed on different layers to each other.
[0080] The description of other structures is similar to that in the antenna substrate 1000A described above, so detailed descriptions of them are omitted.
[0081] Figure 9 It is shown Figure 3 The antenna substrate also includes a schematic cross-sectional view of an example of electronic components.
[0082] Reference Figure 9 The antenna substrate 1000C may also include an electronic component 500 disposed on the pad portion 300. The electronic component 500 may be disposed on the pad portion 300 and connected to the wiring portion 400. For example... Figure 9 As shown, electronic component 500 can be disposed on side surface 100S and connected to exposed pad portion 300.
[0083] The antenna substrate 1000C may include a protective layer P formed on the side surface 100S of the body 100, and the protective layer P has an opening that exposes at least part of the pad portion 300, and the electronic component 500 may be surface mounted on the pad portion 300 by means of a connecting conductor (e.g., a conductor block disposed in the opening).
[0084] Electronic component 500 may include at least one of PMIC, RFIC, and passive components. Passive components may be chip passive components, such as chip capacitors, chip inductors, etc., but are not limited thereto.
[0085] Figure 10 It is shown Figure 3 A schematic cross-sectional view of an example of an antenna substrate mounted on another substrate.
[0086] As described above, the antenna substrate 1000A may include a protective layer P formed on the side surface 100S of the body 100, and the protective layer P has an opening that exposes at least a portion of the pad portion 300. The antenna substrate 1000A may be surface-mounted on another substrate 2000 by means of a connecting conductor (e.g., a conductor block disposed in the opening). The other substrate 2000 may be a motherboard, a motherboard, etc., but is not limited thereto.
[0087] As described above, according to exemplary embodiments in this disclosure, an antenna substrate capable of realizing an antenna with a vertical structure without using a separate cable substrate can be provided.
[0088] While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the invention as defined by the appended claims.
Claims
1. An antenna substrate, comprising: The main body has a first surface and a second surface opposite to each other, and a side surface connecting the first surface and the second surface to each other; An antenna section is disposed on the first surface of the main body; as well as A pad portion is disposed in the body, exposed on the side surface of the body, and includes a plurality of pad layers connected to each other in a first direction from the second surface of the body toward the first surface of the body. When viewed in the first direction, at least one of the plurality of pad layers has a width in the second direction that is greater than its width in a third direction perpendicular to the second direction.
2. The antenna substrate according to claim 1, wherein, The second direction is parallel to the side surface of the body, and The third direction is a direction perpendicular to the side surface of the body.
3. The antenna substrate according to claim 1, wherein, The pad portion has a surface that is substantially coplanar with the side surface of the body.
4. The antenna substrate according to claim 1, wherein, The antenna section includes a patch antenna.
5. The antenna substrate according to claim 1, wherein, Each of the plurality of pad layers includes a pattern layer and a via layer, and The via layer connects the patterned layers in adjacent pad layers of the plurality of pad layers to each other.
6. The antenna substrate according to claim 5, wherein, On the side surface of the body, the width of the pattern layer is greater than the width of the via layer.
7. The antenna substrate according to claim 1, wherein, The body comprises a plurality of insulating layers stacked in the first direction, and The plurality of pad layers are respectively disposed on the plurality of insulating layers and in the plurality of insulating layers.
8. The antenna substrate according to claim 6, wherein, The body comprises a plurality of insulating layers stacked in the first direction, and the pattern layer is disposed on each of the plurality of insulating layers. The via layer penetrates each of the plurality of insulating layers.
9. The antenna substrate according to claim 5, wherein the antenna substrate further comprises a wiring portion disposed in the main body and comprising a plurality of wiring layers.
10. The antenna substrate according to claim 9, wherein, The pattern layer included in each of the plurality of pad layers is set at a height level substantially the same as the height level of each of the plurality of wiring layers.
11. An antenna substrate, comprising: The main body has a first surface and a second surface opposite to each other, and a side surface connecting the first surface and the second surface to each other; An antenna section is disposed on the first surface of the main body; as well as The pad portion is disposed in the main body and includes multiple pad layers, each pad layer including a pattern layer and a via layer. In this embodiment, the pattern layer and the via layer of each of the plurality of pad layers are exposed on the side surface of the body.
12. The antenna substrate according to claim 11, wherein, The pattern layer and the via layer of each of the plurality of pad layers have a surface that is substantially coplanar with the side surface of the body.
13. An antenna substrate, comprising: main body; The antenna section is disposed on the first surface of the main body; as well as A pad portion is disposed within the body and includes multiple pad layers, each pad layer including a pattern layer and a via layer, the pattern layer and the via layer being exposed on a side surface of the body perpendicular to the first surface. On the side surface of the main body, the width of the pattern layer is greater than the width of the via layer.
14. The antenna substrate according to claim 13, wherein, The pattern layer and the via layer of each of the plurality of pad layers have a surface that is substantially coplanar with the side surface of the body.
15. The antenna substrate according to claim 13, wherein, The via layer connects the patterned layers in adjacent pad layers of the plurality of pad layers to each other.
16. The antenna substrate according to claim 13, wherein, The plurality of pad layers are stacked in a first direction, and the body includes a plurality of insulating layers stacked in the first direction. The plurality of pad layers are respectively disposed on and within the plurality of insulating layers.
17. The antenna substrate according to claim 16, wherein, The pattern layer is disposed on each of the plurality of insulating layers, and The via layer penetrates each of the plurality of insulating layers.
18. The antenna substrate according to claim 16, further comprising a wiring portion disposed in the main body and comprising a plurality of wiring layers respectively disposed on the plurality of insulating layers. in, The plurality of wiring layers are connected to each other through vias in the wiring section.
19. The antenna substrate according to claim 18, wherein, The pattern layer included in each of the plurality of pad layers is set at a height level substantially the same as the height level of each of the plurality of wiring layers.
20. The antenna substrate of claim 13, further comprising a protective layer disposed on at least one of the first surface of the body, a second surface of the body opposite to the first surface, and the side surface of the body, and having an opening that exposes at least a portion of the pad portion.
21. The antenna substrate according to claim 18, wherein, The wiring section is electrically connected to the pad section through at least one of the plurality of wiring layers and the via layer of the wiring section.