A radio frequency power amplification circuit and a radio frequency front-end module

Abstract

The embodiment of the application discloses a kind of radio frequency power amplifier circuit and radio frequency front-end module, it is related to electronic circuit technical field.Therein, radio frequency power amplifier circuit includes: signal amplification unit, detection control unit and second bias unit, signal amplification unit is amplified based on the first bias signal provided by first bias unit, radio frequency input signal is handled, and radio frequency amplification signal is output, since detection control unit includes first switch, therefore it can be detected when signal amplification unit reaches back power point using the detection control unit, by controlling the first switch conduction, then control second bias unit provides second bias signal for signal amplification unit, it is realized when signal amplification unit reaches back power point, second bias unit can be controlled in time to provide second bias signal for it, can accurately and timely adapt to the actual work demand of radio frequency power amplifier circuit, to improve the linearity of radio frequency power amplifier circuit.

Description

Technical Field

[0001] This application belongs to the field of electronic circuit technology, and in particular relates to an RF power amplifier circuit and an RF front-end module. Background Technology

[0002] With the widespread adoption of 5G technology, the frequency band requirements for transmitting and receiving video signals by terminals and other communication devices are increasing. For example, to ensure compatibility between different frequency bands, multi-stage radio frequency (RF) power amplifier circuits can be implemented. Simultaneously, at least two sets of bias circuits can be used to provide bias signals to the RF power amplifier circuits; for instance, primary and secondary bias circuits can be used to provide bias signals.

[0003] However, in the existing technology, when multiple bias circuits are used to provide various bias signals for the RF power amplifier circuit, the output bias signals of some bias circuits in the multiple bias circuits are controlled by analog control signals. However, this control method cannot accurately and timely adapt to the actual working requirements of the RF power amplifier circuit, resulting in unsatisfactory linearity of the RF power amplifier circuit. Summary of the Invention

[0004] This application provides an RF power amplifier circuit and an RF front-end module to solve the problem of unsatisfactory linearity in existing RF front-end modules.

[0005] In a first aspect, embodiments of this application provide a radio frequency power amplifier circuit, including:

[0006] A signal amplification unit is configured to amplify the radio frequency input signal based on a first bias signal provided by a first bias unit and output a radio frequency amplified signal.

[0007] A detection control unit, comprising a first switch, configured to turn on the first switch when the signal amplification unit is detected to have reached the back-off power point;

[0008] The second bias unit is configured to provide a second bias signal to the signal amplification unit when the first switch is in the on state.

[0009] Furthermore, the first end of the detection control unit is coupled to the input node of the signal amplification unit, and the second end of the detection control unit is coupled to the second bias unit;

[0010] The detection control unit is configured to turn on the first switch when it detects that the power of the input node of the signal amplification unit has reached the upper limit power.

[0011] Furthermore, the detection control unit is also configured to turn off the first switch when it is detected that the signal amplification unit has not reached the backoff power point, and the second bias unit does not provide a second bias signal to the signal amplification unit when the first switch is in the off state.

[0012] Furthermore, the detection control unit also includes: a bias power supply and a detection control circuit;

[0013] One end of the detection control circuit is coupled to the input node of the signal amplification unit, the other end of the detection control circuit is connected to the first end of the bias power supply, and the second end of the bias power supply is connected to the first switch.

[0014] The detection control circuit is configured to turn on the first switch when it detects that the signal amplification unit has reached the back-off power point, and the bias power supply outputs a bias control signal to the second bias unit through the first switch, so that the second bias unit provides the second bias signal to the signal amplification unit.

[0015] Furthermore, the detection control unit also includes: a sampling unit;

[0016] One end of the sampling unit is connected to the input node of the signal amplification unit, and the other end is connected to the detection and control circuit. The sampling unit is configured to convert and process the radio frequency input signal collected from the input node of the signal amplification unit and output a DC signal to the detection and control circuit.

[0017] Furthermore, the detection control circuit is configured to determine whether the signal amplification unit has reached the fallback power point by comparing the radio frequency input signal of the input node of the signal amplification unit with a first threshold, wherein the first threshold indicates that the signal amplification unit has reached the fallback power point.

[0018] Furthermore, the signal amplification unit includes: a power amplification transistor;

[0019] The first terminal of the power amplifier transistor is connected to the output terminal of the second bias unit and the input terminal of the sampling unit, the second terminal of the power amplifier transistor is used to output the radio frequency amplified signal, and the third terminal of the power amplifier transistor is coupled to the ground terminal.

[0020] Furthermore, the sampling unit includes: a sampling transistor;

[0021] The first terminal of the sampling transistor is connected to the first terminal of the power amplifier transistor as an input terminal, the second terminal of the sampling transistor is coupled to the detection and control circuit, and the third terminal of the sampling transistor is used to couple to the ground terminal.

[0022] Furthermore, the emitter junction voltage drop V of the power amplifier transistor be1 With the emitter junction voltage drop V of the sampling transistor be2 equal.

[0023] Furthermore, the detection control circuit includes: a comparator;

[0024] The signal input terminal of the comparator is connected to the second terminal of the sampling transistor, and the signal output terminal of the comparator is connected to the first switch;

[0025] The comparator is configured to control the first switch to turn on when it is determined from the radio frequency input signal that the signal amplification unit has reached the back-off power point, so that the bias power supply outputs the bias control signal to the second bias unit through the first switch, and the second bias unit outputs the second bias signal to the signal amplification unit.

[0026] Furthermore, the second bias unit includes: a bias transistor;

[0027] The first terminal of the bias transistor is used to input the bias control signal, the second terminal of the bias transistor is used to receive the power supply voltage output by the preset power supply, and the third terminal of the bias transistor is coupled to the first terminal of the power amplifier transistor.

[0028] Furthermore, the power amplifier transistor is a first BJT transistor, including a base, a collector, and an emitter. The base of the first BJT transistor serves as the first terminal of the amplifier transistor, the collector of the first BJT transistor serves as the second terminal of the power amplifier transistor, and the emitter of the first BJT transistor serves as the third terminal of the power amplifier transistor.

[0029] The sampling transistor is a second BJT transistor, including a base, a collector, and an emitter. The base of the second BJT transistor serves as the first terminal of the sampling transistor, the collector of the second BJT transistor serves as the second terminal of the sampling transistor, and the emitter of the second BJT transistor serves as the third terminal of the sampling transistor.

[0030] or,

[0031] The power amplifier transistor is a first MOS transistor, including a gate, a source, and a drain. The gate of the first MOS transistor serves as the first terminal of the amplifier transistor, the source of the first MOS transistor serves as the second terminal of the power amplifier transistor, and the drain of the first MOS transistor serves as the third terminal of the power amplifier transistor.

[0032] The sampling transistor is a second MOS transistor, including a gate, a source, and a drain. The gate of the second MOS transistor serves as the first terminal of the sampling transistor, the source of the second MOS transistor serves as the second terminal of the sampling transistor, and the drain of the second MOS transistor serves as the third terminal of the sampling transistor.

[0033] In a first aspect, a radio frequency power amplifier circuit includes a signal amplification unit, a detection control unit, and a second bias unit. The signal amplification unit amplifies the radio frequency input signal based on a first bias signal provided by a first bias unit and outputs a radio frequency amplified signal. Since the detection control unit includes a first switch, it can control the first switch to turn on when the signal amplification unit reaches the fallback power point, thereby controlling the second bias unit to provide a second bias signal to the signal amplification unit. This enables the second bias unit to be controlled in a timely manner to provide a second bias signal when the signal amplification unit reaches the fallback power point, thus accurately and timely adapting to the actual working requirements of the radio frequency power amplifier circuit and improving the linearity of the radio frequency power amplifier circuit.

[0034] Secondly, embodiments of this application also provide a radio frequency front-end module, including the radio frequency power amplifier circuit in the first aspect.

[0035] The second aspect provides an RF front-end module that includes the RF power amplifier circuit provided in the first aspect. The RF power amplifier circuit includes a signal amplification unit, a detection control unit, and a second bias unit. The signal amplification unit amplifies the RF input signal based on a first bias signal provided by the first bias unit and outputs an RF amplified signal. Since the detection control unit includes a first switch, when the signal amplification unit is detected to have reached its fallback power point, the first switch is controlled to turn on, thereby controlling the second bias unit to provide a second bias signal to the signal amplification unit. This enables timely control of the second bias unit to provide a second bias signal when the signal amplification unit reaches its fallback power point, accurately and promptly adapting to the actual operating requirements of the RF power amplifier circuit, thereby improving the linearity of the RF power amplifier circuit.

[0036] Furthermore, since the RF power amplifier circuit included in the RF front-end module provided in this embodiment can accurately and timely adapt to the actual working requirements of the RF power amplifier circuit, thereby improving the linearity of the RF power amplifier circuit, the RF front-end module can be applied to more RF electronic products, thus broadening the application scope of the RF front-end module. Attached Figure Description

[0037] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a schematic diagram of the structure of a radio frequency power amplifier circuit provided in an embodiment of this application;

[0039] Figure 2 This is a schematic diagram of the specific structure of a radio frequency power amplifier circuit provided in an embodiment of this application. Figure 1 ;

[0040] Figure 3 This is a schematic diagram of the specific structure of a radio frequency power amplifier circuit provided in an embodiment of this application. Figure 2 ;

[0041] Figure 4 This is a specific circuit diagram of a radio frequency power amplifier circuit provided in an embodiment of this application;

[0042] Figure 5 This is a schematic diagram of the gain-power curve of an RF power amplifier circuit provided in an embodiment of this application;

[0043] Figure 6 This is a schematic diagram of the structure of a radio frequency front-end module provided in an embodiment of this application. Detailed Implementation

[0044] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0045] Please see Figure 1 , Figure 1 This is a schematic diagram of a radio frequency power amplifier circuit provided in an embodiment of this application. Figure 1As shown, a radio frequency power amplifier circuit 100 includes: a signal amplification unit 10, a detection and control unit 20, and a second bias unit 30. Specifically:

[0046] exist Figure 1 In this design, the signal amplification unit 10 is configured to amplify the RF input signal based on the first bias signal provided by the first bias unit 110, and output an amplified RF signal. The detection control unit 20 includes a first switch 21, which is configured to turn on the first switch 21 when the signal amplification unit is detected to have reached its fallback power point. The second bias unit 30 is configured to provide a second bias signal to the signal amplification unit 10 when the first switch 21 is in the on state. The fallback power point is a state point within a few dBm of the saturation power of the signal amplification unit 10. Preferably, the fallback power point in this application is the state point where the saturation power of the signal amplification unit 10 falls back by 4 dBm. It should be noted that different signal amplification units 10 or different design requirements may correspond to different fallback power points.

[0047] In this embodiment, during the process of amplifying the radio frequency input signal based on the first bias signal provided by the first bias unit 110, the detection control unit 20 controls the first switch 21 to turn on when it detects that the signal amplification unit 10 has reached the fallback power point. This, in turn, controls the second bias unit 30 to provide a second bias signal to the signal amplification unit 10, i.e., controls the second bias unit 30 to output a second bias signal to the signal amplification unit 10. Understandably, before the signal amplification unit 10 reaches the fallback power point, only the first bias unit 110 provides the first bias signal to the signal amplification unit 10 to ensure its normal operation. After the signal amplification unit 10 reaches the fallback power point, the first bias unit 110 and the second bias unit 30 work together to provide the first bias signal and the second bias signal to the signal amplification unit 10 respectively, ensuring its normal operation.

[0048] Here, when the signal amplification unit 10 reaches the fallback power point, the gain of the signal amplification unit 10 will decrease with the output power. In order to avoid the gain of the RF amplified signal output by the signal amplification unit 10 decreasing with the increase of output power when the signal amplification unit 10 reaches the fallback power point, this embodiment uses the detection control unit 20 to detect the power of the signal amplification unit 10. When the fallback power point is detected, the first switch 21 is turned on, thereby controlling the second bias unit 30 to provide a second bias signal to the signal amplification unit 10. Under the combined action of the first bias signal and the second bias signal, the gain of the signal amplification unit 10 is increased, so that it can continue to amplify the RF input signal with a higher gain and output the RF amplified signal.

[0049] In implementation, the detection control unit 20 detects the signal amplification unit 10, which may involve detecting the electrical signal at the input and / or output terminals of the signal amplification unit 10, and then comparing the detected electrical signal with a preset reference electrical signal to determine whether the signal amplification unit 10 has reached the fallback power point. For example, the detection control unit 20 may include a comparison circuit or comparator to compare the electrical signal at the input and / or output terminals of the signal amplification unit 10 with the preset reference electrical signal to determine whether the signal amplification unit 10 has reached the fallback power point.

[0050] It is understandable that, in specific implementation, different radio frequency signal amplification circuits can be used to construct the signal amplification unit 10, and different radio frequency signal amplification circuits have different back-off power points. Therefore, different reference electrical signals can be configured for the detection control unit 20, thereby adapting to different signal amplification units 10.

[0051] In one specific embodiment, the radio frequency power amplifier circuit typically includes at least two signal amplification units, and the signal amplification unit in this application is preferably the pre-amplification unit in the radio frequency power amplifier circuit.

[0052] As one embodiment, the first end of the detection control unit 20 is coupled to the input node of the signal amplification unit 10, and the second end of the detection control unit 20 is coupled to the second bias unit 30; the detection control unit 20 is configured to turn on the first switch 21 when it detects that the power of the input node of the signal amplification unit 10 has reached the upper limit power. Preferably, in this embodiment, the upper limit power is the power that indicates the signal amplification unit 10 reaches a saturation power reduction of a few dBm.

[0053] In this embodiment, the detection control unit 20 detects the power of the input node of the signal amplification unit 10, that is, it detects the input power of the signal amplification unit 10. When it detects that the power of the input node of the signal amplification unit 10 reaches the upper limit power, it indicates that the signal amplification unit 10 has reached the fallback power point, and then turns on the first switch 21.

[0054] It is easy to understand that, in specific implementation, the maximum input power of the signal amplification unit 10 can be used as the reference electrical signal in the detection control unit 20. The detection control unit 20 detects the input power of the signal amplification unit 10, compares the detected electrical signal of the input node of the signal amplification unit 10 with the reference electrical signal, and when the detected electrical signal indicates that the power of the input node of the signal amplification unit 10 has reached the upper limit power, it is determined that the signal amplification unit 10 has reached the fallback power point, and then the first switch 21 is turned on.

[0055] It should be noted that in practical applications, in order to meet the requirement that the RF power amplifier circuit 100 can amplify RF input signals of different frequency bands, two or more sets of bias signal sources are usually configured for the signal amplification unit 10 in the RF power amplifier circuit 100. For example, a main bias unit and a secondary bias unit can be configured simultaneously. However, both the main bias unit and the secondary bias unit are controlled by analog signals. Therefore, even when only the main bias unit is working, the secondary bias unit will still provide a weak second bias signal to the signal amplification unit. As a result, not only is it impossible to accurately detect the back-off power point of the signal amplification circuit, but the linearity of the RF power amplifier circuit will also be degraded.

[0056] In this embodiment, during the operation of the RF power amplifier circuit 100, the first bias unit 110 continuously provides a first bias signal to the signal amplification unit 10, while the second bias unit 20 is not connected to the loop. When the signal amplification unit 10 reaches the fallback power point, the detection control unit 20 turns on the first switch 21. At this time, the second bias unit 20 is connected to the loop, and the second bias unit 30 outputs a second bias signal to the signal amplification unit 10. That is, the first switch 21 is turned on only when the detection control unit 20 detects that the signal amplification unit 10 has reached the fallback power point, and the second bias unit 20 only provides the second bias signal to the signal amplification unit 10 when the first switch 21 is on. Therefore, the second bias unit 20 can provide the second bias signal to the signal amplification unit 10 in a timely manner when the signal amplification unit 10 reaches the fallback power point, thereby optimizing the linearity of the RF power amplifier circuit.

[0057] As an example, the detection control unit 20 is also configured to turn off the first switch 21 when the signal amplification unit 10 is detected to have not reached the backoff power point, and the second bias unit 30 does not provide a second bias signal to the signal amplification unit 10 when the first switch 21 is in the off state.

[0058] In this embodiment, the detection control unit 20 continuously detects the signal amplification unit 10. When it detects that the signal amplification unit 10 has not reached the backoff power point, it indicates that the second bias unit 30 does not need to provide the second bias signal to the signal amplification unit 10. Then, it controls the first switch 21 to turn off, thereby completely disconnecting the second bias unit 30.

[0059] It is easy to understand that during the operation of the RF power amplifier circuit 100, the first bias unit 110 is connected to the signal amplification unit 10, thereby continuously providing a first bias signal to the signal amplification unit 10. Here, the first bias unit 110 can be an existing bias circuit. Correspondingly, the second bias unit 20 can also be implemented using the same or similar bias circuit as the first bias unit 110.

[0060] The above-described solution provides an RF power amplifier circuit, comprising: a signal amplification unit, a detection control unit, and a second bias unit. The signal amplification unit amplifies the RF input signal based on a first bias signal provided by a first bias unit and outputs an RF amplified signal. Since the detection control unit includes a first switch, it can control the first switch to conduct when the signal amplification unit reaches the fallback power point, thereby controlling the second bias unit to provide a second bias signal to the signal amplification unit. This enables timely control of the second bias unit to provide a second bias signal when the signal amplification unit reaches the fallback power point, accurately and promptly adapting to the actual operating requirements of the RF power amplifier circuit, thereby improving the linearity of the RF power amplifier circuit.

[0061] Figure 2 This is a schematic diagram of the specific structure of a radio frequency power amplifier circuit provided in an embodiment of this application. Figure 1 .like Figure 2 As shown, in one embodiment, the detection control unit 20 further includes a bias power supply 22 and a detection control circuit 23.

[0062] exist Figure 2In the signal amplification unit 10, one end of the detection control circuit 23 is coupled to the input node of the signal amplification unit 10, and the other end of the detection control circuit 23 is connected to the first end of the bias power supply 22. The second end of the bias power supply 22 is connected to the first switch 21. The detection control circuit 23 is configured to turn on the first switch 21 when the signal amplification unit 10 is detected to have reached the back-off power point. The bias power supply 22 outputs a bias control signal to the second bias unit 30 through the first switch 21, so that the second bias unit 30 provides a second bias signal to the signal amplification unit 10.

[0063] In this embodiment, the detection control circuit 23 is connected to the input node of the signal amplification unit 10 to directly detect the signal power of the signal amplification unit 10. When the signal amplification unit 10 is detected to have reached the fallback power point, the first switch 21 is turned on, allowing the bias power supply 22 to output a bias control signal to the second bias unit 30 through the turned-on first switch 21. Under the action of the bias control signal, the second bias unit 30 provides a second bias signal to the signal amplification unit 10.

[0064] In a specific implementation, the detection control circuit 23 can be a comparator circuit with power comparison function to detect the signal power of the signal amplification unit 10 and compare it with a preset power threshold. Based on the comparison result, when the signal amplification unit 10 reaches the fallback power point, the first switch 21 is turned on, allowing the bias power supply 22 to output a bias control signal to the second bias unit 30 through the turned-on first switch 21. Under the action of the bias control signal, the second bias unit 30 provides a second bias signal to the signal amplification unit 10.

[0065] As one possible implementation of this embodiment, the detection control circuit 23 is configured to compare the radio frequency input signal of the input node of the signal amplification unit 10 with a first threshold to determine whether the signal amplification unit 10 has reached the fallback power point. The first threshold indicates that the signal amplification unit 10 has reached the fallback power point.

[0066] In this embodiment, the detection control circuit 23 detects the input power of the radio frequency input signal at the input node of the signal amplification unit 10. Since the first threshold indicates that the signal amplification unit 10 has reached the fallback power point, the circuit compares the radio frequency input signal at the input node of the signal amplification unit 10 with the first threshold. When the radio frequency input signal is equal to or greater than the first threshold, it indicates that the signal amplification unit 10 has reached the fallback power point. This controls the first switch 21 to be turned on, so that the bias power supply 22 can output a bias control signal to the second bias unit 30 through the first switch 21, and the second bias unit 30 provides a second bias signal to the signal amplification unit 10.

[0067] Figure 3This is a schematic diagram of the specific structure of a radio frequency power amplifier circuit provided in an embodiment of this application. Figure 2 .like Figure 3 As shown, in one embodiment, the detection control unit 20 further includes a sampling unit 24.

[0068] One end of the sampling unit 24 is connected to the input node of the signal amplification unit 10, and the other end is connected to the detection control circuit 23. The sampling unit 24 is configured to convert and process the radio frequency input signal collected from the input node of the signal amplification unit 10 and output a DC signal to the detection control circuit 23.

[0069] In this embodiment, the sampling unit 24 acquires signals from the input node of the signal amplification unit 10, and after converting and processing the acquired radio frequency input signal, obtains a DC signal that characterizes the corresponding radio frequency input signal. That is, the DC signal can be used to characterize the electrical properties of the radio frequency input signal, and can also reflect the operating state of the signal amplification unit 10, such as the gain and output power of the signal amplification unit 10.

[0070] To improve the detection efficiency of the signal amplification unit 10 and simplify the strategy for determining whether the signal amplification unit 10 is at the fallback power point, this embodiment sets up a sampling unit 24 between the detection control circuit 23 and the input node of the signal amplification unit 10. This sampling unit 24 converts the acquired radio frequency (RF) input signal into a DC signal, which is then used as the input signal for the detection control circuit 23. Here, instead of the detection control circuit 23 directly sampling and judging the RF input signal, the sampling unit 24 converts the acquired RF input signal and outputs it to the detection control circuit 23 as a DC signal. This allows the detection control circuit 23 to directly compare the DC signal with a preset reference signal to determine whether the signal amplification unit 10 is at the fallback power point.

[0071] In a specific implementation, the sampling unit 24 can be a signal conversion circuit with a sampling terminal. The sampling terminal is connected to the input node of the signal amplification unit 10, and the output terminal is connected to the detection and control circuit 23. The sampling terminal is used to collect the radio frequency input signal of the input node of the signal amplification unit 10, convert the radio frequency input signal into a DC signal, and output it to the detection and control circuit 23 through the output terminal.

[0072] It is understandable that the sampling unit 24 can also use existing sampling circuits, such as resistor sampling circuits or diode sampling circuits, all of which can convert the acquired RF input signal into a DC signal. In practical applications, different sampling circuits can be selected according to actual needs and circuit design area, so they will not be elaborated here.

[0073] Figure 4 This is a specific circuit diagram of a radio frequency power amplifier circuit provided in an embodiment of this application. For example... Figure 4 As shown, in one embodiment, the signal amplification unit 10 includes a power amplification transistor Q1.

[0074] The first terminal of the power amplifier transistor Q1 is connected to the output terminal of the second bias unit 20 and the input terminal of the sampling unit 24. The second terminal of the power amplifier transistor Q1 is used to output the radio frequency amplified signal. The third terminal of the power amplifier transistor Q1 is coupled to the ground terminal.

[0075] In this embodiment, the first terminal of the power amplifier transistor Q1 is also connected to the first bias unit 110, and during the continuous operation of the RF power amplifier circuit 100, the first bias unit 110 continuously provides a first bias signal to the power amplifier transistor Q1. The input terminal of the sampling unit 24 is connected to the first terminal of the power amplifier transistor Q1, so it can collect the RF input signal input to the first terminal of the power amplifier transistor Q1, and then convert the RF input signal into a DC signal and transmit it to the detection and control circuit 23. Here, although the first terminal of the power amplifier transistor Q1 is connected to the output terminal of the second bias unit 20, when the first switch 21 is not turned on, the second bias unit 20 is in an open circuit state. At this time, the second bias unit 20 cannot output a second bias signal to the first terminal of the power amplifier transistor Q1 through its output terminal.

[0076] Optionally, the signal amplification unit 10 may further include a first inductor L1, through which the power amplification transistor Q1 can be connected to a preset power supply VDD. Specifically, the second terminal of the power amplification transistor Q1 is connected to the first terminal of the first inductor L1, and the second terminal of the first inductor L1 is connected to the preset power supply VDD.

[0077] In practical applications, the second terminal of the power amplifier transistor Q1 is also used to connect to the next stage signal amplification unit, for example, to connect to the first terminal of the power amplifier transistor in the next stage signal amplification unit, so as to output the radio frequency amplified signal to the next stage signal amplification unit for further amplification.

[0078] like Figure 4 As shown, in one embodiment, the sampling unit 24 includes a sampling transistor M1.

[0079] The first terminal of the sampling transistor M1 is connected to the first terminal of the power amplifier transistor Q1 as the input terminal. The second terminal of the sampling transistor M1 is coupled to the detection control circuit 23. The third terminal of the sampling transistor M1 is used to couple to the ground terminal.

[0080] In this embodiment, the first terminal of the sampling transistor M1 serves as both an input terminal and a signal sampling terminal, used to sample the radio frequency (RF) input signal from the first terminal of the power amplifier transistor Q1. Here, the sampling transistor M1 is essentially a mirror branch or a mapped branch of the power amplifier transistor Q1. By acquiring the RF input signal from the first terminal of the power amplifier transistor Q1 and outputting this RF input signal as a DC signal to the detection and control circuit 23, the operating state of the power amplifier transistor Q1 during the amplification process of the RF input signal is mirrored and restored. This allows the detection and control circuit 23 to directly use this DC signal to determine whether the signal amplification unit 10 has reached the fallback power point.

[0081] As an example, the emitter junction voltage drop V of the power amplifier transistor Q1 be1 With the emitter junction voltage drop V of sampling transistor M1 be2 equal.

[0082] In practical applications, the sampling transistor M1 can also be a transistor with the same performance or signal as the power amplifier transistor Q1, so that the sampling transistor M1 can fully map the process of the power amplifier transistor Q1 amplifying based on the RF input signal, and thus output a DC signal that can characterize whether the power amplifier transistor Q1 has reached the back-off power point.

[0083] In a practical implementation, the power amplifier transistor Q1 and the sampling transistor M1 can be either BJT transistors or MOS transistors.

[0084] As an example, power amplifier transistor Q1 is a first BJT transistor, including a base, collector, and emitter. The base of the first BJT transistor serves as the first terminal of power amplifier transistor Q1, the collector serves as the second terminal, and the emitter serves as the third terminal. Correspondingly, sampling transistor M1 is a second BJT transistor, including a base, collector, and emitter. The base of the second BJT transistor serves as the first terminal, the collector serves as the second terminal, and the emitter serves as the third terminal.

[0085] As another example, power amplifier transistor Q1 is a first MOSFET, including a gate, a source, and a drain. The gate of the first MOSFET serves as the first terminal of power amplifier transistor Q1, the source of the first MOSFET serves as the second terminal of power amplifier transistor Q1, and the drain of the first MOSFET serves as the third terminal of power amplifier transistor Q1. Sampling transistor M1 is a second MOSFET, including a gate, a source, and a drain. The gate of the second MOSFET serves as the first terminal of sampling transistor M1, the source of the second MOSFET serves as the second terminal of sampling transistor M1, and the drain of the second MOSFET serves as the third terminal of sampling transistor M1.

[0086] Here, the sampling transistor M1 is essentially a mirror or mapped branch of the power amplifier transistor Q1. It acquires the RF input signal from the first terminal of the power amplifier transistor Q1 and outputs this RF input signal as a DC signal to the detection and control circuit 23. This mirrors and recreates the operating state of the power amplifier transistor Q1 during the amplification process of the RF input signal, allowing the detection and control circuit 23 to directly use this DC signal to determine whether the signal amplification unit 10 has reached the fallback power point. To improve the accuracy of the mirror image of the sampling transistor M1 and the power amplifier transistor Q1, the sampling transistor M1 and the power amplifier transistor Q1 are configured as transistors of the same type. Transistors of the same type have the same Vbe voltage or the same Vgd voltage; the only difference between transistors of the same type is their actual area. Therefore, configuring the sampling transistor M1 and the power amplifier transistor Q1 as transistors of the same type allows the DC signal output by the sampling transistor M1 to accurately characterize or reflect the operating state of the power amplifier transistor Q1 when it outputs the RF amplified signal.

[0087] Furthermore, in practical applications, the actual area of ​​transistors is a controllable and known parameter. Therefore, while ensuring that the sampling transistor M1 and the power amplifier transistor Q1 have the same Vbe voltage or the same Vgd voltage, the range of DC signal output by the sampling transistor M1 can be adjusted by configuring the area ratio between the sampling transistor M1 and the power amplifier transistor Q1. This allows the solution to accurately characterize or reflect the operating state of the power amplifier transistor Q1 when it outputs the RF amplified signal, while also being adaptable to more application scenarios, thus improving the applicability of the solution.

[0088] In some embodiments, since the equivalent replacement devices for the functions or roles of various power amplifier transistors and other devices are common knowledge in the art, they will not be described in detail below.

[0089] like Figure 4 As shown, in one embodiment, the detection control circuit 23 includes a comparator U1.

[0090] The signal input terminal IN of comparator U1 is connected to the second terminal of sampling transistor M1, and the signal output terminal OUT of comparator U1 is connected to the first switch 21. Comparator U1 is configured to control the first switch 21 to turn on when it is determined from the RF input signal that the signal amplification unit 10 has reached the back-off power point, so that the bias power supply 22 outputs a bias control signal to the second bias unit 30 through the first switch 21, so that the second bias unit 30 outputs a second bias signal to the signal amplification unit 10.

[0091] In this embodiment, the signal input terminal IN of comparator U1 is used to input the DC signal output by sampling transistor M1. By comparing this DC signal with a preset reference signal, it can be determined whether the signal amplification unit 10 has reached the back-off power point. When it is determined that the signal amplification unit 10 has reached the back-off power point, the first switch 21 is turned on through the signal output terminal OUT, causing the bias power supply 22 to output a bias control signal to the second bias unit 30 through the first switch 21, so that the second bias unit 30 outputs a second bias signal to the signal amplification unit 10.

[0092] In practical implementation, comparator U1 can also change its preset reference signal by configuring the corresponding reference signal input terminal, so as to adapt to the judgment requirements of different back-off power points corresponding to different signal amplification units.

[0093] like Figure 4 As shown, in one embodiment, the second bias unit 30 includes a bias transistor M2.

[0094] The first terminal of the bias transistor M2 is used to input the bias control signal, the second terminal of the bias transistor M2 is used to receive the power supply voltage output by the preset power supply VDD, and the third terminal of the bias transistor M2 is coupled to the first terminal of the power amplifier transistor Q1.

[0095] In this embodiment, the second terminal of the bias transistor M2 is coupled to a preset power supply VDD, thus enabling it to receive the supply voltage output by the preset power supply VDD. The first terminal of the bias transistor M2 is used to connect to the first switch 21. When the first switch 21 is turned on, the bias transistor M2 receives a bias control signal through its first terminal, and then, under the action of the bias control signal and the supply voltage, provides a second bias signal to the first terminal of the power amplifier transistor Q1 through its third terminal.

[0096] Optionally, the second bias unit 30 further includes: a first resistor R1, a first diode D1, a second diode D2, and a second inductor L2. Specifically: the second terminal of the bias transistor M2 is coupled to a preset power supply VDD through the second inductor L2; the first diode D1 and the second diode D2 are connected in series between the first terminal of the bias transistor M2 and the ground terminal; and the first resistor R1 is connected between the third terminal of the bias transistor M2 and the first terminal of the power amplifier transistor Q1.

[0097] In all embodiments of this application, the first bias unit 110 and the second bias unit 30 can be implemented using a bias circuit with the same bias transistor. The only difference between the first bias unit 110 and the second bias unit 30 is that the first bias unit 110 continuously provides a first bias signal to the signal amplification unit 10, while the second bias unit 30 can only receive a bias control signal when the first switch 21 is turned on, that is, the second bias unit 30 only provides a second bias signal to the signal amplification unit 10 when the first switch 21 is turned on.

[0098] Figure 5 A schematic diagram of the gain-power curve of an RF power amplifier circuit provided in this embodiment is shown. Figure 5 In the diagram, curve L51 represents the output power and gain of power amplifier transistor Q1; curve L52 represents the output power and gain of the next-stage power amplifier transistor (not shown in the diagram) after power amplifier transistor Q1; curve L53 represents the output power and gain under the combined action of power amplifier transistor Q1 and the next-stage power amplifier transistor (not shown in the diagram); and curve L54 represents the output power and gain of bias transistor M2 under analog signal control.

[0099] It should be noted that when power amplifier transistor Q1 is used in conjunction with a next-stage power amplifier transistor, the next-stage power amplifier transistor is usually configured such that its gain rise curve coincides with the gain fall curve of power amplifier transistor Q1.

[0100] like Figure 5 As shown, assuming point P1 is the back-off power point P1 of the signal amplification unit 10, that is, the back-off power point of the power amplifier transistor Q1, since the gain of the power amplifier transistor Q1 decreases at this time, but the gain of its next stage power amplifier transistor increases, the curve L53 obtained by the interaction of the two can maintain its inherent gain at the back-off power point P1, that is, ensure the overall stability of the RF power amplifier circuit 100.

[0101] exist Figure 5In the figure, curve L54 is the output curve of the second bias unit 30 under analog signal control. That is, when the bias transistor M2 is not involved in the RF signal amplification, there is still gain under the analog control signal. This means that when the bias transistor M2 is required to participate in the operation, it cannot output the corresponding bias signal when the backoff power point P1 arrives, which means it cannot meet the actual requirements.

[0102] Combination Figure 4 In the RF power amplifier circuit 100 provided in this embodiment, the sampling transistor M1 samples the signal at the first terminal of the power amplifier transistor Q1, and then converts the sampled RF input signal containing the first bias signal into a DC signal, which is then transmitted to the comparator U1. The comparator U1 compares the DC signal with a preset reference signal, and then controls the first switch 21 to turn on when it determines that the signal amplification unit 10 has reached the back-off power point. This causes the bias power supply 22 to output a bias control signal to the second bias unit 30 through the first switch 21, which in turn causes the bias power supply 22 to output a bias control signal to the bias transistor M2 through the first switch 21. This causes the bias transistor M2 to output a second bias signal to the power amplifier transistor Q1 in the signal amplification unit 10. Here, since the first switch 21 is only turned on by the comparator U1 when it determines that the signal amplification unit 10 has reached the back-off power point, the second bias unit 30 cannot be connected to the circuit when the signal amplification unit 10 has not reached the back-off power point. Therefore, the bias transistor M2 is turned off, and no second bias signal is output to the power amplification transistor Q1. Based on this, after the sampling transistor M1 acquires the RF input signal, it converts the RF input signal to obtain a DC signal, which is then input to the comparator U1. The comparator U1 determines whether the DC signal is equal to or greater than a preset reference signal. If the DC signal is equal to or greater than the preset reference signal, it is determined that the signal amplification unit 10 has reached the back-off power point. At this time, the comparator U1 outputs a control signal to the first switch 21, thereby controlling the first switch 21 to turn on and connecting the second bias unit 30 to the circuit. When the first switch 21 is turned on, the bias power supply 22 outputs a bias control signal to the bias transistor M2 through the first switch 21, so that the bias transistor M2 outputs a second bias signal to the power amplifier transistor Q1 in the signal amplification unit 10. This enables the second bias unit 30 to provide a second bias signal in a timely manner when the signal amplification unit 10 reaches the power fallback point. This allows the second bias unit to accurately and timely adapt to the actual working requirements of the RF power amplifier circuit, making the overall gain curve of the RF power amplifier circuit flatter and the linearity better.

[0103] Furthermore, since the RF power amplifier circuit included in the RF front-end module provided in this embodiment can accurately and timely adapt to the actual working requirements of the RF power amplifier circuit, thereby improving the linearity of the RF power amplifier circuit, the RF front-end module can be applied to more RF electronic products, thus broadening the application scope of the RF front-end module.

[0104] Figure 6 A schematic diagram of the structure of a radio frequency front-end module provided in an embodiment of this application is shown. Figure 6 As shown, an RF front-end module 200 includes an RF power amplifier circuit 100 as described in the above embodiments.

[0105] It is understood that since the content and implementation of the radio frequency front-end module 200 provided in this embodiment are related to this application and have been described in detail above, they will not be repeated here.

[0106] The units in the terminal of this application embodiment can be merged, divided, and deleted according to actual needs.

[0107] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A radio frequency power amplifier circuit, characterized in that, The radio frequency power amplifier circuit includes: A signal amplification unit is configured to amplify the radio frequency input signal based on a first bias signal provided by a first bias unit and output a radio frequency amplified signal. A detection control unit, comprising a first switch, is configured to: turn on the first switch when the signal amplification unit is detected to have reached the fallback power point; and turn off the first switch when the signal amplification unit is detected not to have reached the fallback power point. The second bias unit is configured to: provide a second bias signal to the signal amplification unit when the first switch is in the ON state; and not provide a second bias signal to the signal amplification unit when the first switch is in the OFF state.

2. The radio frequency power amplifier circuit according to claim 1, characterized in that, The first end of the detection control unit is coupled to the input node of the signal amplification unit, and the second end of the detection control unit is coupled to the second bias unit; The detection control unit is configured to turn on the first switch when it detects that the power of the input node of the signal amplification unit has reached the upper limit power.

3. The radio frequency power amplifier circuit according to claim 1, characterized in that, The detection control unit further includes: a bias power supply and a detection control circuit; One end of the detection control circuit is coupled to the input node of the signal amplification unit, the other end of the detection control circuit is connected to the first end of the bias power supply, and the second end of the bias power supply is connected to the first switch. The detection control circuit is configured to turn on the first switch when it detects that the signal amplification unit has reached the back-off power point, and the bias power supply outputs a bias control signal to the second bias unit through the first switch, so that the second bias unit provides the second bias signal to the signal amplification unit.

4. The radio frequency power amplifier circuit according to claim 3, characterized in that, The detection and control unit further includes: a sampling unit; One end of the sampling unit is connected to the input node of the signal amplification unit, and the other end is connected to the detection and control circuit. The sampling unit is configured to convert and process the radio frequency input signal collected from the input node of the signal amplification unit and output a DC signal to the detection and control circuit.

5. The radio frequency power amplifier circuit according to claim 3, characterized in that, The detection control circuit is configured to compare the radio frequency input signal of the input node of the signal amplification unit with a first threshold to determine whether the signal amplification unit has reached the fallback power point, wherein the first threshold indicates that the signal amplification unit has reached the fallback power point.

6. The radio frequency power amplifier circuit according to claim 4, characterized in that, The signal amplification unit includes: a power amplification transistor; The first terminal of the power amplifier transistor is connected to the output terminal of the second bias unit and the input terminal of the sampling unit, the second terminal of the power amplifier transistor is used to output the radio frequency amplified signal, and the third terminal of the power amplifier transistor is coupled to the ground terminal.

7. The radio frequency power amplifier circuit according to claim 6, characterized in that, The sampling unit includes: a sampling transistor; The first terminal of the sampling transistor is connected to the first terminal of the power amplifier transistor as an input terminal, the second terminal of the sampling transistor is coupled to the detection and control circuit, and the third terminal of the sampling transistor is used to couple to the ground terminal.

8. The radio frequency power amplifier circuit according to claim 7, characterized in that, The emitter junction voltage drop V of the power amplifier transistor be1 With the emitter junction voltage drop V of the sampling transistor be2 equal.

9. The radio frequency power amplifier circuit according to claim 7, characterized in that, The detection control circuit includes: a comparator; The signal input terminal of the comparator is connected to the second terminal of the sampling transistor, and the signal output terminal of the comparator is connected to the first switch; The comparator is configured to control the first switch to turn on when it is determined from the radio frequency input signal that the signal amplification unit has reached the back-off power point, so that the bias power supply outputs the bias control signal to the second bias unit through the first switch, and the second bias unit outputs the second bias signal to the signal amplification unit.

10. The radio frequency power amplifier circuit according to claim 6, characterized in that, The second bias unit includes: a bias transistor; The first terminal of the bias transistor is used to input the bias control signal, the second terminal of the bias transistor is used to receive the power supply voltage of the preset power supply output, and the third terminal of the bias transistor is coupled to the first terminal of the power amplifier transistor.

11. The radio frequency power amplifier circuit according to claim 7, characterized in that, The power amplifier transistor is a first BJT transistor, including a base, a collector, and an emitter. The base of the first BJT transistor serves as the first terminal of the amplifier transistor, the collector of the first BJT transistor serves as the second terminal of the power amplifier transistor, and the emitter of the first BJT transistor serves as the third terminal of the power amplifier transistor. The sampling transistor is a second BJT transistor, including a base, a collector, and an emitter. The base of the second BJT transistor serves as the first terminal of the sampling transistor, the collector of the second BJT transistor serves as the second terminal of the sampling transistor, and the emitter of the second BJT transistor serves as the third terminal of the sampling transistor. or, The power amplifier transistor is a first MOS transistor, including a gate, a source, and a drain. The gate of the first MOS transistor serves as the first terminal of the amplifier transistor, the source of the first MOS transistor serves as the second terminal of the power amplifier transistor, and the drain of the first MOS transistor serves as the third terminal of the power amplifier transistor. The sampling transistor is a second MOS transistor, including a gate, a source, and a drain. The gate of the second MOS transistor serves as the first terminal of the sampling transistor, the source of the second MOS transistor serves as the second terminal of the sampling transistor, and the drain of the second MOS transistor serves as the third terminal of the sampling transistor.

12. A radio frequency front-end module, comprising the radio frequency power amplifier circuit according to any one of claims 1 to 11.

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